40th week of 2013 patent applcation highlights part 78 |
Patent application number | Title | Published |
20130262677 | MANAGING CAPACITY ON DEMAND IN A SERVER CLOUD - A cloud capacity on demand manager manages capacity on demand for servers in a server cloud. The cloud capacity on demand manager may borrow capacity from one or more servers and lend the capacity borrowed from one server to a different server in the server cloud. When the server cloud is no longer intact, capacity borrowed from servers no longer in the server cloud is disabled, and servers no longer in the server cloud reclaim capacity that was lent to the server cloud. | 2013-10-03 |
20130262678 | DIFFERENTIATED SERVICE-BASED GRACEFUL DEGRADATION LAYER - The differentiated service-based graceful degradation layer (DSGDL) allows cloud-based architectures to operate through and recover from periods of limited capability. The DSGDL protects and continues serving higher priority requests with the best possible response even as the underlying cloud-based services deteriorate. The DSGDL offloads lower priority requests to lower-grade secondary capability that can be dynamically provisioned in order to reserve the best capability for maintaining high priority service (e.g., by re-directing lower priority requests to a slightly out-of-date cached dataset, and reserve the primary consistent database for higher priority requests). The DSGDL 1) implements an overlay network over existing cloud services to route and enforce priority requests, and 2) provisions on-demand computing nodes and sites to provide secondary capability for service requests as needed. | 2013-10-03 |
20130262679 | Dataset Processing Using Network Performance Information - Dataset processing based on network performance information. Processing of large datasets can be based on particular network computing resources that are selected based on network performance information (e.g., link speed, latency, energy efficiency, etc.) associated with the network computing resources. With the network performance information, a network topology of the computing resources can be created that considers not only the processing capabilities of the network computing resources but also the performance of the network that interconnects the computing devices. | 2013-10-03 |
20130262680 | DYNAMIC SERVICE RESOURCE CONTROL - The embodiments may provide a data processing apparatus for controlling service resource allocation. The data processing apparatus including a resource hints controller configured to obtain a resource control request before a task is to be executed on a virtual machine having resources allocated to a processing unit, a memory unit and a storage unit. The resource hints controller is configured to obtain a usage of the resources allocated to at least one of the processing unit, the memory unit and the storage unit of the virtual machine, and increase the resources allocated to the at least one of the processing unit, the memory unit and the storage unit in response to the resource control request based on the usage being equal to or above a threshold level. | 2013-10-03 |
20130262681 | APPARATUS AND METHOD FOR PROVIDING SERVICE AVAILABILITY TO A USER VIA SELECTION OF DATA CENTERS FOR THE USER - A capability is provided for improving service availability experienced by a user requesting access to a service via a user device, where the service has multiple service instances available from multiple data centers. A set of servicing data centers is selected for the user device. The set of servicing data centers is selected from a set of candidate data centers. The set of servicing data centers is selected from the set of candidate data centers in a manner for maximizing the independence/orthogonality of the network paths between the user device and the servicing data centers. The set of servicing data centers includes two or more of the candidate data centers from which the user device may access the service, thereby providing the user device with a primary service instance and one or more backup service instances which may be used to access the service. | 2013-10-03 |
20130262682 | MANAGING CAPACITY ON DEMAND IN A SERVER CLOUD - A cloud capacity on demand manager manages capacity on demand for servers in a server cloud. The cloud capacity on demand manager may borrow capacity from one or more servers and lend the capacity borrowed from one server to a different server in the server cloud. When the server cloud is no longer intact, capacity borrowed from servers no longer in the server cloud is disabled, and servers no longer in the server cloud reclaim capacity that was lent to the server cloud. | 2013-10-03 |
20130262683 | PARALLEL COMPUTER SYSTEM AND CONTROL METHOD - A disclosed control method is executed by a node of plural nodes that are connected in a parallel computer system through a network. The control method includes obtaining property data representing a property of accesses to data stored in a storage device in a first node of the plural nodes for a job to be executed by using data stored in the storage device, and determining a resource to be allocated to a cache among resources included in the parallel computer system and the network based on the obtained property data. | 2013-10-03 |
20130262684 | METHODS FOR IMPROVED PROVISIONING OF INFORMATION TECHNOLOGY RESOURCES AND DEVICES THEREOF - A method, non-transitory computer readable medium, and information technology (IT) resource optimization apparatus that improves the provisioning of IT resources includes obtaining for each of a plurality of users of IT resources, demographic attributes and an entitlement record comprising an indication of an assigned one or more of the IT resources. For each of the demographic attributes, which of one or more of the IT resources assigned to a threshold number of the plurality of users sharing the demographic attribute are identified. For each of the plurality of users, a recommended provisioning profile is generated based on the identified IT resources. For one or more of the plurality of users, provisioning recommendation(s) are determined based on a comparison of the recommended provisioning profile for the one or more users to the entitlement record for the one or more users. The determined provisioning recommendation(s) are output. | 2013-10-03 |
20130262685 | SYSTEM AND METHOD FOR MONITORING AND MANAGING DATA CENTER RESOURCES INCORPORATING A COMMON DATA MODEL REPOSITORY - A system is disclosed that forms a base platform that enables a plurality of objects to be used in forming a plurality of different domain models. The system may have a common data model repository (CDMR) having an object relational mapping layer for mapping instances of the objects to persistent storage. The instances of objects may represent information that includes connections and control capabilities for at least certain ones of the instances of objects, and the CDMR may implement the connections and control capabilities in relation to managed elements. | 2013-10-03 |
20130262686 | METHOD FOR ORGANIZING A COLLABORATIVE EVENT AND SYSTEM EMPLOYING SAME - A method of establishing a collaborative event comprises creating an event session having an event identifier and setting up a wireless network to which one or more participant computing devices can connect having a network identifier associated with said event identifier. | 2013-10-03 |
20130262687 | CONNECTING A MOBILE DEVICE AS A REMOTE CONTROL - Methods and systems for connecting a mobile device to a host machine cause the mobile device to act as a remote control for an application running on the host machine. When a user requests a connection, the host application generates an access key, transmits it to a web server, outputs a representation of the key, transitions to listening mode, and receives a connection request from the mobile device via the web server. The mobile device gains access to the web server by capturing the representation of the access key output by the host machine, and extracting the key from the captured representation, presenting the key to the web server. When the host application receives via the web server the request from the mobile device to connect to the computer, a connection between the computer and the mobile device via the web server is established. | 2013-10-03 |
20130262688 | METHOD AND SYSTEM TO DISTRIBUTE POLICIES - A method to distribute policies may include transmitting one of an identification (ID) assigned to a policy template or the policy template associated with each policy to an enforcement point or selected enforcement points for enforcement. The method may also include transmitting one set of parameters to be used in each policy template to the enforcement point. | 2013-10-03 |
20130262689 | MULTIPLEXER FOR MULTI-TENANT ARCHITECTURES - A tenant multiplexer in an administrative tenant of a multi-tenant software architecture can call an administrative agent in the administrative tenant and receive, from the administrative agent, an action framework and a trusted connection protocol for accessing each of the plurality of client tenants. The trusted connection protocol can establish, without tenant-specific authentication information, a trusted system connection to an update agent in each of the plurality of client tenants. An action framework can be simultaneously implemented using the update agent of each of at least a subset of the plurality of client tenants under control of the multiplexer via the trusted system connection to begin execution of the software process for the at least the subset of client tenants. | 2013-10-03 |
20130262690 | COMMUNICATION CONTROL SYSTEM AND COMMUNICATION CONTROL METHOD - A computer includes a WAN driver that causes data to be transmitted from a guest domain to a computer to use a first protocol, a WANonTCP/IP driver and a TCP/IP driver that add identification information of the guest domain to the data and cause the data to use a second protocol, and a LAN driver that transmits the data to the line accommodation apparatus using the second protocol. The line accommodation apparatus includes a line GW control unit that acquires the identification information of the guest domain from the data, extracts a line card corresponding to the identification information, and causes the received data to use a third protocol; a line card driver that transmits the data to the computer via the extracted line card using the third protocol. | 2013-10-03 |
20130262691 | System and Methods of Media Streaming using RTSP with Reduced Delays - Systems and method of media streaming using the Real Time Streaming Protocol (RTSP) with reduced delays in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, a network client includes memory containing a media decoder application and a client application and a processor, where the client application configures the processor to receive portions of streamed media and buffer the received portions of streamed media in the media buffer, provide portions of streamed media buffered in the media buffer to the media decoder application for decoding once a buffering criteria has been met, receive an end of file message, and provide the remaining streamed media buffered in the media buffer to the media decoder application for decoding in response to the end of file message, wherein the media decoder application configures the processor to decode portions of streamed media. | 2013-10-03 |
20130262692 | System and Methods of Media Streaming from a Media Server using RTSP with Reduced Delays - Systems and method of media streaming using the Real Time Streaming Protocol (RTSP) with reduced delays in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, a media server includes media storage containing stored media, wherein the media server is configured to stream media stored in the media storage, determine the end of the streamed media, where the end of the streamed media signals that the streamed media has been fully streamed, create an end of file message, where the end of file message causes the recipient of the end of file message to complete decoding of any buffered media irrespective of any other buffering criteria, and send the end of file message. | 2013-10-03 |
20130262693 | METHODS AND APPARATUS FOR SEGMENTING, DISTRIBUTING, AND RESEGMENTING ADAPTIVE RATE CONTENT STREAMS - Methods by a content distribution system and related adaptive streaming segmenter nodes and adaptive streaming re-segmenter nodes are disclosed. An adaptive streaming re-segmenter node includes at least one network interface that receive a series of segmented files for each of a first plurality of content streams having different coding bit rates of a same source media content. Circuitry combines the series of segmented files to generate a second plurality of content streams having different coding bit rates. The circuitry selects among a plurality of distribution container formats responsive to a streaming protocol used by one of the user equipment nodes, and selects among the second plurality of content streams responsive to available resources at the user equipment node. The circuitry also communicates the selected one of the second plurality of content streams toward the user equipment node using the selected distribution container format. | 2013-10-03 |
20130262694 | Buffering in HTTP Streaming Client - A buffer model in an HTTP streaming client may include receiving a first content fragment of a first content stream in response to a first HTTP request. It may also include receiving a second content fragment of a second content stream in response to a second HTTP request. The buffer model may further include storing the first and second content fragments in first and second buffers of a plurality of configurable buffers. The first and second content fragments may be multiplexed into a third buffer of the plurality of buffers. The multiplexed first and second content fragments may be stored in a fourth buffer of the plurality of buffers for playback. The buffer model may be implemented by an application. The buffers may be designed based on one or more constraints. | 2013-10-03 |
20130262695 | Lossless Data Streaming to Multiple Clients - System and method for streaming data. A host device that includes a server may acquire data from a data source. The server may receive a request for data from at least one client device over a network via a lossless transmission protocol, wherein the request may specify a range of data to stream to the at least one client device. The server may stream the data over the network to the at least one client device via the lossless transmission protocol in accordance with the request. The at least one client device may receive and process the streamed data. | 2013-10-03 |
20130262696 | PROXY SERVER APPARATUS, CLIENT TERMINAL APPARATUS, REMOTE ACCESS SYSTEM, TRANSFER CONTROL METHOD, ACCESS METHOD, AND RECORDING MEDIUM - A proxy server includes: a storage unit that stores a correspondence relationship between a one-time URL and a general URL in association with an accessible period during which access using the one-time URL, is permitted or a number of times the access is permitted; a restoration unit that restores the one-time URL to the general URL; a separation unit that separates the composite URL into the one-time URL and the general URL; an access authentication unit that performs access authentication using the one-time URI, in a case where the URL included in the access request is the one-time URL and using the one-time URL separated from the composite URL in a case where the URL included in the access request is the composite URL; and a transfer unit that transmits to the web server the access request and transfers a resource to the client terminal apparatus. | 2013-10-03 |
20130262697 | System and Method for Routing Content Based on Real-Time Feedback - A method includes receiving at a cache server a content request from a client system, determining that the cache server is overloaded in response to receiving the content request, and in response to determining that the cache server is overloaded, returning to the client system a domain redirection response including a load status of the cache server. | 2013-10-03 |
20130262698 | METHOD AND ROUTER FOR SERVICE NAMED ROUTING - A first router sends to neighboring routers an interest packet associated with the at least one service including a service name indicator and a unique interest tag. A second router receives the interest packet, sends the interest packet to a server of the at least two servers and stores the interest tag together with the incoming and outgoing connection port in its interest route table. The server attaches data including load data of the at least one service to the interest packet and sends the interest packet back to the second router. The second router calculates service performance data based on the data attached, stores the service performance data in its service performance table and updates the routing table based on an evaluation of the service performance data, and sends the interest packet via its incoming connection port as associated by the interest route table to the first router. | 2013-10-03 |
20130262699 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND PROGRAM - There is provided an information processing apparatus including a distribution information acquisition section which acquires distribution information indicating that content-related data is distributed from a first user to a second user through a social network to which the first user and the second user belong, and a route information generation section which generates route information based on the distribution information, the route information indicating a route through which the content-related data is distributed among users belonging to the social network. | 2013-10-03 |
20130262700 | INFORMATION PROCESSING SYSTEM AND VIRTUAL ADDRESS SETTING METHOD - An information processing system includes an information processing apparatus, which includes an arithmetic processing unit and a control device that is connected to the arithmetic processing unit, and includes a management device that manages a virtual address. When a communication abnormality occurs between the management device and the control device, the management device instructs the control device to perform a start via the arithmetic processing unit. When the control device is instructed by the arithmetic processing unit to perform a start, the control device transfers the virtual address stored in a storing unit to the arithmetic processing unit. When the arithmetic processing unit receives the virtual address from the control device, the arithmetic processing unit sets a port included in the arithmetic processing unit to the virtual address. | 2013-10-03 |
20130262701 | METHOD AND A NETWORK ELEMENT FOR CONTENT BASED ADDRESSING IN A DATA TRANSFER NETWORK - In a content addressable network, a hash result of a data item, which is a part of or relating to an entity to be accessed via the network, constitutes ( | 2013-10-03 |
20130262702 | HARDWARE-BASED PACKET EDITOR - Hardware-based packet editor receives a packet editing script which includes script entries indicating modifications to a data packet and a data block with data for the modified data packet. For a script entry in the packet editing script, the packet editor copies data in the data block at a block location and with a block length identified in the script entry into a packet buffer. The packet editor repeats the copying for the remaining script entries for the modified data packet. The packet editor then generates the modified data packet with the data in the packet buffer. The packet editing script is generated such that a script entry is created for data to be included in the modified data packet and data to be inserted into the modified data packet. Creation of a script entry is omitted for data to be removed. | 2013-10-03 |
20130262703 | SYSTEM AND METHOD FOR REDUCING NETFLOW TRAFFIC IN A NETWORK ENVIRONMENT - A an example method includes building a dictionary between an exporter and a collector by encoding a first data record of a flow according to a dictionary template and exporting the first data record to the collector via a network communication. The method can also include compressing a second data record of the flow using the dictionary, where the compressing comprises encoding the second data record according to an encoding template; and exporting the second data record to the collector to be decompressed using the dictionary. | 2013-10-03 |
20130262704 | SYSTEM AND METHOD FOR IMPROVING DELIVERY OF CONTENT OVER A NETWORK - A system and method provide for improving delivery of content over a network, such as a wireless network. Copies of previously loaded content may be stored locally on a client computing device coupled to the network. Future requests for similar content may be compressed based on the locally stored previously loaded content, and the compressed content may be delivered to the client device. The client device may use the stored previously loaded content to reconstruct the requested content. | 2013-10-03 |
20130262705 | INFORMATION PROCESSING APPARATUS AND IMAGE TRANSMISSION METHOD - An information processing apparatus includes rendering a software processing result to an image memory that stores a image to be displayed on a terminal apparatus connected through a network, and includes detecting an update field in which the image is updated, when the rendering with respect to the image memory is performed, and includes first compressing the image of the update field to obtain first compression data, and includes dividing the first compression data into a data size within a window size of a connection established with the terminal apparatus to obtain division data, and includes second compressing the image of the update field to the data size within the window size of the connection to obtain second compression data, and includes assigning each division data to any connection of multiple connections and assigning the second compression data to a dedicated connection different from the multiple connections. | 2013-10-03 |
20130262706 | Data Syncronisation - The present invention relates to a method for synchronising files between devices between two devices. The method includes creating a rule to control the synchronisation of the file. The rule includes at least one condition for synchronisation which is dependent upon a property of a device. | 2013-10-03 |
20130262707 | SERVER FOR PRESENTING INTERACTIVE CONTENT SYNCHRONIZED TO TIME-BASED MEDIA - Where multiple client devices are synchronized to multiple, asynchronous instances of a time-based media presentation such as live and time-shifted views of a television broadcast, interactive content can be delivered to each one of the various devices at a particular time (or “time offset”) within the presentation independent of when each instance of the time-based media presentation is viewed. | 2013-10-03 |
20130262708 | Method And Apparatus For Connecting USB Devices To a Computer - A method and apparatus are provided to enable a plurality of standard USB peripheral devices, utilizing the USB specification, to be distributed at various nodes across a network, wherein communications across the network may take advantage of any pre-existing network connectivity of a standard, non-modified USB host computer. In particular, a virtual host controller function is added to the host computer in order to direct data communications towards a pre-existing network transceiver. As a result, the host computer is not required to be provided with USB hardware and is able to communicate across the network using pre-existing data communication components. | 2013-10-03 |
20130262709 | ELECTRONIC DEVICE - An electronic device comprises a plurality of memory components, a connector, a receiver, and a communication component. The connector is configured to operatively connect the electronic device to an external device. The external device is capable of individually recognizing the memory components one at a time or simultaneously recognizing only a few of the memory components. The receiver is configured to receive a select instruction that specifies which of the memory components will be recognized by the external device. The communication component is configured to automatically communicate with the external device to permit the external device to automatically recognize at least one of the memory components as a predefined memory component. The communication component is further configured to communicate with the external device when the receiver receives the select instruction to permit the external device to recognize at least one memory components according to the select instruction. | 2013-10-03 |
20130262710 | DEVICE IDENTIFIER ASSIGNMENT - A command to change a device identifier is output to a first slave device and to a second slave device using a shared data line. The first slave includes a first device identifier, and the second slave device includes a second device identifier. A value for the first device identifier is replaced within a time period using the shared data line. During the same period of time, a value for the second device identifier is maintained. | 2013-10-03 |
20130262711 | TECHNIQUES FOR USING AN ASSIGNED SWITCH IDENTIFICATION AT AN INPUT/OUTPUT DEVICE - Examples are disclosed for assigning a switch identification to data received at an input/output device coupled to a host device. In some examples, the data may be associated with a virtual station interface (VSI) for a virtual machine implemented at the host device. For these examples, a switch identification may be assigned to the data based on an assigned port identifier, identification information for the data, or an originator of at least a portion of the identification information. The assigned switch identification may then be used as part of a lookup table to determine one or more actions for processing the data at the input/output device. Other examples are described and claimed. | 2013-10-03 |
20130262712 | ELECTRONIC DEVICE AND METHOD OF SIGNAL TRANSMISSION THEREIN - A method of signal transmission is to be implemented by a control module of an electronic device. The control module includes a first input/output (I/O) port to be coupled to an input module, a second I/O port to be coupled to an output module, and a control unit. In the method, the control unit is configured to electrically interconnect the first I/O port and the second I/O port such that the input module is able to communicate with the output module, or to open a specific channel and to temporarily stop transmission within other channels, based on a signal or instruction received from the input module. | 2013-10-03 |
20130262713 | APPARATUS AND METHOD FOR FRAGMENTING TRAMSMISSION DATA - An apparatus includes first, second, and spare ports, where first data having a data length less than a predetermined value is transmitted from the first port and second data having a data length not less than the predetermined value is transmitted from the second port. The apparatus obtains a first determination result indicating whether input data is the first data or the second data and a second determination result indicating whether a transmission rate of each of the first and second ports is equal to or greater than a threshold. The apparatus sorts the input data to one of the first, second, and spare ports, based on the first and second determination results. The apparatus fragments the second data and transmit the fragmented second data to the spare port when both the first data and the second data are sorted to the spare port. | 2013-10-03 |
20130262714 | FIELDBUS GATEWAY USING VIRTUAL SERIAL FILEDBUS PORT AND DATA TRANSMISSION METHOD THEREOF - A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently. | 2013-10-03 |
20130262715 | ELECTRONIC APPARATUS AND HOST DETERMINATION METHOD - An electronic apparatus includes a plurality of interfaces and a host determination controller. To the plurality of interfaces, a plurality of host candidate devices are individually connected. The plurality of host candidate devices are each capable of serving as a host device that performs control. The host determination controller is configured to determine, based on a reception signal received from one of the plurality of host candidate devices, a predetermined host candidate device serving as a transmission source of the reception signal to be a host device, and to control a disconnection and a connection of at least one of the plurality of interfaces, the at least one of the plurality of interfaces corresponding to at least one of the other host candidate devices. | 2013-10-03 |
20130262716 | INFORMATION PROCESSING APPARATUS AND CONTROL METHOD - An information processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to execute a process including acquiring control information of a first application program of which execution result is displayed, extracting a dependency relationship between the first application program and a second application program on a basis of the control information, and determining whether an access request for a device from the second application program is granted on a basis of the dependency relationship. | 2013-10-03 |
20130262717 | Method, Apparatus and System for Changing to Which Remote Device a Local Device is in Communication Via a Communication Medium Through Use of Interruption of the Communication Medium - A method, apparatus and system for changing to which remote device a local device is in communication via a communication medium, communicates with a matrix switch forming part of the system by interruption of the communication medium by the local device. Upon receipt of a unit of information via interruption of the communication medium, the matrix switch causes the local device to be in communication with another remote device other than the remote device that it was previously in communication. In one embodiment, the switching is to a next available remote device of a plurality of remote devices while in another embodiment, the matrix switch switches the local device to a switch configuration device for further communication therewith via the communication medium, thereby allowing the local device to select which other remote device it desires to be in communication. | 2013-10-03 |
20130262718 | Adaptive Queuing of a Cache for a Processing Element - Examples are disclosed for establishing a window for a queue structure maintained in a cache for a processing element for a network device. The processing element may be configured to operate in cooperation with an input/output device such as a network interface card. In some of these examples, the window may include portions of the queue structure having identifiers to active allocated buffers maintained in memory for the network device. The active allocated buffers may be configured to maintain or store data received or to be forwarded by the input/output device. For these examples, the window may be adjusted based on information gathered while the identifiers are read from or written to the portions of the queue structure. | 2013-10-03 |
20130262719 | Input Components of a Device - Examples disclose a device including a communication component to couple the device to a first portable computing device and a second portable computing device through a communication channel and a controller to utilize the first portable computing device as a first input component of the device and utilize the second portable computing device as a second input component of the device through the communication channel. | 2013-10-03 |
20130262720 | Operation of Video Source and Sink with Toggled Hot Plug Detection - Methods and systems are described for transmitting and displaying video data after a hot plug event during a start-up dead period. In particular, hot plug events occurring when a toggleable hot plug detection mechanism is used. | 2013-10-03 |
20130262721 | CONNECTION SYSTEM WITH KEYBOARD-VIDEO-MOUSE DEVICE - A connection system includes a keyboard-video-mouse (KVM) device, first and second electronic devices, first and second cables. The first cable includes a first terminal connected to the KVM device, a second terminal connected to the first electronic device, and a first indicator positioned on the first cable and close to the second terminal. The second cable includes a third terminal connected to the KVM device, a fourth terminal connected to the second electronic device, and a second indicator positioned on the second cable and close to the fourth terminal. The KVM device includes first to third switches, and a logic circuit connected to the first to third switches and the first and second indicators. When the first and second switches are closed, the first indicator is lit by the logic circuit. When the first and third switches are closed, the second indicator is lit by the logic circuit. | 2013-10-03 |
20130262722 | CONVERSION DEVICE, PERIPHERAL DEVICE, AND PROGRAMMABLE LOGIC CONTROLLER - A D/A conversion device includes a waveform-data-string storage area that stores therein a waveform data string including a plurality of digital values, a waveform-output-control-data storage area in which operation-mode specifying data and update request data are written, a digital-value output unit that, when the operation-mode specifying data specifies an automatic control mode, while sequentially updating an address to be read in the waveform-data-string storage area for each output period set in advance, sequentially reads and outputs a digital value and that, when the operation-mode specifying data specifies a step execution mode or an output-address change mode, while updating the address to be read at a timing when the update request data is written, reads and outputs the digital value, and a D/A conversion unit that converts the digital value output from the digital-value output unit into an analog value. | 2013-10-03 |
20130262723 | Bus Subscriber Device For Connection To A Line-Redundant Serial Data Bus, And Method For Controlling The Communication Of A Bus Subscriber With A Line-Redundant Serial Data Bus - Bus subscriber device for connection to a line-redundant, serial data bus, over which data are exchanged according to a predefined protocol, having the following features: a data transmission unit, at least two data receiving units that are connected in parallel, a line selection logic and at least two bus communication interfaces for connecting to a corresponding number of lines of the data bus, wherein each of the data receiving units is connectable via an associated bus communication interface to an assigned line of the data bus and has means for receiving a data block from the associated line of the data bus and means for forwarding the received data block to the line selection logic, and wherein the line selection logic has means for selecting a line of the data bus as a receiving line and forwarding the data block received over the selected receiving line. | 2013-10-03 |
20130262724 | Method and Circuit Arrangement for Transmitting Data Between Processor Modules - The invention relates to a circuit arrangement for forming a digital interface comprising a digital data bus, which exchanges data when microprocessor systems are connected. The data exchange can be effected bidirectionally. On transmission of data the circuit arrangement generates as bus master a bus clock speed and operates on receipt of data as a bus slave in accordance with the received clock signal. The circuit arrangement comprises at least one FIFO memory for receiving data. | 2013-10-03 |
20130262725 | DATA PROCESSING DEVICE AND METHOD FOR CONTROLLING DATA PROCESSING DEVICE - A data processing device includes a plurality of entries and a plurality of output ports, allocates the plurality of entries to a plurality of arbitration groups corresponding to the plurality of output ports respectively when a clock is inputted thereto, arbitrates the output ports for each of the allocated arbitration groups when data held in the entry is outputted from the output port, and outputs data held in the entry according to an arbitration result. | 2013-10-03 |
20130262726 | TASK BASED MESSAGE SIGNALED INTERRUPT - Methods and apparatuses are provided for servicing an interrupt in a computer system. The method includes a device driver receiving an interrupt request. The device driver is responsive to the interrupt request to store interrupt data in a portion of the memory. The interrupt data includes identification of at least one processor of the plurality of processors capable of servicing the interrupt request; priority of the interrupt request; a thread context; and an address for instructions to service the interrupt request. The device driver then instructs the peripheral device to issue a memory write to the plurality of processors so that each may determine if it can use the thread context and the instructions to service the interrupt. A computer system is provided with the hardware needed to perform the method. | 2013-10-03 |
20130262727 | RACE FREE INTERRUPT - A computer device includes a processor, a circuit block capable of issuing an interrupt to the processor, and a cacheable memory configured to include a register that is mapped to the logic block for storing interrupt status information of the logic block. | 2013-10-03 |
20130262728 | HOT SWAPPING SWAP MEDIA AT A COMPUTING DEVICE - A computing device enabled for hot swapping media, and method therefore, are provided. The computing device comprises: a swap media socket; a power supply for powering the swap media socket; a swap media detect apparatus enabled to undergo a state change when swap media removal occurs at the swap media socket; a switch in communication with the swap media detect apparatus, the switch enabled to disconnect the power supply from the swap media socket in response to the state change; and a processor in communication with the swap media detect apparatus, the processor enabled to turn off the power supply in response to the state change. | 2013-10-03 |
20130262729 | SYSTEM AND METHOD FOR FILE SHARING - A system for file sharing includes a file integration service program and a dongle device. The file integration service program is installed in a first electrical device and provides to-be-shared files accessible by the first electrical device. The dongle device includes a hot-plug port, a microcontroller and a wireless communication module. The hot-plug port is for coupling to a second electrical device. When the hot-plug port is coupled to the second electrical device, the microcontroller disassembles and packages a first instruction with a SCSI standard from the second electrical device into the first instruction with a wireless communication standard. The wireless communication module transmits the first instruction with the wireless communication standard to the first electrical device, so that the second electrical device can access the to-be-shared files via the dongle device. | 2013-10-03 |
20130262730 | MEDICAL MONITORING HUB - The present disclosure includes a medical monitoring hub as the center of monitoring for a monitored patient. The hub includes configurable medical ports and serial ports for communicating with other medical devices in the patient's proximity. Moreover, the hub communicates with a portable patient monitor. The monitor, when docked with the hub provides display graphics different from when undocked, the display graphics including anatomical information. The hub assembles the often vast amount of electronic medical data, associates it with the monitored patient, and in some embodiments, communicates the data to the patient's medical records. | 2013-10-03 |
20130262731 | SUPERSPEED INTER-CHIP COMMUNICATIONS - An interface for low power, high bandwidth communications between units in a device in provided herein. The interface comprises a USB 3.0 system interface and a SuperSpeed inter-chip (SSIC) protocol adaptor configured to facilitate communications between the USB 3.0 system interface and an M-PHY interface. | 2013-10-03 |
20130262732 | SEMICONDUCTOR INTEGRATED CIRCUIT AND DMA CONTROL METHOD OF THE SAME - A semiconductor integrated circuit includes a bus, a memory connected to the bus, an arithmetic processing unit connected to the bus, a first DMA controller connected to the bus, and at least one functional block connected to the bus. The functional block includes a functional macro which is configured to perform a process that realizes a given function, a second DMA controller which is configured to control data transfer between the memory and the functional macro, and an access condition setting unit which is configured to set an access condition regarding the DMA transfer between the memory and the functional macro. | 2013-10-03 |
20130262733 | DISTRIBUTED REORDER BUFFERS - A Network-on-Chip (NoC) is provided that performs reordering of transaction responses such as those with requests that cross address mapping boundaries. Ordering is ensured by filtering logic in reorder buffers, some of which include storage to allow multiple simultaneously pending transactions. Transactions are transported by a packet-based transport protocol. The reorder buffering is done at packet level, within the transport topology. Reorder buffers are distributed physically throughout the floorplan of the chip, they have localized connectivity to initiators, and they operate in separate power and clock domains. | 2013-10-03 |
20130262734 | MODULAR SCALABLE PCI-EXPRESS IMPLEMENTATION - In some embodiments a functional PCI Express port includes first buffers and an idle PCI Express port includes second buffers. One or more of the second buffers are accessed by the functional PCI Express port. Other embodiments are described and claimed. | 2013-10-03 |
20130262735 | DATA PROCESSING APPARATUS, COMPUTATION DEVICE, CONTROL METHOD FOR DATA PROCESSING APPARATUS - A data processing apparatus includes a plurality of computation devices connected to each other by a communication path. Each of the computation devices includes: a switching section provided to each of terminals and switchable between an upper layer use state in which communication is performed by a communication section between a given terminal of a plurality of terminals and a corresponding internal path and there is no connection performed by a bypass section between a corresponding pair of the plurality of the terminals, and an upper layer non-use state in which communication is not performed by a communication section between the given terminal of the plurality of the terminals and the corresponding internal path and connection is performed by the bypass section between the corresponding pair of the plurality of the terminals. | 2013-10-03 |
20130262736 | MEMORY TYPES FOR CACHING POLICIES - The present system enables receiving a request from an I/O device to translate a virtual address to a physical address to access the page in system memory. One or more memory attributes of the page defining a cacheability characteristic of the page is identified. A response including the physical address and the cacheability characteristic of the page is sent to the I/O device. | 2013-10-03 |
20130262737 | STORAGE CONTROL APPARATUS , STORAGE APPARATUS, INFORMATION PROCESSING SYSTEM AND PROCESSING METHOD - Disclosed herein is a storage control apparatus including: a command processing section configured to receive a command requesting accesses to a plurality of access units by specifying an address in a memory space including a plurality of banks; and an address generating section configured to generate an address of an access unit serving as an object of the accesses in a bank selected from the banks as a bank determined in advance for the specified address. | 2013-10-03 |
20130262738 | PAGE REPLACEMENT METHOD AND MEMORY SYSTEM USING THE SAME - A memory system includes a central processing unit (CPU), a nonvolatile memory electrically coupled to the CPU and a main memory, which is configured to swap an incoming code page for a target code page therein, in response to a first command issued by the CPU. The main memory can be configured to swap the target code page in the main memory to the nonvolatile memory in the event a page capacity of the main memory is at a threshold capacity. The CPU may also be configured to perform a frequency of use analysis on the target code page to determine whether the target code page is to be swapped to the nonvolatile memory or discarded. The incoming code page may be provided by a disk drive storage device and the main memory may be a volatile memory. | 2013-10-03 |
20130262739 | MEMORY MODULE VIRTUALIZATION - A memory system having a plurality of modules operated so that a group of memory modules may operation in a RAID configuration having an erase hiding property. The RAID groups are mapped to areas of memory in each of the memory modules of the RAID group. More than one RAID group may be mapped to a memory module and the erase operations of the RAID groups coordinated such that the erase operations do not overlap. This may improve the utilization of a bus over which the memory module communicates with the controller. Where a memory module is replaced by a memory module having an increased storage capacity, the additional storage capacity may be mapped to an expanded logical address space. | 2013-10-03 |
20130262740 | SEMICONDUCTOR MEMORY DEVICE, SYSTEMS AND METHODS IMPROVING REFRESH QUALITY FOR WEAK CELL - Disclosed is a semiconductor memory device which includes a normal memory cell array; a redundancy memory cell array; and a multi-row selection circuit configured to activate a defective normal memory cell or a defective normal word line of the normal memory cell array while activating a redundancy memory cell or a redundancy word line of the redundancy memory cell array. | 2013-10-03 |
20130262741 | SYSTEM AND METHOD FOR SUPPORTING MULTIPLE AUTHENTICATION SYSTEMS - A system for supporting multiple authentication systems. The system includes a computing device, a host memory for storing a plurality of software stacks, a flash memory configured to be programmed with one of the plurality of software stacks, and at least one processor. The at least one processor is programmed to identify a model of the device, select a software stack from the plurality of software stacks based on a device model of the computing device, and program the selected software stack into the flash memory. The device may be an electrical appliance. | 2013-10-03 |
20130262742 | METHOD AND APPARATUS FOR MANAGING BUFFER CACHE TO PERFORM PAGE REPLACEMENT BY USING REFERENCE TIME INFORMATION REGARDING TIME AT WHICH PAGE IS REFERRED TO - A method and apparatus manages a buffer cache. An extended buffer is used to perform a page replacement algorithm using reference time information regarding a time at which a page is referred. Pages replaced through the page replacement algorithm, when re-referred to, may be retrieved from the extended buffer, instead of a hard disk. As a result, write/read operations with respect to the disk are made efficient and the page input/output speed is increased. | 2013-10-03 |
20130262743 | ENCODING PROGRAM BITS TO DECOUPLE ADJACENT WORDLINES IN A MEMORY DEVICE - Subject matter disclosed herein relates to memory operations regarding encoding program bits to be programmed into a memory array. | 2013-10-03 |
20130262744 | NAND Flash Memory Interface - A NAND flash memory chip has a configurable interface that can communicate with a NAND flash memory controller using either parallel communication or serial communication. Serial communication requires fewer channels. Control information from the NAND flash memory controller uses a small number of channels. Double Data Rate (DDR) communication provides serial communication with adequate data transfer speed. | 2013-10-03 |
20130262745 | Memory System with Command Queue Reordering - A non-volatile memory system includes a memory controller that receives commands from a host and identifies commands that can be executed in parallel. The order in which commands are received is recorded so that responses may be provided to the host in the same order in which the commands were received. | 2013-10-03 |
20130262746 | ENHANCING THE LIFETIME AND PERFORMANCE OF FLASH-BASED STORAGE - A storage management system decouples application write requests from write requests to a flash-based storage device. By placing a layer of software intelligence between application requests to write data and the storage device, the system can make more effective decisions about when and where to write data that reduce wear and increase performance of the storage device. An application has a set of performance characteristics and writes data with a frequency that is appropriate for the application, but not necessarily efficient for the hardware. By analyzing how data is being used by an application, the system can strategically place data in the storage device or even avoid using the storage device altogether for some operations to minimize wear. One technique for doing this is to create an in-memory cache that acts as a buffer between the application requests and the storage hardware. | 2013-10-03 |
20130262747 | DATA WRITING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE DEVICE USING THE SAME - A data writing method for a rewritable non-volatile memory module containing physical blocks is provided. The method includes: configuring virtual block address to map to at least a part of the logical blocks; receiving a write command which instructs to write file data to the first virtual block addresses, and the first virtual block addresses are mapped to first logical blocks of the at least the part of the logical blocks. The method further includes: writing the file data into the physical blocks mapped to a plurality of second logical blocks; determining whether a program failure is occurred during the writing period; and if the program failure is not occurred, the first virtual block addresses are remapped to the second logical block. Accordingly, the method can ensure the update completeness of the file data. | 2013-10-03 |
20130262748 | DATA PROTECTING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE DEVICE USING THE SAME - A data protecting method for a rewritable non-volatile memory module having physical blocks is provided, a plurality of logical block addresses is mapped to a part of the physical blocks. The method includes, configuring a plurality of virtual block addresses to map to the logical block addresses, grouping at least one virtual block address into a virtual block address area, and allocating the virtual block address area to an application. The method also includes, receiving an access command which is configured to instruct accessing a first virtual block address from the application. The method also includes: determining whether the first virtual block address belongs to the virtual block address area, if not, sending an error message to the application. Accordingly, the method can effectively prevent an application from accessing the data which can not be accessed by the application program. | 2013-10-03 |
20130262749 | STORAGE SYSTEM WITH FLASH MEMORY, AND STORAGE CONTROL METHOD - A storage system has: one or more flash memory chips, each of which has a storage region configured by a plurality of blocks; and a device controller that controls access to data corresponding to the storage regions of the flash memory chips. The device controller manages for each of the blocks the number of determination readings for determining read disturb on the basis of a read request with respect to data of each block from a higher-level device, and, when there is a block for which the number of determination readings becomes equal to or larger than a threshold represented as a standard indicating a predetermined state related to read disturb, transmits, to the higher-level device, notification information that includes information indicating that read disturb of the block enters the predetermined state. | 2013-10-03 |
20130262750 | STORAGE SYSTEM AND STORAGE SYSTEM CONTROL METHOD - The device controller (a) executes a data I/O process with respect to a physical storage area in accordance with an I/O command, and (b) sends to the storage controller an I/O command-related response comprising status information subsequent to being changed in accordance with the I/O process. The storage controller (A) receives the response from the target physical storage device, and (B) based on the status information included in the response received in (A), makes a determination as to whether or not to execute internal processing, and in a case where the result of the determination is to execute internal processing, sends to the target physical storage device an internal processing execution command instructing the execution of internal processing. The device controller in the target physical storage device (c), upon receiving the internal processing execution command, executes internal processing in accordance with the internal processing execution command. | 2013-10-03 |
20130262751 | NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM, AND PROGRAM METHOD THREOF - Disclosed is a method for programming a nonvolatile memory device, the nonvolatile memory device including cell strings formed in a direction perpendicular to a substrate, and which selects memory cells by a string selection line unit. The programming method includes detecting wear leveling information of a selected memory block, determining a selection sequence of string selection lines of the selected memory block according to the wear leveling information, and writing data at the selected memory block according to the determined selection sequence. | 2013-10-03 |
20130262752 | EFFICIENT USE OF HYBRID MEDIA IN CACHE ARCHITECTURES - A multi-tiered cache manager and methods for managing multi-tiered cache are described. Multi-tiered cache manager causes cached data to be initially stored in the RAM elements and selects portions of the cached data stored in the RAM elements to be moved to the flash elements. Each flash element is organized as a plurality of write blocks having a block size and wherein a predefined maximum number of writes is permitted to each write block. The portions of the cached data may be selected based on a maximum write rate calculated from the maximum number of writes allowed for the flash device and a specified lifetime of the cache system. | 2013-10-03 |
20130262753 | Multiprocessor Storage Controller - A storage controller has multiple processors, divided into groups, each of which handles a different stage of a pipelined process of performing host reads and writes. In some embodiments, the storage controller operates with a flash memory module, and includes a first processor group, a second processor group and a third processor group, each having one or more processors for handling a different stage of a pipelined execution of host storage commands. With respect to a first host command, a first processor of the first processor group, a first processor of the second processor group, and a first processor of the third processor group comprise a first pipeline, and with respect to a second host command, a second processor of the first processor group, a second processor of the second processor group, and a second processor of the third processor group comprise a second pipeline. | 2013-10-03 |
20130262754 | SEMICONDUCTOR INTEGRATED CIRCUIT ADAPTED TO OUTPUT PASS/FAIL RESULTS OF INTERNAL OPERATIONS - In a semiconductor integrated circuit, an internal circuit is capable of executing a first operation and a second operation concurrently, and an output circuit outputs to the outside of the semiconductor integrated circuit information indicating whether or not the first operation is being executed and information indicating whether or not the second operation is executable. | 2013-10-03 |
20130262755 | DATA ACCESSING METHOD FOR FLASH MEMORY STORAGE DEVICE HAVING DATA PERTURBATION MODULE, AND STORAGE SYSTEM AND CONTROLLER USING THE SAME - A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module. | 2013-10-03 |
20130262756 | SNAPSHOT CONTENT METADATA FOR APPLICATION CONSISTENT BACKUPS - At least one of configuration information of a storage volume stored on a storage system and characteristics of a snapshot, including characteristics of one or more files stored in the snapshot, are identified. Snapshot content metadata, comprising the at least one of the identified characteristics and the configuration information, is created. The snapshot content metadata is associated with the snapshot. | 2013-10-03 |
20130262757 | MEMORY MODULE HAVING A WRITE-TIMING CALIBRATION MODE - In memory module populated by memory components having a write-timing calibration mode, control information that specifies a write operation is received via an address/control signal path and write data corresponding to the write operation is received via a data signal path. Each memory component receives multiple delayed versions of a timing signal used to indicate that the write data is valid, and outputs signals corresponding to the multiple delayed versions of the timing signal to enable determination, in a memory controller, of a delay interval between outputting the control information on the address/control signal path and outputting the write data on the data signal path. | 2013-10-03 |
20130262758 | Systems and Methods for Tracking Block Ownership - Systems and methods for, among other things, providing a storage system which allows for efficient tracking of in-use storage disk blocks using “sharing nodes”. Disk blocks are a result of low-level formatting, which breaks up the total storage capacity into a set number of blocks. High-level formatting of the disk creates the file system, and part of the file system may create metadata known as inodes, and associate an inode with each file, such that an inode tracks the disk blocks in use by that file, pointing from the file to a set of blocks. An S-node generator creates another type of metadata, complementary to an inode, known as an S-node data structure, such that an S-node data structure is associated with a block, and tracks the set of inodes using the block, pointing from the disk blocks to inodes. | 2013-10-03 |
20130262759 | Minimized Half-Select Current in Multi-State Memories - A multi-state memory system with encoding that minimizes half-select currents. The system includes an array of row and column conductors with a plurality of storage cells each capable of being placed into any of three or more physical states. An encoder is connected to receive data bits for storage and to apply activation signals to the row and column conductors to write information to the storage cells. The encoder is programmed to encode the data bits into entries in an array having one row corresponding with each row conductor and one column corresponding with each column conductor; select entries in the array according to half-select currents of the storage cells; apply a predetermined one-dimensional mapping that increases the value of at most one entry in the array to obtain a mapped array; and write entries of the mapped array into the storage cells. | 2013-10-03 |
20130262760 | RAID DATA STORAGE SYSTEM - A data storage system comprises at least one data storage module, each data storage module having at least a first I/O port and a second I/O port, wherein the data storage module includes a storage medium having at least a first pre-partitioned area and a second pre-partitioned area. The data storage system further comprises a first controller module, which is directly connected to the first I/O port of each data storage module to access the first pre-partitioned area of each data storage module, and a second controller module, which is directly connected to the second I/O port of each data storage module to access the second pre-partitioned area of each data storage module. | 2013-10-03 |
20130262761 | MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A memory device and a method of operating the same are provided. The memory device includes a control logic and a memory cell array. The control logic is configured to receive input information including a plurality of commands, a plurality of addresses, and priority information, and to change an execution sequence of the received commands of the input information according to the priority information. The memory cell array is configured to include a plurality of memory cells, and the memory device is configured to perform an operation on one or more memory cells based on the changed execution sequence. | 2013-10-03 |
20130262762 | STORAGE SYSTEM AND STORAGE CONTROL METHOD - A storage system includes a storage device having a command reordering function and a storage control apparatus that controls access to the storage device. Commands are issued to the storage device for reading or writing data. The storage control apparatus sets an upper limit to write data size or read data size specified in the commands during a predetermined period after a timeout of an issued command, so as to make it less likely for the storage device to postpone some of the issued commands. | 2013-10-03 |
20130262763 | INDICATION OF A DESTRUCTIVE WRITE VIA A NOTIFICATION FROM A DISK DRIVE THAT EMULATES BLOCKS OF A FIRST BLOCK SIZE WITHIN BLOCKS OF A SECOND BLOCK SIZE - A disk drive receives a request to write at least one block of a first block size, wherein the disk drive is configured to store blocks of a second block size that is larger in size than the first block size. The disk drive stores a. plurality of emulated blocks of the first block size in each block of the second block size. The disk drive generates a read error, in response to reading a selected block of the second block size in which the at least block of the first block size is to be written via, an emulation. The disk drive performs a destructive write of selected emulated blocks of the first block size that caused the read error to be generated. The disk drive writes the at least one block of the first block size in the selected block of the second block size. | 2013-10-03 |
20130262764 | MULTI-INTERFACE MEMORY CARD AND READ/WRITE DEVICE AND SYSTEM THEREOF - A multi-interface memory card includes a memory card shell, and a first memory card module and a second memory card module installed within the shell, in which the first memory card module and the second memory card module respectively have a first module interface and a second module interface, matching the same standard memory card specification and exposing to the shell surface; the read/write device of the multi-interface memory card has a slot and a mainframe interface for being plugged by the multi-interface memory card; the read/write device includes a first connector and a second connector exposing to the inside surface of the slot to connect with the first module interface and the second module interface of the multi-interface memory card, respectively, and the multi-interface memory card is transferred to the mainframe through the mainframe interface, to form a read/write system implementing data access to the multi-interface memory card. | 2013-10-03 |
20130262765 | ARRAY CONTROLLER AND STORAGE SYSTEM - A storage system which includes a cache memory needless of replacement of a power storage device, a cache memory with low power consumption, or a cache memory having no limitation on the number of writing operations is provided. An array controller for storing data externally input in any of a plurality of storage devices or a storage system including the array controller includes a processor which specifies at least one of the plurality of storage devices where the data is to be stored and a cache memory which stores the data and outputs the data to the at least one of the plurality of storage devices. The cache memory includes a storage circuit in which a transistor including an oxide semiconductor layer is used. | 2013-10-03 |
20130262766 | Cache Synchronization System, Cache Synchronization Method and Apparatus thereof - Disclosed are a cache synchronization system, a cache synchronization method and a local cache to perform synchronization. The local cache is configured to determine whether to perform synchronization for specific content on the basis of synchronization policy information, if it is determined that synchronization is to be performed, to set a dispersion parameter that defines a synchronization range for the specific content according to the synchronization policy information, and to transmit synchronization information about the specific content, which includes the dispersion parameter, to at least one neighboring local cache. | 2013-10-03 |
20130262767 | Concurrently Accessed Set Associative Overflow Cache - An apparatus for concurrently accessing a primary cache and an overflow cache, comprising a core logic unit configured to perform a first instruction that accesses the primary cache and the overflow cache in parallel, determine whether the primary cache stores a requested data, determine whether the overflow cache stores the requested data, and access a main memory when the primary cache and the overflow cache do not store the requested data, wherein the overflow cache stores data that overflows from the primary cache. | 2013-10-03 |
20130262768 | ADAPTIVE SELF-REPAIRING CACHE - A method for operating a cache that includes both robust cells and standard cells may include receiving a data to be written to the cache, determining whether a type of the data is unmodified data or modified data, and writing the data to robust cells or standard cells as a function of the type of the data. A processor includes a core that includes a cache including both robust cells and standard cells for receiving data, wherein the data is written to robust cells or standard cells as a function of whether a type of the data is determined to be unmodified data or modified data. | 2013-10-03 |
20130262769 | DATA CACHE BLOCK DEALLOCATE REQUESTS - A data processing system includes a processor core supported by upper and lower level caches. In response to executing a deallocate instruction in the processor core, a deallocation request is sent from the processor core to the lower level cache, the deallocation request specifying a target address associated with a target cache line. In response to receipt of the deallocation request at the lower level cache, a determination is made if the target address hits in the lower level cache. In response to determining that the target address hits in the lower level cache, the target cache line is retained in a data array of the lower level cache and a replacement order field in a directory of the lower level cache is updated such that the target cache line is more likely to be evicted from the lower level cache in response to a subsequent cache miss. | 2013-10-03 |
20130262770 | DATA CACHE BLOCK DEALLOCATE REQUESTS IN A MULTI-LEVEL CACHE HIERARCHY - In response to executing a deallocate instruction, a deallocation request specifying a target address of a target cache line is sent from a processor core to a lower level cache. In response, a determination is made if the target address hits in the lower level cache. If so, the target cache line is retained in a data array of the lower level cache, and a replacement order field of the lower level cache is updated such that the target cache line is more likely to be evicted in response to a subsequent cache miss in a congruence class including the target cache line. In response to the subsequent cache miss, the target cache line is cast out to the lower level cache with an indication that the target cache line was a target of a previous deallocation request of the processor core. | 2013-10-03 |
20130262771 | INDICATING A LENGTH OF AN INSTRUCTION OF A VARIABLE LENGTH INSTRUCTION SET - Some implementations disclosed herein provide techniques and arrangements for indicating a length of an instruction from an instruction set that has variable length instructions. A plurality of bytes that include an instruction may be read from an instruction cache based on a logical instruction pointer. A determination is made whether a first byte of the plurality of bytes identifies a length of the instruction. In response to detecting that the first byte of the plurality of bytes identifies the length of the instruction, the instruction is read from the plurality of bytes based on the length of the instruction. | 2013-10-03 |
20130262772 | ON-DEMAND ALLOCATION OF CACHE MEMORY FOR USE AS A PRESET BUFFER - A data processing system comprises data processing circuitry, a cache memory, and memory access circuitry. The memory access circuitry is operative to assign a memory address region to be allocated in the cache memory with a predefined initialization value. Subsequently, a portion of the cache memory is allocated to the assigned memory address region only after the data processing circuitry first attempts to perform a memory access on a memory address within the assigned memory address region. The allocated portion of the cache memory is then initialized with the predefined initialization value. | 2013-10-03 |
20130262773 | INFORMATION PROCESSING APPARATUS AND CONTROL METHOD OF INFORMATION PROCESSING APPARATUS - An information processing apparatus includes a first arithmetic processing unit, a second arithmetic processing unit that is connected to a main storage, and a third arithmetic processing unit. The first arithmetic processing unit includes a cache memory that retains therein data. The second arithmetic processing unit includes a processing unit that notifies, when a read request for the data from the third arithmetic processing unit is not being executed when the replacement request is received, the first arithmetic processing unit of a completion notification indicating that the data has been written back to the main storage and the replacement process is completed and that notifies, when the read request is being executed when the replacement request is received, the first arithmetic processing unit of the completion notification after the read request has ended. | 2013-10-03 |
20130262774 | METHOD AND APPARATUS TO MANAGE OBJECT BASED TIER - Exemplary embodiments provide a technique to manage object based tier to improve allocation of media to unallocated area. In one embodiment, a method of allocating an area of a logical volume to an unallocated area of a virtual volume for a write command comprises: calculating an object location of an object based on the write command and an object allocation information, the write command containing a virtual volume name and a virtual volume address of a virtual volume; selecting a tier from a plurality of tiers based on the calculated object location and an object and tier definition information; selecting a media type from a plurality of media types based on the selected tier and a tier and media definition information; and selecting a logical volume from a plurality of logical volumes based on the virtual volume specified by the write command, the object allocation information, a pool information, and the selected media type. | 2013-10-03 |
20130262775 | Cache Management for Memory Operations - Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item. | 2013-10-03 |
20130262776 | Managing Coherent Memory Between an Accelerated Processing Device and a Central Processing Unit - Existing multiprocessor computing systems often have insufficient memory coherency and, consequently, are unable to efficiently utilize separate memory systems. Specifically, a CPU cannot effectively write to a block of memory and then have a GPU access that memory unless there is explicit synchronization. In addition, because the GPU is forced to statically split memory locations between itself and the CPU, existing multiprocessor computing systems are unable to efficiently utilize the separate memory systems. Embodiments described herein overcome these deficiencies by receiving a notification within the GPU that the CPU has finished processing data that is stored in coherent memory, and invalidating data in the CPU caches that the GPU has finished processing from the coherent memory. Embodiments described herein also include dynamically partitioning a GPU memory into coherent memory and local memory through use of a probe filter. | 2013-10-03 |