39th week of 2010 patent applcation highlights part 64 |
Patent application number | Title | Published |
20100248450 | METHOD OF PRODUCING SEMICONDUCTOR DEVICE - A method of producing a semiconductor device includes: a dicing step of dicing a wafer member using a dicing blade to form a cut portion in the wafer member, in which the wafer member is formed of a wafer portion, a glass substrate, and an adhesive layer for bonding the wafer portion and the glass substrate in a thickness direction of the wafer member so that the cut portion penetrates the wafer portion and the adhesive layer and reaches a part of the glass substrate; and an individual piece dividing step of dividing the wafer member into a plurality of semiconductor devices with the cut portion as a fracture initiation portion. | 2010-09-30 |
20100248451 | Method for Laser Singulation of Chip Scale Packages on Glass Substrates - An improved method for singulation of compound electronic devices is presented. Compound electronic devices are manufactured by combining two or more substrates into an assembly containing multiple devices. Presented are methods for singulation of compound electronic devices using laser processing. The methods presented provide fewer defects such as cracking or chipping of the substrates while minimizing the width of the kerf and maintaining system throughput. | 2010-09-30 |
20100248452 | ADHESIVE, ADHESIVE SHEET, MULTI-LAYERED ADHESIVE SHEET, AND PRODUCTION METHOD FOR ELECTRONIC PART - A multi-layered adhesive sheet | 2010-09-30 |
20100248453 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor device includes a semiconductor element, a transparent member separated from the semiconductor element by a designated length and facing the semiconductor element, a sealing member sealing an edge surface of the transparent member and an edge part of the semiconductor element, and a shock-absorbing member provided between the edge surface of the transparent member and the sealing member and easing a stress which the transparent member receives from the sealing member or the semiconductor element. | 2010-09-30 |
20100248454 | METHOD OF FORMING FIN STRUCTURES USING A SACRIFICIAL ETCH STOP LAYER ON BULK SEMICONDUCTOR MATERIAL - A method of manufacturing semiconductor fins for a semiconductor device may begin by providing a bulk semiconductor substrate. The method continues by growing a layer of first epitaxial semiconductor material on the bulk semiconductor substrate, and by growing a layer of second epitaxial semiconductor material on the layer of first epitaxial semiconductor material. The method then creates a fin pattern mask on the layer of second epitaxial semiconductor material. The fin pattern mask has features corresponding to a plurality of fins. Next, the method anisotropically etches the layer of second epitaxial semiconductor material, using the fin pattern mask as an etch mask, and using the layer of first epitaxial semiconductor material as an etch stop layer. This etching step results in a plurality of fins formed from the layer of second epitaxial semiconductor material. | 2010-09-30 |
20100248455 | Manufacturing method of group III nitride semiconductor - A manufacturing method of a group III nitride semiconductor comprising: preparing a substrate including a buffer layer; forming a first layer on the buffer layer from a group III nitride semiconductor by MOCVD while doping an anti-surfactant, wherein a thickness of the first layer is equal to or thinner than 2 μm; forming a second layer on the first layer from a group III nitride semiconductor by MOCVD while doping at least one of surfactant and an anti-surfactant; and controlling a crystalline quality and a surface flatness of the second layer by adjusting an amount of the anti-surfactant and the surfactant doped during the formation of the second layer. | 2010-09-30 |
20100248456 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device may include, but is not limited to the following processes. A first etching process is performed to etch a layer using a resist mask and a hard mask. The resist mask covers the hard mask. The hard mask covers the layer. Then, a second etching process is performed to etch the layer using the hard mask, substantially in the absence of the resist mask. | 2010-09-30 |
20100248457 | METHOD OF FORMING NONVOLATILE MEMORY DEVICE - Provided is a method of forming a nonvolatile memory device. The method may include alternatingly stacking n number of dielectric layers and n number of conductive layers on a substrate, forming a non-photosensitive pattern on the alternatingly stacked dielectric layers and conductive layers, etching the i-th conductive layer and i-th dielectric (2≦i≦n, i is a natural number indicating a stacking order of the conductive layers and the dielectric layers) by using the non-photosensitive pattern as an etch mask, laterally etching a sidewall of the non-photosensitive pattern and etching the i-th conductive layer, (i−1)-th conductive layer, i-th dielectric layer and (i−1)-th dielectric layer by using the etched non-photosensitive pattern as an etch mask. | 2010-09-30 |
20100248458 | COATING APPARATUS AND COATING METHOD - The present invention provides a coating apparatus capable of efficiently performing a deposition process and also provides an efficient coating method. | 2010-09-30 |
20100248459 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device including: cleaning an apparatus used to grow a layer including Ga; performing a first step of forming a first layer on a substrate made of silicon by using the apparatus, the first layer including a nitride semiconductor that does not include Ga as a composition element and has a Ga impurity concentration of 2×10 | 2010-09-30 |
20100248460 | Method of forming information storage pattern - A method of forming an information storage pattern, includes placing a semiconductor substrate in a process chamber, injecting first, second and third process gases into the process chamber during a first process to form a lower layer on the substrate based on a first injection time and/or a first pause time, injecting the second process gas into the process chamber during a second process, wherein the second process gas is injected into the process chamber during a first elimination time, injecting a fourth process gas together with the second and third process gases into the process chamber during a third process in accordance with a second injection time and/or a second pause time to form an upper layer on the lower layer, and injecting the second process gas into the process chamber during a fourth process, wherein the second process gas is injected into the process chamber during a second elimination. | 2010-09-30 |
20100248461 | Method of growing GaN using CVD and HVPE - A thick gallium nitride (GaN) film is formed on a LiAlO | 2010-09-30 |
20100248462 | METHOD FOR MANUFACTURING A POWER SEMICONDUCTOR DEVICE - An exemplary method is disclosed for manufacturing a power semiconductor device which has a first electrical contact on a first main side and a second electrical contact on a second main side opposite the first main side and at least a two-layer structure with layers of different conductivity types, and includes providing an n-doped wafer and creating a surface layer of palladium particles on the first main side. The wafer is irradiated on the first main side with ions. Afterwards, the palladium particles are diffused into the wafer at a temperature of not more than 750° C., by which diffusion a first p-doped layer is created. Then, the first and second electrical contacts are created. At least the irradiation with ions is performed through a mask. | 2010-09-30 |
20100248463 | ENHANCING ADHESION OF INTERLAYER DIELECTRIC MATERIALS OF SEMICONDUCTOR DEVICES BY SUPPRESSING SILICIDE FORMATION AT THE SUBSTRATE EDGE - Adhesion of dielectric layer stacks to be formed after completing the basic configuration of transistor elements may be increased by avoiding the formation of a metal silicide in the edge region of the substrate. For this purpose, a dielectric protection layer may be selectively formed in the edge region prior to a corresponding pre-clean process or immediately prior to deposition of the refractory metal. Hence, non-reacted metal may be efficiently removed from the edge region without creating a non-desired metal silicide. Hence, the further processing may be continued on the basis of enhanced process conditions for forming interlayer dielectric materials. | 2010-09-30 |
20100248464 | METHOD FOR FORMING A HIGH-k GATE STACK WITH REDUCED EFFECTIVE OXIDE THICKNESS - A method is provided for forming a high-k gate stack with a reduced effective oxide thickness (EOT) for a semiconductor device. The method includes providing a silicon-containing substrate, forming an interface layer on the silicon-containing substrate, where the interface layer has a first equivalent oxide thickness, depositing a first high-k film on the interface layer, and heat-treating the first high-k film and the interface layer at a temperature that forms a modified interface layer, where the modified interface layer has a second equivalent oxide thickness that is equal to or lower than the first equivalent oxide thickness. The method further includes depositing a second high-k film on the modified interface layer. According to one embodiment, the first high-k film includes lanthanum oxide and the second high-k film includes hafnium silicate. | 2010-09-30 |
20100248465 | METHODS OF FABRICATING SILICON OXIDE LAYERS USING INORGANIC SILICON PRECURSORS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING THE SAME - Methods of fabricating a silicon oxide layer using an inorganic silicon precursor and methods of fabricating a semiconductor device using the same are provided. The methods of fabricating a semiconductor device include forming a tunnel insulating layer and a charge storage layer on a substrate; forming a dielectric layer structure on the charge storage layer using an atomic layer deposition (ALD) method, the dielectric layer structure including a first dielectric layer formed of silicon oxide, a second dielectric layer on the first dielectric layer formed of a material different from the material forming the first dielectric layer, and a third dielectric layer formed of the silicon oxide on the second dielectric layer; and forming a control gate on the dielectric layer structure. The first and third dielectric layers formed of the silicon oxide are formed using a first gas including an inorganic silicon precursor, a second gas including hydrogen gas or a hydrogen component, and a third gas including an oxide gas. | 2010-09-30 |
20100248466 | METHOD FOR MAKING A STRESSED NON-VOLATILE MEMORY DEVICE - A method of making a semiconductor device on a semiconductor layer includes: forming a gate dielectric over the semiconductor layer; forming a layer of gate material over the gate dielectric; etching the layer of gate material to form a select gate; forming a storage layer that extends over the select gate and over a portion of the semiconductor layer; depositing an amorphous silicon layer over the storage layer; etching the amorphous silicon layer to form a control gate; and annealing the semiconductor device to crystallize the amorphous silicon layer. | 2010-09-30 |
20100248467 | METHOD FOR FABRICATING NONVOLATILE MEMORY DEVICE - Disclosed is a method for fabricating a nonvolatile memory device having a stacked gate structure in which a floating gate, a charge blocking layer, and a control gate are sequentially stacked. The method includes forming a first conductive layer for floating gate over a substrate; forming a charge blocking layer and a second conductive layer for control gate over a resulting structure including the first conductive layer; forming an etch mask pattern over the second conductive layer; performing a primary etch process on the second conductive layer until the charge blocking layer is exposed; forming a passivation layer on a sidewall of the second conductive layer exposed by the primary etch process; and performing a secondary etch process on the charge blocking layer and the first conductive layer. | 2010-09-30 |
20100248468 | METHOD AND STRUCTURE FOR PERFORMING A CHEMICAL MECHANICAL POLISHING PROCESS - A method for fabricating flash memory devices, e.g., NAND, NOR, is provided. The method includes providing a semiconductor substrate. The method includes forming a second polysilicon layer overlying a plurality of floating gate structures to cause formation of an upper surface provided on the second polysilicon layer. The upper surface has a first recessed region and a second recessed region. The method includes depositing a photo resist material overlying the upper surface to fill the first recessed region and the second recessed region to form a second upper surface region and cover a first elevated region, a second elevated region, and a third elevated region. The method subjects the second upper surface region to a chemical mechanical polishing process to remove the first elevated region, the second elevated region, and the third elevated region to cause formation of a substantially planarized second polysilicon layer free from the fill material. | 2010-09-30 |
20100248469 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same reduce the likelihood of the occurrence of electrical defects. The device includes a first interlayer insulating film on a semiconductor substrate; a contact pad spacer on the first interlayer insulating film; and a contact pad in the first interlayer insulating film and the contact pad spacer. The cross-sectional area of an upper portion of the contact pad in the contact pad spacer in a direction horizontal to the substrate is equal to or less than a cross-sectional area of an intermediate portion at an interface between the contact pad spacer and the first interlayer insulating film in a direction horizontal to the substrate. | 2010-09-30 |
20100248470 | Method of manufacturing semiconductor device - A semiconductor device with improved bondability between a wire and a bump and cutting property of the wire to improve the bonding quality. In the semiconductor device, a wire is stacked on a pad as a second bonding point to form a bump having a sloped wedge and a first bent wire convex portion, and a wire is looped from a lead as a first bonding point to the bump and is pressed to the sloped wedge of the bump with a face portion of a tip end of a capillary to bond the wire to the bump. At the same time, the wire is pressed to the first bent wire convex portion using an inner chamfer of a bonding wire hole in the capillary to form a wire bent portion having a bow-shaped cross section. The wire is pulled up and cut at the wire bent portion. | 2010-09-30 |
20100248471 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - Provided is a method for fabricating a semiconductor device, including forming an interconnect structure including first and second interconnects and an insulating material between the first and second interconnects, forming a first mask layer and a second mask layer having a plurality of micropores sequentially on the interconnect structure, coalescing the plurality of micropores in the second mask layer with each other and forming a plurality of first microholes in the second mask layer, forming a plurality of second microholes in the first mask layer using the plurality of first microholes, and removing the insulating material using the first mask layer with the plurality of second microholes as an etch mask so as to form an air-gap between the first and second interconnects. | 2010-09-30 |
20100248472 | Methods Of Forming Copper-Comprising Conductive Lines In The Fabrication Of Integrated Circuitry - A method of forming copper-comprising conductive lines in the fabrication of integrated circuitry includes depositing damascene material over a substrate. Line trenches are formed into the damascene material. Copper-comprising material is electrochemically deposited over the damascene material. The copper-comprising material is removed and the damascene material is exposed, and individual copper-comprising conductive lines are formed within individual of the line trenches. The damascene material is removed selectively relative to the conductive copper-comprising material. Dielectric material is deposited laterally between adjacent of the individual copper-comprising conductive lines. The deposited dielectric material is received against sidewalls of the individual copper-comprising conductive lines. A void is received laterally between immediately adjacent of the individual copper-comprising conductive lines within the deposited dielectric material. Other embodiments are contemplated. | 2010-09-30 |
20100248473 | SELECTIVE DEPOSITION OF METAL-CONTAINING CAP LAYERS FOR SEMICONDUCTOR DEVICES - A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor. | 2010-09-30 |
20100248474 | METHOD OF FORMING COATING-TYPE FILM - An aspect of the present invention, there is provided a method for providing a coating-type film, including, coating a solution including an organic metal compound on a surface of a substrate including a semiconductor substrate to form a coating film, heating the coating film to volatize a solvent in the coating film, and performing a treatment including at least one of a heat treatment, an ozone treatment and a moisture treatment to remove impurities from the coating film. | 2010-09-30 |
20100248475 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device is disclosed. In one embodiment, the method includes providing at least one semiconductor chip including an electrically conductive layer. A voltage is applied to an electrode. The electrode is moved over the electrically conductive layer for growing a metal layer onto the electrically conductive layer. | 2010-09-30 |
20100248476 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device may include, but is not limited to, the following processes. A conductive film is formed over a semiconductor substrate. First and second photo resist patterns are formed on the conductive film. A space is located between the first and second photo resist patterns. An insulating mask is formed by using catalytic reaction so as to cover surfaces of the first and second photo resist patterns. The insulating mask protects the surfaces of the first and second photo resist patterns. A part of the conductive film is etched by using the insulating mask on the first and second photo resist patterns as an etching mask. | 2010-09-30 |
20100248477 | Cleaning liquid used in process for forming dual damascene structure and a process for treating a substrate therewith - It is disclosed a cleaning liquid used in a process for forming a dual damascene structure comprising steps of etching a low dielectric layer (low-k layer) accumulated on a substrate having thereon a metallic layer to form a first etched-space; charging a sacrifice layer in the first etched-space; partially etching the low dielectric layer and the sacrifice layer to form a second etched-space connected to the first etched-space; and removing the sacrifice layer remaining in the first etched-space with the cleaning liquid, wherein the cleaning liquid comprises (a) 1-25 mass % of a quaternary ammonium hydroxide, such as TMAH and choline (b) 30-70 mass % of a water soluble organic solvent, and (c) 20-60 mass % of water. The cleaning liquid attains in a well balanced manner such effects that a sacrifice layer used for forming a dual damascene structure is excellently removed, and a low dielectric layer is not damaged upon formation of a metallic wiring on a substrate having a metallic layer (such as a Cu layer) and the low dielectric layer formed thereon. | 2010-09-30 |
20100248478 | METHOD OF PROCESSING A SURFACE OF GROUP III NITRIDE CRYSTAL AND GROUP III NITRIDE CRYSTAL SUBSTRATE - There is provided a method of processing a surface of a group III nitride crystal, that includes the steps of: polishing a surface of a group III nitride crystal with a polishing slurry containing abrasive grains; and thereafter polishing the surface of the group III nitride crystal with a polishing liquid at least once, and each step of polishing with the polishing liquid employs a basic polishing liquid or an acidic polishing liquid as the polishing liquid. The step of polishing with the basic or acidic polishing liquid allows removal of impurity such as abrasive grains remaining on the surface of the group III nitride crystal after it is polished with the slurry containing the abrasive grains. | 2010-09-30 |
20100248479 | CMP METHOD - The instant invention is a method of polishing a substrate including contacting a substrate having at least one metal layer including copper with a chemical-mechanical polishing composition. The CMP composition includes an abrasive, a surfactant, an oxidizer, an organic acid including polyacrylic acid or polymethacrylic acid, a corrosion inhibitor, and a liquid carrier. A portion of the copper in the metal layer is abraded to polish the substrate. A second CMP composition contacts the abraded substrate, the second acrylate free composition including an abrasive, a surfactant, an oxidizer, and a corrosion inhibitor, and a liquid carrier. Any dendrites that may have formed on the substrate are removed through abrasion. | 2010-09-30 |
20100248480 | CHEMICAL MECHANICAL POLISHING COMPOSITIONS FOR COPPER AND ASSOCIATED MATERIALS AND METHOD OF USING SAME - A CMP composition containing a rheology agent, e.g., in combination with oxidizing agent, chelating agent, inhibiting agent, abrasive and solvent. Such CMP composition advantageously increases the materials selectivity in the CMP process and is useful for polishing surfaces of copper elements on semiconductor substrates, without the occurrence of dishing or other adverse planarization deficiencies in the polished copper. | 2010-09-30 |
20100248481 | CAD FLOW FOR 15NM/22NM MULTIPLE FINE GRAINED WIMPY GATE LENGTHS IN SIT GATE FLOW - Methods are described for forming an integrated circuit having multiple devices, such as transistors, with respective element lengths. The methods include a new CAD flow for producing masks used for exposing sidewall spacers which are to be etched to a smaller base width than other sidewall spacers and which in turn are used as an etch mask to form gate structures with smaller element lengths than those formed from the other sidewall spacers. Embodiments include generating a schematic of an integrated circuit and a corresponding netlist, establishing design rules for the integrated circuit, generating a computer aided design layout for the integrated circuit, plural transistors of the integrated circuit respectively having different gate lengths, checking the integrated circuit layout and netlist for compliance with the established design rules and for correspondence with the generated schematic, and generating a mask with different openings that correspond to the integrated circuit layout, in response to a satisfactory outcome of the checking step. | 2010-09-30 |
20100248482 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, TEMPLATE, AND METHOD OF CREATING PATTERN INSPECTION DATA - A method of manufacturing a semiconductor device according to an embodiment of the present invention includes mask layer on a processing target, pressing a template having a pattern having closed loop structure against the mask layer via an imprint material to solidify the imprint material, etching the mask layer by using the imprint material to form a mask, removing a part of the pattern having the closed loop of the mask, and etching the processing target by the mask including the pattern, the part of which is removed. | 2010-09-30 |
20100248483 | METHOD OF PRODUCING SEMICONDUCTOR ELEMENT - A method of producing a semiconductor element includes the steps of forming a wiring portion layer on a substrate; forming an interlayer insulation layer over the substrate and the wiring portion layer, in which a third insulation film, a second insulation film, and a first insulation film are laminated in this order from the substrate; forming a mask pattern on the first insulation film; removing a contact hole forming area of the first insulation film through a wet etching process; removing a contact hole forming area of the second insulation film through an etching process; removing a contact hole forming area of the third insulation film through an etching process; and a contact hole forming step of forming a contact hole in the interlayer insulation layer so that a surface of the wiring portion layer is exposed. | 2010-09-30 |
20100248484 | Methods of Forming Printable Integrated Circuit Devices and Devices Formed Thereby - Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. A step is performed to selectively etch through the semiconductor active layer and the sacrificial layer in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. A step can be performed to selectively etch through the capping layer and the first portion of the semiconductor active layer to thereby expose the sacrificial layer. The sacrificial layer may be selectively removed from between the first portion of the semiconductor active layer and the handling substrate to thereby define a suspended integrated circuit chip encapsulated by the capping layer. | 2010-09-30 |
20100248485 | METHOD FOR DIELECTRIC MATERIAL REMOVAL BETWEEN CONDUCTIVE LINES - A method of removing carbon doped silicon oxide between metal contacts is provided. A layer of the carbon doped silicon oxide is converted to a layer of silicon oxide by removing the carbon dopant. The converted layer of silicon oxide is selectively wet etched with respect to the carbon doped silicon oxide and the metal contacts, which forms recess between the metal contacts. | 2010-09-30 |
20100248486 | SOLUTION FOR REMOVING RESIDUE AFTER SEMICONDUCTOR DRY PROCESS AND METHOD OF REMOVING THE RESIDUE USING THE SAME - The present invention provides a residue-removing solution for use after a dry process, the residue-removing solution being capable of preventing minute cracks on a Cu surface, which has heretofore been unresolved with known polymer-removing solutions; and a method for manufacturing semiconductor devices using the residue-removing solution. More specifically, the invention relates to a residue-removing solution for removing residues present on semiconductor substrates after dry etching and/or ashing, the solution containing water and at least one component selected from the group consisting of (a) a keto acid, (b) a keto acid salt, and (c) an aldehyde acid salt; and a method for removing residues using the residue-removing solution. | 2010-09-30 |
20100248487 | METHOD AND APPARATUS FOR ELIMINATION OF MICRO-TRENCHING DURING ETCHING OF A HARDMASK LAYER - Described herein are exemplary methods and apparatuses for etching a nitride layer disposed above a substrate to form trenches without micro-trenching in accordance with one embodiment. The method includes forming openings in a resist layer and one or more dielectric layers. The dielectric layers may be disposed on a hard mask layer (e.g., nitride, polysilicon). Next, the method includes etching openings in the hard mask layer disposed above a substrate layer without micro-trenching. The etching occurs in a process chamber during a main etch with a first process gas mixture having a fluorocarbon gas, a hydrofluorocarbon gas, and an oxygenating gas. Next, the method includes etching openings partially into the substrate without micro-trenching with a second process gas mixture during an over etch having the fluorocarbon gas, the hydrofluorocarbon gas, and the oxygenating gas. | 2010-09-30 |
20100248488 | PULSED PLASMA HIGH ASPECT RATIO DIELECTRIC PROCESS - Radial distribution of etch rate is controlled by controlling the respective duty cycles of pulsed VHF source power applied to the ceiling and pulsed HF or MF bias power on the workpiece. Net average electrical charging of the workpiece is controlled by providing an electronegative process gas and controlling the voltage of a positive DC pulse on the workpiece applied during pulse off times of the pulsed VHF source power. | 2010-09-30 |
20100248489 | PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD - There is provided a plasma processing apparatus and a plasma processing method capable of carrying out a stable plasma process by way of improving plasma stabilization and also capable of increasing lifetime of a variable capacitor in a matching unit, as compared to a conventional case. The plasma processing apparatus includes a power modulation unit configured to perform a power modulation for periodically switching a high frequency power from a high frequency power supply between a first power and a second power higher than the first power. The matching unit is configured to stop a matching operation for a first power application time and for a preset time after a second power application is started. | 2010-09-30 |
20100248490 | METHOD AND APPARATUS FOR REDUCTION OF VOLTAGE POTENTIAL SPIKE DURING DECHUCKING - Provided is a substrate dechucking system of a plasma processing chamber adapted to remove a substrate from an ESC with reduction in voltage potential spike during dechucking of the substrate. | 2010-09-30 |
20100248491 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING A DOUBLE PATTERNING PROCESS - A method for performing a double pattering process of a semiconductor device is provided. The method includes forming a hard mask layer having a stack structure of a first layer, a second layer and a third layer in sequence, forming a first photoresist pattern over the hard mask layer, etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier, forming a second photoresist pattern over the third layer patterns, etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier, removing the second photoresist pattern, and etching the first layer to form first layer patterns by using the second layer patterns as an etch barrier. | 2010-09-30 |
20100248492 | Method of forming patterns of semiconductor device - A method of forming fine patterns of a semiconductor device by using carbon (C)-containing films includes forming an etching target film on a substrate including first and second regions; forming a plurality of first C-containing film patterns on the etching target film in the first region; forming a buffer layer which covers top and side surfaces of the plurality of first C-containing film patterns; forming a second C-containing film; removing the second C-containing film in the second region; exposing the plurality of first C-containing film patterns by removing a portion of the buffer layer in the first and second regions; and etching the etching target film by using the plurality of first C-containing film patterns, and portions of the second C-containing film which remain in the first region, as an etching mask. | 2010-09-30 |
20100248493 | PHOTOMASK BLANK, PROCESSING METHOD, AND ETCHING METHOD - A photomask blank is provided comprising a transparent substrate, a single or multi-layer film including an outermost layer composed of chromium base material, and an etching mask film. The etching mask film is a silicon oxide base material film formed of a composition comprising a hydrolytic condensate of a hydrolyzable silane, a crosslink promoter, and an organic solvent and having a thickness of 1-10 nm. The etching mask film has high resistance to chlorine dry etching, ensuring high-accuracy processing of the photomask blank. | 2010-09-30 |
20100248494 | Method of cleaning semiconductor wafers - A method of cleaning semiconductor wafers using an acid cleaner followed by an alkaline cleaner to clean contaminants from the materials is provided. The acid cleaner removes substantially all of the metal contaminants while the alkaline cleaner removes substantially all of the non-metal contaminants, such as organics and particulate material. | 2010-09-30 |
20100248495 | SILICON ETCHING LIQUID AND ETCHING METHOD - A silicon etching liquid characterized by anisotropically dissolving monocrystalline silicon therein by using an aqueous solution containing a quaternary ammonium hydroxide and an aminoguanidine salt and an etching method of silicon using the instant etching liquid are an etching liquid and an etching method enabling one to perform processing at a high etching rate in etching processing of silicon, particularly in etching processing of silicon in a manufacturing process of MEMS parts or semiconductor devices. | 2010-09-30 |
20100248496 | ROTATABLE AND TUNABLE HEATERS FOR SEMICONDUCTOR FURNACE - A semiconductor furnace suitable for chemical vapor deposition processing of wafers. The furnace includes a thermal reaction chamber having a top, a bottom, a sidewall, and an internal cavity for removably holding a batch of vertically stacked wafers. A heating system is provided that includes a plurality of rotatable heaters arranged and operative to heat the chamber. In one embodiment, spacing between the sidewall heaters is adjustable. The heating system controls temperature variations within the chamber and promotes uniform film deposit thickness on the wafers. | 2010-09-30 |
20100248497 | METHODS AND APPARATUS FOR FORMING NITROGEN-CONTAINING LAYERS - Methods and apparatus for forming nitrogen-containing layers are provided herein. In some embodiments, a method includes placing a substrate having a first layer disposed thereon on a substrate support of a process chamber; heating the substrate to a temperature of at least about 250 degrees Celsius; and exposing the first layer to a radio frequency (RF) plasma formed from a process gas comprising nitrogen while maintaining the process chamber at a pressure of about 10 mTorr to about 40 mTorr to transform at least an upper portion of the first layer into a nitrogen-containing layer. In some embodiments, the process gas includes ammonia (NH | 2010-09-30 |
20100248498 | MATERIAL STRIPPING IN SEMICONDUCTOR DEVICES BY EVAPORATION - A sacrificial material, such as resist material, polymer material, organic residues and the like, may be efficiently removed from a surface of a semiconductor device by evaporating the material under consideration, which may, for instance, be accomplished by energy deposition. For example, a laser beam may be scanned across the surface to be treated so as to evaporate the sacrificial material, such as resist material, while significantly reducing any negative effects on other materials such as dielectrics, metals, semiconductive materials and the like. Moreover, by selecting an appropriate scan regime, a locally selective removal of material may be accomplished in a highly efficient manner. | 2010-09-30 |
20100248499 | Enhanced efficiency growth processes based on rapid thermal processing of gallium nitride films - Rapid thermal processing of freestanding gallium nitride wafers is used to form semiconductor devices. This high speed process is enabled by the low thermal inertia of the growth substrate and the use of a low thermal inertia susceptor. The use of a low thermal inertia susceptor consisting of, but not limited to, silicon carbide, silicon carbide coated graphite, and/or other platen materials. Infrared (IR) heating is a preferred approach for increasing the temperature of the freestanding gallium nitride films via the susceptor but Radio Frequency (RF) and other methods are also approaches. | 2010-09-30 |
20100248500 | MOTOR DRIVER AND CONNECTION APPARATUS THEREOF - A motor driver includes a circuit board and a connection apparatus. The connection apparatus includes two connection components. Each connection component includes two connection portions and a number of pins. The two connection components are mounted to the circuit board to connect to a positive pole and a negative pole of the circuit board correspondingly via the number of pins. The two connection portions are configured for being connected to wires. | 2010-09-30 |
20100248501 | Card Connector - A card connector adapted for receiving a card has an insulating housing having a plurality of first terminal recesses. Each of the first terminal recesses includes a fixing recess extending frontward and rearward. The fixing recess has a substantially middle portion extending towards a side to form a sliding recess. The sliding recess has a rear portion extended rearward at a lower portion thereof to form a stopping recess and a stopping portion over the stopping recess. A plurality of first connecting terminals are received in the corresponding first terminal recesses. The first connecting terminal has a first fixing portion. A substantially middle portion of one side of the first fixing portion is extended sideward and then bent upwards to form a barb-shaped intruded portion inserted into the stopping recess from the sliding recess for being stopped by the stopping portion. | 2010-09-30 |
20100248502 | BOARD CONNECTING CONNECTOR - A board connecting connector configured to mount a mounting board on a motherboard, the board connecting connector includes a connector main body having one end fixed to the motherboard and another end including an inserting opening where the mounting board is inserted; a plurality of connector pins provided inside the inserting opening, the connector pins coming in contact with a plurality of terminals provided at an inserting side of the mounting board; and a board holding member elastically deformably standing at a side surface of the connector main body, wherein the board holding member is inserted in a position where the terminals of the mounting board come in contact with the connector pins and is engaged with an edge part of the mounting board, so that the mounting board is held in an inserting completion position. | 2010-09-30 |
20100248503 | CONNECTOR CAPABLE OF COUPLING TO PRINTED CIRCUIT BOARD - A connector capable of being connected to a printed circuit board (PCB) is provided. A female connector according to an embodiment of the present invention includes a core conductor, a body, and a housing. The core conductor is formed of a single body including a contact terminal formed of two or more insertion panels forming an insertion space where a signal pin of a male connector is inserted and a signal transmission panel connected to a bottom of the contact terminal and electrically connected a signal line of the PCB. The body includes an insertion part electrically insulated from the core conductor and gaping when coupling with the male connector and is formed in a single body including a trunk surrounding the contact terminal and a plurality of supporters connected to a bottom of the trunk. The housing stores the core conductor and the bottom of the trunk of the body or more. | 2010-09-30 |
20100248504 | ELECTRICAL CONNECTOR HAVING RETENTION MEANS ARRANGED ADJACENT TO PASSAGEWAY FOR HOLDING FUSIBLE MEMBER THERETO - An electrical connector used for connecting a circuit processing unit (CPU) with pins with a print circuit board (PCB) includes an insulating housing, a plurality of terminals received in the housing and a plurality of fusible members mechanically fixed into the housing. The housing includes a plurality of passageways and receiving cavities communicating with each other. Each of the terminals received in the corresponding passageway has a soldering portion. Each fusible member mechanically fixed into the corresponding receiving cavity has a through hole for receiving the soldering portion of the terminal. A gap is formed between the soldering portion and the fusible member when the soldering portion received in the through hole. | 2010-09-30 |
20100248505 | Printed circuit board assembly and connecting method thereof - Disclosed herein is a printed circuit board and a connecting method thereof. The connecting method of the circuit board assembly may include molding the printed circuit board assembly by applying a resin to the printed circuit board assembly, exposing ends of the electrode terminals of a connector mounted on a printed circuit board by partially removing the molded printed circuit board assembly, and connecting a connection member to the exposed ends of the electrode terminals of the connector. Therefore, even if the whole of the printed circuit board assembly is molded, the connection member may be freely connected to the connector of the printed circuit board assembly. | 2010-09-30 |
20100248506 | Implementing Enhanced Solder Joint Robustness for SMT Pad Structure - A method and a surface mount technology (SMT) pad structure are provided for implementing enhanced solder joint robustness. The SMT pad structure includes a base SMT pad. The base SMT pad receives a connector for soldering to the SMT pad structure. A standoff structure having a selected geometry is defined on the base SMT pad to increase thickness of the solder joint for the connector. | 2010-09-30 |
20100248507 | CONDUCTIVE HOOK AND LOOP ATTACHMENT FOR A PRINTED CIRCUIT BOARD - The present disclosure is directed to conductive connector attachments for use in electrically connecting printed circuit boards to absorbent products such as diapers, training pants, incontinence products, feminine hygiene products, and the like. Specifically, various configurations and methods of securely attaching conventional conductive hook and loop attachments to printed circuit boards are disclosed. | 2010-09-30 |
20100248508 | SURGE PROTECTION PLUG AND GROUND BUS - The invention relates to a surge protection plug ( | 2010-09-30 |
20100248509 | PLUG WITH CONNECTING DEVICE - The present invention relates to a plug with connecting device, includes a top housing, one end thereof is extended with a connecting device for being connected to a power adapter; a retaining seat; an electrode sheet base having a pivotal shaft; two copper contact rings; two electrode sheets; one bottom plastic housing engaged with the top housing; when the two electrode sheets are longitudinally rotated, the two electrode sheets are able to be pivotally moved at the outside of the bottom plastic housing and then positioned, an electrical conducting status is formed between the electrode sheets and the connecting device so as to transfer power to a power adapter. | 2010-09-30 |
20100248510 | ELECTRONIC DEVICE WITH USB CONNECTOR - An electronic device with a USB connector is provided, which is designed for solving a problem in the conventional art that a USB cap on an electronic device may easily get lost. The electronic device with the USB connector includes an outer housing, an intermediate housing located inside the outer housing and moveable relative to the outer housing, and a circuit board located inside the intermediate housing. The USB connector is disposed on the intermediate housing, and electrically connected to the circuit board. A USB connector through hole is configured on the outer housing at a position corresponding to the USB connector. The electronic device further includes an elastic apparatus disposed in a moving direction of the intermediate housing, and an intermediate housing movement positioning apparatus. The technology is applicable to electronic devices with a USB connector such as a wireless USB Modem or a USB flash drive. | 2010-09-30 |
20100248511 | SIGNAL DEVICE HOUSING WITH INTEGRATED RESTRICTED CONNECTIONS - A device housing for signal devices that are to be placed on a premise of a user, the device housing encouraging access to certain connections and discouraging access to certain connections once the device housing is mounted to a mounting surface. The device housing includes a first housing portion defining a first cavity enclosing electrical components and a second housing portion defining a second cavity. The second housing portion adjoins the first housing portion. An adjoining wall separates the first cavity from the second cavity. An open side of the second cavity is positioned to extend along the mounting surface. At least one user connection is mounted to an external sidewall of the first housing portion, and at least one restricted connection is mounted to the adjoining wall. The restricted connection extends into the second cavity. | 2010-09-30 |
20100248512 | USB Device With Connected Cap - A USB device including a housing and a protective cap that are slidably and/or pivotably connected together such that the protective cap is able to slide and/or pivot between an open position, in which a plug connector extending from the front of the housing is exposed for operable coupling to a host system, and a closed position, in which the protective cap is disposed over the front end portion of the housing to protect the plug connector. A pivoting/sliding mechanism is provided on the housing and cap that secures the protective cap to the housing at all times, including during transitional movements of the protective cap between the opened and closed positions. | 2010-09-30 |
20100248513 | LOCKING DEVICE - The invention proposes a locking device for a two-part connector housing. This locking device consists of two locking elements in connection with an actuating handle. The locking elements respectively consist of a one-piece wire element and feature on one end a part that is shaped in the form of an open eyelet and serves for encompassing a bearing pin of a first connector housing half. On the other end, they feature a part that is shaped in the form of an indentation and serves for producing a snap connection with a locking pin of the second connector housing half. Since the locking elements are manufactured of a flexible spring steel wire, they can be elastically bent such that they can be pushed over the bearing pins of an existing connector housing half and engaged at this location in order to allow the retrofitting of an already installed connector with a locking device with superior environmental resistance. | 2010-09-30 |
20100248514 | HIGH-VOLTAGE ELECTRICAL CONNECTOR - A method for volume compensation of a fluid-filled first chamber accommodating a first electrical appliance that is electrically connected by a high-voltage electrical connector to a second electrical appliance located in a fluid-filled second chamber. The first chamber is volume compensated to the second chamber via the electrical connector by a volume compensating arrangement integrated in the electrical connector. A high-voltage electrical connector with a volume compensating arrangement and an electrical assembly provided with such a connector. | 2010-09-30 |
20100248515 | CONNECTOR - A connector has a first contact and first signal contacts, and a second contact and second signal contacts arrayed at a different height. All the contacts have connection portions arranged at the same height position. The connection portion of the first contact is located between the connection portions of the second signal contacts and the connection portion of the second contact is located between the connection portions of the first signal contacts. A distance B is larger than a distance A. The distance A is a distance between the connection portion of the first signal contact and the connection portion of the second contact and also a distance between the connection portion of the second signal contact and the connection portion of the first contact. The distance B is a distance between the connecting portion of the first signal contact and an adjacent connection portion of the second signal contact. | 2010-09-30 |
20100248516 | CONNECTOR FOR UNDERWATER DEVICES - Disclosed herein is an electrical connector for use with an underwater electrical device. The underwater electrical device is connected to a source, such as a power source, by electrical wiring. The connector is adapted for connecting the source and the underwater electrical device without compromising the integrity of the electrical connection despite expected movement and considerable torsional forces being exerted upon the connection so made. In an exemplary embodiment, the electrical device includes internal screw threads. The connector includes an insertion member for retaining the electrical wiring. The insertion member is elastic and deformable. The connector further includes a clamping member having an external screw for compatible engagement of the electrical device internal screw threads. Finally, the connector includes a sealing member for creating a leak proof seal between the connector and the electrical device. The insertion, sealing and clamping members are sized and shaped for compression upon the full engagement of the screw threads of the respective elements, thereby providing a leak proof seal. | 2010-09-30 |
20100248517 | CARD EDGE CONNECTOR HAVING ADDITIONAL GROUND CONTACT FACILITATING GROUNDING OF INSERTED MEMORY MODULE - A card edge connector includes an elongated housing defining a plurality of first and second terminal grooves at opposite sides thereof. A key is located between said first and second terminal grooves. A plurality of first and second terminals are respectively received in said first and second terminal grooves. The outmost of the first terminal together with the outmost of the second terminal are arranged as grounding terminals and form a diagonal configuration to contact with grounding pad defined on the memory module for eliminating EMI. | 2010-09-30 |
20100248518 | SOCKET - Provided is a socket which protects an upper surface of a semiconductor device from being scratched due to contact, by using a latch plate. A socket ( | 2010-09-30 |
20100248519 | ELECTRICAL CONNECTOR HAVING IMPROVED RESTRICTING PORTIONS - An electrical connector ( | 2010-09-30 |
20100248520 | Connector having a lock mechanism for keeping a socket and a header coupled, and method for manufacturing the connector - A connector includes a socket having a generally rectangular shape, the socket including socket contacts, lock mechanisms and retainer mechanisms; and a header having a generally rectangular shape, the header including header contacts and lock mechanisms and being couplable with the socket. The lock mechanisms of the socket and the header are respectively formed from the socket contacts and the header contacts, the lock mechanisms of the socket being formed by cutting away a portion of the socket contacts. The lock mechanisms of the header also serve as retainer mechanisms thereof. The lock mechanisms of the socket and the header are arranged substantially in the same row as the socket contacts and the header contacts and positioned near four corners of the socket and the header, respectively. The lock mechanisms of the socket and the header are configured to keep the socket and the header in a coupled state. | 2010-09-30 |
20100248521 | CONNECTOR ASSEMBLY FEATURED HEAD-TO-HEAD MATING INTERCONNECTION AND QUICK-DISCONNECTION THEREFROM - An electrical connector ( | 2010-09-30 |
20100248522 | ELECTRICAL CABLE CONNECTOR LATCH MECHANISM - An electrical cable connector has a latch mechanism wherein the moveable portion is part of the mating receptacle, and the mechanism for unlatching resides in the cable connector. A rocker part is located such that one end extends under the resilient latch member and the other end has a surface which is made to rotate about a pivot point by an externally actuated ramp. The rotation of the rocker lifts the resilient member from its seat and releases the connector latch. The actuating ramp is spring loaded to return to its resting position which is the latched position; it is attached to a loop designed to allow a finger pull action to initiate latch disengagement. Forces and friction resistance is managed such that reliable single-hand operation is achieved, with push to engage and pull to disengage. | 2010-09-30 |
20100248523 | FEMALE POWER CONNECTOR, MALE POWER CONNECTOR AND POWER CONNECTOR ASSEMBLY - A power connector assembly includes a male power connector and a female power connector engaged in the male power connector. The male power connector includes a main body defining a receiving cavity and a number of terminals positioned in the receiving cavity. The female power connector includes a main body, an inserting portion, and a latching member with elasticity. The latching member includes a latching portion and an actuating portion. The latching portion includes a guiding tab connected to the inserting portion and an engaging tab extending from the guiding tab. The actuating portion extends from the engaging tab. A latching slot is defined in a wall of the main body of the male power connector to engage with the engaging tab to engage the female power connector in the male power connector. | 2010-09-30 |
20100248524 | Connector - A connector includes a generally rectangular socket and a generally rectangular header couplable with the socket. The header is provided with arch-shaped engaging members arranged in opposite short sides thereof, the engaging members being elastically deformable in the longitudinal direction of the header. Each of the engaging members includes a protrusion portion protruding from the header or socket in the longitudinal direction thereof. The socket includes retainer portions engageable with the respective protrusion portions of the engaging members. The engaging members are elastically deformed when the header is coupled with the socket. | 2010-09-30 |
20100248525 | SELF-LOCKING CONNECTOR FOR A CABLE TERMINATION - A self-locking assembly for a cable termination having a connector with a step. The self-locking assembly includes a ring having a circumference and a plurality of latches located around the circumference. Each latch is configured to move between a locked position, where the latch is engaged with the step, and an unlocked position, where the latch is disengaged from the step. A sliding ring is configured to move along a portion of the connector and includes a groove, and a support ring is located on the connector and is configured to restrict movement of the sliding ring in at least one direction. | 2010-09-30 |
20100248526 | PLUG MODULE - A plug module disposed at the end of a cable is used for assembling in a socket, and the socket has a connecting portion and a position limiting structure on the connecting portion. The plug module includes a body, a positioning element, and a sliding element. The body is connected with the connecting portion in a connecting direction. The positioning element disposed on the body is interfered the position limiting structure. The sliding element is slidingly disposed at a side of the body adjacent to the cable, and it is suited for driving the positioning element to release the interference between the positioning element and the position limiting structure. | 2010-09-30 |
20100248527 | Plug Retention Device - Certain embodiments of the present invention provide an apparatus for retaining a plug in an outlet. The apparatus includes a pair of arms and a body slidably connected to the arms. The arms are connected to the outlet. The body slides along the arms to retain the plug in the outlet. | 2010-09-30 |
20100248528 | LIF CONNECTOR - A connector comprising a first connector provided with a first projection and a second projection on an outer surface thereof; and a frame including a wall portion defining an opening, the wall portion provided with a first guide running in a direction and a second guide on an inner surface thereof, wherein the first connector is inserted into the frame through the opening along the direction while the first projection is guided by the first guide and the second projection is guided by the second guide, and at least a part of a distance between the first guide and the second guide shortens along the direction. | 2010-09-30 |
20100248529 | Motor cable device and resin component employed thereto - The motor cable device which can prevent damage on an inverter-side connecting member of the motor cable device and lowering in a connecting reliability of the inverter-side connecting member is provided. Also, a resin component used in the above-described motor cable device is provided. The motor cable device electrically connects a motor and an inverter and includes an inverter-side protector and a motor-side protector. The inverter-side protector includes a fixed end which is directly or indirectly fixed to the inverter and which supports the inverter-side connecting member. A swinging motion absorbing portion is formed continuously to the fixed end, the swinging motion absorbing portion being arranged to support a cable body at the inverter-side connecting member and absorb the swinging motion generated at the cable body of the motor cable device, is further included. | 2010-09-30 |
20100248530 | Threaded connector and patch cord having a threaded connector - A patch cord including a connector attached to an end of a multi-pair cable. The connector including a threaded arrangement that engages a jacket of the multi-pair cable to secure the connector relative to the end of the multi-pair cable. | 2010-09-30 |
20100248531 | ELECTRONIC DEVICE - In the electronic device according to the present invention, a plurality of electronic components are connected to respective terminal blocks through respective signal cables, the signal cables each includes an end connected to a terminal of each of the electronic components, a connector attached to the other end of each of the signal cables is connected to each of the terminal blocks. the plurality of signal cables are bundled together at a deflection position distances to which from the terminals of the plurality of electronic components are different, the plurality of signal cables extend from the deflection position to corresponding terminal blocks, and the positions of the plurality of terminal blocks are shifted from each other in accordance with difference in lengths of the signal cables from the deflection position passing point to the connectors. | 2010-09-30 |
20100248532 | Electrical Coupler System and Method for Manufacture Thereof - In one embodiment, a coupler system is configured to couple to electrical terminals of a battery. The coupler system comprises a coupler bridge comprising a first section, where the first section comprises a first height and a first edge. The coupler system also comprises a second section adjacent to the first section and opposite the first edge, a first coupler coupled to the second section of the coupler bridge, and a second coupler coupled to the second section of the coupler bridge. The first section of the coupler bridge is configured to restrict the first and second couplers from being electrically coupled to the electrical terminals of the battery when the first edge faces towards the battery. Other embodiments are also disclosed herein. | 2010-09-30 |
20100248533 | COVER FOR CABLE CONNECTORS - A cover/boot and a system of covers/boots for placement in sealed relation over a connector or pair of connectors that is or are adapted to terminate a cable or splice together a pair of cables, preferably cables that carry signals received by a receiving apparatus on a cell tower. The covers include a cable end that sealingly receives a cable therein, an elongated body that provides secure cover to a cable connector, and an end that abuts a bulkhead or sealingly engages with a second cover when used in a splicing application. | 2010-09-30 |
20100248534 | METHOD AND APPARATUS FOR HIGH-DENSITY POWER DISTRIBUTION UNIT WITH INTEGRATED CABLE MANAGEMENT - A cable management unit having a base section and a top section, the base section and the top section defining a space therebetween, a plurality of distribution walls coupled between the base section and the top section and having a front surface facing the space and a back surface facing away from the space, an electronic device disposed within the space, and a plurality of ports disposed on the back surface of the contiguous section of the plurality of distribution walls and each having a port surface extending beyond the back surface of the contiguous section. | 2010-09-30 |
20100248535 | Reconfigurable Patch Panel - A reconfigurable patch panel and a method of reconfiguring a patch panel comprising a support member supporting at least one adapter, where the at least one adapter comprises a plurality of ports for coupling to electric signal bearing cables. A pivot, associated with each of the at least one adapters, couples the at least one adapter to the support member. The at least one adapter selectively rotates about the pivot to a selected position relative to the support member. A retainer, associated with each of the at least one adapters, couples the support member to the at least one adapter and retains the at least one adapter in the selected position. | 2010-09-30 |
20100248536 | Electrical connector - A connector includes a housing to be attached to a front face of a panel. A panel has a mounting opening through which a rear portion of the housing is inserted. The rear portion of the housing has a lance extending in a direction parallel to the front face of the panel. The mounting opening has a concave portion through which the lance is inserted. When the housing is moved in a first direction along the front face of the panel, a locking piece that continues to a concave portion locks the tip of the lance such that the housing is difficult to move in a second direction. | 2010-09-30 |
20100248537 | CONNECTOR ASSEMBLY MOUNTED ONTO PANEL - A connector assembly ( | 2010-09-30 |
20100248538 | ELECTRICAL CONNECTOR HAVING A SHELL DEFINING A PAIR OF WINGS AT OPPOSITE SIDES THEREOF - An electrical connector comprises an insulator, a plurality of terminals retained in the insulator and a shell installed on the insulator. The insulator comprises a base portion and mating portion extending from the base portion. At lest one terminal has a contact portion disposed in the mating portion of the insulator. The shell defines a receiving room and comprises a side wall and a supporting arm extending out of the receiving room from the side wall. the supporting arm comprises a locking portion and a supporting beam connected with the locking portion and attached to the shell. | 2010-09-30 |
20100248539 | COAXIAL CONNECTOR AND METHOD OF ASSEMBLING THE SAME - A coaxial connector for connecting a coaxial plug includes an insulation housing including an insertion opening portion and a pressing deformation portion situated above the insertion opening portion; an outer conductive member including a pressing portion for pressing the pressing deformation portion; a stationary terminal including a contact portion; and a movable terminal fitted into the insertion opening portion and including a fixed portion and an elastic portion. The elastic portion is separated from the contact portion so that the movable terminal is electrically disconnected from the stationary terminal when the coaxial plug is inserted into the insulation housing. The elastic portion contacts with the central conductive member so that the movable terminal is electrically connected to the central conductive member when the coaxial plug is inserted into the insulation housing. | 2010-09-30 |
20100248540 | Cable fixing method and cable connecting part - A cable fixing method and a cable connecting part for a connector. In the cable fixing method and the cable connecting part, a part of a cable in a longitudinal direction is inserted into a metallic cylindrical part of a metallic case; and the cable is fixed to the metallic case by crimping the metallic cylindrical part which accommodates the part of the cable in the longitudinal direction in such a manner that 0.60≦K≦0.95 is established, when a cross-sectional area of the cable before crimping the metallic cylindrical part is A, a cross-sectional area of the cable after crimping the metallic cylindrical part is B, and B/A is a crimping ratio K. | 2010-09-30 |
20100248541 | SHIELD CONNECTOR - A shield connector (C) includes a tubular metallic shield shell ( | 2010-09-30 |
20100248542 | AUDIO CONNECTOR - An audio connector includes: a body; a terminal plug fixed in position to the body and having a guide plate penetrating the body for supporting and being electrically connected to the conductive ends of a multi-core wire; a wire collecting member disposed inside the body, wherein the wire collecting member and the guide plate collectively define a receiving space for receiving and collecting the conductive ends of the multi-core wire; and a pressing member disposed inside the wire collecting member for pressing the conductive ends of the multi-core wire in conjunction with the guide plate and the wire collecting member, wherein a maximum width of the receiving space is smaller than or equal to that of the pressing surface of the pressing member. | 2010-09-30 |
20100248543 | ELECTRICAL CONNECTOR ASSEMBLY WITH AN INTEGRATED CIRCUIT MODULE - An electrical connector assembly ( | 2010-09-30 |
20100248544 | CABLE ASSEMBLY WTH EMI PROTECTION - A cable assembly ( | 2010-09-30 |
20100248545 | ELECTRICAL CONNECTOR FEATURED USB/ESATA INTERFACES - An electrical connector includes a housing and a set of first terminals for eSATA and a set of second terminals for USB. The housing defines a mating cavity with a front opening and a mating tongue in the mating cavity, the mating tongue defines a first surface and a second surface opposite to the first surface. Each of the first terminals includes a first contacting section disposed on the first mating face, a second contacting section bending from the first contacting section to be in the second mating face and a leg portion. Each of the second contacts includes a contacting section disposed on the second mating face and a leg portion. | 2010-09-30 |
20100248546 | ADAPTER FOR COUPLING A CONSUMER ELECTRONIC DEVICE TO AN APPLIANCE - An adapter comprises a first adapter interface configured to removably couple to a consumer electronic device to permit communication of a first electrical service between the adapter and the device, a second adapter interface configured to removably couple to an appliance to permit communication of a second electrical service between the transformative adapter and the appliance, and at least one transformation component in communication with the first adapter interface and the second adapter interface and transforming one of the first electrical service and the second electrical service into the other when the adapter is mechanically coupled with at least one of the appliance and the consumer electronic device. The first and second electrical services can be a power or data service, and one of the services can comprise a wireless service. | 2010-09-30 |
20100248547 | ESD PROTECTION - The present invention relates to an electrical connector for a first IC, comprising a second IC ( | 2010-09-30 |
20100248548 | Electrical Connector and Method of Manufacture - An apparatus and method are disclosed for manufacturing an electrical connector. A mold is presented having a pair of opposing dies that each define a mold pocket. The mold pockets of each die can be joined to form a mold cavity. Plastic can be injection molded into the mold cavity to form an electrical connector housing. | 2010-09-30 |
20100248549 | CONNECTOR - A connector comprising an insulative housing that has a top, a bottom, a first side, a second side wherein all four sides are connected to form a mating face and a board-mounting end; a plurality of terminals supported in the housing and terminating at the board-mounting end wherein each terminal further comprises a contact portion configured to establish electrical contact with a complementary mating connector, a solder tail that extends out of the housing at the board-mounting end, a body portion that is disposed intermediate the contact portion and the solder tail and which interconnect them together; and at least one solder bracket coupled to the housing wherein a major portion of the solder bracket lies within the profile of the housing. | 2010-09-30 |