39th week of 2012 patent applcation highlights part 61 |
Patent application number | Title | Published |
20120246316 | Automatic Registration of Enterprise Resources in a Dynamic Module System Services Registry - A computer-implemented method, system, and medium are disclosed for implementing a hybrid application server. The server comprises an application server container, a dynamic module system, and a resources-exporter module deployed on the dynamic module system. The resources-exporter module is configured to detect that a system-level resource of the application server container has been deployed. In response to detecting that the container resource has been deployed, the resources-exporter is configured to register a proxy object for the system-level resource as a service in the dynamic module system. | 2012-09-27 |
20120246317 | Cloud-Based Resource Identification and Allocation - Systems, methods, and computer readable media for identifying resources to implement a service in a cloud computing environment are disclosed. In general, the disclosed methodologies analyze a cloud's ability to support a desired service while maintaining separation between the cloud's logical layers. For example, given a list of resources needed to implement a target service, a hierarchical plan may be generated. The plan may then be used by each layer to track and record the availability of various possible layer-specific resource selections. Since each layer may be permitted access only to that portion of the plan that is associated with, or applicable to, the specific layer, the logical separation between different layers may be enforced. As a consequence, each layer may implement its resource selection mechanisms in any desired manner. | 2012-09-27 |
20120246318 | RESOURCE COMPATABILITY FOR DATA CENTERS - Systems and methods of resource compatibility for data centers are disclosed. In an example, the method may include accessing a condition for utilizing resources. The method may also include comparing the condition to compatibility information for the resources in a data center. The method may also include using the comparison to identify a supported configuration for the resources in the data center satisfying the condition. | 2012-09-27 |
20120246319 | SYSTEM AND METHOD FOR CONFIGURING DYNAMIC SERVICE NETWORK BASED ON NETSTORE - A dynamic service network creation apparatus includes a resource lookup and registration unit configured to look up and register network resource information of each of a plurality of network resource providers which are managed by a netstore apparatus; and a service network topology configuration unit configured to, in response to a service reservation request being received from each of a plurality of service providers through a service management system, dynamically configure a service network for providing a network-based service from the service provider to a service user that is to use the service of the service provider, wherein the dynamic service network creation apparatus is connected to the service management system that manages the network-based service provided by a plurality of the service providers and the netstore apparatus. | 2012-09-27 |
20120246320 | SYSTEM AND METHOD FOR CONTROLLING RESOURCE REVOCATION IN A MULTI-GUEST COMPUTER SYSTEM - At least one guest system, for example, a virtual machine, is connected to a host system, which includes a system resource such as system machine memory. Each guest system includes a guest operating system (OS). A resource requesting mechanism, preferably a driver, is installed within each guest OS and communicates with a resource scheduler included within the host system. If the host system needs any one the guest systems to relinquish some of the system resource it currently is allocated, then the resource scheduler instructs the driver within that guest system's OS to reserve more of the resource, using the guest OS's own, native resource allocation mechanisms. The driver thus frees this resource for use by the host, since the driver does not itself actually need the requested amount of the resource. The driver in each guest OS thus acts as a hollow “balloon” to “inflate” or “deflate,” that is, reserve more or less of the system resource via the corresponding guest OS. The resource scheduler, however, remains transparent to the guest systems. | 2012-09-27 |
20120246321 | SYSTEM AND METHOD FOR FAIR-SHARING IN BANDWIDTH SHARING AD-HOC NETWORKS - Systems and methods for fair-sharing in bandwidth sharing ad-hoc networks. A method includes maintaining a borrower account and lender account of a borrower and a lender of an ad hoc network. The method also includes adjusting at least one of the borrower account and the lender account based upon data transfer by the lender for the borrower. | 2012-09-27 |
20120246322 | MOBILE DEVICE WORKLOAD MANAGEMENT FOR CLOUD COMPUTING USING SIP AND PRESENCE TO CONTROL WORKLOAD AND METHOD THEREOF - A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to manage workload for cloud computing by transferring workload to at least one mobile device using Session Initiation Protocol (SIP). | 2012-09-27 |
20120246323 | MECHANISM FOR ADAPTIVELY CHOOSING UTILITY COMPUTING APPLICATIONS BASED ON NETWORK CHARACTERISTICS AND EXTENDING SUPPORT FOR ADDITIONAL LOCAL APPLICATIONS - A system and method for adaptively choosing applications/utilities can be provided to users in a cloud based utility computing environment (VCE) based on their network characteristics. Methods categorize remote utility computing applications (RAPPs) based on their network Quality of Service (QOS) requirements. Methods decide on suitable RAPPs that can be provided to users based on their network parameters, measured in the network path between users and the nearest utility computing server farm. A local hard disk based operating system and application can be provided, which is not a managed environment, but the access to which is controlled by the utility computing environment. | 2012-09-27 |
20120246324 | LOAD CHARACTERISTIC ESTIMATION SYSTEM, LOAD CHARACTERISTIC ESTIMATION METHOD, AND PROGRAM - A load characteristic estimation system includes: a program input unit into which a program that runs on a prescribed computer system is inputted; a program feature information acquisition unit that obtains features from the inputted program; and a load characteristic estimation unit that estimates a load characteristic of the inputted program by reading load characteristic information of another program having a feature similar to the inputted program, from a load characteristic recording unit that records a load characteristic produced in the prescribed computer system when the other program was run on the computer system in the past. | 2012-09-27 |
20120246325 | NETWORK NODE AND METHOD TO CONTROL ROUTING OR BYPASSING OF DEPLOYED TRAFFIC DETECTION FUNCTION NODES - A network is described herein which can control, through subscriber profile data and/or policy preconfigured control data, whether deep packet inspection for data flow/s for an Internet Protocol-Connectivity Access Network (IP-CAN) session established by an end user should take place, or not, according to a defined “User Privacy Policy”, and, in the former case, to which traffic detection function (TDF) node the data flow(s) should be directed. | 2012-09-27 |
20120246326 | MECHANISM TO CONVEY DYNAMIC CHARGING INFORMATION OVER SIP - A system and method of providing charging information to the participants for a session is disclosed. User A initiates a session to user B, by sending an invitation message. The message contains an application body. A first method talks about basic charging framework involving network level manipulation and second method being an offer answer model for charging. In network level manipulation, the user A sends an invitation message to proxy server which modifies the application body of the message before sending the message to user B. In offer answer model for charging, user A initiates an offer for charging, which is sent to user B and means of negotiation is involved between both. Means of negotiation allows implementing different charging schemes, and User B or User B's network can also initiate the charging offer. | 2012-09-27 |
20120246327 | METHOD AND DEVICE FOR NETWORK ACCESS - Embodiments of the present invention relate to the field of communication technologies, and disclose a method and device for network access. The method includes: detecting whether a notification message reported by an x digital subscriber line module is received within a set time, wherein the notification message is used for indicating that the x digital subscriber line module is connected to a network successfully; if yes, establishing a connection between a service terminal and the x digital subscriber line module so that the service terminal accesses the network through the x digital subscriber line module; and if no, establishing a connection between the service terminal and a 3G data card module so that the service terminal accesses the network through the 3G data card module. | 2012-09-27 |
20120246328 | PROTOCOL INTERWORKING DEVICE FOR NETWORK TELEPHONE SYSTEM AND METHOD FOR USING THE SAME - A protocol interworking device communicates with at least one first network telephone terminal supporting a first protocol and at least one second network telephone terminal supporting a second protocol. The protocol interworking device includes a protocol converter supporting both the first and second protocols, and a transferring telephone enabled to communicate with both the first and second network telephone terminals by the protocol converter. When the first network telephone terminal sends a call request for calling the second network telephone terminal to the protocol interworking device, the transferring telephone hangs up with the first network telephone terminal and sends another call request to call the second network telephone terminal. When successfully connecting to the second network telephone terminal, the transferring telephone reconnects with the first network telephone terminal, and the first and network telephone terminals communicate with each other through the protocol interworking device. | 2012-09-27 |
20120246329 | METHOD FOR SETTING PLURALITY OF SESSIONS AND NODE USING SAME - Disclosed are a method for setting a plurality of sessions and a method for transmitting/receiving data using the same. According to an exemplary embodiment of the present invention, at least some of the data including attribute information of the data are received through initial sessions, the number of additional sessions for receiving the data is calculated by using the attribute information of the data, and the additional sessions are set as many as the calculated number of additional sessions. According to the exemplary embodiments of the present invention, various and complicated states of the communication network can be reflected to session setting as the configuration of the communication network becomes more and more complicated and the sessions depending on the state of the communication network can be set, thereby transmitting data more effectively. | 2012-09-27 |
20120246330 | Code access via the web to multiple databases - A web-hosted system includes a server and a block of memory addresses accessed via an URL application on a mobile device. Within the block of memory addresses there are several independently addressable and independently managed sub-blocks. Short codes inputted by a user on his or her mobile device address both the sub-block and data within the sub-block. | 2012-09-27 |
20120246331 | DYNAMIC MULTIMODE HOME NETWORKING MODEM DEVICE - A Home Network and Multimode Modem are provided for coupling devices of different standards/protocols for transmitting/receiving data over the Home Network. The modem is configured to transmit/receive data in both a first mode and a second mode. The first mode provides a first standard/protocol for Home Networking for transmitting and/or receiving data between devices of the Home Network and the second mode provides a second standard/protocol for Home Networking for transmitting/receiving data between devices of the Home Network. A controller dynamically switches the modem between the first and second modes. | 2012-09-27 |
20120246332 | CIRCULAR BUFFER AND METHOD FOR MULTIMEDIA STREAMING SERVICE BASED PEER-TO-PEER - The present invention relates to use of a circular buffer used by a peer in a multimedia streaming service based on peer-to-peer (P2P), and an operating method thereof. A circular buffer of the present invention may include a buffering section to process a delayed data fragment transmission request from at least one peer present in a network according to a playback of a multimedia content, a storing section to store data to be provided to the at least one peer, a continuous storing section in which data fragments for the playback of the multimedia content are stored in serial order, and a discontinuous storing section in which a space for a received data fragment to be shared with the at least one peer is reserved and a space for a data fragment to be received is reserved. | 2012-09-27 |
20120246333 | REDUCING NETWORK AND BATTERY CONSUMPTION DURING CONTENT DELIVERY AND PLAYBACK - Methods and systems for content delivery are provided. A user of a media device may select one or more media content files, which may be located locally or remotely. The content selected by the user is located. If selected content is located at a remote source, that file is downloaded to the media device using maximum available radio bandwidth and stored in local storage. That data is provided as a stream to a media player from the local storage. | 2012-09-27 |
20120246334 | UNIFIED WEB SERVICE URI BUILDER AND VERIFICATION - Verifying a translation middleware piece. A first request is provided to a front end user service using a protocol appropriate for the front end user service, including a translation middleware piece. The translation middleware piece translates requests provided to the front end service to requests for back-end data stores. A first response to the first request to the front end user service is received. A second request is provided to a back-end data store. The second request to the back-end data store is in a format appropriate for the back-end data store and includes elements that should return the same results as the first request to the front end user service. A second response to the second request to the back-end data store is received. Based on the responses, a functional state is determined for at least one of the, front end, the back-end, or the translation middleware piece. | 2012-09-27 |
20120246335 | METHOD, TERMINAL, AND SERVER FOR IMPLEMENTING FAST PLAYOUT - A method for implementing fast playout includes receiving a fast playout request sent by a client, where the fast playout request comprises a Uniform Resource Locator (URL) corresponding to content of a media file with a specified multiple of regular playout rate by the client, and the specified multiple of regular playout rate is determined by the client according to obtained media presentation description; and obtaining a content segment corresponding to the media file with the specified multiple of regular playout rate according to the URL, and sending a fast playout response to the client, where the fast playout response comprises the content segment corresponding to the media file with the specified multiple of regular playout rate. Therefore, fast online playing is implemented, and user experience is improved at the same time. | 2012-09-27 |
20120246336 | METHOD AND APPARATUS FOR PROVIDING CONTEXT-BASED BOUNDARIES FOR SERVICE MANAGEMENT - An approach is provided for providing recommendations based on a recommendation model and a context-based rule. A recommendation platform receives a request for generating at least one recommendation, the request including at least one user identifier, at least one application identifier, or a combination thereof. Next, the recommendation platform determines at least one recommendation model associated with the at least one user identifier, the at least one application identifier, or a combination thereof. Then, the recommendation platform determines at least one context-based recommendation rule. Then, the recommendation platform processes and/or facilitates a processing of the at least one recommendation model, the at least one context-based recommendation rule, or a combination thereof for generating the at least one recommendation. | 2012-09-27 |
20120246337 | SYSTEMS AND METHODS FOR ROUTING MESSAGES EXCLUSIVELY TO ELIGIBLE CONSUMERS IN A DYNAMIC ROUTING NETWORK - Systems and methods are provided that route a message only along routes in a messaging network that lead to a currently active consumer for the message. The messaging network adapts to changes in the message preferences of the message consumer, and the message consumer's availability throughout the messaging network. In various embodiments, changes to message routing criteria at a destination broker in the network are propagated to all other brokers in the network until the entire network is adapted, and the network routes messages based on the adaptations, which reflect the current connectivity and message accepting criteria of each message consumer. | 2012-09-27 |
20120246338 | SELECTIVE USE OF ANONYMOUS PROXIES - A method and computer system for selectively using an anonymous proxy. A user request for content is received. A determination is made as to whether the user request satisfies context criteria. When the user request satisfies the context criteria, the user request is forwarded to an anonymous proxy. When the user request does not satisfy the context criteria, the request is sent directly to a content provider. | 2012-09-27 |
20120246339 | NETWORK EQUIPMENT AND METHOD FOR SELECTING COMMUNICATION PATH - A network equipment is in communication with customer premises equipment (CPE) through a primary electrical path and a secondary electrical path, and includes a timer, a processor and a switching device. The timer provides heartbeat packets for the CPE via the primary electrical path and the secondary electrical path to obtain a first response time and a second response time corresponding to the primary and secondary electrical paths. The switching device is switched to the primary electrical path or the secondary path under the control of the processor. When the timer reaches a preset retransmission timeout, the processor controls the switching device to be switched to the secondary electrical path from the primary electrical path. When the second response time exceeds the first response time at least twice in succession, the processor enables the switching device to be selectively switched to the primary electrical path. | 2012-09-27 |
20120246340 | SYSTEMS AND METHODS FOR IDENTIFYING LINKED MESSAGE BROKERS IN A DYNAMIC ROUTING NETWORK - Systems and methods are provided that dynamically route messages based on the availability of a message consumer on any given route, and which adapt to changes in message consumer availability throughout a messaging network. In various embodiments, changes to message routing criteria at a destination broker in the network are propagated to each source broker for the destination broker, which in turn propagates the changes to their source brokers until the entire network is adapted. | 2012-09-27 |
20120246341 | Method for Creating a Communication Network from Devices of an Automation System - A method for creating a communication network from devices of an automation system, wherein the automation system is developed based on logical addresses of the devices and the devices are assigned physical addresses by which the devices are accessed to exchange data over the communication network when operating the automation system. An overlay network comprising a decentralized network is constructed with the devices as network nodes, wherein conventional mechanisms for decentralized networks for publication of resources and subscription to resources are used to map logical addresses used during development of the automation system to the physical addresses used when operating the automation system. Mapping is achieved by a resource or a subscription to a resource being suitably published during initialization of a respective device, wherein the resources are stored based on keys in the decentralized network which corresponds to a logical addresses, and the resource contents represent physical addresses. | 2012-09-27 |
20120246342 | SEQUENCE CONVERSION DEVICE - An analysis unit extracts conditions for branching in a sequence from sequence data recorded in a recording unit. A condition setting unit presents the result of the condition extraction performed by the analysis unit to the user, accepts a condition setting which the user inputs in response to the presentation of the condition extraction result, and outputs a description of the condition setting as condition setting information to a reconstruction unit. The reconstruction unit reconstructs and outputs the sequence data according to the condition setting information from the condition setting unit, and outputs the sequence data reconstructed thereby as a simplified sequence. | 2012-09-27 |
20120246343 | SYNCHRONIZING DIGITAL CONTENT - Aspects of the present disclosure relate to one or more configured computing systems identifying when decoupled content includes companion content that can be synchronously presented. Once a content match is identified, a device to receive synchronization information can also be identified. The synchronization information can enable one or more devices to synchronously present companion content. | 2012-09-27 |
20120246344 | USER-INPUT SCHEDULING OF SYNCHRONIZATION OPERATION ON A MOBILE DEVICE BASED ON USER ACTIVITY - Data is synchronized between a mobile device and a computing device over a wireless link. Synchronization operations are scheduled according to a synchronization schedule that is based on a current time of day. In one embodiment, the day can be divided into different time periods by the user. The user can also specify the frequency with which synchronization operations are to be performed during each specified period. | 2012-09-27 |
20120246345 | TECHNIQUES FOR INDICATING A PASSIVE STATE FOR A DEVICE - Described are techniques for indicating a state associated with a device. A request is received over a path for information about a device. A response to the request is sent. The response indicates a state regarding the device on the path. The response has a response status of good and a payload of a varying size. The payload is truncated at a location prior to that at which a device identifier for the device is expected. In accordance with the response, a state regarding the device on the path is determined. | 2012-09-27 |
20120246346 | SECURED INTER-PROCESSOR AND VIRTUAL DEVICE COMMUNICATIONS SYSTEM - The invention comprises an electronically secured inter-processor and virtual device communications system, with an input/output controller board, a multi-drop bus interface to multiple devices, and a parallel interface to an industry standard single board computer. The invention assigns a bus address and virtual identification number to each device and controls communications between the main central processing unit and the devices through a Plug-n-Play protocol. | 2012-09-27 |
20120246347 | SYSTEMS AND METHODS FOR UTILIZING VARIABLE LENGTH DATA FIELD STORAGE SCHEMES ON PHYSICAL COMMUNICATION MEDIA SEGMENTS - One exemplary embodiment is directed to a segment of physical communication media. The segment comprises a physical communication medium, a connector attached to the physical communication medium, and a storage device configured to store information therein using a self-defining variable length data field scheme (such as a key-length-value triplet). | 2012-09-27 |
20120246348 | METHODS FOR ANALYZING USB DATA TRAFFIC USING A SINGLE USB HOST CONTROLLER - A method is described for capturing USB data traffic for a monitored device by a USB analyzer using a single USB host controller. It comprises the steps of: generating and storing an address and communication speed associated with the USB analyzer; reading a USB packet; discarding selected read packets based on the stored analyzer address and communication speed; and transmitting the remaining packets to an analysis computer. | 2012-09-27 |
20120246349 | COMMUNICATION CONTROL DEVICE AND COMMUNICATION CONTROL METHOD IN AUDIO VISUAL DEVICE SYSTEM, AND TELEVISION RECEIVER - A communication control device in an audio visual device system has disconnection detection unit for detecting that an audio visual device is disconnected from the audio visual device system, device detection unit for detecting an audio visual device which has not acquired a logical address according to a device type, and control unit for performing control for causing the audio visual device without a logical address to acquire a logical address, when disconnection of a audio visual device is detected by the disconnection detection unit. With this configuration, in an audio visual device system in which an upper limit is set to the number of logical addresses according to a device type, it is possible to cause an audio visual device which cannot acquire a logical address according to the device type to acquire a logical address when it is made available. | 2012-09-27 |
20120246350 | MOBILE TERMINAL AND INTERFACE METHOD THEREOF - A mobile terminal and an interface method thereof for connecting external devices, such as an adapter, a Universal Serial Bus (USB) cable, a docking station, an accessory, and the like, to the mobile terminal are provided. The mobile terminal includes a battery, a connector including a pin for data communication and first and second power pins for charging the battery, a memory for storing a reference voltage indicating a dedicated adapter of the battery, and a controller for receiving a voltage input from the first and second power pins, for recognizing an external device connected with the connector as the dedicated adapter when a voltage input from the pin for data communication is the reference voltage, and for charging the battery with power input to the first and second power pins. | 2012-09-27 |
20120246351 | IDENTIFIER ENCODING SCHEME FOR USE WITH MULTI-PATH CONNECTORS - One exemplary embodiment is directed to a method of tracking a plurality of communication paths in a connector assembly having a plurality of first attachment points and a plurality of second attachment points. The plurality of first attachment points and the plurality of second attachment points are configured to attach physical communication media to the connector assembly. The method comprises reading, from a storage device associated with the connector assembly first, information indicative of a plurality of communication paths formed within the connector assembly between the first attachment points and the second attachment points. The method further comprises reading second information stored on or in physical communication media that is attached to the connector assembly and communicating the first and second information to an aggregation point that is communicatively coupled to the connector assembly. | 2012-09-27 |
20120246352 | DATA PROCESSING SYSTEMS FOR AUDIO SIGNALS AND METHODS OF OPERATING SAME - A data processing system includes an audio processor with a main memory for storing data, first and second buffers for temporarily storing the data to input/output an audio signal, and a data input/output (I/O) unit for outputting the stored data. A direct memory access (DMA) controller is provided for transmitting data between the main memory and the first and second buffers according to a DMA transmission process. If transmission of the data stored in the first buffer ends and an interrupt signal is thus generated, the DMA controller increases sizes of the first and second buffers during transmission of the data stored in the second buffer. | 2012-09-27 |
20120246353 | AUDIO DEVICE AND METHOD OF OPERATING THE SAME - An audio device and a method of operating the same are provided. The audio device includes a storage unit, a first memory and a second memory, a hardware decoder, a software decoder, a first direct memory access (DMA) block, a second DMA block, and a controller. The controller converts the audio device from an ultra low power mode in which the first PCM information is transmitted to an audio interface buffer through the first memory, the hardware decoder, and the first DMA block or a low power mode in which the second PCM information is transmitted to the audio interface buffer through the second memory, the software decoder, and the first DMA block to a normal mode in which the second PCM information is transmitted to the audio interface buffer through the second memory, the software decoder, and the second DMA block. | 2012-09-27 |
20120246354 | Multithreaded Programmable Direct Memory Access Engine - A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution. | 2012-09-27 |
20120246355 | Method and System for Audio Device Virtualization - Methods and systems are provided to allow personal computer users to virtualize a local audio device so that they can remotely connect to a server and interact with the server as if the local audio device was physically connected to the server. They connect a remote audio target hardware device to the target system through a physical USB connection, and the device interacts with the local user's computer over a network. The target system is unaware that the audio device is not connected directly to the system through a physical connection, and the target system does not need special software to implement the remote audio device. The audio target hardware device connected to the target computer may be physically connected and disconnected. | 2012-09-27 |
20120246356 | CONTROL DEVICE AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a control device includes a receiving unit configured to receive an interrupt request requesting an interrupt process to be executed by a processing device that executes one or more processes; a storage unit configured to store therein the interrupt request; a determining unit configured to determine a state of the processing device; a sending unit configured to send the interrupt request to the processing device; and a control unit configured to store the interrupt request received by the receiving unit in the storage unit when the processing device is determined by the determining unit to be in an idle state in which the processing device is not executing the processes and a predetermined condition is not satisfied, and to control the sending unit to send the interrupt request stored in the storage unit to the processing device when the predetermined condition is satisfied. | 2012-09-27 |
20120246357 | HOST COMPUTER, COMPUTER TERMINAL, AND CARD ACCESS METHOD - According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit that includes both a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information for an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information. | 2012-09-27 |
20120246358 | Method and System for a Configurable Connector for Ethernet Applications - Aspects of a method and apparatus for a configurable connector for Ethernet are provided. In this regard, a configurable Ethernet connector residing in an Ethernet enabled communication device may couple the communication devise to one or more twisted pairs and enable communication of Ethernet frames over the twisted pair(s). Conductors of each of the twisted pairs may make contact with adjacent pins of the configurable Ethernet connector. A size and shape of the configurable Ethernet connector may enable housing of more than 48 instances of the configurable Ethernet connector in a single standard size one rack unit face plate of a 19-inch rack. The configurable Ethernet connector may provide mechanical and electrical indications that enable a device coupled to the configurable Ethernet connector to determine configuration information of the configurable Ethernet connector. The information may indicate presence or absence of various components within and/or on the configurable Ethernet connector. | 2012-09-27 |
20120246359 | Method and System for USB Device Virtualization - Methods and systems are provided to allow personal computer users to virtualize a local USB device so that they can remotely connect to a server and interact with the server as if the local USB device was physically connected to the server. They connect a remote USB target hardware device to the target system through a physical USB connection, and the device interacts with the local user's computer over a network. The target system is unaware that the USB device is not connected directly to the system through a physical connection, and the target system does not need special software to implement the remote USB device. The USB target hardware device connected to the target computer may be physically connected and disconnected. | 2012-09-27 |
20120246360 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - A data processing apparatus may include a data conversion unit for, when converting a plurality of sequentially input data into conversion data of the same bit number as a data bus having a prescribed bit number and sequentially transferring the conversion data, arranging the input data in each conversion unit using the conversion data as one transfer unit and a prescribed number of transfer units as one conversion unit. The data conversion unit may include a first data generation unit, a second data generation unit for generating second data obtained by allocating a prescribed second number of input data in the input data not allocated to the first data, to the second bit range and a data coupling unit for coupling the first data and the second data to generate the conversion data having the bit number of the bus width of the data bus. | 2012-09-27 |
20120246361 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - A data processing apparatus may include: a data conversion unit configured to designate one-transfer data as one transfer unit and designate a predetermined number of transfer units as one conversion unit when a plurality of input data sequentially input is converted into transfer data of which the number of bits is the same as that of a data bus having a predetermined number of bits, and the transfer data is sequentially transferred, and arrange the input data in the transfer data within the conversion unit. The data conversion unit may include: a data generation unit, a first data arrangement change unit, and a first data selection unit configured to sequentially select the changed data in which the position of the input data is changed by the first data arrangement change unit and output the selected changed data as the transfer data in the data conversion unit. | 2012-09-27 |
20120246362 | DOUBLE-BUFFER INSERTION COUNT STORED IN A DEVICE ATTACHED TO A PHYSICAL LAYER MEDIUM - One exemplary embodiment is directed to a connector assembly. The connector assembly comprises a port having a media interface configured to interface with a storage device interface of a connector. The connector is attached to a segment of physical communication media. The connector also includes a storage device. The connector assembly also comprises a programmable processor configured to execute software that stores information to the storage device using a plurality of redundant storage operations by which a plurality of copies of the information is sequentially stored in the storage device. | 2012-09-27 |
20120246363 | EXTERNAL DEVICE OF CARD READER AND CARD READER - The present disclosure has provided an external device of a card reader and a card reader, which relate to the communication field. The embodiments of the present disclosure automatically transmit data in the memory card to a data receiving apparatus through a control module. The control module may be provided either within the card reader or within an external device of the card reader. The external device of the card reader may be provided between the card reader and the data receiving apparatus. The external device of the card reader and the card reader in the embodiments of the present disclosure automatically transmit data in the memory card to the data receiving apparatus and improve user experience. Moreover, the card reader in the embodiment of the present disclosure can be obtained by improving the existing card reader and external device without increasing too much cost. | 2012-09-27 |
20120246364 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - A data processing apparatus may include a data conversion unit that arranges the input data in each transfer data in the conversion unit using one transfer data as one transfer unit and a predetermined number of transfer units as one conversion unit when converting a plurality of input data input sequentially into transfer data having a bit number identical to a predetermined bit number of a data bus and sequentially transferring the converted transfer data. The data conversion unit may include a data generation unit and a first data arrangement changing unit. The first data arrangement changing unit may include a bit change number calculating unit, a bit change number analysis unit, a first data sorting unit, and a data coupling unit. | 2012-09-27 |
20120246365 | BUS CONTROL FOR A DOMESTIC APPLIANCE - A domestic appliance ( | 2012-09-27 |
20120246366 | SERIAL PORT REMOTE CONTROL CIRCUIT - A serial port remote control circuit includes a first interface circuit, a control circuit, an output circuit, and a power circuit. The first interface circuit converts recommended standard 232 (RS232) level signals to transistor-transistor logic (TTL) level signals or vice versa. The control circuit is connected to the first interface circuit, to convert the TTL level signals to physical bus signal or vice versa. The output circuit is connected to the control circuit, to convert the received physical bus signals from the control circuit to network bus signals or vice versa. The power circuit outputs a first voltage and a second voltage converted from the first voltage to the control circuit, the first interface circuit, and the output circuit. | 2012-09-27 |
20120246367 | MEMORY SYSTEM, MEMORY CONTROLLER, AND SYNCHRONIZING APPARATUS - According to one embodiment, there is provided a memory system including a bus master, a bus slave, and a memory device. The bus slave includes a synchronizing unit, and a speed-enhancing unit. The synchronizing unit is connected to a bus. The synchronizing unit receives the data in synchronism with a third clock. The third clock is in synchronous relation with a second clock and is slower than a first clock. The speed-enhancing unit enhances a transfer speed from a speed corresponding to the third clock to a speed corresponding to the second clock, by transferring the data received in the synchronizing unit to the memory device in synchronism with the second clock. | 2012-09-27 |
20120246368 | SYSTEM ON CHIP IMPROVING DATA TRAFFIC AND OPERATING METHOD THEREOF - A system on chip (SoC) includes a first master, a slave, a bus switch transmitting a first command of the master and a first response of the slave, and a first priority controller connected between the first master and the bus switch The first priority controller measures at least one of first bandwidth and first latency based on the first command and the first response and adjusts the priority of the first command according to at least one of the measurement results. | 2012-09-27 |
20120246369 | BUS MONITOR CIRCUIT AND BUS MONITOR METHOD - A bus monitor circuit that produces a bus monitor output signal on a bus transmitting data between a master and a slave includes an access information/write data FIFO and a read data FIFO. When an attribute of the access information stored at a header of the access information/write data FIFO indicates a write access, it directly outputs a bus monitor output signal indicating access information accompanied with the corresponding write data which is transmitted in the same cycle. When an attribute of the access information stored at the header of the access information/write data FIFO indicates a read access, it waits for the read data FIFO storing the corresponding read data, and then outputs a bus monitor output signal indicating the access information paired with the read data in the same cycle. Thus, it is possible to guarantee the occurrence order of bus access according to a bus interface protocol enabling pipeline transaction, thus outputting a bus monitor output signal indicating a pair of access information and data information. | 2012-09-27 |
20120246370 | METHOD AND APPARATUS FOR MANAGING OPERATING SYSTEMS IN EMBEDDED SYSTEM - A method for managing operating systems in an embedded system to solve the problem of performance loss and high product complexity caused by the running of multiple operating systems on a single CPU is provided. The embedded system includes at least two operating systems. The method includes: receiving an interrupt instruction; saving a state of a currently running operating system; and switching the currently running operating system to a target operating system corresponding to the interrupt instruction. | 2012-09-27 |
20120246371 | TEST APPARATUS FOR PCI CARD - A test apparatus includes a circuit board and a peripheral component interconnect (PCI) expansion slot. A number of golden fingers are arranged at a first side of the circuit board. A second side of the circuit board is connected to a bottom of the PCI expansion slot. The golden fingers are electrically connected to the PCI expansion slot. A number of first test pads and second test pads are arranged on the circuit board between the first and second sides. The first and second test pads have different shapes, sizes, and/or colors. The first and second test pads are electrically connected to the PCI expansion slot correspondingly. | 2012-09-27 |
20120246372 | PCI-E BUS ACHIEVED CONNECTOR EXPANSION MODULE - A PCI-E bus achieved connector expansion module includes a connection joint, a plurality of transmission wires, and at least one connector. Shape and size of the connection joint is corresponding to that of PCI-E bus slot, so the connection joint can insert into the PCI-E bus slot for electrically connecting with pins in the PCI-E bus which the expansion module connects with. One end of each transmission wires electrically connects to the connection joint separately, and the other end of each transmission wires connects to the connector separately. Therefore, the expansion module can be used to expand at least one connector for an electronic device via PCI-E interface thereon. | 2012-09-27 |
20120246373 | PCI-E BUS BASED CONNECTOR EXPANSION MODULE - A PCI-E bus based USB connector expansion module includes a first circuit board, a plurality of transmission wires, and at least one USB connector. The first circuit board has a welding part and a protruding part extending from one end of the welding part, and sharp and size of the protruding part are corresponding to that of a PCI-E bus slot, and the protruding part is arranged a plurality of golden fingers thereon. When the expansion module connects with the PCI-E bus, the protruding part is placed in the PCI-E bus slot, and the golden fingers electrically connect with a plurality of pins in the PCI-E bus slot. The transmission wires weld to the welding part separately at one end, and electrically connect to the at least one USB connector on other end. | 2012-09-27 |
20120246374 | DEVICE ORIENTATION BASED DOCKING FUNCTIONS - Systems and method are provided for selecting one or more docking functions based on a physical orientation of a user device coupled to a docking device. The docking device may include a surface upon which the user device may be placed. Docking functions such as charging, data transfer, data synchronization, diagnostic checking, or other functions may be selected, performed, or both, based on the physical orientation of the user device on the surface. | 2012-09-27 |
20120246375 | CONFIGURABLE HEALTH-CARE EQUIPMENT APPARATUS - An apparatus, system and method for providing health-care equipment in a plurality of customizable configurations. A configuration includes a selection and arrangement of health-care equipment modules that each provide specialized support for the provision of health care, including the measurement of physiological parameters. Various types of configurations include those adapted to be mounted upon a desk top or a wall surface, or adapted for wheel mounting or hand-carriable mobile configurations. | 2012-09-27 |
20120246376 | METHOD FOR OPERATING A FIELDBUS INTERFACE - A method for operating a fieldbus interface, which is connected to a fieldbus of process automation technology. The method includes the steps as continuous monitoring of data traffic on the fieldbus by the fieldbus interface; need-dependent performing of active communication by the fieldbus interface in parallel with the monitoring of the data traffic; and registering by the fieldbus interface of monitored information concerning network management of the fieldbus. | 2012-09-27 |
20120246377 | HID over Simple Peripheral Buses - In embodiments of HID over simple peripheral buses, a peripheral sensor receives inputs from a peripheral device, and the peripheral sensor implements an HID SPB interface to interface the peripheral device with a computing system via a simple peripheral bus (SPB) in an HID data format. The peripheral sensor can also receive extensibility data for a proprietary function of the peripheral device, and communicate the inputs from the peripheral device and the extensibility data via the simple peripheral bus in the computing system. Alternatively or in addition, a peripheral sensor can generate sensor data and the HID SPB interface interfaces the peripheral sensor with the computing system via the simple peripheral bus. The peripheral sensor can then communicate the sensor data as well as extensibility data for a proprietary function of the peripheral sensor via the simple peripheral bus in the HID data format to the computing system. | 2012-09-27 |
20120246378 | INFORMATION TRANSFER APPARATUS, INFORMATION TRANSFER SYSTEM AND INFORMATION TRANSFER METHOD - An information transfer apparatus of the present invention is an information transfer apparatus including a network interface connected to a server that distributes data, via a network, and a USB interface connected to an information presentation apparatus that presents the data, the information transfer apparatus transferring the data distributed from the server to the information presentation apparatus; and the information transfer apparatus includes: a switch that enables or disables connection with the information presentation apparatus via the USB interface; and a control section that judges whether or not the data distributed from the server has been updated, enables connection with the information presentation apparatus by the switch to transfer the data to the information presentation apparatus only upon judging that the data has been updated, and, after transferring the data, disables the connection with the information presentation apparatus by the switch. | 2012-09-27 |
20120246379 | TECHNIQUES FOR DIFFERENT MEMORY DEPTHS ON DIFFERENT PARTITIONS - Embodiments of the present technology are directed toward techniques for enabling different memory partitions to have different memory depths. | 2012-09-27 |
20120246380 | NEIGHBORHOOD OPERATIONS FOR PARALLEL PROCESSING - A memory device includes a plurality of storage units in which to store data of a bank, wherein the data has a logical order prior to storage and a physical order different than the logical order within the plurality of storage units and a within-device reordering unit to reorder the data of a bank into the logical order prior to performing on-chip processing. In another embodiment, the memory device includes an external device interface connectable to an external device communicating with the memory device, an internal processing element to process data stored on the device and multiple banks of storage. Each bank includes a plurality of storage units and each storage unit has two ports, an external port connectable to the external device interface and an internal port connected to the internal processing element. | 2012-09-27 |
20120246381 | Input Output Memory Management Unit (IOMMU) Two-Layer Addressing - Embodiments of the present invention provide methods, systems, and computer readable media for input output memory management unit (IOMMU) two-layer addressing in the context of memory address translations for I/O devices. According to an embodiment, a method includes translating a guest virtual address (GVA) to a corresponding guest physical address (GPA) using a guest address translation table according to a process address space identifier associated with an address translation transaction associated with an I/O device, and translating the GPA to a corresponding system physical address (SPA) using a system address translation table according to a device identifier associated with the address translation transaction. | 2012-09-27 |
20120246382 | METADATA STORAGE IN UNUSED PORTIONS OF A VIRTUAL DISK FILE - Embodiments disclosed herein provide systems and method for storing metadata to unused portions of a virtual disk file. In a particular embodiment, a method provides selecting a virtual disk file stored on a data storage volume and identifying unused portions of the virtual disk file. The method further provides writing metadata for the virtual disk file in the unused portions of the virtual disk file. | 2012-09-27 |
20120246383 | MEMORY SYSTEM AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a memory system includes semiconductor memories each having a plurality of blocks; a first table; a receiving unit; a generating unit; a second table; and a writing unit. The first table includes a plurality of memory areas each associated with each block and in each of which defect information is stored. The generating unit generates a set of blocks by selecting one block to which data are to be written in each semiconductor memory based on an index number indicating one of a plurality of rows in the first table and the first table. In the second table, an index number and a channel number are stored for each logical block address in association with one another. When a write command is received by the receiving unit, the writing unit writes data to a block associated with a selected channel number among blocks constituting the set. | 2012-09-27 |
20120246384 | FLASH MEMORY AND FLASH MEMORY ACCESSING METHOD - A flash memory accessing method is provided. The method includes: firstly, dividing the flash memory into a primary storage area and a backup storage area, wherein the difference between a first start address of the primary storage area and a second start address of the backup storage area is an offset address not equal to zero; reading the flash memory according to a address pointer equal to the first start address so as to obtain the boot data; making the electronic apparatus perform a boot sequence according to the boot data; then, detecting whether the boot sequence is normal or not, and when the boot sequence is abnormal, providing the flash memory with changing the read pointer to the second start address according to an offset address to read the backup boot data. | 2012-09-27 |
20120246385 | EMULATING SPI OR 12C PROM/EPROM/EEPROM USING FLASH MEMORY OF MICROCONTROLLER - In one aspect, a microcontroller is disclosed. In one embodiment, the microcontroller includes a system memory that has an erasable memory of a first type, with a first storage partition and a second, different storage partition. The system memory also has a random access memory (RAM). The microcontroller further includes a network interface that is configured to communicate management commands over a communications link, and a programmable processor that is operatively connected to the system memory and the network interface. The communications link includes an interface bus and is configured for one or more of I2C, SPI, and system management bus communications. The programmable processor is programmed to perform functions that include receiving a first management command configured for the erasable memory of the first type, causing the second storage partition of the erasable memory of the first type to emulate a second type of erasable memory, and receiving a second management command configured for the second type of erasable memory. | 2012-09-27 |
20120246386 | STORAGE SYSTEM AND STORAGE AREA ALLOCATION METHOD - If a monitor measurement cycle is set as a long cycle, promotion in a short cycle cannot be performed; and even if the number of I/Os is very large in response to fluctuations of the number of I/Os in several minutes to several hours of normal work, pages will be promoted after waiting for several weeks. As a result, I/Os which could have normally accepted by an upper tier will be accepted by a lower tier, which results in a problem of worsening the performance efficiency. A monitoring system capable of preventing demotion due to temporary reduction of the number of I/Os for specific pages from a viewpoint of a long cycle and enabling prompt promotion in response to an increase of the number of U/Os for 3 | 2012-09-27 |
20120246387 | SEMICONDUCTOR MEMORY DEVICE AND CONTROLLING METHOD - According to an embodiment, a semiconductor memory device includes a nonvolatile memory; an input/output control unit to control input/output of data to/from the nonvolatile memory; an address translation table that associates first address information specifying a logical recording position of user data stored in the nonvolatile memory with second address information indicating a physical recording position in the nonvolatile memory; a translating unit to translate the first address information to the second address information according to the table; and a generating unit to generate redundant data for checking whether there is error in the user data and the first address information used as one data piece. The input/output control unit records, as data set, the user data, the first address information, and the redundant data, which are used as one data set, in the physical recording position in the nonvolatile memory indicated by the second address information. | 2012-09-27 |
20120246388 | MEMORY SYSTEM, NONVOLATILE STORAGE DEVICE, CONTROL METHOD, AND MEDIUM - According to one embodiment, a memory system includes a nonvolatile storage device and an information processing apparatus. The information processing apparatus includes a first control circuit configured to send a delete notification to the nonvolatile storage device to invalidate data in a first logical address area when read data corresponding to the first logical address area is the same as data expressed by a first function. The nonvolatile storage device include a nonvolatile storage medium, a management table configured to associate a logical address corresponding to valid data for the nonvolatile storage device with a physical address, and a second control circuit configured to update the management table to invalidate a logical address designated by the delete notification, and to send the data expressed by the first function to the information processing apparatus when a logical address included in a read instruction received from the information processing apparatus is invalid. | 2012-09-27 |
20120246389 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM - According to one embodiment, a nonvolatile semiconductor memory device includes a nonvolatile memory, and a controller having a first mode to perform data transfer in response to one of a rising edge and falling edge of a first control signal and a second mode to perform data transfer in response to both of a rising edge and falling edge of a second control signal. The controller switches the first and second modes in data input and data output. | 2012-09-27 |
20120246390 | INFORMATION PROCESSING APPARATUS, PROGRAM PRODUCT, AND DATA WRITING METHOD - According to one embodiment, an information processing apparatus includes an auxiliary storage unit, a non-volatile main storage unit, a secondary cell, a first writing unit, and a second writing unit. The non-volatile main storage unit includes a cache area to temporarily store therein data that is to be stored in the auxiliary storage unit. The first writing unit writes the data into the cache area. The second writing unit writes the data written in the cache area into the auxiliary storage unit when an amount of power in the secondary cell is greater than a predetermined first threshold. | 2012-09-27 |
20120246391 | BLOCK MANAGEMENT SCHEMES IN HYBRID SLC/MLC MEMORY - A method for data storage includes storing data in a memory including multiple analog memory cells arranged in blocks. A first subset of the blocks is defined for storing first data with a first storage density, and a second subset of the blocks is defined for storing second data with a second storage density, larger than the first storage density. In each of the first and second subsets, one or more blocks are allocated to serve as spare blocks and blocks that become faulty are replaced with the spare blocks. Upon detecting that a number of the spare blocks in the second subset has decreased below a predefined threshold, the data is copied from at least one block in the second subset to the first subset, and the at least one block is added to the spare blocks of the second subset. | 2012-09-27 |
20120246392 | STORAGE DEVICE WITH BUFFER MEMORY INCLUDING NON-VOLATILE RAM AND VOLATILE RAM - A storage device includes a flash memory, a buffer memory and a memory controller. The buffer memory is configured to temporarily store write data to be written in the flash memory, the buffer memory including volatile RAM and non-volatile RAM. The memory controller is configured to select one of the volatile RAM and the non-volatile RAM to temporally store the write data based on a write pattern of the write data, and to transmit a host command complete signal to a host when the write data is stored in the non-volatile RAM. | 2012-09-27 |
20120246393 | MEMORY SYSTEM AND CONTROL METHOD OF THE MEMORY SYSTEM - A memory system of a embodiments includes a first storing area having physical blocks and a second storing area recording a logical to physical translation table and an erasure count table keeping data erasure count in physical blocks. The memory system of the embodiments includes a controller which, when a logical address for deletion is notified, obtains data erasure count of a deletion physical block including a deletion area specified by the physical address corresponding to the logical address, and when a physical block having a small erasure count not more than a predetermined rate of the data erasure count exists in the erasure count table, reads out valid data for the memory system in the physical block having a small erasure count onto the second storing area, writes the above data into the deletion area, and invalidates the valid data in the physical block having a small erasure count. | 2012-09-27 |
20120246394 | Flash Memory Device and Data Writing Method for a Flash Memory - A data writing method for a flash memory. First, a plurality of blocks of a flash memory is classified into a plurality of block groups according to the erase counts of the blocks. A logical address range of a host is then divided into a plurality of logical address sections respectively corresponding to the block groups. Write data is then received from the host. A target logical address section to which the logical address of the write data belongs is then determined. A target block group corresponding to the target logical address section is then determined. A target block is then selected from the blocks of the target block group. The write data is then written to the target block. | 2012-09-27 |
20120246395 | MEMORY SYSTEM WITH INTERLEAVED ADDRESSING METHOD - Disclosed is a memory system which includes a nonvolatile memory device including a memory cell array having a plurality of word lines including a first set of word lines storing first data having a high bit error rate, and a second set of word lines storing second data having low bit error rate less than the high bit error rate, and a memory controller that during a program operation maps logical addresses for a portion of the first data and a portion of the second data onto a selected word line selected from the plurality of word lines. | 2012-09-27 |
20120246396 | NON-VOLATILE MEMORY DEVICE HAVING ASSIGNABLE NETWORK IDENTIFICATION - Memory devices and methods disclosed such as a memory device having a plurality of memory dies where each die includes a network identification that uniquely identifies the memory die on a bus. Access for each memory die to the bus can be scheduled by a bus controller. | 2012-09-27 |
20120246397 | STORAGE DEVICE MANAGEMENT DEVICE AND METHOD FOR MANAGING STORAGE DEVICE - According to one embodiment, a storage device management device is connected to a random access memory and a first storage device. When the random access memory includes a free region sufficient to store write data, the write data is stored onto the random access memory. Data on the random access memory selected in the descending order of elapsed time from the last access is sequentially copied onto the first storage device, and a region in the random access memory which has stored the copied data is released. When stored on the random access memory, the read data is read from the random access memory to the processor. When stored on the first storage device, the read data is copied onto the random access memory and read from the random access memory to the processor. | 2012-09-27 |
20120246398 | DISK ARRAY DEVICE AND ITS CONTROL METHOD - To shorten the time from power restoration to the resumption of business operation. During a power failure, a memory controller saves configuration information and directory information of a shared memory to a nonvolatile memory, and saves data of a cache memory to the nonvolatile memory. During power restoration from a power failure, the memory controller returns information of the nonvolatile memory to the shared memory so that it can be updated before the lapse of the initialization time, the micro processor executes online processing based on information of the shared memory, and the memory controller 70 controls the storage area of the cache memory so that it will become gradually writable according to the battery capacity of the battery if the battery capacity of the battery is still gradually increasing even after the lapse of the initialization time. | 2012-09-27 |
20120246399 | Storage Device and Memory Controller - Disclosed is a storage device using non-volatile semiconductor memory that achieves high performance and long life for the device. When managing the non-volatile semiconductor memory ( | 2012-09-27 |
20120246400 | METHOD AND APPARATUS FOR PACKET SWITICHING - A method for performing packet lookups is provided. Packets (which each have a body and a header) are received and parsed to parsing headers. A hash function is applied to each header, and each hashed header is compared with a plurality of binary rules stored within a primary table, where each binary rule is a binary version of at least one ternary rule from a first set of ternary rules. For each match failure with the plurality of rules, a secondary table is searched using the header associated with each match failure, where the secondary table includes a second set of ternary rules. | 2012-09-27 |
20120246401 | IN-MEMORY PROCESSOR - A memory device includes at least two memory banks storing data and an internal processor. The at least two memory banks are accessible by a host processor. The internal processor receives a timeslot from the host processor and processes a portion of the data from an indicated one of the at least two banks of the memory array during the timeslot while the remaining banks are available to the host processor during the timeslot. A method of operating a memory device having banks storing data includes a host processor issuing per bank timeslots to an internal processor of a memory device, the internal processor operating on an indicated bank of the memory device during the timeslot and the host processor not accessing the indicated bank during the timeslot. | 2012-09-27 |
20120246402 | COMMUNICATION DEVICE, COMMUNICATION METHOD, AND COMPUTER- READABLE RECORDING MEDIUM STORING PROGRAM - A communication device reducing the processing time to install data on a disc storage medium onto multiple servers is provided. A protocol serializer | 2012-09-27 |
20120246403 | WRITE SPIKE PERFORMANCE ENHANCEMENT IN HYBRID STORAGE SYSTEMS - A hybrid storage array one using two or more storage device tiers. In one implementation, two tiers may be provided by solid state drives (SSDs) and hard disk drives (HDDs). Host application access patterns of a certain type determined to be relatively slow, such as random writes, are detected. The random writes are collected and written to a special reserve space, such as a portion of the SSD storage tier, referred to as a write cache extension. The write cache extension absorbs such accesses that would otherwise be written to HDD storage directly. Data structures are created in a cache memory local to an array controller representing the location on SSD reserve space to which the writes were committed and a location in the storage system where they were originally intended to go. The write cache extension can be enabled all of the time, or only when the array controller write cache experiences certain operating conditions, such as when its utilization exceeds a certain predetermined amount. The approach improves the overall performance of the hybrid array. | 2012-09-27 |
20120246404 | PROTECTED MODE FOR GLOBAL PLATFORM COMPLIANT SMART CARDS - A multiple application smart card ( | 2012-09-27 |
20120246405 | DELAYED FREEING OF DATA STORAGE BLOCKS - A memory block that includes a physical storage page holding data of a data storage application in a page buffer can be cached in a page buffer upon the memory block being designated for a change in status from a used status to a shadow status. Upon occurrence of a trigger event, all pages stored in the page buffer can be processed in a first batch process that can include converting each of the pages in the page buffer from the used status to the shadow status and emptying the page buffer. Upon receiving a call to free the pages in the page buffer from the shadow status to a free status without the trigger event occurring, the pages in the page buffer can be converted from the used status directly to the free status in a second batch process. Related methods, systems, and articles of manufacture are also disclosed. | 2012-09-27 |
20120246406 | EFFECTIVE PREFETCHING WITH MULTIPLE PROCESSORS AND THREADS - A processing system includes a memory and a first core configured to process applications. The first core includes a first cache. The processing system includes a mechanism configured to capture a sequence of addresses of the application that miss the first cache in the first core and to place the sequence of addresses in a storage array; and a second core configured to process at least one software algorithm. The at least one software algorithm utilizes the sequence of addresses from the storage array to generate a sequence of prefetch addresses. The second core issues prefetch requests for the sequence of the prefetch addresses to the memory to obtain prefetched data and the prefetched data is provided to the first core if requested. | 2012-09-27 |
20120246407 | METHOD AND SYSTEM TO IMPROVE UNALIGNED CACHE MEMORY ACCESSES - A method and system to improve unaligned cache memory accesses. In one embodiment of the invention, a processing unit has logic to facilitate access of at least two cache memory lines of a cache memory in a single read operation. By doing so, it avoids additional read operations or cycles to read the required data that is cached in more than one cache memory line. Embodiments of the invention facilitate the streaming of unaligned vector loads that does not require substantially more power than streaming aligned vector loads. For example, in one embodiment of the invention, the streaming of unaligned vector loads consumes less than two times the power requirements of streaming aligned vector loads. | 2012-09-27 |
20120246408 | ARITHMETIC PROCESSING DEVICE AND CONTROLLING METHOD THEREOF - A physical process ID (PPID) is stored for each cache block of each set, and a MAX WAY number for each PPID value is stored for each of index values # | 2012-09-27 |
20120246409 | ARITHMETIC PROCESSING UNIT AND ARITHMETIC PROCESSING METHOD - An arithmetic processing unit includes a cache memory, a register configured to hold data used for arithmetic processing, a correcting controller configured to detect an error in data retrieved from the register, a cache controller configured to access a cache area of a memory space via the cache memory or a noncache area of the memory space without using the cache memory in response to an instruction executing request for executing a requested instruction, and notify a report indicating that the requested instruction is a memory access instruction for accessing the noncache area, and an instruction executing controller configured to delay execution of other instructions subjected to error detection by the correcting controller while the cache controller executes the memory access instruction for accessing the noncache area when the instruction executing controller receives the notified report. | 2012-09-27 |
20120246410 | CACHE MEMORY AND CACHE SYSTEM - A cache memory has one or a plurality of ways having a plurality of cache lines including a tag memory which stores a tag address, a first dirty bit memory which stores a first dirty bit, a valid bit memory which stores a valid bit, and a data memory which stores data. The cache memory has a line index memory which stores a line index for identifying the cache line. The cache memory has a DBLB management unit having a plurality of lines including a row memory which stores first bit data identifying the way and second bit data identifying the line index, a second dirty bit memory which stores a second dirty bit of bit unit corresponding to writing of a predetermined unit into the data memory, and a FIFO memory which stores FIFO information prescribing a registered order. Data in a cache line of a corresponding way is written back on the basis of the second dirty bit. | 2012-09-27 |
20120246411 | CACHE EVICTION USING MEMORY ENTRY VALUE - Embodiments are directed to efficiently determining which cache entries are to be evicted from memory and to incorporating a probability of reuse estimation in a cache entry eviction determination. A computer system with multiple different caches accesses a cache entry. The computer system determines an entry cost value for the accessed cache entry. The entry cost value indicates an amount of time the computer system is slowed down by to load the cache entry into cache memory. The computer system determines an opportunity cost value for the computing system caches. The opportunity cost value indicates an amount of time by which the computer system is slowed down while performing other operations that could have used the cache entry's cache memory space. Upon determining that the entry cost value is lower than the opportunity cost value, the computer system probabilistically evicts the cache entry from cache memory. | 2012-09-27 |
20120246412 | CACHE SYSTEM AND PROCESSING APPARATUS - According to an embodiment, in a cache system, the sequence storage stores sequence data in association with each piece of data to be stored in the volatile cache memory in accordance with the number of pieces of data stored in the nonvolatile cache memory that have been unused for a longer period of time than the data stored in the volatile cache memory or the number of pieces of data stored in the nonvolatile cache memory that have been unused for a shorter period of time than the data stored in the volatile cache memory. The controller causes the first piece of data to be stored in the nonvolatile cache memory in a case where it can be determined that the first piece of data has been unused for a shorter period of time than any piece of the data stored in the nonvolatile cache memory. | 2012-09-27 |
20120246413 | SUPPORTING MULTIPLE BYTE ORDER FORMATS IN A COMPUTER SYSTEM - Method and system for supporting multiple byte order formats, separately or simultaneously, are provided and described. In one embodiment, a page attribute table (PAT), which is programmable, is utilized to indicate byte order format. In another embodiment, a memory type range register (MTRR), which is programmable, is utilized to indicate byte order format. | 2012-09-27 |
20120246414 | LOCK-FREE RELEASE OF SHADOW PAGES IN A DATA STORAGE APPLICATION - Storage pages in a data storage application can be designated as having one of a used status, a free status, and a shadow status. The storage pages having the shadow status remain in use but available for conversion to the free status after completion of a savepoint. The storage pages designated to the shadow status can be assigned among at least a first group and a second group. A first savepoint can be invoked during which the storage pages designated to the shadow status and assigned to the first group are converted to the free status, and a second savepoint can be invoked during which the storage pages designated to the shadow status and assigned to the second group are converted to the free status. In this manner, locking of the system during a savepoint is not required. Related methods, systems, and articles of manufacture are also disclosed. | 2012-09-27 |
20120246415 | DATA MERGING METHOD FOR NON-VOLATILE MEMORY AND CONTROLLER AND STORAGE APPARATUS USING THE SAME - A data merging method for merging data belonging to a first logical block in a rewritable non-volatile memory module is provided. The method includes getting a second physical block from a free area of the rewritable non-volatile memory module and determining whether a valid logical page number is smaller than a predetermined number. The method also includes, when the valid logical page number is smaller than the predetermined number, storing a corresponding page mapping table in a start physical page of the second physical block and writing at least one valid page data belonging to the first logical block into at least one physical page of the second physical block. Accordingly, the method can effectively shorten the time for merging data. | 2012-09-27 |