39th week of 2013 patent applcation highlights part 24 |
Patent application number | Title | Published |
20130249568 | CABINET TOUCH CONTROL - Provided is a method and an apparatus for controlling an electric device. The apparatus includes a cabinet defining a recess, and a sensor disposed within said recess for sensing the presence of a foreign object in close proximity to the sensor. A veneer at least partially conceals the sensor disposed within said recess from view when observed from an ambient environment of the cabinet. A controller is responsive to a signal transmitted by the sensor indicative of the presence of the foreign object adjacent to the sensor to transmit a control signal for controlling operation of the electric device operatively connected to communicate with the controller. | 2013-09-26 |
20130249569 | MEASUREMENT OF AMOUNT OF SOLID IN SUSPENSION - A measuring part measures the amount of matter dispersed in a suspension on the basis of a measurement, in which electromagnetic radiation interacts with the suspension, and the proportional volume of a free gas contained in the suspension on the basis of a measurement of electrical conductivity and/or impedance distribution for determining the amount of dispersed solid matter in the suspension. | 2013-09-26 |
20130249570 | Sensor and Method for Detecting an Object - The invention relates to a sensor for detecting an object. The sensor includes a probe electrode for forming a measuring capacitance with the object to be detected, a charging generator for generating an alternating charging voltage, wherein the probe electrode is charged by means of the alternating charging voltage, an amplifier for amplifying a voltage across the measuring capacitance, wherein the amplifier includes a first supply connection and a second supply connection, electronic means for processing signals outputted at an output of the amplifier to form at least one output signal and at least one sensor output for outputting the at least one output signal. According to the invention, the sensor is characterized in that a DC voltage in the form of a second supply voltage is connectable to the second supply connection, and that a first supply voltage having an AC voltage portion is connectable to the first supply connection, wherein a supply voltage generator is available for generating the DC voltage portion. The invention also relates to a method for detecting an object. | 2013-09-26 |
20130249571 | TOUCH PANEL SENSOR - Provided is a touch panel sensor which has excellent durability particularly in a longitudinal direction as in the case in which an indentation load is imposed, rarely undergoes the increase in electrical resistivity which may be caused by the disconnection of a wire or as elapse of time, has high reliability and high glossiness, and also has an excellent color-displaying capability. This touch panel sensor comprises a transparent conductive film and a wiring that is connected to the transparent conductive film, wherein the wiring comprises a refractory metal film, an Al alloy film and a high-melting-point metal film in this order when observed from the side of a substrate, and wherein the Al alloy film contains a rare earth element in an amount of 0.05-5 atomic %. It is preferred for the touch panel sensor that the hardness is 2-3.5 GPa and the density of grain boundary triple junctions in the Al alloy structure is 2×10 | 2013-09-26 |
20130249572 | DURABLE TRANSPARENT INTELLIGENT COATINGS FOR POLYMERIC TRANSPARENCIES - A hard, transparent coating for a substrate and associated method for coating is disclosed. The coating includes alternating layers of a soft coating and a hard coating. The coating further includes a sensor. The electrical resistivity of the sensor may be measured to determine if the coating has been degraded. The coating may further include a hydrophobic outer layer. | 2013-09-26 |
20130249573 | ELECTRICAL RESISTANCE MEASUREMENT APPARATUS AND ELECTRICAL RESISTANCE MEASUREMENT METHOD - An electrical resistance measurement apparatus includes a light irradiation unit that irradiates a conductive thin film with terahertz light, a reflection light detection unit that detects reflection light from the conductive thin film, and a computer containing a storage that stores correlation between the reflectance of the terahertz light from the conductive thin film and electrical resistance of the conductive thin film. The computer further containing a processor that determines, reflectance of the terahertz light from the conductive thin film based on a result of detection performed by the reflection light detection unit, and determines the electrical resistance of the conductive thin film based on the correlation and a result of the determination of the reflectance. | 2013-09-26 |
20130249574 | CHEMICAL/ BIOLOGICAL SENSORS EMPLOYING FUNCTIONALIZED NANOSWITCH ARRAY - Sensor devices disclosed herein allow multiple analytes or organisms to be individually tagged and selectively detected. When a binding event occurs one or more nanoswitches close and the corresponding array resistance value produces a voltage imbalance in the Wheatstone Bridge. The voltage detected by the voltage meter will then exhibit unique value change corresponding to the particular nanoswitche(s) in the array that are closed due to a binding event. Similarly the same functionalization chemistry can be used on all nanoswitches so that the voltage detected by the voltage meter corresponds to concentration levels of the target analyte. Multiple functionalization chemistries on each switch can also be used to improve selectivity for more complex analytes. In some disclosed embodiments, the Wheatstone bridge voltage is tied to a predetermined resistance change rather than to smaller resistance changes that would occur from functionalization of one leg of a nanowire Wheatstone bridge. | 2013-09-26 |
20130249575 | DEVICE AND METHOD FOR MEASURING A VALUE OF A RESISTOR - A device for measuring the value of a resistor has a first RC element with a first time constant and a second RC element with a second time constant. The first RC element has a first capacitor and a resistor. The second RC element has a second capacitor and the resistor to be measured. An evaluation circuit charges the first and second capacitors to a first and a second voltage, respectively, and initiates their discharge. The evaluation circuit measures the time that elapses from the start of the discharge to the instant at which the voltages across the capacitors are equal, and determines the value of the resistor from the values. In the event that the first time constant is larger than the second time constant, the first voltage is smaller than the second voltage, and vice versa. | 2013-09-26 |
20130249576 | POWER SUPPLY UNIT TESTING SYSTEM - A system for testing a PSU includes an input control module, a voltage regulating module, and a load adjusting module. The input control module includes a microcontroller and a plurality of key switches connected to the microcontroller. The microcontroller is configured to receive input instruction from the plurality of key switches and output a control signal according to the input instruction. The voltage regulating module is configured to receive the control signal and generate an output voltage with a voltage value associated with the control signal. The load adjusting module includes a motor coupled to the output voltage of the voltage regulating module. The motor is rotatable in opposite direction to adjust an output current of the PSU. A rotating speed of the motor is in direct proportion to the voltage value of the output voltage. | 2013-09-26 |
20130249577 | ACCELERATED LIFETIME TESTING APPARATUS AND METHODS FOR PHOTOVOLTAIC MODULES - Methods and apparatus for performing an accelerated lifetime test on a photovoltaic device are provided. The method can include positioning a first photovoltaic device in a first holder adjacent to a light guide such that a transparent surface of the photovoltaic device faces the light guide, directing light emitted from a first light source into the light guide, and redirecting the light emitted from the first light source within the light guide to illuminate the transparent surface of the photovoltaic device. | 2013-09-26 |
20130249578 | SEMICONDUCTOR DEVICE HAVING PENETRATING ELECTRODES EACH PENETRATING THROUGH SUBSTRATE - Disclosed herein is a device that includes a semiconductor substrate, a check circuit and a through-substrate via. The check circuit includes a check line formed over the semiconductor substrate and including first and second parts each extending in a first direction and a third part extending in a second direction that crosses the first direction, the first and second parts being opposite to each other, the third part connecting one end of the first part with one end of the second part, a charge circuit coupled to a one end of the check line, and a comparator coupled to the other end of the check line at a first input node thereof. The through-substrate via penetrates through the semiconductor substrate and is located in an area that is between the first and second parts of the check line. | 2013-09-26 |
20130249579 | PROBING APPARATUS EQUIPPED WITH HEATING DEVICE - A probing apparatus includes a rotating device having a plurality of platforms for supporting DUTs, a probe device having a lifting stage movable between first and second positions, and a heating device mounted to the lifting stage so as to move along with it. The platforms are synchronously revolvable in a way that the platforms move to a test position sequentially The heating device is configured in a manner that when the lifting stage moves to the first position, the heating device is located away from the platform at the test position, and when the lifting stage moves to the second position, the heating device contacts and heats the platform at the test position. Therefore, the heating device and the probe device are movable simultaneously for heating up the platform and testing the DUT respectively. | 2013-09-26 |
20130249580 | APPARATUS AND METHOD FOR EVALUATING CHARACTERISTICS OF A PHOTOVOLTAIC DEVICE - An apparatus is provided for evaluating characteristics of a photovoltaic device with an exposed back contact layer having a plurality of electrically discrete areas arranged in a grid. The apparatus may include, for example, a light source for illuminating the photovoltaic device and a probe head assembly having a plurality of probes arranged in a grid corresponding to the grid on the photovoltaic device so that a given pair of the probes corresponds to a respective one of the electrically discrete areas within the grid. The probes and photovoltaic device may be positionable so that the probes contact the back contact layer. Related methods for evaluating characteristics are also provided. | 2013-09-26 |
20130249581 | PROBE APPARATUS - A probe apparatus is provided, comprising a card clamp mechanism configured to detachably clamp a probe card equipped with a plurality of probes; a wafer chuck configured to mount a semiconductor wafer thereon and configured to provide contact between electrodes formed in the semiconductor wafer with the probes of the probe card clamped by the card clamp mechanism with an operation of a drive mechanism; and a card movement mechanism configured to move the card clamp mechanism and the probe card clamped by the card clamp mechanism to at least two positions spaced at a predetermined distance. | 2013-09-26 |
20130249582 | AUXILIARY ELEMENT OF PRINTED CIRCUIT BOARD MODULE - An auxiliary element of a printed circuit board defining a plurality of vias with different shapes and sizes includes a test board defining a plurality of test holes with different shapes and sizes. The test holes of the test board are to have the same shape and size as corresponding vias of the printed circuit board. | 2013-09-26 |
20130249583 | MULTIPLE RIGID CONTACT SOLUTION FOR IC TESTING - A chip testing solution having two separate contacts: one to provide current and one to measure voltage. One contact acts as the force and other as sense, and with its unique short wipe stroke technology enables the electrical connection from the contact terminal of the device under test (DUT) to the loadboard without fail even after prolonged insertion/testing of the devices. The two contacts are in close proximity, but electrically isolated from each other. Each contact is made to electrically touch a single conductive lead/pad on the DUT thus forming a test connection. The two contacts; one on front and other on back, wiping on the lead/pads will generally be a “sense” probe, and a “force” used for making a Kelvin connection. The short contact is connected to the loadboard by means of an additional contact known as “interposer” extending through and top of the tall contact base body. | 2013-09-26 |
20130249584 | HIGH-PRECISION SEMICONDUCTOR DEVICE PROBING APPARATUS AND SYSTEM THEREOF - A high precision semiconductor probing system includes a probe head, a circuit board positioned above the probe head, and an optical microscope, wherein the probe head has a plurality of vertical probes and at least one cantilever probe having a vertical body positioned therein. The cantilever probe is disposed close to an edge of the probe head and extends laterally out from the probe head, in order to facilitate the visual alignment viewing from top of the probing apparatus. The optical microscope is positioned on top of the probing apparatus and is configured to have a line of sight directed to the tip of the cantilever probe. | 2013-09-26 |
20130249585 | PROBE CARD - To provide a probe card that is used when carrying out electrical inspection of a high-density fine circuit board to be measured. | 2013-09-26 |
20130249586 | Probing Assembly for Testing Integrated Circuits - A probing assembly is disclosed. The probing assembly includes an interface board, a structural support element, a trace support element and a probe support element. The structural support element provides structural and mechanical support to the trace support element. The trace support element includes a body and multiple trace lines located on the body. The probe support element includes a plate having multiple guide holes in which micro probes are inserted. At least one of the micro pins is in contact with one of the trace lines within the trace support element. A set of rails are utilized to secure the probe support element, the trace support element and the structural support element to the interface board. | 2013-09-26 |
20130249587 | WAFER INSPECTION INTERFACE AND WAFER INSPECTION APPARATUS - A wafer inspection interface | 2013-09-26 |
20130249588 | DEVICE AND METHOD FOR TESTING A SOLAR MODULE - A test device for testing a solar module includes a transfer unit for transporting the solar module through the test device, an irradiation unit for irradiating the solar module, an imaging unit for optically capturing an image of the solar module and a tapping device for sensing parameters of the solar module and/or for supplying voltage to the solar module. The tapping device includes a contact bar on which a contact surface positioned on the solar module can glide or slide along during the transport process in order to generate an electrical connection. The contact surface is provided by a contact device that can be temporarily attached to the solar module. | 2013-09-26 |
20130249589 | INTERPOSER AND ELECTRICAL TESTING METHOD THEREOF - An interposer is provided which includes: a substrate having a first surface with a plurality of first conductive pads and a second surface opposite to the first surface, the second surface having a plurality of second conductive pads; a plurality of conductive through holes penetrating the first and second surfaces of the substrate and electrically connecting the first and second conductive pads; and a first removable electrical connection structure formed on the first surface and electrically connecting a portion of the first conductive pads so as to facilitate electrical testing of the interposer. | 2013-09-26 |
20130249590 | TSV Testing Using Test Circuits and Grounding Means - This disclosure describes a novel method and apparatus for testing TSVs within a semiconductor device. According to embodiments illustrated and described in the disclosure, a TSV may be tested by stimulating and measuring a response from a first end of a TSV while the second end of the TSV held at ground potential. Multiple TSVs within the semiconductor device may be tested in parallel to reduce the TSV testing time according to the disclosure. | 2013-09-26 |
20130249591 | SYSTEM AND METHOD FOR DECREASING SIGNAL INTEGRITY NOISE BY USING VARYING DRIVE STRENGTHS BASED ON LIKELIHOOD OF SIGNALS BECOMING VICTIMS - A method of designing an integrated circuit, integrated circuits using different drive strengths and a signal integrity monitor are provide herein. In one embodiment, the signal integrity monitor includes: (1) a signal interface configured to receive a signal from a parallel data bus for transmission over a plurality of signal paths and (2) a victim signal identifier configured to dynamically determine a potential victim signal path of the plurality of signal paths. | 2013-09-26 |
20130249592 | TERMINATION CIRCUIT FOR ON-DIE TERMINATION - In a semiconductor device having a terminal connected to an internal portion, a termination circuit for providing on-die termination for the terminal of the device. The termination circuit comprises a plurality of transistors, including at least one NMOS transistor and at least one PMOS transistor, connected between the terminal and a power supply; and control circuitry for driving a gate of each of NMOS transistor with a corresponding NMOS gate voltage and for driving a gate of each PMOS transistor with a corresponding PMOS gate voltage, the control circuitry being configured to control the NMOS and PMOS gate voltages so as to place the transistors in an ohmic region of operation when on-die termination is enabled. The power supply supplies a voltage that is less than each said NMOS gate voltage and greater than each said PMOS gate voltage. | 2013-09-26 |
20130249593 | MAJORITY DECISION CIRCUIT - A majority decision circuit includes: a majority decision unit configured to compare first data with second data to decide whether one of the first data and the second data has more bits with a first logical value; and an offset application unit configured to control the majority decision unit so that the majority decision unit decides, in a case when the number of bits with the first logical value among the first data is equal to the number of bits with the first logical value among the second data, that the first data have more bits with the first logical value if offset is a first setting value in a first phase and decides that the second data have more bits with the first logical value if the offset is a second setting value in a second phase. | 2013-09-26 |
20130249594 | IMPLEMENTATION METHOD FOR FAST NCL DATA PATH - An implementation method for a fast Null Convention Logic (NCL) data path includes a pipeline that is assembled from gates of various types of NCL. Self-ready flash NCL gates include a one-shot circuit to reset the gates to a null state and prepare the gates for the next wave of asserted data. In one embodiment, the one-shot circuit creates a flash pulse inside a gate in response to a change of a flash input line and ends the flash pulse in response to the gate output being reset to a null state. Conventional logic can be included in the data path as well. | 2013-09-26 |
20130249595 | LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE USING LEVEL SHIFT CIRCUIT - A level shift circuit, for outputting a data output signal with a second level via an output inverter after a data input signal with a first level is stored in a latch, includes a level set circuit, when the output data signal outputs with a low level, setting the output data signal to a low level in response to a change of the input data signal. The level set circuit is connected to an output terminal of the output inverter, and has an NMOS transistor having a drain electrode and a source electrode coupled to a ground, wherein the NMOS transistor turns on in response to the input data signal with a high level. | 2013-09-26 |
20130249596 | INACTIVITY TRIGGERED SELF CLOCKING LOGIC FAMILY - Localized logic regions of a circuit include a local comparator electrically connected to a local resistive voltage circuit, to a local resistive ground circuit, and to a local register structure. The local comparator supplies a clock pulse to the local register structures when the local reference voltage is below a local voltage threshold. Activity in the local combinatorial logic structure causes the local reference voltage to drop below the local reference voltage independently of changes in the global reference voltage causing the comparator to output the clock pulse (with sufficient delay to allow the logic results to be stored in the registers only after setup times have been met in the local logic devices). This eliminates the need for a clock distribution tree, thereby saving power when there is no activity in the local combinatorial logic structure. | 2013-09-26 |
20130249597 | SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD THEREOF, MASK FOR SEMICONDUCTOR MANUFACTURE, AND OPTICAL PROXIMITY CORRECTION METHOD - An object of the present invention is to reduce processing time and manufacturing cost for a semiconductor device including a logic circuit. To accomplish the above object, an area ( | 2013-09-26 |
20130249598 | MICROSCALE DIGITAL VACUUM ELECTRONIC GATES - Systems and methods in accordance with embodiments of the invention implement microscale digital vacuum electronic gates. In one embodiment, a microscale digital vacuum electronic gate includes: a microscale field emitter that can emit electrons and that is a microscale cathode; and a microscale anode; where the microscale field emitter and the microscale anode are disposed within at least a partial vacuum; where the microscale field emitter and the microscale anode are separated by a gap; and where the potential difference between the microscale field emitter and the microscale anode is controllable such that the flow of electrons between the microscale field emitter and the microscale anode is thereby controllable; where when the microscale anode receives a flow of electrons, a first logic state is defined; and where when the microscale anode does not receive a flow of electrons, a second logic state is defined. | 2013-09-26 |
20130249599 | SEMICONDUCTOR DEVICE - The semiconductor device includes: a first transistor controlled by a control signal; a sense voltage generating circuit for sensing current flowing through the first transistor, mirroring current flowing through a reference current circuit, and summing the currents to generate voltage based on the summed currents; a reference voltage circuit for mirroring current flowing through the reference current circuit and generating reference voltage; an amplifier for comparing the voltage generated by the sense voltage generating circuit and the reference voltage; and a second transistor which has a gate connected to an output terminal of the amplifier and which can turn off the first transistor. | 2013-09-26 |
20130249600 | INTERPOLATION CIRCUIT AND RECEIVING CIRCUIT - An interpolation circuit includes: a generation circuit that generates interpolation data from a plurality of pieces of input data, using an interpolation coefficient, among input data inputted in time series including a data point and a transition point; a detection circuit that detects that the input data lacks at the data point; and a coefficient circuit that changes the interpolation coefficient for each given data interval, and skips a position for changing the interpolation coefficient to the transition point when the detection circuit detects the lack of the input data. | 2013-09-26 |
20130249601 | SAMPLING CIRCUIT FOR MEASURING REFLECTED VOLTAGE OF TRANSFORMER FOR POWER CONVERTER OPERATED IN DCM AND CCM - A sampling circuit of the power converter according to the present invention comprises an amplifier circuit receiving a reflected voltage for generating a first signal. A first switch and a first capacitor are utilized to generate a second signal in response to the reflected voltage. A sample-signal circuit generates a sample signal in response to the disable of a switching signal. The switching signal is generated in accordance with a feedback signal for regulating an output of the power converter. The feedback signal is generated in accordance with the second signal. The sample signal is utilized to control the first switch for sampling the reflected voltage. The sample signal is disabled once the first signal is lower than the second signal. The sampling circuit precisely samples the reflected voltage of the transformer of the power converter for regulating the output of the power converter. | 2013-09-26 |
20130249602 | Semiconductor Arrangement with a Power Transistor and a High Voltage Device Integrated in a Common Semiconductor Body - A semiconductor arrangement includes a semiconductor body and a power transistor including a source region, a drain region, a body region and a drift region arranged in the semiconductor body, a gate electrode arranged adjacent to the body region and dielectrically insulated from the body region by a gate dielectric. The semiconductor arrangement further includes a high voltage device arranged within a well-like dielectric structure in the semiconductor body and comprising a further drift region. | 2013-09-26 |
20130249603 | METHOD AND APPARATUS FOR IMPROVING A LOAD INDEPENDENT BUFFER - Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal. | 2013-09-26 |
20130249604 | ADAPTIVE TRIAC CONTROLLER - A low voltage AC power controller uses a line coupled capacitor AC to DC converter circuit to obtain energy from AC line power supplied to an AC load and may be used with an external high voltage AC switching device to control power supplied to the AC load. The line coupled capacitor AC to DC converter circuit provides a low power device that senses characteristics of the power supplied to the load and can communicate sensed information and/or receive control information related to the power supplied to load. | 2013-09-26 |
20130249605 | SEMICONDUCTOR DEVICE - A semiconductor device, includes: a first field effect transistor having one terminal to which a first electrical potential is given; a second field effect transistor having one terminal to which a second electrical potential smaller than the first electrical potential is given; a controller that controls each electrical potential of each control terminal of the first field effect transistor and the second field effect transistor; a capacitor element having one end connected to the control terminal of the first field effect transistor, the capacitor element being charged by the control of the controller; and a load element connected between another terminal of the first field effect transistor and another terminal of the second field effect transistor. | 2013-09-26 |
20130249606 | FET DRIVE CIRCUIT AND FET MODULE - According to an embodiment, an FET drive circuit includes an FET, a first circuit, a resistor and a third rectifying device. The first circuit includes a first rectifying device, a second rectifying device and a capacitive element sequentially provided in series from a drain to a gate of the FET, the first rectifying device allowing a forward electric current flowing from the drain to the gate, and the second rectifying device having a predetermined breakdown voltage with respect to the electric current from the drain to the gate. The resistor is provided between a power source and a connecting point of the second rectifying device and the capacitive element; and the third rectifying device provided between a source and a gate of the FET. | 2013-09-26 |
20130249607 | BOOTSTRAPPED SWITCH CIRCUIT AND DRIVING METHOD THEREOF - The present invention relates to a bootstrap switch circuit and a driving method thereof. The bootstrap switch circuit includes: an input transistor including a first electrode for receiving an input voltage; an output transistor including a second electrode connected to a second electrode of the input transistor, and a first electrode for outputting an output voltage; a control transistor including a control electrode connected to the second electrode of the input transistor and the second electrode of the output transistor, and a first electrode for receiving a power supply voltage; and a level shifter including a power input terminal connected to the second electrode of the control transistor, an output terminal connected to a control electrode of the input transistor and a control electrode of the output transistor, and an input terminal for receiving a switch control signal. The level shifter turns on the input transistor and the output transistor when the switch control signal is an enable level, and it turns off the input transistor and the output transistor when the switch control signal is a disable level. | 2013-09-26 |
20130249608 | CONTROL SIGNAL GENERATOR FOR USE WITH A COMMAND DECODER - A semiconductor device includes a control signal generator configured to generate a control signal that is enabled in a predetermined duration in response to an enabling of a chip selection signal, a clock controller configured to transfer a clock as a decoding clock in a duration for enabling of the control signal and disable the decoding clock in a duration for disabling of the control signal, and a command decoder configured to generate an internal command by decoding the chip selection signal and one or more command signals in synchronization with the decoding clock. | 2013-09-26 |
20130249609 | SEMICONDUCTOR INTEGRATED CIRCUIT - An SSCG generating a center-spread modulated clock centering on a frequency obtained by multiplying an input reference clock frequency by a predetermined number is configured to include a phase comparator, a VCO, and a modulation circuit formed by a frequency divider and a division ratio modulation circuit. The division ratio modulation circuit supplies the frequency divider with a division ratio modulated above and below the predetermined multiplication number, and outputs a magnitude relationship involved as a spread direction identification signal. The diagnostic circuit includes a counter that counts the modulated clock and, based on the spread direction identification signal, performs counting operations during an up-spread or down-spread period. Based on the values counted for a predetermined period, the operating status of the SSCG is diagnosed for the presence or absence of a failure, for example. | 2013-09-26 |
20130249610 | SEMICONDUCTOR DEVICE AND CONTROL METHOD FOR SEMICONDUCTOR DEVICE - A semiconductor device includes: a frequency setting information storage unit that stores sets of frequency information indicating setting of a frequency supplied by an oscillation unit and frequency identification information identifying the frequency information and outputs one of a plurality of pieces of the frequency information to the oscillation unit based on frequency identification information inputted thereinto; a speed setting information storage unit that stores speed identification information indicating a speed of the semiconductor device and frequency identification information corresponding to the speed identification information; a frequency identification information count unit that holds a value of the frequency identification information inputted into the frequency setting information storage unit; and a control unit that causes the frequency identification information count unit to increment or decrement the held value of the frequency identification information to approach a value of the frequency identification information stored in the speed setting information storage unit. | 2013-09-26 |
20130249611 | APPARATUS, SYSTEM, AND METHOD FOR CONTROLLING TEMPERATURE AND POWER SUPPLY VOLTAGE DRIFT IN A DIGITAL PHASE LOCKED LOOP - Described herein are apparatus, system, and method for controlling temperature drift and/or voltage supply drift in a digital phase locked loop (DPLL). The apparatus comprises a DPLL including a digital filter to generate a fine code for controlling a frequency of an output signal of a digital controlled oscillator (DCO) of the DPLL; a logic unit to monitor the fine code and to generate a compensation signal based on the fine code; and a voltage adjustment unit to update a power supply level to the DCO based on the compensation signal, wherein the updated power supply level to cause the digital filter to generate the fine code near the middle of an entire range of the fine code across various temperatures, and wherein the digital filter to generate the fine code near the middle of the entire range across power supply drift. | 2013-09-26 |
20130249612 | METHOD AND APPARATUS FOR SOURCE-SYNCHRONOUS SIGNALING - A low-power, high-performance source-synchronous chip interface which provides rapid turn-on and facilitates high signaling rates between a transmitter and a receiver located on different chips is described in various embodiments. Some embodiments of the chip interface include, among others: a segmented “fast turn-on” bias circuit to reduce power supply ringing during the rapid power-on process; current mode logic clock buffers in a clock path of the chip interface to further reduce the effect of power supply ringing; a multiplying injection-locked oscillator (MILO) clock generator to generate higher frequency clock signals from a reference clock; a digitally controlled delay line which can be inserted in the clock path to mitigate deterministic jitter caused by the MILO clock generator; and circuits for periodically re-evaluating whether it is safe to retime transmit data signals in the reference clock domain directly with the faster clock signals. | 2013-09-26 |
20130249613 | SEMICONDUCTOR DEVICE AND INPUT SIGNAL RECEPTION CIRCUIT - A semiconductor device according to the present invention includes an input circuit that is connected between an input node and an output node and that changes a level of the output node corresponding to a signal supplied to the input node, wherein when a control signal represents a first mode, a speed at which input circuit changes the level of the output node from a first level to a second level is greater than the speed at which input circuit changes the level of the output node from the second level to the first level and when the control signal represents a second mode, the speed at which input circuit changes the level of the output node from the second level to the first level is greater than the speed at which the input circuit changes the level of the output node from the first level to the second level. | 2013-09-26 |
20130249614 | PWM Duty Cycle Synthesizer and Method with Adjustable Corner Frequency - A circuit is provided that includes summing circuit for comparing the PWM output signal to the PWM input signal and producing an increment signal if a value of the PWM input signal exceeds a corresponding value of the PWM output signal and producing a decrement signal if a value of the PWM input signal is less than a corresponding value of the PWM output signal. An integrator produces a duty cycle signal by producing an increase in value of the duty cycle signal in response to each increment signal and a decrease in value of the duty cycle signal in response to each decrement signal. A PWM generator produces the PWM output signal in response to the duty cycle signal to cause the duty cycle of the PWM output signal to equal the duty cycle of the PWM input signal with no loss of duty cycle resolution. | 2013-09-26 |
20130249615 | DIGITAL SENSING APPARATUS AND DIGITAL READOUT MODULE THEREOF - A digital sensing apparatus includes a sensing unit capable of providing a sensing response associated with an environmental parameter, and a digital readout module including a reading unit for generating a pulse signal having a pulse width as sociated with the sensing response, and a converting unit. The converting unit includes a clock signal generator for generating a variable-frequency clock signal, and a counter operable to count a width value of the pulse width of the pulse signal using the clock signal, so as to generate a digital sensing code. The frequency of the clock signal from the clock signal generator is adjustable to adjust resolution of the width value of the pulse width of the pulse signal. | 2013-09-26 |
20130249616 | SWITCHING ARRANGEMENT, INTEGRATED CIRCUIT COMPRISING SAME, METHOD OF CONTROLLING A SWITCHING ARRANGEMENT, AND RELATED COMPUTER PRORAM PRODUCT - There is disclosed a switching arrangement comprising a switch with a plurality of individually controllable elementary switches connected in parallel between a first supply rail and a second supply rail. Each of the elementary switches can be in either one of a closed state and an open state independently of the others. A controller is adapted to dynamically control the closing or opening of the elementary switches, depending on the intensity of a current flowing through the switch. The number of elementary switches in the closed state is variable. The higher is the intensity of the current, the higher the number of elementary switches in the closed state. Thus, the impedance of the switch decreases when the current increases, and vice versa, and the voltage drop across the switch may be kept substantially constant. | 2013-09-26 |
20130249617 | LEVEL SHIFT CIRCUIT - Provided is a level shift circuit which includes: a first level shift module; a first signal input terminal for providing a first input signal for the first level shift module; a first signal output terminal for providing output from the first level shift module; a second level shift module; a second signal input terminal for providing a second input signal for the second level shift module; a second signal output terminal for providing output from the second level shift module; a drive module connected to the first signal output terminal and the second signal output terminal; and a drive signal output terminal from the drive module. The level shift circuit of the present invention can be applicable for the requirements of BCD process and prevent damages to the high-voltage device due to the excessively high gate voltage. | 2013-09-26 |
20130249618 | SEAMLESS COARSE AND FINE DELAY STRUCTURE FOR HIGH PERFORMANCE DLL - A clock synchronization system and method avoids output clock jitter at high frequencies and also achieves a smooth phase transition at the boundary of the coarse and fine delays. The system may use a single coarse delay line configured to generate two intermediate clocks from the input reference clock and having a fixed phase difference therebetween. The coarse delay line may have a hierarchical or a non-hierarchical structure. A phase mixer receives these two intermediate clocks and generates the final output clock having a phase between the phases of the intermediate clocks. The coarse shifting in the delay line at high clock frequencies does not affect the phase relationship between the intermediate clocks fed into the phase mixer. The output clock from the phase mixer is time synchronized with the input reference clock and does not exhibit any jitter or noise even at high clock frequency inputs. Because of the rules governing abstracts, this abstract should not be used to construe the claims. | 2013-09-26 |
20130249619 | SOI SWITCH ENHANCEMENT - The described FET switch topology greatly reduces the off state loading experienced by the gate biasing resistors in a stacked FET structure. The FET switch topology evenly distributes the voltage across the FET switch topology which reduces the voltage across the gate biasing resistors when the stacked FET structure is in an off state. Because the off state loading is reduced, there is a corresponding reduction of the current through bias resistors, which permits a reduction in the size of the bias resistors. This permits a substantial reduction in the area attributed to the bias resistors in an integrated solution. | 2013-09-26 |
20130249620 | METHODS AND CIRCUITS FOR OPERATING A PARALLEL DMOS SWITCH - A method and corresponding circuits for operating a parallel DMOS switch that includes a pair of P-type DMOS devices connected in series with each other and in parallel with a pair of N-type DMOS devices connected in series with each other. The method and circuits involve turning the switch on by applying gate signals to the DMOS device pairs which are generated using at least one source voltage of a DMOS device pair. The switch is turned off by setting the gate signals equal to the respective source voltages of the DMOS device pairs. | 2013-09-26 |
20130249621 | METHODS AND APPARATUS FOR VOLTAGE SELECTION FOR A MOSFET SWITCH DEVICE - In one general aspect, an apparatus including a first voltage rail, and a second voltage rail. The apparatus includes a first P-type metal-oxide-semiconductor field effect transistor (MOSFET) PMOS device between the first voltage rail and the second voltage rail where the first PMOS device is configured to electrically couple the first voltage rail to the second voltage rail in response to the first PMOS device being activated. The apparatus can also include a second PMOS device configured to provide a charge pump voltage produced by a charge pump device to the second voltage rail in response to the second PMOS device being activated and the first PMOS device being deactivated. The apparatus can also include a pass gate, and a driver circuit coupled to the pass gate and configured to operate based on a voltage of the second voltage rail. | 2013-09-26 |
20130249622 | BRIDGE CIRCUITS AND THEIR COMPONENTS - A half bridge is described with at least one transistor having a channel that is capable in a first mode of operation of blocking a substantial voltage in at least one direction, in a second mode of operation of conducting substantial current in one direction through the channel and in a third mode of operation of conducting substantial current in an opposite direction through the channel. The half bridge can have two circuits with such a transistor. | 2013-09-26 |
20130249623 | LOW VOLTAGE MULTI-STAGE INTERLEAVER SYSTEMS, APPARATUS AND METHODS - Described herein is a low-voltage multi-stage interleaver. The interleaver includes at least a first interleaver stage and a second interleaver stage. The first interleaver stage is either blocked or operating in a saturation region. The first interleaver stage facilitates cancellation of DC current, including a biasing current, so that the second interleaver stage receives no DC current input. The second interleaver stage is either blocked or operating in a linear region to allow the second interleaver stage to act as a passive current switch. | 2013-09-26 |
20130249624 | SEMICONDUCTOR DEVICE INCLUDING INTERNAL VOLTAGE GENERATION CIRCUIT - A semiconductor integrated circuit device has a negative voltage generation circuit provided at each power supply circuit unit for six memory macros. Therefore, the response with respect to variation in a negative voltage is increased. In a standby mode, a negative voltage supply line for the six memory macros is connected by a switch circuit, and only a negative voltage generation circuit of one power supply circuit unit among six negative voltage generation circuits of the six power supply circuit units is rendered active. Thus, increase in standby current can be prevented. | 2013-09-26 |
20130249625 | SIGNAL GENERATION APPARATUS AND SIGNAL GENERATION METHOD - In order to output an accurate waveform in which quantization noise has been cancelled out, provided is a signal generating apparatus that outputs an output signal corresponding to a waveform data sequence expressing a waveform, the signal generating apparatus comprising a DA converting section that outputs an analog signal by sequentially performing digital/analog conversion on each piece of data included in the waveform data sequence, at a timing of a sampling clock; and a jitter injecting section that injects jitter decreasing a quantization noise component of the output signal, into the sampling clock supplied to the DA converting section. | 2013-09-26 |
20130249626 | MULTIPLE POWER MODE AMPLIFIER - A multiple power mode amplifier includes: N amplifiers connected in series via switches; and a control circuit for controlling the N amplifiers in accordance with the output modes. P amplifiers out of the N amplifiers constitute a driver amplifier, and constitute a negative feedback amplifier including a feedback circuit for negatively feeding back its own output signal to its own input side. N−P amplifiers constitute a final stage amplifier connected in series to the negative feedback amplifier in a disconnectable manner. The control circuit is configured to: in a first output mode, disconnect the final stage amplifier from the negative feedback amplifier, and disable the feedback circuit; and in a second output mode, connect the final stage amplifier in series to the negative feedback amplifier, and enable the feedback circuit. | 2013-09-26 |
20130249627 | TIME DIFFERENCE AMPLIFIER AND AMPLIFICATION METHOD USING SLEW RATE CONTROL - When a time difference is amplified by a time difference amplifier, slew rates of internal output voltages are changed according to a phase combination of digital input signals so that a time gain is determined by a ratio between the slew rates and the slew rates can be controlled from an outside. After a voltage is charged to the level of a power supply voltage in first and second charging capacitors, the charged voltage of the first charging capacitor is decreased with a first slew rate when a first digital input signal transitions, and both charged voltages of the first and second charging capacitors are decreased with a second slew rate when a second digital input signal transitions so that both first and second digital input signals are changed from initial phases, while being compared with a reference voltage to generate first and second digital output signals. | 2013-09-26 |
20130249628 | LOW NOISE CRYOGENIC AMPLIFIER - A radiofrequency amplifier includes a low noise amplifier ( | 2013-09-26 |
20130249629 | IMPEDANCE ADJUSTMENTS IN AMPLIFIERS - A circuit that includes an amplifier circuit with an input impedance due to an input resistance and an input capacitance of the amplifier circuit. The input impedance of the amplifier circuit may vary with frequency. The amplifier circuit may include an amplifier and a feedback circuit configured to provide feedback to the amplifier and to maintain the input impedance at a specified value at a selected frequency by increasing the input resistance of the amplifier circuit at the selected frequency. | 2013-09-26 |
20130249630 | Frequency Stabilization in Nonlinear MEMS and NEMS Oscillators - An illustrative system includes an amplifier operably connected to a phase shifter. The amplifier is configured to amplify a voltage from an oscillator. The phase shifter is operably connected to a driving amplitude control, wherein the phase shifter is configured to phase shift the amplified voltage and is configured to set an amplitude of the phase shifted voltage. The oscillator is operably connected to the driving amplitude control. The phase shifted voltage drives the oscillator. The oscillator is at an internal resonance condition, based at least on the amplitude of the phase shifted voltage, that stabilizes frequency oscillations in the oscillator. | 2013-09-26 |
20130249631 | MEMORY STRUCTURE HAVING TAPS AND NON-UNITARY DELAYS BETWEEN TAPS - A method and apparatus for memory modeling in a pre-distortion architecture are disclosed. In one embodiment, a memory model has a plurality of branches. Each branch receives a different output basis function signal. Each branch includes at least one delay element. Each delay element causes a pre-determined delay of the output basis function signal received by the branch. The amount of a pre-determined delay is different for each of at least two branches. | 2013-09-26 |
20130249632 | ENHANCED TRANSCONDUCTANCE CIRCUIT - A transconductance circuit that improves linearity and output current over a wider range of input voltages than prior designs. The transconductance circuit may include first and second sets of paired differential transistors. In each set, emitters of the paired transistors may be commonly coupled to corresponding nodes of a common impedance, and collectors may be coupled to output terminals of the transconductance circuit. The circuit may further include first and second sets of doublet differential transistor pairs, each doublet pair having transistors of different sizes. Each doublet pair may have current sources coupled between commonly coupled emitters and a source potential. Respective collectors for each doublet pair may be coupled to the output terminals of the transconductance circuit. A pair of voltage followers may be provided to replicate corresponding input voltages across corresponding bases of the differential transistor pairs and the doublet transistor pairs. | 2013-09-26 |
20130249633 | LOW GM TRANSCONDUCTOR - Techniques for designing a transconductor configurable to have a low transconductance. In one aspect, a voltage to current conversion module is coupled to a 1:N current replication module. The voltage to current conversion module may be implemented as an operational amplifier configured with negative feedback to generate a current through a transistor, wherein such current is proportional to the difference between an input voltage and a common-mode reference. The 1:N current replication module is configured to mirror the generated current in another transistor, to a predetermined ratio, such that the output current is also proportional to the difference between the input voltage and the common-mode reference. In exemplary embodiments, the output stage driving the output current may be configured to operate as a Class A, Class B, or Class AB type amplifier. | 2013-09-26 |
20130249634 | POWER AMPLIFIER WITH AN ADAPTIVE BIAS - An electronic circuit, including, a power amplifier adapted to amplify an RF signal and provide it as output from the integrated circuit; a power source that is adapted to provide an unregulated voltage to the power amplifier; a regulator adapted to provide a regulated bias voltage; a subtracter that is adapted to accept a voltage proportional to the unregulated voltage and subtract it from the bias voltage to provide a reference voltage to the power amplifier; wherein the power amplifier is adapted to use the reference voltage to adjust the output from the power amplifier so that it will provide a stable power output. | 2013-09-26 |
20130249635 | AMPLIFIER FOR OUTPUT BUFFER AND SIGNAL PROCESSING APPARATUS USING THE SAME - An amplifier for an output buffer includes an operational amplifier including a first input terminal, a second input terminal, and an output terminal, the operational amplifier is configured to generate an input bias current and amplify a voltage difference between signals applied to the first input terminal and the second input terminal, and to output the amplified voltage difference; and a self-bias circuit connected to the first input terminal and the second input terminal, the self-bias circuit is configured to generate first and second current paths when the voltage difference is equal to or greater than a predetermined voltage, to generate a tail current on the first or second current path, and to add the generated tail current to the input bias current of the operational amplifier, wherein the second input terminal is connected to the output terminal. | 2013-09-26 |
20130249636 | CANCELATION OF GAIN CHANGE DUE TO AMPLIFIER SELF-HEATING - A system including a power amplifier having a first gain, a preamplifier having a second gain, a first temperature sensor configured to sense the temperature of the power amplifier, and a bias generator. The first gain is a function of a temperature of the power amplifier. The preamplifier receives an input signal, amplifies the input signal according to the second gain, and outputs an amplified signal to the power amplifier. The bias generator generates a biasing signal to bias the preamplifier and adjusts the second gain of the preamplifier by adjusting the biasing signal based on the temperature of the power amplifier and an ambient temperature. The adjusted second gain of the preamplifier compensates a change in the first gain of the power amplifier due to a change in the temperature of the power amplifier. | 2013-09-26 |
20130249637 | MULTI-PATH BROADBAND AMPLIFIER - An amplifier device having an extended bandwidth includes a DC coupled amplifier and multiple low noise amplifiers connected in series with one another and connected in parallel with at least a portion of the DC coupled amplifier. The DC coupled amplifier has a broad bandwidth, and each of the low noise amplifiers has a narrow bandwidth and a center frequency higher than a high end frequency of the broad bandwidth of the DC coupled amplifier. The extended bandwidth of the amplifier device is a combination of the broad bandwidth and the first narrow bandwidth. | 2013-09-26 |
20130249638 | AMPLIFYING APPARATUS - An amplifying apparatus includes a first amplifier that amplifies a first signal of a constant amplitude; a second amplifier that amplifies a second signal identical in amplitude and differing in phase with respect to the first signal; a first transmission line of which, a first end is connected to an output terminal of the first amplifier; a second transmission line differing in length with respect to the first transmission line and of which, a first end is connected to an output terminal of the second amplifier and a second end is connected to a second end of the first transmission line; and an amplitude balance adjusting element connected to the first or the second transmission line. The amplifying apparatus outputs from a connection node of the first and the second transmission lines, a signal that is a combination of output signals of the first amplifier and of the second amplifier. | 2013-09-26 |
20130249639 | FOLDED CASCODE AMPLIFIER WITH AN ENHANCED SLEW RATE - The present invention is directed to a folded cascode amplifier with an enhanced slew rate, which includes a folded cascode amplifying circuit, a first input circuit and a second input circuit. The second input circuit has an electricity type opposite to that of the first input circuit. The first input circuit is connected, via its driving nodes, to the folded cascode amplifying circuit, and the second input circuit is connected, via its driving nodes, to crossover nodes of the first input circuit. | 2013-09-26 |
20130249640 | LOCAL OSCILLATOR (LO) DRIVER CIRCUIT FOR A MIXER - An improved local oscillator (LO) driver circuit for a mixer, the LO driver circuit includes a gain circuit responsive to response to LO input signals at a predetermined LO frequency range. At least a first pair of a parallel combination of a resistor and a capacitor is coupled to the gain circuit and to LO inputs of the mixer. The resistor configured to increase impedance at low frequencies of the frequency range and the capacitor is configured to reduce the impedance of the first parallel combination at high frequencies of the frequency range to reduce resistive impendence of the resistor. At least a second pair of a parallel combination of a low quality inductor and a high quality inductor is connected to the first pair. The second pair in serial combination with the first pair is tuned to provide a constant desired load impedance and a constant desired voltage swing at the LO inputs of the mixer over the predetermined LO frequency range. | 2013-09-26 |
20130249641 | OSCILLATOR CIRCUIT - The oscillator circuit | 2013-09-26 |
20130249642 | MICROELECTROMECHANICAL DEVICE HAVING AN OSCILLATING MASS AND METHOD FOR CONTROLLING A MICROELECTROMECHANICAL DEVICE HAVING AN OSCILLATING MASS - A microelectromechanical device includes a body, a movable mass, elastically connected to the body and movable in accordance with a degree of freedom, and a driving device, coupled to the movable mass and configured to maintain the movable mass in oscillation at a steady working frequency in a normal operating mode. The microelectromechanical device moreover includes a start-up device, which is activatable in a start-up operating mode and is configured to compare a current oscillation frequency of a first signal correlated to oscillation of the movable mass with a reference frequency, and for deciding, on the basis of the comparison between the current oscillation frequency and the reference frequency, whether to supply to the movable mass a forcing signal packet so as to transfer energy to the movable mass. | 2013-09-26 |
20130249643 | RADIO FREQUENCY (RF) FILTER AND RF TRANSCEIVER USING BULK ACOUSTIC WAVE RESONATOR (BAWR) - A filter and a transceiver in a radio frequency (RF) band, using a bulk acoustic wave resonator (BAWR), are provided. The RF filter includes at least one low temperature coefficient of frequency (TCF) BAWR. The RF filter further includes at least one high quality factor (Q) BAWR including a high Q compared to the at least one low TCF BAWR, the at least one low TCF BAWR including a low TCF compared to the at least one high Q BAWR. | 2013-09-26 |
20130249644 | PHASE SHIFTER USING BULK ACOUSTIC WAVE RESONATOR - A phase shifter using a Bulk Acoustic Wave Resonators (BAWR) is provided. The phase shifter using a BAWR may use a property of a phase shift with respect to a frequency of the BAWR, and also use at least one capacitor, at least one inductor, and the like. | 2013-09-26 |
20130249645 | NON-MAGNETIC COMPOSITION FOR CERAMIC ELECTRONIC COMPONENT, CERAMIC ELECTRONIC COMPONENT USING THE SAME, AND METHOD OF MANUFACTURING THE SAME - There are provided a non-magnetic composition for a ceramic electronic component, a ceramic electronic component using the same, and a method of manufacturing the same. The non-magnetic composition includes a compound represented by Chemical Formula Zn | 2013-09-26 |
20130249646 | FILTER ELEMENT - A filter element includes a laminate including insulator layers. A ring conductor pattern is provided on one of the insulator layers. Linear conductor patterns of a first inductor having a helical shape with an axial direction thereof being a laminating direction of the laminate and linear conductor patterns of a second inductor having a helical shape with an axial direction thereof being the laminating direction are provided on predetermined ones of the insulator layers. The ring conductor pattern is arranged such that inner regions of the linear conductor patterns of the first inductor and inner regions of the linear conductor patterns of the second inductor are included in an inner region of the ring conductor pattern. | 2013-09-26 |
20130249647 | ACOUSTIC WAVE DEVICE WITH REDUCED HIGHER ORDER TRANSVERSE MODES - In an acoustic wave device, a high-order transverse mode wave which is an unnecessary wave is suppressed. The acoustic wave device includes: a piezoelectric substrate; at least one pair of IDT electrodes formed on the piezoelectric substrate; and a dielectric film which covers at least a part of the piezoelectric substrate and the IDT electrodes, and the IDT electrodes each has a plurality of electrode fingers. The dielectric film covers at least an area in which the electrode fingers are arranged interleaved with each other. An acoustic velocity of an acoustic wave in an intersection area, within the region, which is a portion from ends of the electrode fingers to a predetermined length or more inward from the ends, is greater than an acoustic velocity of an acoustic wave in an edge area including end portions of the electrode fingers. | 2013-09-26 |
20130249648 | HBAR Resonator Comprising A Structure For Amplifying The Amplitude Of At Least One Resonance Of Said Resonator And Methods For Producing Such A Resonator - An HBAR resonator comprises, on a substrate, a piezoelectric transducer, said transducer comprising at least one piezoelectric layer, at least two series of electrodes and exhibiting resonance frequencies Fi corresponding to wavelengths λi, characterized in that it comprises an amplification structure comprising at least one resonant cavity arranged on the substrate between said transducer and said substrate or in said substrate, this amplification structure being suitable for mechanically resonating at least one of the resonance frequencies Fi of said transducer corresponding to said wavelength λi, so as to amplify the amplitude of the electrical resonance generated at said frequency. | 2013-09-26 |
20130249649 | BULK ACOUSTIC WAVE RESONATOR - A bulk acoustic wave resonator includes a substrate, a resonator section in which a piezoelectric film is sandwiched between a pair of electrodes, and a vibration region where the electrodes overlap when viewed in a film thickness direction is defined, an elastically deformable support section that connects the substrate and the resonator section, a membrane arranged between the resonator section and the substrate to face the vibration region of the resonator section and be fixed on the substrate with a space in between, and driver sections that are defined in the resonator section and the substrate adjacent to the vibration region and the membrane, and that move the resonator section toward and away from the substrate. The vibration region of the resonator section contacts the membrane when the driver sections move the resonator section close to the substrate. | 2013-09-26 |
20130249650 | ELECTRICAL FILTER STRUCTURE - An electrical filter structure for forwarding an electrical signal from a first filter port to a second filter port in a frequency-selective manner includes a filter core structure having a working impedance, wherein the working impedance is different from a first characteristic port impedance of a first filter port, and also different from a second characteristic port impedance of a second filter port. The electrical filter structure also includes a first matching arrangement electrically coupled between the first filter port and the filter core structure and a second matching arrangement electrically coupled between the second filter port and the filter core structure. | 2013-09-26 |
20130249651 | DIELECTRIC RESONATOR FILTERS, METHODS OF MANUFACTURING THE SAME AND DIPLEXER/MULTIPLEXERS USING DIELECTRIC RESONATOR FILTERS - A dielectric resonator filter and a method of manufacturing the same are disclosed. The dielectric resonator includes a metal housing having a top surface and a bottom surface and defining a resonator cavity, and a dielectric rod located within the resonator cavity. The dielectric rod is short-circuited at both the top surface and the bottom surface. A plurality of holes are formed in the dielectric rod parallel to an axis of the dielectric rod and a plurality of apertures are formed on the top surface corresponding to the positions of the holes, respectively. A plurality of screws are inserted into the holes through the apertures, respectively. The dielectric resonator supports dual TM | 2013-09-26 |
20130249652 | GIGAHERTZ COMMON-MODE FILTER FOR MULTI-LAYER PLANAR STRUCTURE - An apparatus includes a filter that includes a multi-layer planar structure having a first layer and a second layer. The first layer includes an electronic band-gap structure that is configured to suppress a first frequency component of signals passing through the filter. The second layer includes a quarter-wavelength stub that is configured to suppress a second frequency component of the signals passing through the filter. | 2013-09-26 |
20130249653 | Tunable High-Frequency Transmission Line - The invention relates to a high-frequency transmission line including a central conductive strip ( | 2013-09-26 |
20130249654 | HIGH-FREQUENCY SIGNAL TRANSMISSION LINE - A flexible high-frequency signal transmission line includes a dielectric body including laminated flexible dielectric layers. A signal line is provided in the dielectric body. A grounding conductor is arranged in the dielectric body to be opposed to the signal line via one of the dielectric layers. The grounding conductor is of a ladder structure including a plurality of openings and a plurality of bridges arranged alternately along the signal line. A characteristic impedance of the signal line changes between two adjacent ones of the plurality of bridges such that the characteristic impedance of the signal line rises from a minimum value to an intermediate value and to a maximum value and falls from the maximum value to the intermediate value and to the minimum value in this order. | 2013-09-26 |
20130249655 | VARIABLE CAPACITOR CIRCUIT - Disclosed herein is a variable capacitor circuit. The variable capacitor circuit which is composed of a plurality of capacitors and a switch transistor connected to each capacitor, and adjusts a capacitance value (C) in accordance with ON/OFF of the switch transistor, includes a unit cell in which at least one switching unit and at least one capacitor are alternately connected in series to each other, and a plurality of capacitor units to which at least one of the unit cells is connected in parallel, and thereby may adjust a difference in quality factors in accordance with a signal direction. | 2013-09-26 |
20130249656 | PACKAGE WITH PRINTED FILTERS - Aspects of the disclosure provide a circuit package. The circuit package includes a first signal terminal electrically coupled with a serializer/deserializer (SERDES), a second signal terminal electrically coupled with an external electronic component, and a trace disposed on an insulating layer. The trace is configured to transfer an electrical signal between the first signal terminal and the second signal terminal. The trace is patterned to provide a specific filtering characteristic to filter the electrical signal. | 2013-09-26 |
20130249657 | ELECTROMAGNETIC RELAY - An electromagnetic relay includes a bobbin including a winding part, jaw parts extending from both ends of the winding part, and a pair of opposing side wall parts; a coil wound on the winding part; an iron core attached to the bobbin; an armature; a movable contact which contacts or is separated from a fixed contact; and a case. The jaw part is formed to extend to a part in the vicinity of a side wall of the case so as to separate a first space where the coil exists from a second space where the fixed contact and the movable contact exist. Each of the side wall parts extends from the jaw part along an axis of the bobbin in a direction toward the second space and has a distal end abutting on the case. | 2013-09-26 |
20130249658 | MAGNETIC KEYSWITCH ASSEMBLY AND KEYBOARD THEREWITH - A magnetic keyswitch assembly includes a movable keycap, a support plate, a magnetic element, a frame and a switch component. The movable keycap includes a pivot and a metal part. The support plate supports the pivot. The magnetic element attracts the metal part, and a direction of a magnetic attractive force between the magnetic element and the metal part is perpendicular to a movement direction of the movable keycap. The frame is for accommodating the magnetic element. The switch component is disposed beneath the movable keycap. The magnetic element attracts the metal part so as to make the switch component in an OFF state as the movable keycap is undepressed. The movable keycap moves downward to trigger the switch component as the movable keycap is depressed to exceed a force threshold. | 2013-09-26 |
20130249659 | TRANSFORMER STRUCTURE - A transformer structure includes a bobbin, a conductive base, a first winding coil, plural second winding coils, and a magnetic core assembly. The bobbin includes a main body and a channel. The main body has a first winding section and plural first pins. The plural first pins are located at bilateral sides of the main body. The channel runs through the main body. The conductive base is disposed on a bottom side of the bobbin, and includes at least one connecting part. Through the connecting part of the conductive base, at least a portion of the plural first pins are electrically connected with each other. The first winding coil is wound around the first winding section. The second winding coils are connected with corresponding first pins. The magnetic core assembly is partially embedded into the channel of the bobbin. | 2013-09-26 |
20130249660 | PARALLEL STACKED SYMMETRICAL AND DIFFERENTIAL INDUCTOR - A parallel stacked symmetrical and differential inductor and manufacturing method of the same is disclosed. The parallel stacked symmetrical and differential inductor is disposed on a substrate and comprises at least one first conductive layer ( | 2013-09-26 |
20130249661 | COMMON MODE NOISE FILTER - A filter body of a common mode noise filter includes: a non-magnetic body; a first magnetic body and a second magnetic body sandwiching the non-magnetic body; and a first coil conductor and a second coil conductor of planar shape which are embedded in the non-magnetic body and positioned on the first magnetic body side and second magnetic body side in the non-magnetic body in a manner facing each other in a non-contact state; and also has a non-magnetic first protective part and second protective part which are made of a non-magnetic material whose strength is higher than the first magnetic body and second magnetic body and which are positioned on the outermost side of the filter body in a manner sandwiching the first magnetic body and second magnetic body. | 2013-09-26 |
20130249662 | PLANAR COIL ELEMENT - In a planar coil element, the quantitative ratio of inclined particles to total particles of a first metal magnetic powder contained in a metal magnetic powder-containing resin provided in a through hole of a coil unit is higher than the quantitative ratio of inclined particles to total particles of the first metal magnetic powder contained in the metal magnetic powder-containing resin provided in other than the through hole, and many of particles of the first metal magnetic powder in the magnetic core are inclined particles whose major axes are inclined with respect to the thickness direction and the planar direction of a substrate. Therefore, the planar coil element has improved strength as compared to a planar coil element shown in FIG. | 2013-09-26 |
20130249663 | ANTENNA DEVICE FOR NEAR FIELD WIRELESS COMMUNICATION AND PORTABLE TERMINAL HAVING THE SAME - An antenna device for near field wireless communication which may be mounted at a part of a Black Mark (BM) region of a window, and a portable terminal having the same are provided. The antenna device for near field wireless communication mounted in the portable terminal having a BM region, includes: a plurality of flexible printed circuit board layers stacked at a partial region of a lower portion of the BM region, a plurality of conductive antenna patterns of a loop type provided for the plurality of flexible printed circuit board layers, respectively, and a plurality of through holes through which adjacent conductive antenna patterns are connected to each other among the plurality of conductive antenna patterns of a loop type such that the plurality of conductive antenna patterns are electrically connected to each other so as to define one loop antenna. | 2013-09-26 |
20130249664 | PLANAR COIL ELEMENT AND METHOD FOR PRODUCING THE SAME - In a planar coil element and a method for producing the same, a metal magnetic powder-containing resin containing an oblate or needle-like first metal magnetic powder contains a second metal magnetic powder having an average particle size (1 μm) smaller than that (32 μm) of the first metal magnetic powder, which significantly reduces the viscosity of the metal magnetic powder-containing resin. Therefore, the metal magnetic powder-containing resin is easy to handle when applied to enclose a coil unit, which makes it easy to produce the planar coil element. | 2013-09-26 |
20130249665 | MAGNETIC COMPONENT AND BOBBIN THEREOF - A bobbin can be used for a magnetic component. The magnetic component includes at least one coil, and the coil includes at least one pin. The bobbin includes a body and a pin holder. The body includes a winding part and two plates. The winding part is used for winding the coil. The plates are respectively disposed on the opposites of the winding part. The pin holder is disposed on one of the plates, and it includes at least one locating hole for inserting the pin. | 2013-09-26 |
20130249666 | REACTOR AND MANUFACTURING METHOD THEREOF - First and second divisional cores each including right and left leg portions and a yoke interconnecting those together are formed by molding respective yoke-side core members in a resin. Cylindrical core mounting portions extending from the outer circumference of the surface of the yoke-side core member are formed integrally with the respective right and left leg portions of the first. divisional core. I-shaped leg-portion-side core members and spacers are attached in the cylindrical core mounting portion formed in each of the right and left leg portions. The surface of the yoke-side core member molded in the resin and the surface of the leg-portion-side core member are disposed so as to have a spacer therebetween. The two divisional cores are joined together by butting respective leg portions of the two divisional cores with each other to form an annular mold core, and a coil is wound around the mold core. | 2013-09-26 |
20130249667 | Communication System and Method - A device is provided that includes a network communication portion, a device communication portion, a registration portion and a controller. The network communication portion can communicate with a communication network. The device communication portion can communicate with a first communication device, can communicate with a second communication device, can receive a registration communication, can receive a first communication and can receive a second communication. The registration portion can associate the second communication device with the first communication device based on the registration communication. The controller portion can instruct the device communication portion to transmit the first communication to the first communication device and to transmit the second communication to the first communication device. | 2013-09-26 |