38th week of 2012 patent applcation highlights part 16 |
Patent application number | Title | Published |
20120235234 | FIN FET DEVICE WITH INDEPENDENT CONTROL GATE - A FinFET device with an independent control gate, including: a silicon-on-insulator substrate; a non-planar multi-gate transistor disposed on the silicon-on-insulator substrate, the transistor comprising a conducting channel wrapped around a thin silicon fin; a source/drain extension region; an independently addressable control gate that is self-aligned to the fin and does not extend beyond the source/drain extension region, the control gate comprising: a thin layer of silicon nitride; and a plurality of spacers. | 2012-09-20 |
20120235235 | THIN FILM TRANSISTOR STRUCTURE AND DISPLAY DEVICE HAVING SAME - A thin film transistor structure includes a substrate, a gate layer, a gate insulator layer, a first semiconductor island, a second semiconductor island and a source and drain layer. The gate layer is disposed on the substrate, and includes a first gate electrode and a second electrode electrically connected to the first gate electrode. The gate insulator layer is disposed on the substrate and covers the first and second gate electrodes. The first semiconductor island is disposed on the gate insulator layer and corresponding to the first gate electrode. The second semiconductor island is disposed on the gate insulator layer and corresponding to the second electrode. The source and drain layer is disposed on the gate insulator layer and next to the first semiconductor island and the second semiconductor island. A display device using the above thin film transistor structure is also provided. | 2012-09-20 |
20120235236 | STRUCTURE AND METHOD OF FORMING A TRANSISTOR WITH ASYMMETRIC CHANNEL AND SOURCE/DRAIN REGIONS - A semiconductor structure includes a semiconductor substrate. A conductive gate abuts a gate insulator for controlling conduction of a channel region. The gate insulator abuts the channel region. A source region and a drain region are associated with the conductive gate. The source region includes a first material and the drain region includes a second material. The conductive gate is self-aligned to the first and the second material. | 2012-09-20 |
20120235237 | METHODS FOR FORMING BARRIER REGIONS WITHIN REGIONS OF INSULATING MATERIAL RESULTING IN OUTGASSING PATHS FROM THE INSULATING MATERIAL AND RELATED DEVICES - Methods and devices are provided for fabricating a semiconductor device having barrier regions within regions of insulating material resulting in outgassing paths from the regions of insulating material. A method comprises forming a barrier region within an insulating material proximate the isolated region of semiconductor material and forming a gate structure overlying the isolated region of semiconductor material. The barrier region is adjacent to the isolated region of semiconductor material, resulting in an outgassing path within the insulating material. | 2012-09-20 |
20120235238 | FULLY-DEPLETED SON - A semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes a semiconductor substrate, an insulating layer, a first semiconductor layer, a dielectric layer, a second semiconductor layer, a source and drain junction, a gate, and a spacer. The method includes the steps of forming a semiconductor substrate, forming a shallow trench isolation layer, growing a first epitaxial layer, growing a second epitaxial layer, forming a gate, forming a spacer, performing a reactive ion etching, removing a portion of the first epitaxial layer, filling the void with a dielectric, etching back a portion of the dielectric, growing a silicon layer, implanting a source and drain junction, and forming an extension. | 2012-09-20 |
20120235239 | HYBRID MOSFET STRUCTURE HAVING DRAIN SIDE SCHOTTKY JUNCTION - A method of forming a transistor device includes forming a patterned gate structure over a semiconductor substrate, forming a raised source region over the semiconductor substrate adjacent a source side of the gate structure, and forming silicide contacts on the raised source region, on the patterned gate structure, and on the semiconductor substrate adjacent a drain side of the gate structure. Thereby, a hybrid field effect transistor (FET) structure having a drain side Schottky contact and a raised source side ohmic contact is defined. | 2012-09-20 |
20120235240 | HIGH DENSITY SIX TRANSISTOR FINFET SRAM CELL LAYOUT - Dual orientation of finFET transistors in a static random access memory (SRAM) cell allows aggressive scaling to a minimum feature size of | 2012-09-20 |
20120235241 | LOW ON-RESISTANCE POWER TRANSISTOR, POWER CONVERTER, AND RELATED METHOD - A power transistor and a power converter are disclosed that may improve the on-resistance and corresponding silicon area of a power transistor. The power transistor may comprise a drain, a source, and a channel therebetween divided into a plurality of transistor stripes, the plurality of transistor stripes being grouped in a plurality of different groups. The power transistor may further comprise a first top metal associated with one of the drain and the source, and a second top metal associated with the other of the drain and the source. The second top metal includes at least one portion that is coupled to different groups of transistor stripes. A related method for determining a layout topology of a power transistor is also disclosed. | 2012-09-20 |
20120235242 | Control of Local Environment for Polysilicon Conductors in Integrated Circuits - A method of fabricating gate level electrodes and interconnects in an integrated circuit, and an integrated circuit so fabricated, with improved process margin for the gate level interconnects of a width near the critical dimension. Off-axis illumination, as used in the photolithography of deep sub-micron critical dimension, is facilitated by the patterned features having a preferred orientation in a common direction, with a pitch constrained to within a relatively narrow range. Interconnects in that same gate level, for example “field poly” interconnects, that run parallel to an array of gate elements are placed within a specified distance range from the ends of the gate elements, or at a distance sufficient to allow sub-resolution assist features. | 2012-09-20 |
20120235243 | METHOD OF FORMING A GATE PATTERN AND A SEMICONDUCTOR DEVICE - This disclosure is directed to a method of forming a gate pattern and a semiconductor device. The method comprises: providing a plurality of stacked structures which are parallel to each other and extend continuously in a first direction, and which are composed of a gate material bar and an etching barrier bar thereon; leaving second resist regions between gaps to be formed adjacent to each other across gate bars by a second photolithography process; selectively removing the etching barrier bars by a second etching process; forming a third resist layer having a plurality of openings parallel to each other and extending continuously in a second direction substantially perpendicular to the first direction by a third photolithography process; and forming the gate pattern by a third etching process. The method is capable of having a larger photolithography process window and better controlling the shape and size of a gate pattern. | 2012-09-20 |
20120235244 | Semiconductor Structure and Method for Manufacturing the Same - A method for manufacturing a semiconductor structure comprises: providing a substrate, forming an active region on the substrate, forming a gate stack or a dummy gate stack on the active region, forming a source extension region and a drain extension region at opposite sides of the gate stack or dummy gate stack, forming a spacer on sidewalls of the gate stack or dummy gate stack, and forming a source and a drain on portions of the active region exposed by the spacer and the gate stack or dummy gate stack; removing at least a part of a source-side portion of the spacer, such that the source-side portion of the spacer has a thickness less than that of a drain-side portion of the spacer; and forming a contact layer on portions of the active region exposed by the spacer and the gate stack or dummy gate stack. Correspondingly, the present invention further provides a semiconductor structure. The present invention is beneficial to the reduction of the contact resistance of the source extension region and meanwhile can also reduce the parasitic capacitance between the gate and the drain extension region. | 2012-09-20 |
20120235245 | SUPERIOR INTEGRITY OF HIGH-K METAL GATE STACKS BY REDUCING STI DIVOTS BY DEPOSITING A FILL MATERIAL AFTER STI FORMATION - When forming sophisticated semiconductor devices on the basis of high-k metal gate electrode structures, which are to be provided in an early manufacturing stage, the encapsulation of the sensitive gate materials may be improved by reducing the depth of or eliminating recessed areas that are obtained after forming sophisticated trench isolation regions. To this end, after completing the STI module, an additional fill material may be provided so as to obtain the desired surface topography and also preserve superior material characteristics of the trench isolation regions. | 2012-09-20 |
20120235246 | SEMICONDUCTOR DEVICE - One embodiment of a semiconductor device provided with a semiconductor substrate, a device region formed on the semiconductor substrate, a device isolation region, which encloses the device region, a plurality of first gate electrodes arranged so as to be parallel to each other on the device region and electrically connected to each other, and a plurality of second gate electrodes arranged so as to be parallel to a plurality of first gate electrodes on the device region and electrically connected to each other, wherein the first gate electrode is arranged so as to be interposed between the second gate electrodes, a gate width of the first gate electrode is smaller than the gate width of the second gate electrode, and a DC bias voltage higher than that of the second gate electrode is applied to the first gate electrode. | 2012-09-20 |
20120235247 | FIN FIELD EFFECT TRANSISTOR WITH VARIABLE CHANNEL THICKNESS FOR THRESHOLD VOLTAGE TUNING - A method of forming an integrated circuit (IC) includes forming a first and second plurality of spacers on a substrate, wherein the substrate includes a silicon layer, and wherein the first plurality of spacers have a thickness that is different from a thickness of the second plurality of spacers; and etching the silicon layer in the substrate using the first and second plurality of spacers as a mask, wherein the etched silicon layer forms a first plurality and a second plurality of fin field effect transistor (FINFET) channel regions, and wherein the first plurality of FINFET channel regions each have a respective thickness that corresponds to the thickness of the first plurality of spacers, and wherein the second plurality of FINFET channel regions each have a respective thickness that corresponds to the thickness of the second plurality of spacers. | 2012-09-20 |
20120235248 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a substrate having an active region and an isolation region, a gate pattern crossing both the active region and the isolation region of the substrate, and a protrusion having a surface higher than that of the substrate over at least an edge of the active region contacting a portion of the isolation region under the gate pattern. | 2012-09-20 |
20120235249 | REDUCING DEFECT RATE DURING DEPOSITION OF A CHANNEL SEMICONDUCTOR ALLOY INTO AN IN SITU RECESSED ACTIVE REGION - When forming sophisticated high-k metal gate electrode structures on the basis of a threshold voltage adjusting semiconductor alloy, a highly efficient in situ process technique may be applied in order to form a recess in dedicated active regions and refilling the recess with a semiconductor alloy. In order to reduce or avoid etch-related irregularities during the recessing of the active regions, the degree of aluminum contamination during the previous processing, in particular during the formation of the trench isolation regions, may be controlled. | 2012-09-20 |
20120235250 | SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME - In a high frequency amplifying MOSFET having a drain offset region, the size is reduced and the on-resistance is decreased by providing conductor plugs | 2012-09-20 |
20120235251 | WAFER LEVEL PACKAGING OF MEMS DEVICES - A MEMS device is disclosed. The MEMS device comprises a MEMS substrate and a CMOS substrate having a front surface, a back surface and one or more metallization layers. The front surface being bonded to the MEMS substrate. The MEMS device includes one or more conductive features on the back surface of the CMOS substrate and electrical connections between the one or more metallization layers and the one or more conductive features. | 2012-09-20 |
20120235252 | MANUFACTURING METHOD FOR AN ENCAPSULATED MICROMECHANICAL COMPONENT, CORRESPONDING MICROMECHANICAL COMPONENT, AND ENCAPSULATION FOR A MICROMECHANICAL COMPONENT - A manufacturing method for an encapsulated micromechanical component has the following steps: creating an intermediate substrate having a plurality of perforations; laminating an encapsulation substrate onto a front side of the intermediate substrate, which closes the perforations on the front side; laminating an MEMS functional wafer onto a rear side of the intermediate substrate; the MEMS functional wafer being aligned with the intermediate substrate in such a way that the perforations form cavities over the corresponding functional areas of the MEMS functional wafer. | 2012-09-20 |
20120235253 | Vertical Mount Package for MEMS Sensors - A vertical mount pre-molded type package for use with a MEMS sensor may be formed with a low moisture permeable molding material that surrounds a portion of the leadframes and forms a cavity in which one or multiple dies may be held. The package includes structures to reduce package vibration, reduce die stress, increase vertical mount stability, and improve solder joint reliability. The vertical mount package includes a first leadframe having first leads and molding material substantially surrounding at least a portion of the first leads. The molding material forms a cavity for holding the MEMS sensor and forms a package mounting plane for mounting the package on a base. The cavity has a die mounting plane that is substantially non-parallel to the package mounting plane. The first leads are configured to provide electrical contacts within the cavity and to provide electrical contacts to the base. | 2012-09-20 |
20120235254 | METHOD OF FORMING A DIE HAVING AN IC REGION ADJACENT A MEMS REGION - A method that includes forming a first layer having a first dopant concentration, the first layer having an integrated circuit region and a micro-electromechanical region and doping the micro-electromechanical region of the first layer to have a second dopant concentration is presented. The method includes forming a second layer having a third dopant concentration overlying the first layer, doping the second layer that overlies the micro-electromechanical region to have a fourth dopant concentration, forming a micro-electromechanical structure in the micro-electromechanical region using the first and second layers, and forming active components in the integrated circuit region using the second layer. | 2012-09-20 |
20120235255 | MEMS acoustic pressure sensor device and method for making same - The present invention discloses a Micro-Electro-Mechanical System (MEMS) acoustic pressure sensor device and a method for making same. The MEMS device includes: a substrate; a fixed electrode provided on the substrate; and a multilayer structure, which includes multiple metal layers and multiple metal plugs, wherein the multiple metal layers are connected by the multiple metal plugs. A cavity is formed between the multilayer structure and the fixed electrode. Each metal layer in the multilayer structure includes multiple metal sections. The multiple metal sections of one metal layer and those of at least another metal layer are staggered to form a substantially blanket surface as viewed from a moving direction of an acoustic wave. | 2012-09-20 |
20120235256 | COMPONENT - A wafer-level-based packaging concept for MEMS components having at least one diaphragm structure formed in the component front side is described, according to which an interposer is connected to the front side of the MEMS component, which has at least one passage aperture as an access opening to the diaphragm structure of the MEMS component and which is provided with electrical through contacts so that the MEMS component is electrically contactable via the interposer. The cross-sectional area of the at least one passage aperture in the interposer is to be designed as significantly smaller than the lateral extension of the diaphragm structure of the MEMS component. The at least one passage aperture opens into a cavity between the diaphragm structure and the interposer. | 2012-09-20 |
20120235257 | VIBRATION TRANSDUCER - Vibration beams are provided on a substrate in parallel with the substrate and in parallel with each other, and provided in vacuum chambers formed by a shell and the substrate. Each of vibration beams has a sectional shape with a longer sectional thickness in a direction perpendicular to a surface of the substrate than a sectional thickness in a direction parallel to the surface of the substrate. A first electrode plate is provided in parallel with the surface of the substrate and connected to one end of each of the vibration beams. A second electrode plate is provided in parallel with the surface of the substrate and between the vibration beams. Third and fourth electrode plates are provided on opposite sides of the vibration beams. Asperities are provided in opposed side wall portion surfaces of the vibration beams and the second, third and fourth electrode plates. | 2012-09-20 |
20120235258 | TMR Device with Improved MgO Barrier - A method of forming a high performance magnetic tunnel junction (MTJ) is disclosed wherein the tunnel barrier includes at least three metal oxide layers. The tunnel barrier stack is partially built by depositing a first metal layer, performing a natural oxidation (NOX) process, depositing a second metal layer, and performing a second NOX process to give a M | 2012-09-20 |
20120235259 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A semiconductor package and a method of fabricating the same. The semiconductor package includes: a substrate having a plurality of semiconductor components disposed thereon; an encapsulant covering the substrate and the semiconductor components; and a metal layer formed on the exposed surfaces of the encapsulant, wherein the encapsulant is formed with a trench for dividing into a plurality of package units on the substrate to allow each of the package units to have at least one of the semiconductor components, and the metal layer is formed in the trench to encompass the encapsulant on the periphery of the semiconductor components, thereby preventing interference of electromagnetic waves between the semiconductor components. | 2012-09-20 |
20120235260 | METHOD FOR MANUFACTURING SOLID-STATE THERMAL NEUTRON DETECTORS WITH SIMULTANEOUS HIGH THERMAL NEUTRON DETECTION EFFICIENCY (>50%) AND NEUTRON TO GAMMA DISCRIMINATION (>1.0E4) - Methods for manufacturing solid-state thermal neutron detectors with simultaneous high thermal neutron detection efficiency (>50%) and neutron to gamma discrimination (>10 | 2012-09-20 |
20120235261 | DEVICE-MOUNTED SUBSTRATE, INFRARED LIGHT SENSOR AND THROUGH ELECTRODE FORMING METHOD - A via hole is formed on a base substrate before a device circuit is formed, and thermal oxidation is performed to form a thermal oxidation layer on a surface of the base substrate on which the device circuit is formed and a surface in the via hole. The device circuit having a conductive section is formed on the base substrate after the thermal oxidation, and then, a conductive body is embedded in the via hole. | 2012-09-20 |
20120235262 | INFRA RED DETECTORS AND METHODS OF MANUFACTURE - A method of forming infra red detector arrays is described, starting with the manufacture of a wafer. The wafer is formed from a GaAs or GaAs/Si substrate having CMT deposited thereon by MOVPE. The CMT deposited can include a number of layers of differing composition, the composition being controlled during the MOVPE process and being dependent on the thickness of the layer deposited. A CdTe buffer layer can aid deposition of the CMT on the substrate. Once the wafer is formed, the buffer layer, an etch stop layer and any intervening layers can be etched away leaving a wafer suitable for further processing into an infra red detector. | 2012-09-20 |
20120235263 | SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS - A solid-state imaging device includes pixels each having a photoelectric conversion element for converting incident light to an electric signal, color filters associated with the pixels and having a plurality of color filter components, microlenses converging the incident light through the color filters to the photoelectric conversion elements, a light shielding film disposed between the color filter components of the color filters, and a nonplanarized adhesive film provided between the color filters and the light shielding film. | 2012-09-20 |
20120235264 | LIGHT RECEIVING ELEMENT, LIGHT RECEIVING DEVICE, AND LIGHT RECEIVING MODULE - A light receiving element includes a waveguide that includes a waveguide core, a multi-mode interference waveguide that has a width larger than a width of the waveguide, the multi-mode interference waveguide receiving a first light from the waveguide core at a first end, and a photodetection portion that includes a first semiconductor layer and an absorption layer disposed on the first semiconductor layer, the first semiconductor layer including at least one layer and receiving a second light from the multi-mode interference waveguide at a second end, the absorption layer being disposed above the first semiconductor layer and absorbing the second light. A distance from the first end of the multi-mode interference waveguide to the second end of the photodetection portion is longer than 70% of a first length and shorter than 100% of the first length, the first length being a length where self-imaging occurs in the multi-mode interference waveguide. | 2012-09-20 |
20120235265 | LIGHT RECEIVING ELEMENT, LIGHT RECEIVING DEVICE, AND LIGHT RECEIVING MODULE - A light receiving element includes a core configured to propagate a signal light, a first semiconductor layer having a first conductivity type, the first semiconductor layer being configured to receive the signal light from the core along a first direction in which the core extends, an absorbing layer configured to absorb the signal light received by the first semiconductor layer, and a second semiconductor layer having a second conductivity type opposite to the first conductivity type. | 2012-09-20 |
20120235266 | SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS - There is provided a solid-state imaging device including plural pixel regions, each including a pixel having a photoelectric conversion unit, a color filter, and a microlens that condenses the incident light to the photoelectric conversion unit; a first light shielding portion that has a first end face at the side of the microlens, and a second end face opposite to the first end face, and that is formed at each side portion of each pixel region of the plurality of the pixel regions; and a second light shielding portion that has a first end face at the side of the microlens, and a second end face opposite to the first end face, and that is formed at each corner portion of the pixel region, in which a distance from a surface of the pixel to the first end face is short compared to the first light shielding portion. | 2012-09-20 |
20120235267 | PHOTODIODE OF THE TYPE AVALANCHE PHOTODIODE - A front-illuminated avalanche photodiode (APD) includes an opening ( | 2012-09-20 |
20120235268 | PHOTOELECTRIC CONVERSION MODULE, METHOD FOR MANUFACTURING SAME, AND POWER GENERATION DEVICE - A photoelectric conversion module comprises: a substrate having a first surface on which a light is incident and a second surface located at the opposite side of the first surface; a photoelectric conversion element provided on the second surface of the substrate; a light-transmitting member provided on the photoelectric conversion element; and a reflecting member provided on the light-transmitting member and configured to reflect a light having transmitted through the light-transmitting member. The reflecting member comprises an inclined light reflection surface that allows a light reflected from the reflecting member to be totally reflected at the first surface of the substrate. | 2012-09-20 |
20120235269 | OPTICAL SENSOR AND ELECTRONIC APPARATUS - An optical sensor includes an impurity region for a photodiode and an angle limiting filter limiting the incidence angle of incidence light incident to a light receiving area of the photodiode, which are formed on a semiconductor substrate. The angle limiting filter is formed by at least a first plug corresponding to a first insulating layer and a second plug corresponding to a second insulating layer located in an upper layer of the first insulating layer. Between the first plug and the second plug, there is a gap area having a gap space that is equal to or less than λ/2. | 2012-09-20 |
20120235270 | SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME - A semiconductor apparatus including a substrate, a pixel array on the substrate, first and second conductive pads between which the substrate locates is provided. The apparatus also comprises an insulating layer arranged between the substrate and the first conductive pad; a third conductive pad arranged between the substrate and the insulating layer; a first conductive member which passes through the insulating layer and connects the first and third conductive pads to each other; and a second conductive member which passes through the substrate and connects the second and third conductive pads to each other. The pixel array further comprises a conductive line connected to circuit elements included in pixels aligned in a row or column direction. The first conductive pad is connected to the conductive line in an interval between the pixels. | 2012-09-20 |
20120235271 | SOLID-STATE IMAGE SENSING DEVICE - According to one embodiment, there is provided a solid-state image sensing device including a photodiode in which a semiconductor region of a first conductivity type formed on a substrate and a semiconductor region of a second conductivity type which is different from the first conductivity type is made as a PN junction. The semiconductor region of the first conductivity type has a first semiconductor region and a plurality of second semiconductor regions. Either of the first semiconductor region and each of the second semiconductor regions is formed by a material containing Si as a main component. The other of the first semiconductor region and each of the second semiconductor regions is formed by a material containing Si | 2012-09-20 |
20120235272 | RANGE SENSOR AND RANGE IMAGE SENSOR - A range image sensor | 2012-09-20 |
20120235273 | Hybrid Gap-fill Approach for STI Formation - A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material. | 2012-09-20 |
20120235274 | SEMICONDUCTOR STRUCTURE HAVING AN INTEGRATED DOUBLE-WALL CAPACITOR FOR EMBEDDED DYNAMIC RANDOM ACCESS MEMORY (EDRAM) AND METHOD TO FORM THE SAME - Semiconductor structures having integrated double-wall capacitors for eDRAM and methods to form the same are described. For example, an embedded double-wall capacitor includes a trench disposed in a first dielectric layer disposed above a substrate. The trench has a bottom and sidewalls. A U-shaped metal plate is disposed at the bottom of the trench, spaced apart from the sidewalls. A second dielectric layer is disposed on and conformal with the sidewalls of the trench and the U-shaped metal plate. A top metal plate layer is disposed on and conformal with the second dielectric layer. | 2012-09-20 |
20120235275 | ON-CHIP ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to an on-chip electronic device and a method for manufacturing the same. The on-chip electronic device according to the present invention comprises a substrate, a porous layer, a plurality of magnetic bodies, and an electronic member layer. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of magnetic bodies is disposed in the plurality of voids, respectively; and the electronic member layer is disposed on one side of the porous layer, such as upper side of or lower sider of the porous layer. Because the plurality of magnetic bodies is used as the core of the inductance, the inductance is increased effectively and the area of the on-chip electronic device is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered. | 2012-09-20 |
20120235276 | ELECTRODE TREATMENTS FOR ENHANCED DRAM PERFORMANCE - A method for fabricating a dynamic random access memory capacitor is disclosed. The method may comprise depositing a first titanium nitride (TiN) electrode; creating a first layer of titanium dioxide (TiO | 2012-09-20 |
20120235277 | MULTIPLE ENERGIZATION ELEMENTS IN STACKED INTEGRATED COMPONENT DEVICES - This invention discloses a device comprising multiple functional layers with multiple energization elements formed on substrates, wherein at least one functional layer comprises an electrical energy source. In some embodiments, the present invention includes a component for incorporation into ophthalmic lenses that has been formed by the stacking of multiple functionalized layers. | 2012-09-20 |
20120235278 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC SYSTEM USING THE SAME - Adhesive strength between a rewiring and a solder bump is improved in a semiconductor integrated circuit device in which a bump electrode is connected to a land section of the rewiring. The land section | 2012-09-20 |
20120235279 | SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME - A semiconductor device includes a substrate and a plurality of storage nodes on the substrate and extending in a vertical direction relative to the substrate. A lower support pattern is in contact with the storage nodes between a bottom and a top of the storage nodes, the lower support pattern spaced apart from the substrate in the vertical direction, and the lower support pattern having a first maximum thickness in the vertical direction. An upper support pattern is in contact with the storage nodes above the lower support pattern relative to the substrate, the upper support pattern spaced apart from the lower support pattern in the vertical direction, and the lower support pattern having a second maximum thickness in the vertical direction that is greater than the first maximum thickness of the lower support pattern. | 2012-09-20 |
20120235280 | INTEGRATED CIRCUIT INCLUDING A BIPOLAR TRANSISTOR AND METHODS OF MAKING THE SAME - An integrated circuit includes a bipolar transistor disposed over a substrate. The bipolar transistor includes a base electrode disposed around at least one germanium-containing layer. An emitter electrode is disposed over the at least one germanium-containing layer. At least one isolation structure is disposed between the emitter electrode and the at least one germanium-containing layer. A top surface of the at least one isolation structure is disposed between and electrically isolating a top surface of the emitter electrode from a top surface of the at least one germanium-containing layer. | 2012-09-20 |
20120235281 | SYSTEMS AND METHODS FOR PREPARING FILMS COMPRISING METAL USING SEQUENTIAL ION IMPLANTATION, AND FILMS FORMED USING SAME - Systems and methods for preparing films comprising metal using sequential ion implantation, and films formed using same, are provided herein. A structure prepared using ion implantation may include a substrate; an embedded structure having pre-selected characteristics; and a film within or adjacent to the embedded structure. The film comprises a metal having a perturbed arrangement arising from the presence of the embedded structure. The perturbed arrangement may include metal ions that coalesce into a substantially continuous, electrically conductive metal layer, or that undergo covalent bonding, whereas in the absence of the embedded structure the metal ions instead may be free to diffuse through the substrate. The embedded structure may control the diffusion of the metal through the substrate and/or the reaction of the metal within the substrate. | 2012-09-20 |
20120235282 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device manufacturing method is disclosed. The method comprises (a) forming cut grooves in a front surface of a semiconductor wafer on which semiconductor elements are formed to partition the front surface into a plurality of regions, (b) disposing partly a resin in the cut grooves, (c) adhering a protection tape on the front surface of the semiconductor wafer, (d) thinning the semiconductor wafer by grinding a rear surface of the semiconductor wafer to reach the cut grooves, (e) forming an adhesive agent layer on the rear surface of the semiconductor wafer, and (f) dividing the semiconductor wafer into a plurality of semiconductor chips by cutting the adhesive agent layer together with the disposed resin along the cut grooves. | 2012-09-20 |
20120235283 | SILICON ON INSULATOR STRUCTURES HAVING HIGH RESISTIVITY REGIONS IN THE HANDLE WAFER - Silicon on insulator structures having a high resistivity region in the handle wafer of the silicon on insulator structure are disclosed. Methods for producing such silicon on insulator structures are also provided. Exemplary methods involve creating a non-uniform thermal donor profile and/or modifying the dopant profile of the handle wafer to create a new resistivity profile in the handle wafer. Methods may involve one or more SOI manufacturing steps or electronic device (e.g., RF device) manufacturing steps. | 2012-09-20 |
20120235284 | FILM-LIKE WAFER MOLD MATERIAL, MOLDED WAFER, AND SEMICONDUCTOR DEVICE - A film-like wafer mold material for molding a wafer in a lump, the material including a multilayer structure constituted of at least a first film layer and a second film layer provided on the first film layer, wherein the first film layer contains a silicone-backbone-containing polymer, a cross-linking agent, and a filler, and the second film layer, contains a silicone-backbone-containing polymer and a cross-linking agent, and further contains a filler in such a manner that a content rate of the filler becomes 0 or above and less than 100 when a content rate of the filler contained in the first film layer is assumed to be 100. The film-like wafer mold material has excellent transference performance with respect to a thin-film wafer with a large diameter, also has low-warp properties and excellent wafer protection performance after form shaping (after molding), and is preferably used for a wafer level package. | 2012-09-20 |
20120235285 | PROTECTION OF REACTIVE METAL SURFACES OF SEMICONDUCTOR DEVICES DURING SHIPPING BY PROVIDING AN ADDITIONAL PROTECTION LAYER - When forming complex metallization systems on the basis of copper, the very last metallization layer may receive contact regions on the basis of copper, the surface of which may be passivated on the basis of a dedicated protection layer, which may thus allow the patterning of the passivation layer stack prior to shipping the device to a remote manufacturing site. Hence, the protected contact surface may be efficiently re-exposed in the remote manufacturing site on the basis of an efficient non-masked wet chemical etch process. | 2012-09-20 |
20120235286 | INSERTS FOR DIRECTING MOLDING COMPOUND FLOW AND SEMICONDUCTOR DIE ASSEMBLIES - Flow diverting structures for preferentially impeding, redirecting or both impeding and redirecting the flow of flowable encapsulant material, such as molding compound, proximate a selected surface or surfaces of a semiconductor die or dice during encapsulation are disclosed. Flow diverting structures may be included in or associated with one or more portions of a lead frame, such as a paddle, tie bars, or lead fingers. Flow diverting structures may also be inserted into a mold in association with semiconductor dice carried on non-lead frame substrates, such as interposers and circuit boards, to preferentially impede, redirect or both impede and redirect the flow of molding compound flowing between and over the semiconductor dice. | 2012-09-20 |
20120235287 | HIGH BRIGHTNESS AND HIGH CONTRAST PLASTIC LEADED CHIP CARRIER LED - A Plastic Leaded Chip Carrier (PLCC) package is disclosed. The PLCC package provides a light source that is both high contrast and high brightness. Specifically, the PLCC package includes a reflector cup whose surface area is partially inclusive of a lead frame and partially inclusive of a plastic housing that surrounds the lead frame. | 2012-09-20 |
20120235288 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME - A semiconductor device in accordance with an embodiment comprises a semiconductor chip; a die pad having a chip mount surface for mounting the semiconductor chip; first leads electrically connected to the semiconductor chip; a thermosetting resin part for securing end parts of the first leads to the die pad; and a thermoplastic resin part for sealing the semiconductor chip, the die pad, and the thermosetting resin part. | 2012-09-20 |
20120235289 | POWER DEVICE WITH BOTTOM SOURCE ELECTRODE AND PREPARATION METHOD - A power semiconductor package has an ultra thin chip with front side molding to reduce substrate resistance; a lead frame unit with grooves located on both side leads provides precise positioning for connecting numerous bridge-shaped metal clips to the front side of the side leads. The bridge-shaped metal clips are provided with bridge structure and half or fully etched through holes for relieving superfluous solder during manufacturing process. | 2012-09-20 |
20120235290 | POWER MODULE FOR AN AUTOMOBILE - The invention relates to a power module ( | 2012-09-20 |
20120235291 | SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a semiconductor apparatus includes a semiconductor device, a heat spreader, a regulating unit, a containing unit, and a holding unit. The heat spreader is bonded to the semiconductor device with an interposed solder layer. The regulating unit is configured to regulate a dimension between the semiconductor device and the heat spreader. The containing unit is configured to contain melted solder in an interior of the containing unit. The holding unit is configured to allow melted solder held in an interior of the holding unit. The holding unit is configured to replenish the melted solder in the case where an amount of the melted solder contained in the containing unit is insufficient. The holding unit is configured to recover the melted solder in the case where the amount of the melted solder contained in the containing unit is excessive. | 2012-09-20 |
20120235292 | HEAT RADIATING COMPONENT AND SEMICONDUCTOR PACKAGE HAVING THE SAME - In one embodiment, there is provided a heat radiating component. The heat radiating component includes: a base material made mainly of copper; an electroplated aluminum layer that covers at least a part of a surface of the base material; and an alumite layer formed on the electroplated aluminum layer and formed by anodic-oxidizing the electroplated aluminum layer. | 2012-09-20 |
20120235293 | SEMICONDUCTOR DEVICE INCLUDING A BASE PLATE - A semiconductor device includes a semiconductor chip and a base plate coupled to the semiconductor chip. The base plate includes an upper portion and a lower portion. The upper portion has a bottom surface intersecting a sidewall of the lower portion. The semiconductor device includes a cooling element coupled to the base plate. The cooling element has a first surface directly contacting the bottom surface of the upper portion of the base plate, a second surface directly contacting the sidewall of the lower portion of the base plate, and a third surface parallel to the first surface and aligned with a bottom surface of the lower portion of the base plate. | 2012-09-20 |
20120235294 | NOVEL WATER-COOLING RADIATOR OF THYRISTOR - The present invention relates to electric equipment field, and relates particularly to a novel water-cooling radiator of thyristor. This radiator flow channel design adopted helical flow channel combined with cellular fin structure. There are some advantages of this design: the flow resistance and thermal resistance is smaller, radiator surface temperature is homogeneous, heat change of inner water is enough, there are no flow dead zone and partial heat accumulation, the thermal resistance and the flow resistance are all adjusted according to design requirements by changing the circle number of helical flow channel and the layer number of cellular fin. | 2012-09-20 |
20120235295 | BARRIER-METAL-FREE COPPER DAMASCENE TECHNOLOGY USING ENHANCED REFLOW - A method for forming conductive contacts and interconnects in a semiconductor structure, and the resulting conductive components are provided. In particular, the method is used to fabricate single or dual damascene copper contacts and interconnects in integrated circuits such as memory devices and microprocessor. | 2012-09-20 |
20120235296 | IC DEVICES HAVING TSVS INCLUDING PROTRUDING TIPS HAVING IMC BLOCKING TIP ENDS - A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve, an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A passivation layer lateral to protruding TSV tips is on a portion of the sidewalls of protruding TSV tips. The passivation layers is absent from a distal portion of protruding TSV tips to provide an exposed portion of the inner metal core. The TSV tips include bulbous distal tip ends which cover a portion of the TSV sidewalls, are over a topmost surface of the outer dielectric sleeve, and have a maximum cross sectional area that is ≧25% more as compared to a cross sectional area of the protruding TSV tips below the bulbous distal tip ends. | 2012-09-20 |
20120235297 | WAFER LEVEL PACKAGING OF MEMS DEVICES - A MEMS device is disclosed. The MEMS device comprises a MEMS substrate and a CMOS substrate having a front surface, a back surface and one or more metallization layers. The front surface being bonded to the MEMS substrate. The MEMS device includes one or more conductive features on the back surface of the CMOS substrate and electrical connections between the one or more metallization layers and the one or more conductive features. | 2012-09-20 |
20120235298 | ELECTRONIC DEVICE AND METHOD FOR PRODUCING A DEVICE - An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body. | 2012-09-20 |
20120235299 | SEMICONDUCTOR DEVICE CONTACT STRUCTURES AND METHODS FOR MAKING THE SAME - A semiconductor contact structure and method provide contact structures that extend through a dielectric material and provide contact to multiple different subjacent materials including a silicide material and a non-silicide material such as doped silicon. The contact structures includes a lower composite layer formed using a multi-step ionized metal plasma (IMP) deposition operation. A lower IMP film is formed at a high AC bias power followed by the formation of an upper IMP film at a lower AC bias power. The composite layer may be formed of titanium. A further layer is formed as a liner over the composite layer and the liner layer may advantageously be formed using CVD and may be TiN. A conductive plug material such as tungsten or copper fills the contact openings. | 2012-09-20 |
20120235300 | SEMICONDUCTOR HAVING A HIGH ASPECT RATIO VIA - The present disclosure provides various embodiments of a via structure and method of manufacturing same. In an example, a via structure includes a via having via sidewall surfaces defined by a semiconductor substrate. The via sidewall surfaces have a first portion and a second portion. A conductive layer is disposed in the via on the first portion of the via sidewall surfaces, and a dielectric layer is disposed on the second portion of the via sidewall surfaces. The dielectric layer is disposed between the second portion of the via sidewall surfaces and the conductive layer. In an example, the dielectric layer is an oxide layer. | 2012-09-20 |
20120235301 | SEMICONDUCTOR APPARATUS - A method of integrated circuit fabrication is provided, and more particularly fabrication of a semiconductor apparatus with a metallic alloy. An exemplary structure for a semiconductor apparatus comprises a first silicon substrate having a first contact comprising a silicide layer between the substrate and a first metal layer; a second silicon substrate having a second contact comprising a second metal layer; and a metallic alloy between the first metal layer of the first contact and the second metal layer of the second contact. | 2012-09-20 |
20120235302 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE - A semiconductor manufacturing method includes: forming a seed film including a first metal over a bottom surface and a side wall of an opening portion formed over interlayer insulating films and a field portion located over the interlayer insulating film except the opening portion, forming a resist over the seed film and filling the opening portion with the resist, removing part of the resist, exposing the seed film formed over the upper portion of the side walls of the opening portion and the field portion, forming a cover film including a second metal, whose resistivity is higher than that of the first metal, over the seed film located over the upper portion of the side wall of the opening portion and the field portion, exposing the seed film by removing the resist, and forming a plating film including the first metal over the exposed seed film. | 2012-09-20 |
20120235303 | REINFORCEMENT STRUCTURE FOR FLIP-CHIP PACKAGING - The present disclosure provides a carrier substrate, a device including the carrier substrate, and a method of bonding the carrier substrate to a chip. An exemplary device includes a carrier substrate having a chip region and a periphery region, and a chip bonded to the chip region of the carrier substrate. The carrier substrate includes a reinforcement structure embedded within the periphery region. | 2012-09-20 |
20120235304 | ULTRAVIOLET (UV)-REFLECTING FILM FOR BEOL PROCESSING - Semiconductor devices are formed with a dielectric stack by forming an UV reflecting layer between cured and uncured ULK layers during BEOL processing. Embodiments include forming a first ultra low-k (ULK) layer on a semiconductor element, curing the first ULK layer, forming an ultraviolet (UV) reflecting layer on the first ULK layer, forming a second ULK layer on the UV reflecting layer, and irradiating the second ULK layer with UV light. | 2012-09-20 |
20120235305 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate. | 2012-09-20 |
20120235306 | Virtually Substrate-less Composite Power Semiconductor Device - A virtually substrate-less composite power semiconductor device (VSLCPSD) and method are disclosed. The VSLCPSD has a power semiconductor device (PSD), a front-face device carrier (FDC) made out of a carrier material and an intervening bonding layer (IBL). Both carrier and IBL material can be conductive or non-conductive. The PSD has back substrate portion, front semiconductor device portion with patterned front-face device metallization pads and a virtually diminishing thickness T | 2012-09-20 |
20120235307 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME STACKING MODULE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit die having an active side and a passive side; providing a contact pad having a top side oriented in a same direction as the passive side; connecting an inner bond wire to the contact pad and the integrated circuit die; and molding a stacking structure around the contact pad, the inner bond wire, and the integrated circuit die with the passive side and the top side exposed, and the stacking structure having a top structure surface on top and adjacent to or below the integrated circuit die, and a horizontal member under the integrated circuit die and forming a cavity. | 2012-09-20 |
20120235308 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE - To suppress the reduction in reliability of a resin-sealed semiconductor device. A first cap (member) and a second cap (member) with a cavity (space formation portion) are superimposed and bonded together to form a sealed space. A semiconductor including a sensor chip (semiconductor chip) and wires inside the space is manufactured in the following way. In a sealing step of sealing a joint part between the caps, a sealing member is formed of resin such that an entirety of an upper surface of the second cap and an entirety of a lower surface of the first cap are respectively exposed. Thus, in the sealing step, the pressure acting in the direction of crushing the second cap can be decreased. | 2012-09-20 |
20120235309 | Semiconductor Package with Embedded Die and Manufacturing Methods Thereof - A semiconductor package includes a conductive base, a die disposed adjacent to an upper surface of the conductive base, a patterned conductive layer, and a dielectric layer encapsulating the die. The dielectric layer defines an opening through which the patterned conductive layer is electrically connected to the upper surface of the conductive base. The conductive base has a lateral surface including a first portion adjacent to the upper surface of the conductive base and a second portion adjacent to a lower surface of the conductive base, where the second portion is sloped inwardly with respect to the lower surface of the conductive base. | 2012-09-20 |
20120235310 | SEMICONDUCTOR PACKAGES - The invention includes semiconductor packages having grooves within a semiconductor die backside; and includes semiconductor packages utilizing carbon nanostructures (such as, for example, carbon nanotubes) as thermally conductive interface materials. The invention also includes methods of cooling a semiconductor die in which coolant is forced through grooves in a backside of the die, and includes methods of making semiconductor packages. | 2012-09-20 |
20120235311 | Vapor blending system - The vapor blending system is a mechanical system that can create a homogenous vapor blend that is combustible and can be used as a supplemental fuel source for internal combustion engines. The system can be easily retro-fitted on vehicles (cars, trucks, buses, trains, etc.) to produce the vapor on demand. The basic objective of this invention is to create a viable supplement fuel that reduces the amount of carbon emission into the atmosphere when used as a fossil fuel supplement. | 2012-09-20 |
20120235312 | HUMIDITY CONTROL IN APRESSURE SUPPORT SYSTEM - A pressure support system configured to provide pressure support therapy includes a humidifier that holds an enhanced amount of liquid while enhancing the power consumption of the pressure support system and enabling relatively rapid adjustments to humidity level. The humidifier includes a humidification chamber and a holding chamber, and a partition that divides the holding chamber from the humidification chamber such that liquid from the holding chamber replenishes liquid held in the humidification chamber. The partition, however, also provides a level of thermal isolation for the humidification chamber from the holding chamber. | 2012-09-20 |
20120235313 | METHOD AND DEVICE FOR MONITORING PRODUCTION OF FLUID FILM - A method for monitoring production of a fluid film, including: activating a dispenser to deliver appropriate material from a storage duct to a metering system for even distribution of a fluid film; allowing the fluid film to pass a sample retrieving roller; measuring the fluid film on the sample retrieving roller using a data reading device to obtain film thickness data; transmitting the data to an analyzer to examine the data against a predetermined reference value; transmitting a comparison result in real time by the analyzer to a production equipment controlling console; controlling the storage duct to dispense material through the material metering system and adjusting the film thickness; repeating the above steps to make a film thickness within the reference range; and maintaining the thickness at the narrowest tolerance deviation, and continuously delivering the film onto a substrate for production. | 2012-09-20 |
20120235314 | Apparatus and Method for Controlling Horizontal Oscillation of an Edge Dam of a Twin Roll Strip Caster - An apparatus and method for controlling the horizontal oscillation of an edge dam of a twin roll strip caster is provided. The apparatus includes an oscillation unit which horizontally oscillates an oscillation plate in accordance with an oscillation waveform so that an edge dam refractory coupled to the oscillation plate horizontally oscillates, a servo valve which outputs the oscillation waveform to the oscillation unit, and a control unit which applies the oscillation waveform to the servo valve, thus controlling the horizontal oscillation of the oscillation unit. The amplitude, frequency and waveform of the oscillation are variably controlled depending on casting conditions. The edge dam horizontally oscillates, using the servo valve and a hydraulic cylinder, thus rapidly removing edge skull and suppressing the generation and growth of skull, thereby preventing a casting roll or edge dam from being damaged. | 2012-09-20 |
20120235315 | METHOD FOR FABRICATING A FLEXIBLE DEVICE - A method for fabricating a flexible device is provided, which includes providing a rigid carrier; forming an adhesion layer with a given pattern on the rigid carrier; forming a flexible substrate layer on the rigid carrier, wherein a portion of the flexible substrate layer contacts with the rigid carrier to form a first contact interface and the remaining contacts with the adhesion layer to form a second contact interface; forming at least one device on the surface of the flexible substrate layer opposite to the first contact interface; and separating the flexible substrate from the rigid carrier through the first contact interface. | 2012-09-20 |
20120235316 | METHOD FOR PRODUCING LONG FIBER NONWOVEN FABRIC - A method for producing a long fiber nonwoven fabric includes (a) melting resin containing polyphenylene sulfide as main component, discharging it from a spinneret, solidifying resulting filaments by cooling and stretching the filaments by pulling them out of an ejector at a spinning speed of 3,000 m/min or more while heat-treating as the filaments travel to the ejector outlet to provide a long fiber; (b) collecting the long fiber on a moving net to form a nonwoven web; and (c) subjecting the nonwoven web to thermal bonding. | 2012-09-20 |
20120235317 | Manufactured Aggregate Material And Method - The present invention provides a manufactured aggregate material that converts waste materials and/or recyclable materials into construction material. By mixing waste materials with an acid solution and a metal oxide solution, any harmful contaminates in the waste materials are encapsulated and rendered into hard pellets that are suitable for use in conglomerates or composites such as concrete. The manufactured aggregate material may be adjusted for moisture content, density, heat capacity, and other parameters. | 2012-09-20 |
20120235318 | METHOD FOR FABRICATING A POLYOLEFIN SHEET USING A ROLLER DEVICE - Provided herein is a method of manufacturing a polyolefin sheet using a circulating belt and a first roller, comprising the steps of: heating polyolefin resin to melt polyolefin; and forming the molten polyolefin into a polyolefin sheet using an extruding die, wherein the circulating belt includes a plurality of second rollers (cooling rollers) which come into contact with an inner side of the circulating belt and are arranged in a circle around the circulating belt running in a circle and which cool the rotating circulating belt; a temperature of the circulating belt is maintained at 0˜30 to cool the polyolefin sheet such that the polyolefin sheet has desired thickness, a temperature of the first roller is set to a specific temperature between 40 and 120, and the temperature of the first roller is maintained in a temperature range of the specific temperature ±5; and a linear speed of the molten polyolefin sheet is substantially equal to a rotation speed of the circulating belt or the first roller to obtain a polyolefin sheet having a thickness of 0.05˜0.45 mm and a width of 1100˜1700 mm The method is advantageous in that a wide-width polyolefin sheet having excellent flatness and a small thickness deviation can be manufactured. | 2012-09-20 |
20120235319 | LAYER MULTIPLYING DIE FOR GENERATING INTERFACIAL SURFACES - A method for generating interfacial surfaces within a first composite stream having a generally planar layer interface lies generally in an x-z plane of an x-y-z coordinate system. The method includes dividing the first composite stream into a plurality of branch streams along the x-axis such that the pair of discrete overlapping layers and the generally planar layer interface are distributed among at least two branch streams. Within each individual branch stream of the at least two branch streams, the width dimension of the branch stream is expanded along the x-axis and the thickness dimension of the branch stream is simultaneously contracted along the y-axis. The branch streams are recombined in an overlapping relationship, after each of the at least two branch streams is simultaneously expanded and contracted, to form a second composite stream having a greater number of discrete overlapping layers of polymeric material than the first composite stream. | 2012-09-20 |
20120235320 | SYNTHESIZED HYBRID ROCK COMPOSITION, METHOD, AND ARTICLE FORMED BY THE METHOD - The invention relates to synthetic hybrid rock compositions, articles of manufacture and related processes employing mineral waste starting materials such as mine tailings, mine development rock, ash, slag, quarry fines, and slimes, to produce valuable articles of manufacture and products, which are characterized by superior physical and structural characteristics, including low porosity, low absorption, increased strength and durability, and retained plasticity. The resulting materials are compositionally and chemically distinct from conventional synthetic rock materials as demonstrated by scanning electron microprobe analysis, and are useful in a wide variety of applications, particularly with respect to commercial and residential construction. | 2012-09-20 |
20120235321 | FOAM SEAT ELEMENT, MOLD FOR THE PRODUCTION THEREOF AND METHOD TO MANUFACTURE THE MOLD - There is disclosed an improved seat element having a seating surface element that incorporates a plurality of peak portions and a plurality of valley portions. Preferably, the plurality of peak portions and the plurality of valley portions is incorporated in an outermost surface of the seating surface element. The term “outermost surface” is intended to include an area of the seating surface element for contact by and/or support of an occupant of the seat element and does not include, for example, grooves or trenches in which there is disposed a component for attachment of a trim cover. A process and a mold for production of such a seat element are also described. | 2012-09-20 |
20120235322 | Method of Forming Material Formed of Multiple Links - A material includes a frame having at least one elongate member formed of a first polymer. At least one link is formed of a second polymer, with a portion of each link co-molded about a portion of at least one elongate member, and at least one link movable with respect to a corresponding elongate member. | 2012-09-20 |
20120235323 | PROCESS FOR MOLDING FROM A CAST - Process for molding from a cast which includes the steps of: a) providing an insert which includes at least one through-hole; b) positioning this insert in a mold which has at least one feed channel, which leads to the end of this hole, such as to create a closed space, except for this hole; c) introducing through this feed channel, a hardenable fluid mass to form an overflow in this feed channel; d) leaving this hardenable fluid mass to harden, with this overflow, to form a hardened mass, without handling this hardened overflow, such as to reduce its area to less than that of the area of this hole; and e) withdrawing from this mold the ensemble of the insert and hardened mass, without handling this hardened overflow, such as to reduce its area to less than that of the area of this hole. | 2012-09-20 |
20120235324 | VEHICLE FLOORING SYSTEM - A vehicle spray flooring system is provided that includes a single-sided mold component and a spray application component that facilitates application of a liquefied mixture into the single-sided mold. The application of the liquefied mixture results in a vehicle flooring product, whereby the liquefied mixture is a combination of urethane and polyurea. | 2012-09-20 |
20120235325 | COLLAPSING CORE PART RETAINER SLEEVE - An injection molding tool having a collapsible core which is movably mounted with respect to a mold plate. The mold plate is movably mounted with respect to a stripper plate that can be used to eject or remove the molded part from the injection molding tool. A retainer is fixedly positioned with respect to the mold plate so that it contacts at least a portion of a molded part when in a mold position. The retainer can be a sleeve with a through opening within or through which the collapsible core is mounted. | 2012-09-20 |
20120235326 | METHOD FOR FORMING TAPERED PRODUCTS - The present invention relates to an apparatus and method for forming molded tapered products, such as masonry blocks, whereby high quality finished products are removed from their mold without the need for complex machinery for demolding. The mold may include one or more mold cavities having one or more movable cavity walls. The movable cavity walls may include an end liner having a planar product forming surface capable of moving from a vertical position to an angled position. Tapered products may be formed by moving the mold towards a pallet so that the pallet engages with the end liner and causes the end liner to move from the vertical position to the angled position. Moldable material may then be introduced into the mold cavity and may be allowed to remain in the mold cavity until it is self-sustaining. | 2012-09-20 |
20120235327 | RECYCLED RESIN AND MANUFACTURING PROCESS THEREOF - Disclosed are a recycled resin manufacturing process and a recycled resin, the process comprising the steps of sorting a molded waste resin product, pulverizing the sorted molded waste resin product into resin flakes, washing the resin flakes, separating the washed resin flakes to remove different kinds of resins, drying the separated resin flakes, classifying the dried resin flakes to remove foreign matter deposited on the flakes, the classifying being carried out employing a classifying apparatus comprising a classifying section and provided therein, a physical field application device having an airflow force field and another physical field other than the airflow force field, and pelletizing the classified resin flakes, wherein the recycled resin has an oligomer content of not more than 1% by mass. | 2012-09-20 |
20120235328 | TRANSFER PRINTING METHOD AND SYSTEM FOR PRINTING IMAGES ON A WORKPIECE WITH SUPERCRITICAL FLUID - The present invention relates to a transfer printing method and a system using the method for printing images on a workpiece with supercritical fluid. The method includes disposing the workpiece inside the first mold and disposing a transfer film above the workpiece, closing the first mold with a second mold and injecting pressured gas, whose pressure is greater than a critical pressure, into the first mold and the second mold, ensuring a temperature of the pressured gas being greater than a critical temperature so as to convert into supercritical fluid, softening the transfer film with the supercritical fluid, transferring an adhesive layer, a print layer and a hardening layer of the transfer film onto the workpiece, and opening the first mold and the second mold to take out the workpiece. | 2012-09-20 |
20120235329 | CONTINUOUS MOTION ROTATING THERMOFORMING OF SOLUBLE POUCHES - Soluble pouches are formed on a continous motion rotating thermoforming machine having cavities in the surface of a drum into which a web of polymeric film is drawn by a vacuum to form pockets. The pockets are filled with one or more components and closed by a further web of polymeric film. Shrink-back of the polymeric film within the cavities is reduced by heating the cavities with heaters. | 2012-09-20 |
20120235330 | PROCESS FOR PRODUCING METALLIC OR CERAMIC SHAPED BODIES - A process for producing a metallic or ceramic shaped body from a thermoplastic material comprising
| 2012-09-20 |
20120235331 | METHOD AND APPARATUS FOR REMOVING COOLANT LIQUID FROM MOVING METAL STRIP - Exemplary embodiments of the invention include a method and apparatus for cooling a metal strip that is being advanced in a generally horizontal fashion. The method involves delivering a coolant liquid onto a lower surface of the strip from below across the entire width of the strip, preventing the coolant liquid from contacting the upper surface of the strip, and optionally subsequently removing the coolant liquid from the lower surface. The coolant liquid is prevented from contacting the upper surface by forming a gas-directing channel immediately above the upper surface of the strip adjacent to one or preferably both lateral edges of the strip and forcing a gas through the channel in a direction generally away from a center of the strip towards the one or both lateral edges to deflect coolant liquid away from the upper surface of the strip. The apparatus provides means for carrying out these steps. | 2012-09-20 |
20120235332 | Control Assembly For A Bicycle Shock Absorber - A control assembly for an in-line bicycle shock absorber can include a control member rotatably mounted to a housing of the shock absorber, the control member having an interior bore, and with one end of the bore being closed and another end of the bore being open. The control assembly also includes a piston slidably mounted within the interior bore of the control member. The control member is rotated to adjust a first characteristic of the shock absorber and the piston is displaced within the interior bore to adjust a second characteristic of the shock absorber. | 2012-09-20 |
20120235333 | VIBRATION DAMPING DEVICE - A vibration damping device includes a vulcanized rubber molding and a resin molding. The resin molding includes a sandwiched molding having a core layer and skin layers. The skin layers include a polyamide resin composition (A) containing a polyamide resin (a) and glass fibers (x) with a ratio (a/x) of 40/60 to 75/25 in mass. The core layer includes a polyamide resin composition (B) containing a polyamide resin (b) and glass fibers (y) with a ratio (b/y) of 35/65 to 60/40 in mass. A melt viscosity ηa of the composition (A) at 30° C. higher than the melting point thereof and a shearing speed of 1000 s | 2012-09-20 |