34th week of 2012 patent applcation highlights part 18 |
Patent application number | Title | Published |
20120212183 | POWER MANAGEMENT SYSTEM - Provided is a power management system capable of controlling charge and discharge of storage batteries according to power requirement of load even when handling electric power of large scale. A system controller receives load-related information data including the power requirement of load and storage battery-related information data including a state of a storage battery assembly including multiple storage batteries and creates an overall charge-discharge control instruction for the entire power management system based on the load-related information data and the storage battery-related information data. A hierarchical charge-discharge control apparatus receives the overall charge-discharge control instruction from the system controller and performs charge-discharge control of the multiple storage batteries, classified into hierarchical levels, on a hierarchical level basis. | 2012-08-23 |
20120212184 | METHOD FOR CHARGING OR DISCHARGING A BATTERY IN ORDER TO DETERMINE THE END OF CHARGING OR DISCHARGING ON THE BASIS OF MEASUREMENTS OF CURRENT AND TEMPERATURE - The method for charging or discharging a battery comprises measurement of the voltage at the terminals of the battery and comparison of the measured voltage with an end of charging or discharging voltage threshold. The method also comprises measurement of a temperature representative of the temperature of the battery and measurement of the current flowing in the battery to form a pair of measurements. The voltage threshold is then determined according to the pair of measurements. Charging or discharging of the battery is stopped when the voltage threshold is reached. | 2012-08-23 |
20120212185 | COMPOSITE DEVICE SYSTEM - A composite device system including: a first device including a nonvolatile memory; and a second device configured to supply a power to the first device, the second device including: a power supply circuit configured to stabilize a first power supplied from an external part into a second power lower than the first power, and to supply the second power to the first device; a communication circuit configured to receive control data from the first device; and a switch configured to switch between on and off based on the control data, and to supply the first power to the first device when the switch is on, wherein the second device receives the control data from the first device by the communication circuit when data is written into the nonvolatile memory so that the switch is turned on and the first power is supplied to the first device. | 2012-08-23 |
20120212186 | CHARGING APPARATUS AND CHARGING METHOD FOR LITHIUM RECHARGEABLE BATTERY - In a charging apparatus, a lithium rechargeable battery includes positive and negative electrodes containing active materials that allow absorption and discharge of lithium ions, and an electrolyte. The lithium rechargeable battery contains, in at least one of the electrolyte and the positive electrode, an oxidizable agent which is oxidizable by the positive electrode and which has an oxidation potential greater than a nominal voltage of the lithium rechargeable battery and less than a decomposition potential of the electrolyte. The charging apparatus includes a battery capacity recovering unit that charges the lithium rechargeable battery at a potential equal to or greater than the oxidation potential of the oxidizable agent in a part of a plurality of number of times of charging and discharging cycles. | 2012-08-23 |
20120212187 | System and Method for Applying Pulsation Energy to Online Battery Backup Systems - A method of applying pulsation energy to an online battery backup system including the steps of sampling at least one voltage sampling circuit to monitor a float voltage drop across the terminals of each battery unit within a plurality of battery units, selecting from among the plurality of battery units the unit having the greatest float voltage drop, operating a pulse generation circuit to apply pulsation energy across the terminals of only the selected battery unit, and ceasing to operate the pulse generation circuit in response to a predetermined trigger. A generally corresponding method may be performed on each battery cell within the plurality of battery units. Also, battery pulsation systems for an online battery backup system may include a pulse generation circuit and a controller for selectively applying pulsation energy across the terminals of a selected battery unit or battery cell. | 2012-08-23 |
20120212188 | SYSTEM AND METHOD FOR BATTERY CHARGING - A charging circuit includes an N-channel metal-oxide-semiconductor field-effect transistor (NMOSFET) that controls a charging current to a battery, a charge pump that generates a driving signal based on a plurality of pulses, and a resistor coupled to a gate of the NMOSFE. The resistor and a capacitance of the gate of the NMOSFET form a low pass filter. The driving signal is filtered by the low pass filter to control a gate voltage of the NMOSFET. A variation of a gate-source voltage of the NMOSFET is proportional to a pulse density of the plurality of pulses. A variation of the charging current flowing through the NMOSFET to the battery is proportional to the pulse density. | 2012-08-23 |
20120212189 | SYSTEM AND METHOD FOR ELECTRONIC DEVICE CHARGING - An electronic device which is able to be charged via a universal serial bus (USB) interface which connects to a computer. A first voltage of a battery of the electronic device, a second voltage and an electric current of the USB interface are determined. If a difference between the first voltage and a saturation voltage of the battery is greater than a predefined value, the electronic device is charged with a first electric current. If the second voltage is not lower than a threshold voltage and the electric current of the USB interface is not lower than the electrical energy consumption of the electronic device, the first electric current is decreased. | 2012-08-23 |
20120212190 | METHOD OF OPERATING A THERMOELECTRIC GENERATOR - A method for operating a thermoelectric generator supplying a variable-load component includes commanding the variable-load component to operate at a first output and determining a first load current and a first load voltage to the variable-load component while operating at the commanded first output. The method also includes commanding the variable-load component to operate at a second output and determining a second load current and a second load voltage to the variable-load component while operating at the commanded second output. The method includes calculating a maximum power output of the thermoelectric generator from the determined first load current and voltage and the determined second load current and voltage, and commanding the variable-load component to operate at a third output. The commanded third output is configured to draw the calculated maximum power output from the thermoelectric generator. | 2012-08-23 |
20120212191 | METHOD FOR CONTROLLING POWER FACTOR OF THREE-PHASE CONVERTER, METHOD FOR CONTROLLING REACTIVE POWER OF THREE-PHASE CONVERTER, AND CONTROLLER OF THREE-PHASE CONVERTER - In power conversion according to the three-phase converter, symmetrical component voltage values of a balanced system are calculated from wye-phase voltages on the three-phase AC input side of the three-phase converter. On the DC output side thereof, the power factor is set, an average active power value is calculated from an output voltage value and an output current value, and an average reactive power is calculated from the set power factor. On the basis of the symmetrical component voltage values, the average active power, and the active reactive power, a compensation signal for compensating for unbalanced voltages of the three-phase AC voltages and a control signal for controlling the power factor are generated, and according to the compensation signal and the control signal, a control signal for outputting DC is generated. | 2012-08-23 |
20120212192 | Switching Controller - A circuit is provided for providing a drive signal. The circuit comprises a live input and a neutral input, an output for providing a drive signal, a master logic gate. The first output is connected to the master logic gate output. A dc signal is connected to the input of the master logic gate so that the output of the master logic gate changes when the state of the input changes. A shunt is connected to the live input and is capable of being switched into and out of the circuit in response to the live input voltage changing from positive to negative with respect to the neutral input voltage and vice versa. The shunt is also arranged to provide a short circuit for the dc signal to bypass the input of the master logic gate. | 2012-08-23 |
20120212193 | POWER SUPPLY CIRCUITRY AND ADAPTIVE TRANSIENT CONTROL - A control circuitry can be configured to receive an error signal indicating a difference between an output voltage of the power supply and a desired setpoint for the output voltage. According to one configuration, depending on the error signal, the control circuitry initiates switching between operating the control circuitry in a pulse width modulation mode and operating the control circuitry in a pulse frequency modulation mode to produce an output voltage. Operation of the control circuitry in the pulse frequency modulation mode during a transient condition, such as when a dynamic load instantaneously requires a different amount of current, enables the power supply to satisfy current consumption by the dynamic load. Subsequent to the transient condition, the control circuitry switches back to operation in the pulse width modulation mode. | 2012-08-23 |
20120212194 | REFERENCE VOLTAGE CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A reference voltage circuit includes a first amplifier, a first load device and a first PN junction device, second and third load devices and a second PN junction device, an offset voltage reduction circuit, a coupling node potential takeout circuit, and an area adjustment circuit. The offset voltage reduction circuit is configured to reduce an offset voltage between the first and second input terminals at the first amplifier, and the coupling node potential takeout circuit is configured to take out potentials of the first and second coupling nodes. The area adjustment circuit is configured to adjust an area of the second PN junction device in accordance with the potentials of the first and second coupling nodes which are taken out by the coupling node potential takeout circuit. | 2012-08-23 |
20120212195 | CONTROL CIRCUIT, ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING POWER SUPPLY - A control circuit arranged in a power supply including first and second switches to control an output voltage of the power supply. The control circuit includes a first control circuit that switches the first and second switches in a complementary manner in accordance with a comparison result of a first reference voltage and a feedback voltage corresponding to the output voltage of the power supply. A first comparison circuit compares the output voltage or feedback voltage with a second reference value. A second comparison circuit compares a coupling point current flowing through a coupling point between the first and second switches with a third reference value. A second control circuit disables complementary switching of the first and second switches in accordance with an output signal from the first comparison circuit and enables the complementary switching in accordance with an output signal of the second comparison circuit. | 2012-08-23 |
20120212196 | SWITCHING POWER SUPPLY DEVICE, AC POWER SUPPLY DEVICE, AND IMAGE FORMING APPARATUS - A switching power supply device includes a switching power supply integrated circuit that includes a dead time generating unit that generates high-side and low-side drive signals having a dead time based on a PWM signal, a drive signal generating unit that generates first and second PWM signals based on the drive signals and a voltage of an output terminal, and a driver that includes high-side and low-side switch elements driven by the PWM signals; a filter that is connected to the output terminal; a first diode having a cathode connected to the source of the high-side switch element and an anode connected to the output terminal; and a second diode having a cathode connected to the source of the low-side switch element and an anode connected to the output terminal. The first and second diodes are arranged outside the switching power supply integrated circuit. | 2012-08-23 |
20120212197 | System and Method for Providing Power Via a Spurious-Noise-Free Switching Device - A method of generating spurious-noise-free power from a switching device. The method includes generating an oscillating signal in the form of a series of pulse trains, and randomly changing the switching frequency, or the on-time, or both the switching frequency and the on-time of the switching device. The method further includes causing the switching device to change from a first frequency to a second frequency only at the end of a pulse train of the first frequency, and causing the second frequency to start at the beginning of its first pulse train such that no switching duty-cycle disturbance at the time of the change from first to second frequency. In a particular embodiment, the method further generates spurious-noise-free power from a switching device by implementing a relationship between the different switching frequencies involved such that spurious-noise-free operation is achieved. | 2012-08-23 |
20120212198 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element. | 2012-08-23 |
20120212199 | Low Drop Out Voltage Regulator - A low dropout voltage regulator (LDO) is presented that takes into consideration short channel effects of the pass transistor in suppressing ripples that are present at the input node of the LDO from appearing at the output node of the LDO. A sum of the input ripple voltage and the input ripple voltage multiplied by a gain equal to the reciprocal of the intrinsic gain provided by the pass transistor is fed to the gate of the pass transistor. In one embodiment an adaptive stage is utilized to provide the sum to the gate of the pass transistor. The adaptive stage gain adapts to change changing load currents such that the gate voltage is maintained substantially equal to the sum. In another embodiment, the LDO is provided stability by using only on-chip capacitors. The LDO provides stable operation even at small load currents. | 2012-08-23 |
20120212200 | Low Drop Out Voltage Regulator - A low dropout voltage regulator (LDO) is presented that takes into consideration short channel effects of the pass transistor in suppressing ripples that are present at the input node of the LDO from appearing at the output node of the LDO. The LDO feeds the input ripple voltage to the gate of the pass transistor in such a way that the ripple currents through the pass transistor associated with both the transconductance and the output resistance of the pass transistor are suppressed. In one embodiment, the LDO is provided stability by using only on-chip capacitors. The size of on-chip capacitors is advantageously reduced by connecting a compensation capacitance to an internal node of an error amplifier. The LDO provides stable operation even at small load currents. The LDO also provides good suppression of ripples for a wide range of frequencies. | 2012-08-23 |
20120212201 | POWER SUPPLY APPARATUSES FOR PREVENTING LATCH-UP OF CHARGE PUMP AND METHODS THEREOF - A power supply apparatus and a power supply method are disclosed. The power supply apparatus may include an internal power supply including a first voltage generator configured to generate a first voltage based on a pulse width modulation control signal, a charge pump configured to receive the first voltage and generate a second voltage, and an inrush current controller configured to be connected between the charge pump and the internal power supply and configured to generate the pulse width modulation control signal based on a target signal and a selection reference voltage. | 2012-08-23 |
20120212202 | FEEDBACK TERMINAL OF POWER CONVERTER HAVING PROGRAMMING FUNCTION FOR PARAMETER SETTING - A control circuit of a power converter according to the present invention comprises a switching circuit, a sample-and-hold circuit and a current source. The switching circuit generates a switching signal in response to a feedback signal. The sample-and-hold circuit samples the feedback signal. The current source is coupled to a feedback terminal for generating a programming voltage. A programmable signal is generated in accordance with the programming voltage and the feedback signal, and the programmable signal is coupled to set a parameter. | 2012-08-23 |
20120212203 | METHOD AND APPARATUS FOR OPERATING A DC/DC CONVERTER - A method of operating a DC/DC converter in a continuous-conduction mode (CCM) or in a discontinuous-conduction mode (DCM) to produce an output voltage, the DC/DC converter setting a pulse width modulation in CCM based on a COMP signal that varies as a function of the output voltage, the method including capturing the COMP signal utilizing a digital-to-analog converter at a transition between CCM and DCM, and varying a frequency of operation of the DC/DC converter in DCM based on the captured COMP signal. | 2012-08-23 |
20120212204 | SYSTEM AND METHOD FOR IMPROVING REGULATION ACCURACY OF SWITCH MODE REGULATOR DURING DCM - A controller for a switch mode regulator with discontinuous conduction mode (DCM) correction which includes a correction network and a modulator. The correction network detects a low load condition indicative of regulation error during DCM and asserts an adjust value indicative thereof. The modulator receives the adjust value and adjusts operation accordingly to improve regulation during DCM. The correction network receives or determines a regulation metric, such as periods between successive pulses of a pulse control signal, or a current sense signal indicative of load current, and compares the regulation metric with one or more thresholds for determining the level of adjustment. Adjustment may be made using one or more methods, such as adjusting pulse on-time, adjusting pulse off-time, adjusting frequency of operation, etc. | 2012-08-23 |
20120212205 | CONTROL SYSTEM OF DC TO DC CONVERTER - A control system of a DC to DC converter skips switching pulses according to the output of an overvoltage protection circuit. The overvoltage protection circuit includes an overvoltage threshold voltage control section that lowers an overvoltage threshold voltage when the pulse width has a minimum valve. The control system both improves the output voltage accuracy of the DC to DC converter under a light load and promotes a quick return to normal operation after an overvoltage protection operation under a heavy load. | 2012-08-23 |
20120212206 | ELECTRONIC DEVICE FOR OPTIMIZING THE OUTPUT POWER OF A SOLAR CELL AND METHOD FOR OPERATING THE ELECTRONIC DEVICE - An electronic device for optimizing the output power of a solar cell, the electronic device having: a variable resistor coupled in series between the solar cell and a load, a control unit that is configured to control the variable resistor, a sensor for measuring an output voltage and a sensor for measuring the output current of the solar cell, wherein the control unit is configured to vary the resistance of the series resistor over time such that the first order derivative of the output voltage over time has a constant value, to monitor the second order derivative of the output current over time simultaneously, to detect whether the second order derivative of the output current over time exceeds a predetermined threshold value and to identify the corresponding values of the output voltage and current as a maximum power point (MPP) of the solar cell. | 2012-08-23 |
20120212207 | Bandgap Circuit and Complementary Start-Up Circuit for Bandgap Circuit - A bandgap circuit includes a bias current generating circuit and a complementary start-up circuit. The bias current generating circuit includes a first node and a second node and is arranged to generate a bias current in response to a voltage provided at the first node or a voltage provided at the second node. The complementary start-up circuit is arranged to start-up the bias current generating circuit and includes a first start-up circuit coupled to the first node and a second start-up circuit coupled to the second node. The first and second start-up circuits operate complementarily, so that the second start-up circuit provides the voltage to the second node when the first start-up circuit is unable to provide the voltage to the first node, and the first start-up circuit provides the voltage to the first node when the second start-up circuit is unable to provide the voltage to the second node. | 2012-08-23 |
20120212208 | Bandgap Reference Circuit with an Output Insensitive to Offset Voltage - A method includes generating a first current, wherein the first current flows through a first resistor and a first bipolar transistor. A first end of the first resistor is serially connected to an emitter-collector path of the first bipolar transistor, and a second end of the resistor is connected to an input of an operational amplifier. A second current is generated to flow through a second resistor that is connected to the input of the operational amplifier. An emitter of a second bipolar transistor is connected to a base of the first bipolar transistor, wherein a base and a collector of the second bipolar transistor are connected to VSS. The first and the second currents are added to generate a third current, which is mirrored to generate a fourth current proportional to the third current. The fourth current is conducted through a third resistor to generate an output reference voltage. | 2012-08-23 |
20120212209 | Controlling Resistance For Inline Power Powered Device Detection - An apparatus and method are provided for controlling circuit resistance values used for detection of a device in an inline powered system. The system comprises a source device, either a current source or a voltage source, associated with an inline power device. The system also comprises a resistance control circuit comprising a transistor having an emitter, a base and a collector, and a first resistor coupled between the emitter and the collector. In response to the resistance control circuit receiving a relatively low current from the source device, the transistor is configured to be in an off state so that current from the source device flows through the first resistor have a value selected in order to maintain a sufficient resistance during an inline power device detection mode. | 2012-08-23 |
20120212210 | ELECTRIC CIRCUIT CONNECTED TO THERMAL SWITCH WITH THREE TERMINALS AND SWITCH CONNECTING METHOD - An electric circuit connected to a thermal switch with three terminals and a method for connecting the switch are realized. In an electric circuit | 2012-08-23 |
20120212211 | POLYPHASE POWER DISTRIBUTION AND MONITORING APPARATUS - A polyphase power distribution and monitoring apparatus having sets of outputs for each phase of power and monitors for each phase of power disposed in the housing. Each monitor provides a visible display of current for an associated phase of power and an audible alarm for each phase of power if the current exceeds a predetermined value or falls below a predetermined value. In three-phase wye power systems, the apparatus preferably includes a neutral line monitor, Including a neutral line current display and audio alarm, for the neutral line of the wye power circuit. The apparatus preferably is lightweight, elongated, portable, and mountable to the side of an electronic equipment rack. It may also include additional power monitoring systems such as network power monitoring tools for remotely monitoring the apparatus. | 2012-08-23 |
20120212212 | VOLTAGE DETECTING CIRCUIT - In a voltage detecting circuit, a transistor is configured as a P-type MOSFET, and includes a source connected with an input terminal, a gate connected with a ground voltage terminal and a drain connected with an output terminal. A transistor is configured as a P-type MOSFET, and includes a gate and a source connected with the output terminal and a drain connected with the ground terminal. Gate width and gate length of the transistor and gate width and gate length of the transistor are adjusted so that source-drain current flowing between the source and the drain of the transistor becomes equal to source-drain current flowing between the source and the drain of the transistor when the voltage applied to the input terminal is set to be preset trigger voltage. This configuration accomplishes detecting that the input voltage exceeds the trigger voltage with simple configuration. | 2012-08-23 |
20120212213 | NON-INVASIVE ENERGY CONSUMPTION MONITORING - Devices, methods, and systems for non-invasive energy consumption monitoring are described herein. One or more device embodiments include a transformer configured to couple the device to a circuit conductor that is coupled to an additional device, a detection module configured to detect a change in a power signal over the circuit conductor, and a transmission module configured to transmit a unique signal associated with the additional device over the circuit conductor if the change in the power signal meets or exceeds a particular threshold. | 2012-08-23 |
20120212214 | METHOD AND SYSTEM OF A SENSOR INTERFACE HAVING DYNAMIC AUTOMATIC GAIN CONTROL - Embodiments of the invention described herein provide a magnetic sensor interface capable of adjusting signal conditioning dynamically such that the true positive and negative peaks of the input signal are maintained for a given target across its entire speed range (0-Max rpm), therefore increasing the signal to noise ratio at low speeds and avoiding clipping or distortion at high speeds. In one aspect, a method comprises receiving an alternating differential voltage signal from a sensor. The alternating differential voltage signal has an amplitude that changes over time. The alternating differential voltage signal is converted to an attenuated single-ended voltage signal that can be dynamically scaled. The attenuated single-ended voltage signal can be scaled by multiplying the attenuated single-ended voltage signal by a scaling factor. The scaling factor is selected relative to a signal-to-noise ratio of the scaled attenuated single-ended voltage signal. | 2012-08-23 |
20120212215 | METHOD AND APPARATUS FOR ESTIMATING ROTOR ANGLE OF SYNCHRONOUS RELUCTANCE MOTOR - Exemplary embodiments are directed to estimating a rotor angle of a synchronous reluctance motor. The motor has a stator and a rotor. A stator flux and a stator current are determined. Two orthogonal stator flux components in a stator reference frame are calculated from the stator flux. Two orthogonal stator current components in the stator reference frame are calculated from the stator current. Two rotor orientation vectors are then calculated using a known rotor direct and quadrature axis inductance components, the stator flux components, and the stator current components. A rotor angle is estimated based on the rotor orientation vectors. | 2012-08-23 |
20120212216 | CALIBRATABLE MAGNETIC FIELD SENSOR AND METHOD OF PRODUCING SAME - Magnetic field sensor having a vertical Hall sensor element arranged in a semiconductor substrate, and an exciting conductor arrangement having at least one exciting conductor, the exciting conductor being arranged within an exciting conductor plane which is spaced apart, in parallel to the substrate surface, from the vertical Hall sensor element at a vertical distance h | 2012-08-23 |
20120212217 | APPARATUS AND METHOD FOR SEQUENTIALLY RESETTING ELEMENTS OF A MAGNETIC SENSOR ARRAY - A semiconductor process and apparatus provide a high-performance magnetic field sensor with three differential sensor configurations which require only two distinct pinning axes, where each differential sensor is formed from a Wheatstone bridge structure with four unshielded magnetic tunnel junction sensor arrays, each of which includes a magnetic field pulse generator for selectively applying a field pulse to stabilize or restore the easy axis magnetization of the sense layers to orient the magnetization in the correct configuration. prior to measurements of small magnetic fields. The field pulse is sequentially applied to groups of the sense layers of the Wheatstone bridge structures, thereby allowing for a higher current pulse or larger sensor array size for maximal signal to noise ratio. | 2012-08-23 |
20120212218 | MAGNETORESISTIVE SENSOR - A magnetoresistive sensor is provided. Specifically, multiple layers of or single layer of conductor line are formed at the same level as an insulating layer on a substrate as a bottom conductive layer. A magnetoresistive structure is formed on the bottom conductive layer and has opposite first surface and second surface. The second surface faces toward the substrate and is contacted with the bottom conductive layer. Afterward, another insulating layer is formed on the first surface, a slot is formed at the same level as the another insulating layer and a conductor line is formed in the slot and contacted with the first surface, so that one layer or multiple layers of conductor line can be formed as a top conductive layer. A lengthwise extending direction of each of the bottom and top conductor layers is intersected a lengthwise extending direction of the magnetoresistive structure with an angle. | 2012-08-23 |
20120212219 | MAGNETIC SENSOR AND MANUFACTURING METHOD THEREOF - For each of electric current path units each including series-connected resistor elements, one end is electrically connected with power supply terminal Vcc, the other end is electrically connected with ground terminal GND, and connection portion between the resistor elements is electrically connected with output terminals Vo | 2012-08-23 |
20120212220 | ELECTRIC JUNCTION BOX AND CURRENT DETECTION DEVICE - An electric junction box includes a current detection device that has a magneto-electric conversion element and a magnetic core with a gap portion where the magneto-electric conversion element is disposed to detect magnetic flux occurring on the magnetic core as a current. The magnetic core has a conductor insertion portion through which the conductor subject to current detection is inserted. The conductor has a terminal portion to be connected to any other members, a round-shaped cross-sectional portion whose cross section perpendicular to an axial direction of the conductor is shaped like a circle and whose cross-sectional diameter is set equal to or less than an inner diameter of the conductor insertion portion, and a thin wall portion whose thickness is set equal to or less than a width size X of the gap portion. | 2012-08-23 |
20120212221 | Dipole Locator Using Multiple Measurement Points - A receiver and tracking system for identifying a location of a magnetic field source. In a preferred embodiment a plurality of tri-axial antennas are positioned at three distinct points on a receiver frame. Each antenna detects a magnetic field from a source and a processor is used to determine a location of the source relative to the frame using the antenna signals. Each tri-axial antenna comprises three windings in each of three channels defined by a support structure. The windings each define an aperture area. The windings have substantially identical aperture areas and have a common center point. The receiver may to display to the operator the relative location of the field source or may direct the operator to a spot directly above the field source. | 2012-08-23 |
20120212222 | SYSTEM AND METHOD FOR ENHANCED CONTRAST MR IMAGING - A system and method for enhanced contrast MR imaging include a computer programmed to perform a first scan of an imaging object based on a first fast spin echo (FSE) scan sequence comprising a first series of RF pulses having a first flip angle sequence to acquire a first MR data set and perform a second scan of the imaging object based on a second FSE scan sequence comprising a second series of RF pulses having a second flip angle sequence, wherein the second flip angle sequence is different from the first flip angle sequence to acquire a second MR data set. The computer is further programmed to generate a difference image based on the first and second MR data sets. | 2012-08-23 |
20120212223 | MAGNETIC RESONANCE IMAGING APPARATUS AND TWO-DIMENSIONAL EXCITATION ADJUSTMENT METHOD - An MRI apparatus and a two-dimensional excitation adjustment method capable of performing appropriately two-dimensional excitation of a region, in which materials with different resonance frequencies are present, according to imaging conditions are provided. In order to do so, when performing the two-dimensional excitation of a two-dimensional excitation region of an object formed by a first material with a first resonance frequency and a second material with a second resonance frequency, an irradiation frequency of a high-frequency magnetic field for the two-dimensional excitation is set on the basis of the imaging conditions related to the two-dimensional excitation and the first and second resonance frequencies so that desired regions of the first and second materials are excited in a two-dimensional manner. | 2012-08-23 |
20120212224 | SUSPENDED SUBSTRATE CIRCUITS AND NUCLEAR MAGNETIC RESONANCE PROBES UTILIZING SAME - A nuclear magnetic resonance (NMR) probe circuit assembly includes one or more probe circuits in signal communication with one or more respective sample coils configured for transmitting and/or receiving radio-frequency (RF) energy to and/or from a sample of interest. One or more of the probe circuits have a suspended substrate configuration in which variable capacitors share a common dielectric substrate that is separated from a ground plane by an air gap. Each variable capacitor includes an electrode that is movable by a user-actuated adjusting device. One or more of the probe circuits may have a multiply resonant or broadband configuration, and may have one or more individual channels. One or more of the variable capacitors enable tuning to resonant frequencies of selected nuclei. One or more other variable capacitors may enable impedance matching. | 2012-08-23 |
20120212225 | MAGNETIC RESONANCE IMAGING APPARATUS - A magnetic resonance imaging apparatus includes a bore configured to accommodate a subject therein, an RF coil positioned about the bore, and an RF shield positioned about the RF coil. The RF coil includes a first portion positioned adjacent a lower surface side of the bore and spaced a distance from the RF shield that is larger than a distance between a second portion of the RF coil and an upper surface side of the bore. | 2012-08-23 |
20120212226 | PRE-AMPLIFIER AND MIXER CIRCUITRY FOR A LOCATOR ANTENNA - A pre-amplifier circuit for connection to an antenna of a human-portable locator includes a differential amplifier/mixer pair and means for allowing a common-mode “phantom” signal to modulate a transfer function of the differential amplifier/mixer pair. The common-mode phantom signal modulates the transfer function of the differential pre-amplifier “onboard” the antenna without the usual requirement for onboard power supply and signal oscillator. This technique uses the same electronic components to provide both pre-amplification and mixing functions, thereby improving circuit performance-to-cost ratio, reducing mixer power consumption, situating the necessary signal oscillator remotely from the mixer, and greatly improving the available system bandwidth by limiting spectral transmission demands to the mixed signal bandwidth alone. | 2012-08-23 |
20120212227 | METAL DETECTOR TARGET DISCRIMINATION IN MINERALIZED SOILS - This invention relates to receive electronics of a metal detector for processing a received signal from a target in a soil, the receive electronics including: processing electronics for synchronous demodulating or sampling the received signal to produce at least two substantially ground balanced signals; processing electronics for processing the at least two substantially ground balanced signals to produce at least two substantially ground balanced processed signals, a first substantially ground balanced processed signal being more indicative of a spread of a time constant density spectrum of the received signal than a second substantially ground balanced processed signal, and the second substantially ground balanced processed signal being more indicative of an average time constant of the received signal than the first substantially ground balanced processed signal; and processing electronics for processing the at least two substantially ground balanced processed signals to produce an output signal indicative of at least the spread of the time constant density spectrum. | 2012-08-23 |
20120212228 | PORTABLE UNMANNED AIRSHIP FOR MAGNETIC-FORCE SURVEYING AND A MAGNETIC-FORCE SURVEYING SYSTEM EMPLOYING THE SAME - Disclosed are a portable unmanned airship for magnetic survey and a magnetic survey system using the same. The portable unmanned airship includes a fuselage using buoyancy of gas and propelled by motive power of the fuselage itself; an auto-flight unit automatically guiding the fuselage; a magnetometer disposed in the fuselage and measuring magnetic force of a stratum or a surface of the earth; a wireless communication unit transmitting magnetic data obtained by the magnetometer outside; and a control module controlling operations of the auto-flight unit and the magnetometer. With this configuration, it is possible to increase total operation time and a payload capacity of the unmanned airship. | 2012-08-23 |
20120212229 | AZIMUTHALLY SENSITIVE RESISTIVITY LOGGING TOOL - Various systems and methods for implementing an azimuthally sensitive resistivity logging tool are disclosed. One such method involves transmitting a primary magnetic field from one or more coils placed on a drill collar and receiving several electrical signals, where each of the electrical signals is received from a respective one of several sensors. The sensors are distributed around a circumference of a drill collar, and an axis of at least one of the sensors is perpendicular to an axis of the drill collar. Each of the electrical signals indicates a respective magnitude of a measurement of a reflected magnetic field, where the reflected magnetic field is reflected from an anomalous geological formation. The method calculates a vector measurement of the reflected magnetic field, based upon the electrical signals. | 2012-08-23 |
20120212230 | TESTING A SOLENOID OF A DIRECTIONAL CONTROL VALVE - A method of testing a solenoid of a directional control valve in a subsea hydrocarbon production system, the solenoid having a coil and an armature for operating the valve and the coil being energized by a drive voltage across it, the method comprises removing or reducing the drive voltage and sensing current through the coil to produce an indication of movement of the armature. | 2012-08-23 |
20120212231 | SWITCHING DEVICE - In a switching device with at least one first electrical switching device input and at least one first electrical switching device output and at least one second electrical switching device output, wherein in a first operating state of the switching device the first switching device input is electrically connected with the first switching device output, wherein in a second operating state of the switching device the first switching device input is electrically connected with the second switching device output, is proposed to configure the switching device for uninterrupted switchover from the first operating state to the second operating state and/or from the second operating state to the first operating state to allow functional testing of a fault current circuit breaker without interruption. | 2012-08-23 |
20120212232 | BUSBAR FOR BATTERY ELECTRODE POST CONNECTION AND BATTERY VOLTAGE MONITOR USING THE SAME - A busbar for battery electrode post connection with a terminal for voltage detection is provided. Both ends of a length direction of a rectangular thin plate of a conductive metal are left and an elongated opening is formed in a center. Two holes through which an electrode post of one battery and an electrode post of an adjacent battery are inserted are respectively formed in the rectangular thin plates of both sides around the elongated opening of the center. A terminal for voltage detection is extended integrally to the rectangular thin plate from an edge of the rectangular thin plate. The two holes overlap in a state of where the rectangular thin plate is folded in two with respect to the elongated opening. The terminal for voltage detection can be erected from the rectangular thin plate by folding the terminal for voltage detection in a vertical direction. | 2012-08-23 |
20120212233 | BATTERY TESTER - A battery tester determines a remaining level of charge of a battery mounted within a separate electronic device having an audio jack. The battery tester includes a plug and a circuit having a high impedance input amplifier. At least one electrical contact of the plug is electrically coupled to an input of the high impedance input amplifier. The plug is removably insertable within the audio jack such that the battery of the separate electronic device is electrically connected to the input of the high impedance input amplifier. When electrically coupled to the battery, an output of the high impedance input amplifier provides a signal proportional to the remaining level of charge of the battery, whereby the remaining level of charge of the battery is obtainable by the battery tester without having to remove the battery from the electronic device. | 2012-08-23 |
20120212234 | WATER ANALYSIS MEASUREMENT ARRANGEMENT - A water analysis measurement arrangement for determining a concentration of ions and/or ionic compounds in an aqueous medium includes a closed buffer solution housing comprising a pH buffer solution. The closed buffer solution housing is configured to communicate with the aqueous medium via an electrolyte bridge. A reference electrode is arranged in the closed buffer solution housing. An amplifier ground is disposed on a ground electrode and is configured to directly contact the aqueous medium. A high-impedance amplifier comprises a first capacitive element arranged between the reference electrode and the amplifier ground. An AC voltage generator is arranged between the amplifier ground and the ground electrode. A measurement electrode is configured to directly contact the aqueous medium. A redundant unit comprises a separate low-impedance redundant electrode arranged in the closed buffer solution housing and a high-impedance redundant electrode amplifier comprising a second capacitive element to the amplifier ground. | 2012-08-23 |
20120212235 | METHOD AND APPARATUS FOR DETECTING THE EXISTENCE OF A SAFETY GROUND - An apparatus including a test device for assessing the quality of a safety ground is provided. The test device is configured to receive an energy signal from a power source for charging a vehicle and to generate a first output signal in response to the first energy signal. The test device is further configured to measure a characteristic of the first output signal and to provide a test signal. The test device is further configured to generate a second output signal in response to providing the test signal and to measure a characteristic of the second output signal. The test device is further configured to assess the quality of a safety ground in at least one of the power source and the vehicle based on a difference between the characteristic of the first output signal and the characteristic of the second output signal. | 2012-08-23 |
20120212236 | TESTING DEVICE FOR COMPUTER CONNECTOR - A testing device is used to test the life of a connector of an electronic device. An external connector is plugged into the connector. The testing device includes a base, a fixing assembly for fixing the electronic device on the base, a driver, a pressing head driven by the driver and an adjusting assembly. The adjusting assembly is configured to adjust the position of the driver and the pressing head to align the pressing head with the external connector. | 2012-08-23 |
20120212237 | INTEGRATED SYSTEM INCLUDING SIGNAL ANALYSIS CIRCUIT - An integrated system is provided. The integrated system includes a control system and a signal analysis circuit configured to provide a test signal having a frequency to the control system, receive a feedback signal from the control system, and analyze the test signal and the feedback signal to generate a transfer function of the control system. | 2012-08-23 |
20120212238 | ON-CHIP MEASUREMENT OF AC VARIABILITY IN INDIVIDUAL TRANSISTOR DEVICES - An apparatus for determining alternating current (AC) delay variation of a transistor device under test includes a ring oscillator, the ring oscillator having the transistor device under test configured within a feedback path of the ring oscillator; and circuitry configured to measure a difference between a first signal delay path and a second signal delay path, the first signal delay path being between a gate terminal and a drain terminal of the transistor device under test, and the second signal delay path being between a source terminal and the drain terminal of the transistor device under test. | 2012-08-23 |
20120212239 | SYSTEM AND METHOD FOR ANALYZING TIMING OF SEMICONDUCTOR CHIP - Example embodiments relate to a method performed by an apparatus for analyzing time of a semiconductor chip. The method may include defining a netlist, defining time delays of devices defined in the netlist, performing a normality test using the time delays, judging a p-value based on the normality test, and determining a time delay of the semiconductor chip. | 2012-08-23 |
20120212240 | DETECTION OF A CONDUCTIVE OBJECT DURING AN INITIALIZATION PROCESS OF A TOUCH-SENSING DEVICE - A method and system for detecting a presence of a conductive object proximate to a capacitive sense element during an initialization process of a touch-sensing device. A reference sense element is calibrated to produce a sensing parameter value. A capacitance of a plurality of capacitive sense elements is measured based on the sensing parameter value, and compared to a baseline capacitance value stored in a non-volatile memory of the touch-sensing device. The presence of a conductive object proximate to a capacitive sense element is detected when a difference between the measured capacitance and the stored baseline capacitance value is greater than a threshold value. | 2012-08-23 |
20120212241 | INTERACTIVE PLAY SET WITH CAPACITIVE SENSORS - Embodiments of an interactive play set with capacitive sensors, the play set configured to detect human touch, the presence or identity of small play objects, and play sound effects in response thereof. In some embodiments, play sets have capacitive sensors that detect the presence of play objects with coplanar sensor pads and ground pads in various geometries. In some embodiments, play sets have capacitive sensors that identify particular play objects by detecting the presence or absence of conductive tabs at a plurality of tab locations on each of the play objects. | 2012-08-23 |
20120212242 | Graphene-Based Sensor - Sensors containing Graphene with Extended Defects are described. | 2012-08-23 |
20120212243 | Synthesized Current Sense Resistor for Wide Current Sense Range - A circuit has a first sense resistor circuit having components including a first-circuit active element to provide a sense resistance to sense a current in a load in series therewith, the sense resistance being established by an input command voltage. A second sense resistor circuit has components replicating the components of the first sense resistor circuit including a replicated active element, a resistance of the replicated active element also being established by the input command voltage. A precision resistor is coupled to the replicated active element to provide a load thereto. When the input command voltage establishes a voltage across the replicated active element, a voltage is established across the first-circuit active element in proportion thereto to command a desired current in the load. | 2012-08-23 |
20120212244 | Test Board and Method of Using Same - A test board is provided. The test board includes a test module configured to accommodate an integrated circuit (IC) device and first wirelessly enabled functional blocks located in the test module and configured to communicate with second wirelessly enabled functional blocks of the IC device. | 2012-08-23 |
20120212245 | CIRCUIT AND METHOD FOR TESTING INSULATING MATERIAL - An integrated circuit is disclosed. The integrated circuit includes an insulating material layer. The integrated circuit also includes a metal structure. Furthermore, the integrated circuit includes a via through the insulating material layer that is coupled to the metal structure for testing insulating material by applying dynamic voltage switching to two adjacent metal components of the metal structure. | 2012-08-23 |
20120212246 | METHOD AND APPARATUS FOR TESTING IC - A testing method includes measuring an electrical parameter of a device under test (DUT) and a corresponding temperature of the DUT one or more times, determining coefficients in a pre-constructed model based on a plurality of measured values of the electrical parameter and corresponding measured temperatures to characterize a relationship of the electrical parameter to the temperature, and determining a quality of the DUT based on the model and a limit value of the electrical parameter at a specified temperature. The model is pre-constructed to characterize the relationship of the electrical parameter to the temperature with the coefficients that are DUT-dependent variables. | 2012-08-23 |
20120212247 | TEST APPARATUS AND TEST METHOD - Provided is a test apparatus for testing a plurality of devices under test formed on a semiconductor wafer, including: a probe card to be connected to respective contacts of the plurality of the devices under test on a connection surface to be overlapped on the semiconductor wafer, the probe card being provided with a plurality of corresponding contacts on a rear surface of the connection surface; and a test head that tests the plurality of devices under test on the semiconductor wafer by sequentially connecting to each part of the plurality of contacts of the probe card. | 2012-08-23 |
20120212248 | Construction Structures and Manufacturing Processes for Integrated Circuit Wafer Probe Card Assemblies - Enhanced microfabricated spring contact structures and associated methods, e.g. such as for electrical contactors and interposers, comprise improvements to spring structures that extend from the substrate surface, and/or improvements to structures on or within the support substrate. Improved spring structures and processes comprise embodiments having selectively formed and etched, coated and/or plated regions, which are optionally further processed through planarization and/or annealment. Enhanced solder connections and associated processes provide a gap between substrates for componentry, and or improved manufacturing techniques using distributed spacers. Enhanced probe card assembly structures and processes provide improved planarization adjustment and thermal stability. | 2012-08-23 |
20120212249 | HARD AND WEAR-RESISTING PROBE AND MANUFACTURING METHOD THEREOF - The present invention relates to a hard and wear-resisting probe and manufacturing method thereof, and particularly relates to a hard and wear-resisting probe comprising tungsten steel (WC) and manufacturing method thereof. This hard and wear-resisting probe is substantially made of a tungsten steel with high hardness and wear resistance so that the probe is difficult to be worn and the lifetime of the probe is longer. Furthermore, the frequencies for changing the probe and the cost of testing are reduced, and the testing efficiency can be improved. | 2012-08-23 |
20120212250 | Semiconductor element testing system having air filter - A semiconductor element testing system having an air filter includes a testing apparatus, a first hollow frame, a fan assembly, a second hollow frame, and an air filter. The testing apparatus includes a housing having an opening. The first hollow frame is arranged on the housing and includes a flange, a bottom surface, and a side portion, wherein a plurality of hooks are fixedly arranged on the side portion. The fan assembly is fixed on the first hollow frame such that a forced airflow can be supplied toward inside of the housing. The second hollow frame includes an outer side portion fixedly arranged with a plurality of loop fasteners corresponding to the plural hooks. The air filter covers on the opening of the housing. Thereby, floating particles of the testing system can be reduced so as to lower the possibility of contamination for chips. | 2012-08-23 |
20120212251 | SIGNAL TRANSMISSION CIRCUIT DEVICE, SEMICONDUCTOR DEVICE, METHOD AND APPARATUS FOR INSPECTING SEMICONDUCTOR DEVICE, SIGNAL TRANSMISSION DEVICE, AND MOTOR DRIVE APPARATUS USING SIGNAL TRANSMISSION DEVICE - Disclosed is a signal transmission circuit device ( | 2012-08-23 |
20120212252 | Printed Circuit Board Registration Testing - A structure for determining misregistration of layers of a printed circuit board. A first conductive pattern is on a first layer of the printed circuit board. A second conductive pattern on a second layer of the printed circuit board. There is a hole through the first layer and the second layer of the printed circuit board. There is electrically conductive material in the hole. If the first layer and the second layer of the printed circuit board are registered properly, the first conductive pattern and the second conductive pattern are not electrically continuous with the conductive material in the hole. If either or both of the first layer and the second layer are a misregistered layer, the conductive trace on the misregistered layer is electrically continuous with the conductive material in the hole. | 2012-08-23 |
20120212253 | METHOD AND SYSTEM FOR IDENTIFYING COUNTERFEIT PROGRAMMABLE LOGIC DEVICES - A method for combating counterfeiting and tampering of integrated circuits includes the steps providing a programmable logic device, the programmable logic device including an arithmetic circuit implemented into the substrate, and constructing an arithmetic feedback oscillator using the arithmetic circuit. The step of constructing the arithmetic feedback oscillator includes incorporating a feedback loop into the arithmetic circuit and feeding output bits back into an input of the arithmetic circuit. The method also includes the step of selecting input values producing repeating values in a lesser order bit of a product of the arithmetic circuit when first and second input are applied to the arithmetic circuit and monitoring the lesser order bit and determining a predicted pattern. | 2012-08-23 |
20120212254 | SEMICONDUCTOR DEVICE HAVING CALIBRATION CIRCUIT FOR ADJUSTING OUTPUT IMPEDANCE OF OUTPUT BUFFER CIRCUIT - Disclosed herein is a device that includes a replica buffer circuit that drives a calibration terminal, a reference-potential generating circuit that generates a reference potential, a comparison circuit that compares a potential appearing at the calibration terminal with the reference potential, and a control circuit that changes an output impedance of the replica buffer circuit based on a result of a comparison by the comparison circuit. The reference-potential generating circuit includes a first potential generating unit activated in response to an enable signal and a second potential generating unit activated regardless of the enable signal, and an output node of the first potential generating unit and an output node of the second potential generating unit are commonly connected to the comparison circuit. | 2012-08-23 |
20120212255 | Logic Circuit, Integrated Circuit Including The Logic Circuit, And Method Of Operating The Integrated Circuit - The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value. | 2012-08-23 |
20120212256 | Mode Latching Buffer Circuit - A voltage translator circuit includes an input stage adapted for receiving an input signal referenced to a first voltage supply, a first latch circuit adapted for connection with a second voltage supply and operative to at least temporarily store a logic state of the input signal, and a voltage clamp coupled between the input stage and the first latch circuit. The voltage clamp is operative to set a maximum voltage across the input stage to a prescribed level. The voltage translator circuit generates a first output signal at a first output formed at a junction between the first latch circuit and the voltage clamp. A second latch circuit is connected to the first output in a feedback configuration. The second latch circuit is operative to retain a logical state of the first output signal as a function of at least a first control signal supplied to the second latch circuit regardless of a state of the first voltage supply. | 2012-08-23 |
20120212257 | BI-LAYER PSEUDO-SPIN FIELD-EFFECT TRANSISTOR - A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic. | 2012-08-23 |
20120212258 | TRIAC Dimmer Detection - Methods, circuits, and systems for determining the presence of a chopped input signal are disclosed. A digital signal generator can produce multiple digital signals when an alternating current (AC) signal input reaches multiple threshold voltages. The times at which the threshold voltages are reached can be determined by looking at the times at which the digital signals go high and low. The differences between the times at which the digital signals go high and low are used to determine if the AC signal input is a leading or trailing edge chopped signal. The AC input signal is a leading edge chopped signal when the difference between the times at which the digital signals go high is less than a predetermined time threshold, and is a trailing edge chopped signal when the difference between the times at which the digital signals go low is less than a predetermined time threshold. | 2012-08-23 |
20120212259 | COMPARATOR OF A DIFFERENCE OF INPUT VOLTAGES WITH AT LEAST A THRESHOLD - A comparator is configured to generate an output voltage representing the comparison between the absolute value of the difference between two input voltages with an adjustable reference voltage. The comparator includes an input differential amplifier, receiving the two input voltages and connected to an active load network controlled by a control voltage, a control circuit that generates the control voltage representing the adjustable reference voltage, and an output stage having a logic circuit configured to produce the output voltage of the comparator as a logic combination of the output voltages of the differential amplifier. | 2012-08-23 |
20120212260 | Dynamic Feedback-Controlled Output Driver with Minimum Slew Rate Variation from Process, Temperature and Supply - In examples, apparatus and methods are provided that mitigate buffer slew rate variations due to variations in output capacitive loading, a fabrication process, a voltage, and/or a temperature (PVT). An exemplary embodiment includes an inverting buffer having an input and an output, as well as an active resistance series-coupled with a capacitor between the input and the output. The resistance of the active resistance varies based on a variation in a fabrication process, a voltage, and/or temperature. The active resistance can be a passgate. In another example, a CMOS inverter's output is coupled to the input of the inverting buffer, and two series-coupled inverting buffers are coupled between the input of the CMOS inverter and the output of the inverting buffer. | 2012-08-23 |
20120212261 | CURRENT DRIVING CIRCUIT - A current driving circuit includes a constant current source circuit delivering a driving current to a load, and an output voltage difference amplifier circuit detecting a voltage change produced at a load driving end during a preset time period and delivering a current or a voltage corresponding to the voltage change to the load during a time period different from the preset time period. During first time period, capacitance circuit compares potential during a preceding time period to that during the current time period, and causes a potential at the load driving end during the current time period to store in any of capacitance elements depending on result of comparison. The amplifier circuit buffering an average value of the potential values stored in the capacitance elements during the second time period following the first time period, to deliver the average value to the load. | 2012-08-23 |
20120212262 | Driver Circuit for a Semiconductor Power Switch - A driver circuit for controlling a semiconductor power switch comprises a first power driver transistor and a second power driver transistor complementary to the first power driver transistor. Both power driver transistors have an output terminal connected to an input terminal of the semiconductor power switch. An input terminal of the second power driver transistor is connected to a half bridge circuit comprising a first pre-driver transistor and a second pre-driver transistor complementary to the first pre-driver transistor. Both first and second pre-driver transistors have an output terminal connected to the input terminal of the second power driver transistor. This provides fast switching times with low power consumption for the pre-driver transistors. | 2012-08-23 |
20120212263 | WAVEFORM GENERATION CIRCUIT - Waveform generation circuits are provided. A waveform generation circuit includes a waveform generation block configured to generate a waveform signal corresponding to a driving control signal, and a control signal generation block configured to generate the driving control signal to compensate the waveform signal for an environmental factor affecting the waveform generation circuit. | 2012-08-23 |
20120212264 | COARSE LOCK DETECTOR - A coarse lock detector for a delayed locked loop (DLL) is disclosed. The coarse lock detector includes multiple detection cells. Each detection cell receives a delayed clock phase and an output of a previous detection cell as inputs. To increase time for the output of the previous detection cell to propagate, the detection cells are arranged in groups such that the output from the previous detection cell is generated by a detection cell which is more than one detection cell previous. | 2012-08-23 |
20120212265 | DELAY CELL FOR CLOCK SIGNALS - An integrated circuit for delaying a clock signal using a delay cell is described. The integrated circuit includes a current starved inverter. The current starved inverter includes a switched capacitor current source with a first dummy inverter, a first amplifier coupled to the first dummy inverter and a first capacitor coupled to the first amplifier via a first switch. The current starved inverter also includes a first transistor coupled to the current source. The integrated circuit also includes a second capacitor. A delay applied to the clock signal is dependent on a ratio between the first capacitor and the second capacitor. The first capacitor and the second capacitor may be located in proximity such that process, voltage and temperature variations affect the first capacitor and the second capacitor similarly and the delay applied to the clock signal is independent of process, voltage and temperature variations. | 2012-08-23 |
20120212266 | ADPLL CIRCUIT, SEMICONDUCTOR DEVICE, AND PORTABLE INFORMATION DEVICE - The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation. | 2012-08-23 |
20120212267 | Circuit for Clamping Current in a Charge Pump - A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump. | 2012-08-23 |
20120212268 | PHASE CONTROL CIRCUIT - A phase control circuit includes a first duty cycle correction circuit configured to correct a duty cycle of a clock signal; a delay locked loop configured to perform delay locking of an output signal of the first duty cycle correction circuit; and a second duty cycle correction circuit configured to correct a duty cycle of an output signal of the delay locked loop, wherein the first duty cycle correction circuit and the second duty cycle correction circuit are selectively activated depending upon an operating condition. | 2012-08-23 |
20120212269 | SINGLE-INVERSION PULSE FLOP - A single inversion pulse flop includes a critical evaluation path with a single inverter and a storage feedback loop arranged in parallel with the critical evaluation path. The single inversion pulse flop incurs a single inversion delay and does not require an output buffer. | 2012-08-23 |
20120212270 | SIGNAL TRANSMISSION CIRCUIT AND SWITCH DRIVING DEVICE USING THE SAME - A signal transmission circuit is provided, which includes a level shifting circuit performing level shifting on an input signal and then outputting the input signal, but which can inhibit the output of an erroneous signal caused by the voltage change of the power source. The level shifting circuit, for individually performing level shifting on a first input signal and a second input signal, and outputting the first input signal and the second input signal as a first shifted signal and a second shifted signal respectively, comprises a first series circuit having a switching element switched according to the first input signal and a resistor, a second series circuit having a switching element switched according to the second input signal and a resistor, and a counter-current preventing portion for preventing a reverse current from flowing from the ground terminal toward the first series circuit and the second series circuit. | 2012-08-23 |
20120212271 | DUAL-TRIGGER LOW-ENERGY FLIP-FLOP CIRCUIT - One embodiment of the present invention sets forth a technique for technique for capturing and storing a level of an input signal using a dual-trigger low-energy flip-flop circuit that is fully-static and insensitive to fabrication process variations. The dual-trigger low-energy flip-flop circuit presents only three transistor gate loads to the clock signal and none of the internal nodes toggle when the input signal remains constant. One of the clock signals may be a low-frequency “keeper clock” that toggles less frequently than the other two clock signal that is input to two transistor gates. The output signal Q is set or reset at the rising clock edge using separate trigger sub-circuits. Either the set or reset may be armed while the clock signal is low, and the set or reset is triggered at the rising edge of the clock. | 2012-08-23 |
20120212272 | SEMICONDUCTOR DEVICE HAVING PLURAL PENETRATION ELECTRODES PENETRATING THROUGH SEMICONDUCTOR SUBSTRATE AND TESTING METHOD THEREOF - Disclosed herein is a device that includes first and second current paths, first and second latch circuits electrically connected to the first and second current paths, respectively, a driver circuit supplying first data to the first latch circuit, and supplying second data representing a logical value opposite to a logical value of the first data to the second latch circuit, a control circuit controlling the driver circuit to be alternately and repeatedly in a first period in which the driver circuit supplies the first data to the first latch circuit and does not supply the second data to the second latch circuit, and in a second period in which the driver circuit supplies the second data to the second latch circuit and does not supply the first data to the first latch circuit, and a monitor circuit. | 2012-08-23 |
20120212273 | SYNCHRONOUS SIGNAL GENERATING CIRCUIT - A synchronous signal generating circuit. The synchronous signal generating circuit includes a delay locked loop (DLL), an emulator and a multiplexer. The DLL is operative to delay a reference clock signal according to a count value to generate a first output clock signal. The count value is generated according to phase difference between the first output clock signal and the reference clock signal. The emulator is operative to provide a function of the DLL and includes a programmable delay line which is operative to receive the reference clock signal and a reference count value, wherein the reference clock signal is delayed according to the reference count value to generate a second output clock signal. The multiplexer is operative to receive the first and second output clock signal and selectively output the first or second output clock signal. The first output clock signal is outputted in a first mode and the second output clock signal is outputted in a second mode. | 2012-08-23 |
20120212274 | DEVICE FOR CAPTURING AND TRANSFERRING A MEASURED VALUE, SERIES CONNECTION, SYSTEM FOR CAPTURING AND TRANSFERRING MEASURED VALUES, AND HOUSEHOLD APPLIANCE - A device includes a logic circuit having first, second, and third input ports, a first output port, and a feedback path between the first output port and the third input port. In a first operating state, a logic state change at the first input port triggers a logic state change at the first output port, but a logic state change at the third input port does not trigger a logic state change at the first output port. This allows signals to be routed through the device. In a second operating state, a logic state change of the third input port triggers a logic state change of the first output port. This change is fed back, delayed by a time value, to the third input to maintain an oscillation with at least two edges. The frequency of this oscillation is used to determine a value of a measurement variable. | 2012-08-23 |
20120212275 | Gate Driving Circuit - A gate driving circuit includes a first clock generator to output n output control clock pulses having different phases; a second clock generator to create m*n output clock pulses having different phases and partially overlapped with one another in high periods thereof, to arrange the m*n output clock pulses in sequence of phase, to bind the m*n output clock pulses arranged in sequence of phase in units of n to generate m groups, each of which has n output clock pulses, and to output the m*n output clock pulses so that a rising edge of an output clock pulse having a k-th sequence of phase included in each group is located in a high period of an output control clock pulse having a k-th sequence of phase among the n output control clock pulses; and a shift register sequentially outputting a plurality of scan pulses. | 2012-08-23 |
20120212276 | INPUT CURRENT SHAPING FOR TRANSITION AND DISCONTINUOUS MODE POWER CONVERTER - A power converter operable to draw an input current that is in phase with an input voltage of the power converter and proportional to a voltage of the input voltage of the power converter includes a drive switch, a waveform generator, and a current shaping circuit. The drive switch is connected between an input inductor and ground and draws current through the input inductor when turned on. The current shaping circuit provides an on-time of the drive switch for a next cycle of the drive switch as a function of an input current decay time, a switching period of the waveform generator, and an output voltage of the power converter. The waveform generator is responsive to the on-time provided by the current shaping circuit for selectively turning the drive switch on and off to cycle the drive switch as a function of the received on-time. | 2012-08-23 |
20120212277 | METHOD AND SYSTEM OF A SENSOR INTERFACE HAVING DYNAMIC AUTOMATIC GAIN CONTROL DEPENDENT ON SPEED - Embodiments of the invention described herein provide a magnetic sensor interface capable of adjusting signal conditioning dynamically using a speed signal of a target such that the true positive and negative peaks of the input signal are maintained for the given target across its entire speed range (0-Max rpm), therefore increasing the signal to noise ratio at low speeds and avoiding clipping or distortion at high speeds. In one aspect, a method comprises receiving an alternating differential voltage signal from a sensor. The differential voltage signal has an amplitude that changes relative to a change in speed of a target. The alternating differential voltage signal is converted to an attenuated single-ended voltage signal that can be dynamically scaled. The attenuated single-ended voltage signal can be scaled by multiplying the attenuated single-ended voltage signal by a scaling factor. The scaling factor is selected relative to the speed signal and is selected relative to a signal-to-noise ratio of the scaled attenuated single-ended voltage signal. | 2012-08-23 |
20120212278 | Pseudo Digital Gain Control for Broadband Tuner - A digital level control circuit, such as an Automatic Gain Control, includes a plurality of digitally selectable signal levels with transitions between levels gradually varied to avoid signal output level discontinuities. An up/down counter may be used to incrementally stepwise transition an output signal between the digitally selectable output levels. Stepwise application of a control signal to the appropriate switching elements (e.g., FETs) forming an attenuator circuit may be implemented to moderate a switching time of the switching elements to provide a more gradual transition between element operating states. A deglitch circuit may be employed to latch the switching elements to achieve the desired state at the end of a desired switching transition period. | 2012-08-23 |
20120212279 | Threshold Voltage Detection Apparatus - A threshold voltage detection apparatus comprises a voltage level up-shifter and a voltage level down-shifter. The threshold voltage detection apparatus is placed at a circuit fabricated in a low voltage semiconductor process. The threshold voltage detection apparatus receives an input signal having a wide range and generates output signals comprising the logic of the input signal, but having a voltage range suitable for the low voltage circuit. The threshold voltage detection apparatus ensures that the low voltage circuit operates in a range to which the low voltage semiconductor process is specified. | 2012-08-23 |
20120212280 | IMPLEMENTING DUAL SPEED LEVEL SHIFTER WITH AUTOMATIC MODE CONTROL - A method and circuit for implementing a dual speed level shifter with automatic mode control, and a design structure on which the subject circuit resides are provided. A low speed level shifter and a high speed level shifter are used to provide a wide frequency range of operation. The circuit operates in one of a low speed mode or a high speed mode. The appropriate mode is selected automatically by detecting the frequency of the signal to be level shifted. When the incoming signal is slower than a reference frequency, the low speed level shifter is selected, and when the incoming signal is faster than the reference frequency, the high speed level shifter is selected. | 2012-08-23 |
20120212281 | LEVEL SHIFTER - A level shifter is provided. The level shifter includes a signal converter connected to an external power source and a ground, first and second output terminals connected to the signal converter, the first and second output terminals being configured to output a bias voltage applied from the external power source, and a switching unit configured to switch a connection state of the signal converter according to an input signal to adjust output voltage values of the first and second output terminals, the switching unit including first and second transistors, the first transistor being of a type that is different from a type of the second transistor, the first and second transistors being connected to each other in series between an input terminal, to which an input signal is applied, and the external power source, gates of the first and second transistors being commonly connected to the second output terminal. | 2012-08-23 |
20120212282 | METHODS, CIRCUITS AND SYSTEMS FOR MODULATING SUPPLY VOLTAGE TO A POWER AMPLIFIER - Disclosed are methods, circuits and systems for modulating supply voltage to a power amplifier. An input voltage signal may be received and used to drive a switching regulator (or the like), which regulator may be adapted to modulate (convert) battery supply voltage into a supply voltage of an amplifier. An output signal combining stage may include a signal combiner which may be adapted to combine a modulated battery supply voltage (i.e. modulated by the input voltage) with a residual error correction signal (RECS). The residual error correction signal may be based on an estimate of the switching regulator characteristics. The estimate may be at least partially based on feedback from an output of the regulator. The estimate may be at least partially based on a prediction model of the switch regulator. | 2012-08-23 |