34th week of 2009 patent applcation highlights part 26 |
Patent application number | Title | Published |
20090207598 | LOCKING CONNECTOR FOR LIGHTING SYSTEM - The present invention is directed to lighting systems and illumination devices, and more particularly to a removable handle and battery pack for a portable lighting system that produces a high intensity beam of light in the visible and infrared spectral regions that can be used for non-covert and ultra-covert operations. The battery pack includes a 360 degree ballast connector, a locking, water-proof, recharge connector and plug, and a four-function back switch. The battery pack fits tightly into the redundantly sealed, water-proof handle, which includes a specially designed knurling system around the handle to improve a user's comfort and grip during extreme conditions and a rotatable D-ring connecter that locks in place and provides covert sound protection. The 360 degree ballast connector connects to a number of sealed connectors formed within a sealed ballast assembly. | 2009-08-20 |
20090207599 | REDUCED NOISE CONNECTOR ASSEMBLY - The present invention is directed to lighting systems and illumination devices, and more particularly to a removable handle and battery pack for a portable lighting system that produces a high intensity beam of light in the visible and infrared spectral regions that can be used for non-covert and ultra-covert operations. The battery pack includes a 360 degree ballast connector, a locking, water-proof, recharge connector and plug, and a four-function back switch. The battery pack fits tightly into the redundantly sealed, water-proof handle, which includes a specially designed knurling system around the handle to improve a user's comfort and grip during extreme conditions and a rotatable D-ring connecter that locks in place and provides covert sound protection. The 360 degree ballast connector connects to a number of sealed connectors formed within a sealed ballast assembly. | 2009-08-20 |
20090207600 | REMOVABLE HANDLE AND BATTERY PACK FOR LIGHTING SYSTEM - The present invention is directed to lighting systems and illumination devices, and more particularly to a removable handle and battery pack for a portable lighting system that produces a high intensity beam of light in the visible and infrared spectral regions that can be used for non-covert and ultra-covert operations. The battery pack includes a 360 degree ballast connector, a locking, water-proof, recharge connector and plug, and a four-function back switch. The battery pack fits tightly into the redundantly sealed, water-proof handle, which includes a specially designed knurling system around the handle to improve a user's comfort and grip during extreme conditions and a rotatable D-ring connecter that locks in place and provides covert sound protection. The 360 degree ballast connector connects to a number of sealed connectors formed within a sealed ballast assembly. | 2009-08-20 |
20090207601 | KNURLED HANDGRIP FOR PORTABLE DEVICE - The present invention is directed to lighting systems and illumination devices, and more particularly to a removable handle and battery pack for a portable lighting system that produces a high intensity beam of light in the visible and infrared spectral regions that can be used for non-covert and ultra-covert operations. The battery pack includes a 360 degree ballast connector, a locking, water-proof, recharge connector and plug, and a four-function back switch. The battery pack fits tightly into the redundantly sealed, water-proof handle, which includes a specially designed knurling system around the handle to improve a user's comfort and grip during extreme conditions and a rotatable D-ring connecter that locks in place and provides covert sound protection. The 360 degree ballast connector connects to a number of sealed connectors formed within a sealed ballast assembly. | 2009-08-20 |
20090207602 | LINEAR LIGHTING SYSTEM - A linear light system, and a linear luminaire used in the system, for lighting a traffic surface. The linear luminaire has a plurality of light emitting diodes (LEDs) disposed in a linear matrix along the length of the traffic surface, and a plurality of refractive lenses for directing the emitted light from the LEDs at the traffic surface. The traffic surface is typically the roadway of a tunnel. A refractor lens is used to direct the emitted light from the LEDs predominantly toward at least the traffic surface. | 2009-08-20 |
20090207603 | Retrofit Light Assembly - Retrofit systems for replacing the outdated components of an existing light fixture. The retrofit systems may utilize the previously installed housing of the existing light fixture. The retrofit systems include brackets that are positioned on the ends of the housing. The positioning of the brackets is based off of the ceiling, t-grid, or the bottom of the housing. Lamp sockets with associated lamps, an optional ballast tray with associated ballast, reflector(s), lamps, and a shielding mechanism are all mounted on, and their position in the housing dictated by, the mounting brackets. Thus, regardless of the depth of the housing, the lamps are positioned a uniform distance from the ceiling opening to create consistent light distribution. Moreover, because these components are not directly attached to the housing, their dimensions need not precisely match those of the housing. Rather, the retrofit system can be installed in housings of varying sizes and shapes. | 2009-08-20 |
20090207604 | Virtual single light source having variable color temperature with integral thermal management - A lamp that allows a user to adjust parameters to control emitted white light, specifically quality, intensity and color temperature. Under such control, the lamp can match, complement, or augment ambient or available natural or artificial light. In specific embodiments, the lamp uses high power, high CRI, white LED sources; integral thermal management that also functions as LED structural support; integral optics (secondary lenses) with accommodation for diffusing elements; and manually responsive controls. | 2009-08-20 |
20090207605 | STAGGERED LED BASED HIGH-INTENSITY LIGHT - A high intensity LED based lighting array for use in an obstruction light with efficient uniform light output is disclosed. The high intensity LED based lighting array has a first concentric ring having a plurality of reflectors and light emitting diodes. The concentric ring has a planar surface mounting each of the plurality of reflectors in perpendicular relation to a respective one of the plurality of light emitting diodes. A second concentric ring is mounted on the first concentric ring. The second concentric ring has a second plurality of reflectors and light emitting diodes. The second concentric ring has a planar surface mounting each of the plurality of reflectors in perpendicular relation to a respective one of the plurality of light emitting diodes. The second plurality of reflectors and light emitting diodes are offset from the reflectors and light emitting diodes of the first concentric ring. | 2009-08-20 |
20090207606 | ILLUMINATION DEVICE - An illumination device includes at least one solid-state light source, a thermoelectric cooler, a heat dissipation device and a first metal film. The thermoelectric cooler has a cold end and a hot end, and the cold end thermally contacts the solid-state light source. The heat dissipation device thermally contacts the hot end of the thermoelectric cooler. The first metal film is formed on the hot end of the thermoelectric cooler and is sandwiched between the heat dissipation device and the hot end of the thermoelectric cooler. | 2009-08-20 |
20090207607 | SCREW-IN LED LIGHT AND SOUND BULB - A combination light and sound producing fixture and combination screw-in light with speakers element is disclosed where the fixture is installed in a wall or ceiling or on a wall or ceiling. The light bulb/speaker can be screwed or secured into a standard light bulb socket. The sound producing elements is a coaxial arrangement of speakers having a low frequency transducer and one or more high frequency transducers that can be directed to emit sound in a particular direction. The fixture or bulb may further include digital signal processing to modify the sound to account for obstructions in or near the fixture. The surface of the sound transducer can be reflective in nature to provide focusing or diffusion of the light from the lighting elements. The lighting elements are incandescent, fluorescent or low voltage LED type that may include adjustment for lighting intensity and color. | 2009-08-20 |
20090207608 | LIGHTING DEVICE - A lighting device ( | 2009-08-20 |
20090207609 | LED Socket and Replaceble LED Assemblies - Socket arrangements for releasably mounting LEDs and light fixtures or assemblies employing such sockets are described. The socket arrangements facilitate the replacement of LEDs to replace an original LED with a brighter replacement, to change the color of the LED, to replace a single LED with a multiple chip LED, to replace a damaged or burned out LED with a new one, or the like. In further assemblies with plural LEDs, the use of ready release sockets facilitates selective replacement of an LED or LEDs and greatly enhances the flexibility of such units. | 2009-08-20 |
20090207610 | COMBINATION REAR LIGHTING SYSTEM - A lighting system that includes a common optical system to achieve both rear fog and rear position or tail functions is disclosed, the lighting system including a light guide having a first side and a second side, the first side of the light guide having a plurality of optical devices formed therein; a first light source disposed adjacent one of the optical devices, wherein the optical device reflects and substantially collimates light rays emitted from the first light source through the light guide and into a first desired lighting pattern; and a second light source disposed adjacent one of the optical devices, wherein the optical device reflects and substantially collimates light rays emitted from the second light source through the light guide and into a second desired lighting pattern. | 2009-08-20 |
20090207611 | Lighting Device - A lighting device comprises a support or base having ferromagnetic features; one or more fixing elements reversibly associable to the support by means of magnetic attraction; a structure for supporting and/or shielding one or more luminous source. The structure is stably associable to the support or base by means of the fixing elements, fixed to the support or base according to different configurations. | 2009-08-20 |
20090207612 | Light bar - A light bar has several modular light source heads which may contain different types of light sources as well as different technologies mounted in cages by shock absorbing grommets. The cages are mounted on a bottom member so that the heads can be arranged along opposite sides and the ends of the bottom members. The heads are captured, and assembled with the bottom member, by a top member which also captures translucent or transparent members or lenses along the sides of the light bar and, transparent or translucent end caps which may also provide lenses for the light source heads at the ends of the bar. The end caps are removably connected to the top and bottom members at the ends of the bar by screws extending through the end caps. The light source modules have the same wiring connected thereto by connectors from a connector board to connectors along the back ends of the light source heads. The top member is attached to posts extending from the bottom member by screws so as to enable removal of the top member to expose the light source modules. The modules at the end of the light bar are exposed upon removal of the end caps thereby permitting the light source modules to be installed, removed for servicing, and the interchange of different modular heads to obtain a desired compliment of light sources, which may be of different types and technologies, or may not be installed if desired to meet customers' orders. | 2009-08-20 |
20090207613 | LIGHT SOURCE SYSTEM, LIGHT SOURCE DEVICE, AND METHOD OF CONTROLLING LIGHT SOURCE - Light intensity may be locally increased in light intensity distribution without increasing number of light sources or drive current. A light source system includes a light source, and a diffusion unit varying diffusibility in incident light so that light intensity in a light intensity distribution in a plane, resulted from light emitted from the light source, is locally enhanced. | 2009-08-20 |
20090207614 | ILLUMINATING DEVICE WITH ADJUSTABLE ILLUMINATION RANGE - An illuminating device includes a housing, a light source module, and a plurality of replaceable optical elements. The light source module is positioned in the housing for emitting light having an initial illumination range. The optical elements are configured for respectively converting the initial illumination range into different outputting illumination ranges, each of the optical elements is selectively detachably mountable to the housing for achieving a desired illumination range. | 2009-08-20 |
20090207615 | UNI-PLANAR FOCAL ADJUSTMENT SYSTEM - A uni-planar focal adjustment system involving no reflector housing rotation for use in high-intensity discharge (HID) lighting systems. A simple mechanical drive system allows a user to manually adjust the focal point by turning a focal adjustment ring, which in turn moves a HID lamp assembly back and forth along an optical axis relative to a stationary reflector. The system utilizes only linear motion along the optical axis and does not involve rotational reflector movement. The system allows for a significantly smaller reflector through-hole, which increases the percentage of HID generated light capable of being reflectively used in the focused light beam. A smaller through-hole also improves heat management, as less HID generated light passes through the through-hole into ballast portions of the lighting system. Furthermore, user safety is improved because focal adjustment does not involve a user physically handling and/or rotating a hot reflector housing. Finally, the focal adjustment system allows for separation of the HID lamp assembly inductor/igniter coil from the remaining ballast circuit board components, thereby further improving heat management of the lighting system, while maintaining the optimum alignment of the lamp in regards to the parabolic optic (even after rapid “in-field replacement”) and increasing light production efficiency. | 2009-08-20 |
20090207616 | LIGHT FIXTURE FOR ILLUMINATING BUILDING SURFACES - A light fixture ( | 2009-08-20 |
20090207617 | LIGHT EMITTING DIODE (LED) CONNECTOR CLIP - An LED package holder for holding and electrically connecting an LED package. The LED package holder includes a housing having an aperture defined therein and portions defining a recess. A plurality of contact features are retained by the housing and extend into the aperture. Each contact feature has an exposed portion configured to engage an LED electric terminal of an LED package that is received within the aperture. A heat sink, also retained by the housing, is at least partially located within the recess of the housing and configured to draw heat away from the LED package received within the aperture. | 2009-08-20 |
20090207618 | LIGHT SOURCE APPARATUS, IMAGE DISPLAY APPARATUS, AND MONITOR APPARATUS - A light source apparatus includes: a light emitting element including a plurality of light emitting modules; a resonator; a transmitting-reflecting module which, being provided in an optical path between the light emitting element and the resonator, reflects one portion of light traveling from the resonator, and transmits another one portion; a current supply module; and at least one wiring module which connects the current supply module and the light emitting element, wherein a normal of a surface of the transmitting-reflecting module on which the light from the resonator falls incident is tilted in a specific direction relative to a main beam of a light flux which travels between the transmitting-reflecting module and the resonator, and at least one of the wiring modules is provided on a side of the light emitting modules opposite to a side of the specific direction. | 2009-08-20 |
20090207619 | LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF - Disclosed are a light emitting device and a method for manufacturing the same. The light emitting device includes a substrate having a lead frame, a light emitting diode mounted on the substrate, a mold member formed on the substrate and the light emitting diode, and a reflecting member having an opening portion at one side thereof and being inclined at an outer portion of the mold member. | 2009-08-20 |
20090207620 | LIGHTING APPARATUS - A lighting apparatus according to the present invention includes: a voltage supply unit which supplies voltage; and a plurality of solid state light emitting devices which emit light using the voltage supplied by the voltage supply unit. The plurality of solid state light emitting devices are series-connected, the voltage supplied by the voltage supply unit is applied to the plurality of solid state light emitting devices which are series-connected, and the voltage supplied is set to a voltage such that a current flowing through each of the plurality of solid state light emitting devices is equal to or less than 1/N of the maximum rated current, where N is a number equal to or greater than 2. | 2009-08-20 |
20090207621 | System and method for illumination of levitating bodies - A system is provided for illuminating a levitating body, the system may include a base that has a light source, and a body that levitates over the base. The levitating body may have a bottom surface and an upper surface. The bottom surface may have at least one aperture to receive light from the stationary body. The levitating body may have internal transmissive surfaces to reflect and scatter the light throughout the levitating body to produce visual decorative displays. | 2009-08-20 |
20090207622 | LIGHTING SYSTEM - A lighting system is provided that includes: an optical device including a cylindrical lens made up of a liquid lens, an emission unit including an axis line in the Z-axis direction, and a reflecting mirror configured to reflect light emitted from the emission unit. The cross-sectional shape of a light reflecting portion when cutting away the reflecting mirror at a virtual plane perpendicular to the Z axis is a part of a parabola. The axis line of the emission unit is positioned between the vertex-of the parabola and a focal point. Thus, there is provided a lighting system in which an optical device, which is made up of a liquid lens employing an electrowetting phenomenon, having an arrangement and configuration whereby high optical power can be obtained. | 2009-08-20 |
20090207623 | Built-in light fixture - The present invention relates to a built-in light fixture to be fitted in a suspended ceiling or similar, with a mounting ring ( | 2009-08-20 |
20090207624 | HEADLIGHT ASSEMBLY PERMITTING COMPENSATION FOR VISIBILITY CHANGES - In a device including a headlight assembly that outputs a beam of light and a lens housing mountable at a forward end of the headlight assembly, an arrangement, receivable on the lens housing, renders the beam of light adaptable to different weather and lighting conditions. In a preferred form, the arrangement includes a plurality of interchangeable filter elements, such as green, blue, yellow, and red elements, that are alternatively receivable on the lens housing, A wide angle lens could also be included among the interchangeable filter elements. The device as a whole could be provided in the form of a packaged collection of elements adapted for subsequent assembly. | 2009-08-20 |
20090207625 | VEHICLE LIGHTING FIXTURE AND METHOD - A lighting fixture for use with a vehicle can switch a plurality of functions (for example, a fog lamp function and a cornering lamp function) without depending on a mechanical action. The lighting fixture can be mounted on a vehicle and can include a first light source, a second light source, and a first reflecting surface which can reflect light emitted by the first light source to form a first light distribution pattern when the first light source is turned on and can reflect light emitted by the second light source to form a second light distribution pattern different from the first light distribution pattern when the second light source is turned on. | 2009-08-20 |
20090207626 | HEADLAMP ASSEMBLY FOR VEHICLES - Provided is a headlamp assembly for vehicles. The headlamp assembly includes: a plurality of lamp modules on each of which a light-emitting device is mounted and each of which has a heat-dissipation structure for dissipating heat generated by the light-emitting device; and a support bracket which supports the lamp modules, wherein at least one of the lamp modules supported by the support bracket can be aimed individually with respect to the support bracket. | 2009-08-20 |
20090207627 | FIBER OPTIC TAIL LIGHT SYSTEM - A fighting system comprising: a light harness; and a fiber optic light pipe having a body with an outer diameter, and a jacket that substantially covers the entire length thereof between a proximal and distal end about the outer diameter; where said proximal end is cooperatively connected to said light harness; said second end is cooperatively connected to a diverging lens yielding an output of light. | 2009-08-20 |
20090207628 | LED Device with Re-Emitting Semiconductor Construction and Coverging Optical Element - A light source is provided comprising an LED component having an emitting surface, which may comprise: i) an LED capable of emitting light at a first wavelength; and ii) a re-emitting semiconductor construction which comprises a second potential well not located within a pn junction having an emitting surface; or which may alternately comprise a first potential well located within a pn junction and a second potential well not located within a pn junction; and which additionally comprises a converging optical element. | 2009-08-20 |
20090207629 | PLANAR ILLUMINATING DEVICE AND DISPLAY APPARATUS - In order to realize a thin and simple-structured planar illuminating device which is capable of carrying out the regional light control, a backlight module | 2009-08-20 |
20090207630 | Planar illumination device - More efficient radiation of heat from a point-like light source is enabled, and thinning is promoted, while higher and more uniform brightness of a planar illumination device is accommodated. A radiation path is formed through which the heat generated from the point-like light source is transmitted to a radiator plate made of metal through an electrode terminal of the point-like light source, a land portion of a front side face of an FPC, a through hole of a conductor pattern, and a high heat-conductive resin. The radiation path for efficient radiation from a conductor pattern of the FPC to the radiator plate made of metal is extended, and direct radiation area is sufficiently ensured. Particularly even if a large-current type LED is used for the point-like light source, sufficient radiation effect can be obtained. Also, since freedom in wiring pattern on the FPC and freedom of outline are not different from a conventional FPC at all, a demand for thinning of the planar illumination device can be sufficiently satisfied. | 2009-08-20 |
20090207631 | SHEET-SHAPED LIGHTGUIDE MEMBER AND ELECTRONIC DEVICE USING THE SAME - A sheet-shaped lightguide member includes a lightguide sheet having a first surface, a second surface opposite the first surface, and a peripheral edge surface a part of which is defined as a light entrance surface. At least one of the first and second surfaces has microscopic irregularities over the whole area thereof. The lightguide member is provided with a lightguide layer on a region of the at least one of the first and second surfaces. The lightguide layer defines a lightguide region in the at least one of the first and second surfaces retaining an exposed region as a light-emitting region. The lightguide layer is configured to guide the light received through the light entrance surface toward the light-emitting region. | 2009-08-20 |
20090207632 | LIGHT EMITTING PANEL ASSEMBLIES - Optical assembly includes a light emitting panel member having at least one light input area for receiving light from two or more different colored light sources. A pattern of individual optical deformities on or in at least one surface area of the panel member contains at least two different configurations of optical deformities to promote color mixing within the panel member and cause light of a preferred color to be emitted therefrom. | 2009-08-20 |
20090207633 | Backlight Unit and Display Including the Same - A backlight unit and a liquid crystal display including the same are provided. The backlight unit includes a circuit board, at least one internal interconnection formed on the circuit board, and a plurality of light emitting devices mounted to be connected with the at least one internal interconnection on the circuit board, each of the plurality of light emitting devices including at least one light emitting chip and at least one driving chip. | 2009-08-20 |
20090207634 | Switching power supply circuit - An exemplary switching power supply circuit includes a transformer, a switching control circuit, a DC-DC converter, and a signal selecting circuit. The transformer converts a DC voltage into a first DC voltage and a second DC voltage. The switching control circuit controls a current flowing on the transformer for generating the first DC voltage and the second DC voltage. The DC-DC converter converts the first DC voltage or the second DC voltage into a third DC voltage. The signal selecting circuit selects the first DC voltage or the second DC voltage for the DC-DC converter to generate the third DC voltage. | 2009-08-20 |
20090207635 | Standby Operation of a Resonant Power Convertor - A control method is proposed that enables to drive a resonant (LLC) power converter at low loads with substantially reduced power losses for realizing a stand-by power. The reduction is achieved by a sub-critical operation several times below Resonance Frequency while still keeping zero voltage switching. One half-bridge switch (s | 2009-08-20 |
20090207636 | Constant current and voltage controller in a small package with dual-use pin - A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current. | 2009-08-20 |
20090207637 | GENERATING DRIVE SIGNALS FOR A SYNCHRONOUS RECTIFICATION SWITCH OF A FLYBACK CONVERTER - In order to further develop a circuit arrangement ( | 2009-08-20 |
20090207638 | Gadgets generators - This invention boost the original power source to help or cut down the usage of public Power sources. | 2009-08-20 |
20090207639 | Three-level power converting apparatus - Each phase of a three-level power converting apparatus is configured by a single unit, and four switching devices ( | 2009-08-20 |
20090207640 | SEMICONDUCTOR DEVICE - The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS*FET for a high-side switch and a power MOS*FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS*FET for the high-side switch is formed by a p channel vertical MOS*FET, and the power MOS*FET for the low-side switch is formed by an n channel vertical MOS*FET. Thus, a semiconductor chip formed with the power MOS*FET for the high-side switch and a semiconductor chip formed with the power MOS*FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad. | 2009-08-20 |
20090207641 | NOVEL TRANSMISSION LINES FOR CMOS INTEGRATED CIRCUITS - Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present invention further provides a reduction in skew and crosstalk. Embodiments of the present invention also provide the fabrication of improved transmission lines for silicon-based integrated circuits using conventional CMOS fabrication techniques. One method of the present invention provides transmission lines in an integrated circuit. Another method includes forming transmission lines in a memory device. The present invention includes a transmission line circuit, a differential line circuit, a twisted pair circuit as well as systems incorporating these different circuits all formed according to the methods provided in this application. | 2009-08-20 |
20090207642 | SEMICONDUCTOR SIGNAL PROCESSING DEVICE - A unit operator cell includes a plurality of SOI (Silicon on Insulator) transistors, write data is stored in a body region of at least two SOI transistors, and the storage SOI transistors are connected in series with each other to a read port or each of the storage SOI transistors is singly connected to the read port. Therefore, an AND operation result or a NOT operation result of data stored in the unit operator cells can be obtained, and operation processing can be performed only by writing and reading data. A semiconductor signal processing device that can perform logic operation processing and arithmetic operation processing at high speed is implemented with low power consumption and a small occupation area. | 2009-08-20 |
20090207643 | Data storage devices using magnetic domain wall movement and methods of operating the same - Data storage devices using movement of magnetic domain walls and methods of operating the same are provided. A data storage device includes a magnetic track having a verifying region. Within the verifying region, first and second magnetic domains are arranged alternately. The first magnetic domains correspond to first data and the second magnetic domains correspond to second data. A verification sensor is arranged at an end of the verifying region. A current applying element is configured to apply one or more pulse currents to the magnetic track. A first counter is connected to the verification sensor and configured to count the number of magnetic domains passing through the verification sensor. | 2009-08-20 |
20090207644 | MEMORY CELL ARCHITECTURE - Embodiments of the present invention disclose a memory architecture for optimizing memory performance and size. Memory optimization is realized by configuring the memory to a particular logic state; that is, restricting memory data storage to either logic “0” or “1.” The opposite logic state, “1” or “0,” can be available through initialization and, therefore, may be presumed. Accordingly, the presumed, initialized logic state is available unless the configured logic state in memory changes the initialized data during memory access. Memory size reduction is realized by restricting physical memory to contain only cells that store data. Memory size can be further reduced by eliminating redundant data rows and columns. By reducing memory size, processing speed can be enhanced and power consumption reduced relative to conventional memory structures. | 2009-08-20 |
20090207645 | Method and apparatus for accessing a bidirectional memory - A bidirectional memory cell includes an ovonic threshold switch (OTS) and a bidirectional memory element. The OTS is configured to select the bidirectional memory element and to prevent inadvertent accesses to the memory element. | 2009-08-20 |
20090207646 | INTEGRATED CIRCUIT WITH RESISTIVE MEMORY CELLS AND METHOD FOR MANUFACTURING SAME - An integrated circuit including a resistive memory cell and a method of manufacturing the integrated circuit are described. The integrated circuit comprises a plurality of resistive memory cells and a plurality of voltage supply contacts, wherein at least four resistive memory cells are in signal connection with one voltage supply contact. | 2009-08-20 |
20090207647 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND DATA WRITING METHOD THEREFOR - A nonvolatile semiconductor storage device comprises: a first wire and a second wire intersecting each other; a memory cell which is disposed at each intersection of the first wire and the second wire and electrically rewritable and in which a variable resistor for memorizing a resistance value as data in a nonvolatile manner and a rectifying device are connected in series; and a control circuit which applies a voltage necessary for writing of data to the first and second wires. The control circuit precharges a non-selected second wire up to a standby voltage larger than a reference voltage prior to a set operation for programming only a variable resistor connected to selected first and second wires by supplying the reference voltage to a non-selected first wire and the selected second wire, applying a program voltage necessary for programming of the selected variable resistor based on the reference voltage to the selected first wire and applying a control voltage which prevents the rectifying device from turning ON based on the program voltage to the non-selected second wire. | 2009-08-20 |
20090207648 | MULTI-LEVEL DYNAMIC MEMORY DEVICE - A multi-level dynamic memory device includes a bit line pair that is divided into a main bit line pair and a sub-bit line pair, first and second sense amplifiers that are connected between the main bit line pair and between the sub-bit line pair, first and second coupling capacitors that are cross-coupled between the main bit pair and the sub-bit pair, respectively; and first and second correction capacitors that are connected in parallel to the first and second coupling capacitors, respectively, and whose capacitance is adjusted by a control voltage signal. | 2009-08-20 |
20090207649 | VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY - A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning. | 2009-08-20 |
20090207650 | SYSTEM AND METHOD FOR INTEGRATING DYNAMIC LEAKAGE REDUCTION WITH WRITE-ASSISTED SRAM ARCHITECTURE - A system for integrating dynamic leakage reduction with a write-assisted SRAM architecture includes power line selection circuitry associated with each column of one or more SRAM sub arrays, controlled by a selection signal that selects the associated sub array for a read or write operation, and by a column write signal that selects one of the columns of the sub arrays. The power line selection circuitry locally converts a first voltage, corresponding to a cell supply voltage for a read operation, to a second lower voltage to be supplied to each cell selected for a write operation, as to facilitate a write function. The power line selection circuitry also locally converts the first voltage to a third voltage to be supplied to power lines in unselected sub arrays, the third voltage also being lower than the first voltage so as to facilitate dynamic leakage reduction. | 2009-08-20 |
20090207651 | METHOD FOR SWITCHING MAGNETIC RANDOM ACCESS MEMORY ELEMENTS AND MAGNETIC ELEMENT STRUCTURES - A method for storing data in a magnetic memory element of an array of elements which avoids inadvertent switching of other elements is disclosed. First and second magnetic fields are applied to a selected magnetic element for a first time interval to switch the element into an intermediate state where minor domains are created. A second value of magnetic fields are then applied large enough to switch the magnetization of the minor domains, but not large enough to switch the magnetization of an adjacent memory cell. Once the minor domain is switched, the magnetization of the magnetic element assumes the state where the major domain has a magnetization direction representing the value of the stored data bit. Reducing the grain size of crystallites contained in a bit reduces the intrinsic anisotropy of the magnetic memory element thus improving bit selectivity. | 2009-08-20 |
20090207652 | SEMICONDUCTOR DEVICE INCLUDING RESISTANCE STORAGE ELEMENT - A phase change memory includes a memory cell with a phase change element storing data according to level change of a resistance value in association with phase change, a write circuit converting the phase change element to an amorphous state or a polycrystalline state according to the logic of write data in a write operation mode, a read circuit reading out stored data from the phase change element in a readout operation mode, and a discharge circuit applying a discharge voltage to the phase change element to remove electrons trapped in the phase change element in a discharge operation mode. Accordingly, variation in the resistance value at the phase change element can be suppressed. | 2009-08-20 |
20090207653 | MEMORY STORAGE DEVICE WITH HEATING ELEMENT - A memory storage device is provided that includes a storage cell having a changeable magnetic region. The changeable magnetic region includes a material having a magnetization state that is responsive to a change in temperature. The memory storage device also includes a heating element. The heating element is proximate to the storage cell for selectively changing the temperature of the changeable magnetic region of said storage cell. By heating the storage cell via the heating element, as opposed to heating the storage cell by directly applying current thereto, more flexibility is provided in the manufacture of the storage cells. | 2009-08-20 |
20090207654 | Semiconductor device including plurality of parallel input/output lines and methods of fabricating and using the same - Provided are semiconductor devices and methods for fabricating and using the semiconductor devices, wherein the semiconductor devices may include a first element, a second element, and a plurality of parallel IO lines connecting the first element with the second element. The plurality of IO lines may have different lengths and the shortest IO line from among the plurality of the IO lines may be adjacent to a longest IO line from among the plurality of the IO lines. | 2009-08-20 |
20090207655 | MULTIPLE TIME PROGRAMMABLE (MTP) PMOS FLOATING GATE-BASED NON-VOLATILE MEMORY DEVICE FOR A GENERAL PURPOSE CMOS TECHNOLOGY WITH THICK GATE OXIDE - A multiple time programmable (MTP) memory cell, in accordance with an embodiment, includes a floating gate PMOS transistor, a high voltage NMOS transistor, and an n-well capacitor. The floating gate PMOS transistor includes a source that forms a first terminal of the memory cell, a drain and a gate. The high voltage NMOS transistor includes a source connected to ground, an extended drain connected to the drain of the PMOS transistor, and a gate forming a second terminal of the memory cell. The n-well capacitor includes a first terminal connected to the gate of the PMOS transistor, and a second terminal forming a third terminal of the memory cell. The floating gate PMOS transistor can store a logic state. Combinations of voltages can be applied to the first, second and third terminals of the memory cell to program, inhibit program, read and erase the logic state. | 2009-08-20 |
20090207656 | OPERATING METHOD OF MEMORY - An operating method of a memory is provided. The memory includes a memory cell array composed of a plurality of memory cells, a plurality of bit lines, and a plurality of word lines. During programming the memory, a column of memory cells is selected. A voltage difference is respectively occurred between a bit line corresponding to first source/drain regions of the memory cells in the selected column and adjacent two bit lines, and a bias is respectively applied to a word line corresponding to a control gate of each memory cell in the selected column so as to allow a data bit of the memory cell at a plurality of predetermined programmed states and an unusable bit of each memory cell in an adjacent column which shares the same bit line with the selected column at an unusable state. | 2009-08-20 |
20090207657 | MULTI LEVEL INHIBIT SCHEME - Memory devices and methods are disclosed to facilitate utilization of a multi level inhibit programming scheme. In one such embodiment, isolated channel regions having boosted channel bias levels are formed across multiple memory cells and are created in part and maintained through capacitive coupling with word lines coupled to the memory cells and biased to predetermined bias levels. Methods of manipulation of isolated channel region bias levels through applied word line bias voltages affecting a program inhibit effect, for example, are also disclosed. | 2009-08-20 |
20090207658 | OPERATING METHOD OF MEMORY DEVICE - An operating method of a memory array is provided. The operating method includes performing a programming operation. The programming operation is performed by applying a first voltage to a bit line of the memory array and a second voltage to a plurality of word lines of the memory array to cause simultaneously programming a plurality of selected memory cells in the memory array | 2009-08-20 |
20090207659 | Memory device and memory data read method - Provided are memory devices and memory data read methods. A method device may include: a multi-bit cell array; a decision unit that may detect threshold voltages of multi-bit cells of the multi-bit cell array to decide first data from the detected threshold voltages, using a first decision value; an error detector that may detect an error bit of the first data; and a determination unit that may determine whether the decision unit decides second data from the detected threshold voltages using a second decision value, based on a number of detected error bits, the second decision value being different from the first decision value. Through this, it is possible to reduce time spent for reading data stored in the multi-bit cell. | 2009-08-20 |
20090207660 | PROGRAM METHOD OF FLASH MEMORY DEVICE - Erase and program methods of a flash memory device including MLCs for increasing the program speed are described. In the erase method, MLCs are pre-programmed so that a voltage range in which threshold voltages of MLCs are distributed can be reduced. Therefore, a fail occurrence ratio can be reduced when erasing MLCs, the threshold voltage distribution of MLCs can be improved and an overall program time can be shortened in a subsequent program operation. | 2009-08-20 |
20090207661 | SEGMENTED BITSCAN FOR VERIFICATION OF PROGRAMMING - A set non-volatile storage elements are subjected to a programming process in order to store a set of data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target condition to store the appropriate data. Decisions about whether to continue programming or whether the programming is successful are made based on whether overlapping groups of the non-volatile storage elements have less than a threshold number of non-volatile storage elements that are not properly programmed. | 2009-08-20 |
20090207662 | Multi-Transistor Non-Volatile Memory Element - The present disclosure provides a multi-transistor element including a substrate, a first floating gate disposed on the substrate, a second floating gate disposed on the substrate and coupled to the first floating gate, and a first active region disposed in the substrate and coupled to the first and second floating gates. | 2009-08-20 |
20090207663 | Flash Memory Devices Including Ready/Busy Control Circuits and Methods of Testing the Same - A flash memory device includes a chip disable fuse circuit that has a fuse and that outputs a chip disable signal when the fuse is cut out, and a ready/busy control circuit that forcibly activates a ready/busy signal representing an internal operational state in response to the chip disable signal and externally outputs the ready/busy signal through a ready/busy output pin. | 2009-08-20 |
20090207664 | Flash Memory Device for Variably Controlling Program Voltage and Method of Programming the Same - Provided is a method of programming the flash memory device including setting increments of program voltages according to data states expressed as threshold voltage distributions of multi-level memory cells. An Increment Step Pulse Programming (ISPP) clock signal corresponds to a loop clock signal and the increments of the program voltages and is generated in response to program pass/fail information. A default level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the loop clock signal. An additional level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the ISPP clock signal. The program voltage is increased by 1 increment, in response to the default level enable signal. The program voltage is increased by 2 increments, in response to the additional level enable signal. | 2009-08-20 |
20090207665 | NON-VOLATILE ONE TIME PROGRAMMABLE MEMORY - A verify operation is performed on the one time programmable memory block to determine if it has been programmed. If any bits have been programmed, further programming or erasing is inhibited. In another embodiment, the memory block can be programmed and erased until a predetermined page or lock bit in the block is programmed. Once that page/bit is programmed, the one time programmable memory block is locked against further programming or erasing. | 2009-08-20 |
20090207666 | Methods of Restoring Data in Flash Memory Devices and Related Flash Memory Device Memory Systems - Methods for setting a read voltage in a memory system which comprises a flash memory device and a memory controller for controlling the flash memory device, comprise sequentially varying a distribution read voltage to read page data from the flash memory device; constituting a distribution table having a data bit number and a distribution read voltage, the data bit number indicating an erase state among the page data respectively read from the flash memory device and the distribution read voltage corresponding to the read page data; detecting distribution read voltages corresponding to data bit numbers each indicating maximum points of possible cell states of a memory cell, based on the distribution table; and defining new read voltages based on the detected distribution read voltages. | 2009-08-20 |
20090207667 | NAND FLASH MEMORY ARRAY WITH CUT-OFF GATE LINE AND METHODS FOR OPERATING AND FABRICATING THE SAME - A NAND flash memory array, an operating method and a fabricating method of the same are provided. The NAND flash memory array has a cut-off gate line under a control gate in order to operate two cells having vertical channels independently with one control gate (i.e., a shared word line). The memory cell area is reduced considerably compared to the conventional vertical channel structure, and is better for high integration. A shared cut-off gate turn off is made during a programming operation and prevents programming the opposite cell by a self-boosting effect. It is possible to shield electrically with a shared word line (a control gate) during a reading operation, and minimizes the effect of storage condition of the opposite cell. Also, the NAND flash memory array can be fabricated by using the conventional CMOS process. | 2009-08-20 |
20090207668 | DATA STROBE CLOCK BUFFER IN SEMICONDUCTOR MEMORY APPARATUS, METHOD OF CONTROLLING THE SAME, AND SEMICONDUCTOR APPARATUS HAVING THE SAME - A data strobe clock buffer of a semiconductor memory apparatus includes a buffering block configured to buffer an external data strobe clock signal in response to a buffer enable signal to generate an internal data strobe clock signal, a timing discriminating block configured to discriminate toggle timing of the internal data strobe clock signal in response to a burst start signal and a burst length signal to generate a timing discrimination signal, and an enable controlling block configured to generate the buffer enable signal in response to the timing discrimination signal. | 2009-08-20 |
20090207669 | PAGE BUFFER CIRCUIT OF MEMORY DEVICE AND PROGRAM METHOD - A page buffer circuit of a memory device including a plurality of Multi-Level Cells (MLCs) connected to at least a pair of bit lines includes a Most Significant Bit (MSB) latch, a Least Significant Bit (LSB) latch, a data I/O circuit, an inverted output circuit, a MSB verification circuit, and a LSB verification circuit. The MSB latch is configured to sense a voltage of a sensing node in response to a control signal and store an upper sensing data, and output an inverted upper sensing data, or store an input data and output an inverted input data. The LSB latch is configured to sense a voltage of the sensing node in response to the control signal, and store and output a lower sensing data, or store and output an input data received through the MSB latch. The data I/O circuit is connected to the MSB latch and a data I/O line, and is configured to perform the input and output of a sensing data or the input and output of a program data. | 2009-08-20 |
20090207670 | DATA OUTPUT BUFFER WHOSE MODE SWITCHES ACCORDING TO OPERATION FREQUENCY AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME - A data output buffer switches it operating mode according to its operating frequency. The data output buffer includes a delay control unit, and a buffer unit. The buffer unit provides data of an internal buffer input line to an external buffer output line. The delay control unit generates a buffer enable signal corresponding to a received reference control signal. The buffer unit blocks the provision of the data to the buffer output line in response to a deactivation of the buffer enable signal. The buffer enable signal remains in an activated state when the period of the reference control signal is shorter than a reference period. The data output buffer may be included in a semiconductor memory device. | 2009-08-20 |
20090207671 | Memory data detecting apparatus and method for controlling reference voltage based on error in stored data - Example embodiments may relate to a method and an apparatus for reading data stored in a memory, for example, providing a method and an apparatus for controlling a reference voltage based on an error of the stored data. Example embodiments may provide a memory data detecting apparatus including a first voltage comparator to compare a threshold voltage of a memory cell with a first reference voltage, a first data determiner to determine a value of at least one data bit stored in the memory cell according to a result of the comparison, an error verifier to verify whether an error occurs in the determined value, a reference voltage determiner to determine a second reference voltage that is lower than the first reference voltage based on a result of the verification, and a second data determiner to re-determine the value of the data based on the determined second reference voltage. | 2009-08-20 |
20090207672 | SYNCHRONOUS MEMORY DEVICES AND CONTROL METHODS FOR PERFORMING BURST WRITE OPERATIONS - Synchronous memory devices and control methods for performing burst write operations are disclosed. In one embodiment, a synchronous memory device for controlling a burst write operation comprises a first buffer circuit for buffering a first control signal requesting an exit from the burst write operation in synchronization with a clock signal associated with the burst write operation, and a latch circuit for performing a reset in response to the first control signal forwarded by the first buffer circuit, wherein the reset triggers the exit from the burst write operation. | 2009-08-20 |
20090207673 | SEMICONDUCTOR INTEGRATED CIRCUIT WITH MULTI TEST - A semiconductor integrated circuit includes a multi-mode control signal generating unit configured to control an activation of a up/down mat I/O switch control signal, which controls I/O switches in a up/down mat, according to a multi-test mode signal and a read/write discriminating signal, a multi-mode decoder configured to output multi-mat select signals to simultaneously activate a plurality of mats according to a multi-test mode active write signal, and a mat controller configured to enable word lines and the I/O switches according to the up/down mat I/O switch control signal and the multi-mat select signals. | 2009-08-20 |
20090207674 | DEVICE AND METHOD GENERATING INTERNAL VOLTAGE IN SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device and a method of generating an internal voltage in the semiconductor memory device are provided. The semiconductor memory device includes a controller configured to activate a sensing enable signal when an active command is applied from outside, inactivate the sensing enable signal when a precharge command is applied, and output the sensing enable signal, and an array internal voltage generator configured to output an active array power supply voltage as an array power supply voltage when the sensing enable signal is activated, output an external array power supply voltage and a standby array power supply voltage as the array power supply voltage when the sensing enable signal is inactivated, and output the standby array power supply voltage alone as the array power supply voltage when the sensing enable signal is inactivated for at least a specific period. | 2009-08-20 |
20090207675 | WAK Devices in SRAM Cells for Improving VCCMIN - A memory circuit includes a bit line; a word line; a first power supply node having a first power supply voltage; a first power supply line connected to the first power supply node; a second power supply node selected from a group consisting of a floating node and a node having a second power supply voltage lower than the first power supply voltage; a second power supply line configured to switch connections between the first and the second power supply nodes; a write-assist-keeper (WAK) device coupling the first and the second power supply lines; and a static random access memory (SRAM) cell connected to the bit line, the word line and the second power supply line. | 2009-08-20 |
20090207676 | SEMICONDUCTOR MEMORY DEVICE HAVING REDUCED CURRENT CONSUMPTION DURING DATA MASK FUNCTION - The present invention describes a semiconductor memory device having a data mask function and includes a common driving control unit for generating a common driving control signal in response to a data mask signal and a write command signal supplied to the common driving control unit. A plurality of driving units are supplied with the common driving control signal and selectively drive data according to the common driving control signal and transmit the driven data to a plurality of data lines, respectively. Accordingly, a driving and data mask operation of the plurality of driving units is controlled by the common driving control unit, which reduces current consumption and a layout area of the circuit. | 2009-08-20 |
20090207677 | SEMICONDUCTOR DEVICE UTILIZING DATA MASK AND DATA OUTPUTTING METHOD USING THE SAME - A semiconductor device receives a first data mask signal and a second data mask signal. A data mask control unit outputs a data mask control signal by combining a test mode signal with the first data mask signal. A data clock output unit receives a delay locked loop (DLL) clock and outputs a data clock in response to the data mask control signal. A column address enable (YAE) control signal generating unit generates a column address enable control signal to control the enablement of a column address enable signal. The column address enable control signal generating unit generates the column address enable control signal by combining the test mode signal with a second mask signal. | 2009-08-20 |
20090207678 | Memory writing interference test system and method thereof - The present invention is a memory writing interference test system and method thereof. The test system comprises a memory, a progressing unit, a write-in unit, a read-out unit, and a discriminating unit. By sequentially writing data and then reading out the written data from one memory block after one through the whole memory, determines if the memory has the memory writing interference. | 2009-08-20 |
20090207679 | Systems and Methods for Data Transfers Between Memory Cells - Systems and methods for reducing the latency of data transfers between memory cells by enabling data to be transferred directly between sense amplifiers in the memory system. In one embodiment, a memory system uses a conventional DRAM memory structure having a pair of first-level sense amplifiers, a second-level sense amplifier and control logic for the sense amplifiers. Each of the sense amplifiers is configured to be selectively coupled to a data line. In a direct data transfer mode, the control logic generates control signals that cause the sense amplifiers to transfer data from a first one of the first-level sense amplifiers (a source sense amplifier) to the second-level sense amplifier, and from there to a second one of the first-level sense amplifiers (a destination sense amplifier.) The structure of these sense amplifiers is conventional, and the operation of the system is enabled by modified control logic. | 2009-08-20 |
20090207680 | Method for the allocation of addresses in the memory cells of a rechargeable energy accumulator - A method for placing addresses in the memory cells of a rechargeable energy storage device for use in a motor vehicle, each of which memory cells includes at least one sensor device and an individualizing device for storing an address. In order to optimize the placing of addresses in the memory cells of a rechargeable storage device, the functionality of the memory cells is checked using the sensor device in the vehicle, an individual address is assigned to each operable memory cell, and the individual address is used to individualize the sensor values made available from the sensor device. | 2009-08-20 |
20090207681 | SYSTEMS AND DEVICES INCLUDING LOCAL DATA LINES AND METHODS OF USING, MAKING, AND OPERATING THE SAME - Disclosed are methods, systems and devices, including a device having a fin field-effect transistor with a first terminal, a second terminal, and two gates. In some embodiments, the device includes a local data line connected to the first terminal, at least a portion of a capacitor plate connected to the second terminal, and a global data line connected to the local data line by the capacitor plate. | 2009-08-20 |
20090207682 | SEMICONDUCTOR MEMORY DEVICE - A word control circuit activates word lines corresponding to a start row address and a next row address overlappingly in the continuous mode. Accordingly, even in the case where the start address indicates an end memory cell connected to a word line, the switching operation of the word line becomes unnecessary. Memory cells connected to different word lines can be thus accessed in a sequential manner. That is, a controller accessing a semiconductor memory device can access the memory without data interruption. This can prevent the data transfer rate from lowering. Furthermore, it is made unnecessary to form a signal and a control circuit for informing a controller of the fact that a word line is being switched so that the construction of a semiconductor memory device and a control circuit of the controller can be simplified. This results in reduction of the system cost. | 2009-08-20 |
20090207683 | INPUT CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS AND CONTROLLING METHOD THEREOF - Disclosed is an input circuit of a semiconductor memory apparatus. The input circuit includes a first buffer and a second buffer. The first buffer has an input terminal connected with a first input pin for receiving a control signal used in a multi-control mode for controlling an entire memory area by dividing the entire memory area, and an output terminal having a first level according to a control mode signal. The second buffer has an input terminal connected with a second input pin for receiving one of plural signals used in a single control mode for controlling the entire memory area without dividing the entire memory area, and an output terminal having a second level according to the control mode signal. | 2009-08-20 |
20090207684 | WARM MIX ASPHALT PRODUCTION SYSTEM AND METHOD - A warm mix asphalt plant comprising a counter-flow drum, apparatus for precisely metering flows of A/C and water, an asphalt expander with no moving internal parts where a circular curtain of flowing clean water is mixed with a coaxial circular curtain of moving heated A/C to create asphalt foam which is heated and mixed inside a lower portion of the asphalt expander and then distributed to cover aggregate inside the counter-flow drum. | 2009-08-20 |
20090207685 | MIXER - It is disclosed a mixer adapted to mix a base and a catalyst to make a paste for dental castings in which the holding body is adapted to receive the components to be mixed through two inlets ( | 2009-08-20 |
20090207686 | Cartridge for Sterile Mixing of a Two-Phase Compound, Particularly for Two-Component Acrylic Resins - The present invention has its application in the field of devices and methods for the product physical and chemical mixing and refers particularly to a cartridge for sterile mixing of a two-phase compound. The cartridge consists of a first tubular body ( | 2009-08-20 |
20090207687 | Apparatus and method for preparing ultrapure solvent blends - An apparatus and method for preparing solvent blends comprising: a manifold ( | 2009-08-20 |
20090207688 | LID ASSEMBLY FOR REDUCING AIR PRESSURE IN A MIXING VESSEL WITHIN AN ASYMMETRICAL CENTRIFUGAL MIXING SYSTEM - The present invention is a system using a lid assembly with an integrated air valve that allows for the creation and maintenance of lower air pressure or vacuum within the mixing vessel. The mixing vessel can be placed in an asymmetrical centrifugal mixer and mixed while the material is under lower pressure or vacuum but while the vessel is not in contact with the vacuum pump. The vacuum or lower pressure assists in the removal of bubbles in the mixed materials. This system may be used with existing mixing vessels and placed inside existing asymmetrical centrifugal mixers. | 2009-08-20 |
20090207689 | Mixing Tank for Liquid Substances or the Like | 2009-08-20 |
20090207690 | MULTI-SIZE MIXER - A gyroscopic paint mixer having a rotatable frame with a clamp lock providing automatic transfer from an unclamping to a clamping condition, providing silent operation through the use of one way clutches, the mixer also having a vertical stop apparatus coupled to an access door for stopping and holding the rotatable frame in an upright position, the mixer also having a bail retainer supported by a carriage assembly mounted for rotation on a clamp plate with a cam urging the bail retainer to the side of the frame when the bail retainer is released from the paint container with the paint container in an upright position in the rotatable frame. | 2009-08-20 |
20090207691 | Dissolution test vessel with rotational agitation - A rotatable vessel includes a rotary member secured to a vessel body and drivable to rotate the vessel about a central axis. The rotary member may be supported by a bearing at a dissolution test apparatus at which the vessel is mounted. The dissolution test apparatus may include a drive system coupled to the rotary member for driving the rotation of the vessel at a desired speed or according to a desired speed profile. The rotation of the vessel agitates media contained in the vessel, thus eliminating the need for a stirring element operating within the vessel. | 2009-08-20 |
20090207692 | STEADY BEARING ASSEMBLY AND METHOD FOR MIXER IMPELLER SHAFTS - A steady bearing for supporting an end of an impeller shaft with respect to a mixer vessel wall, includes a downwardly projecting cylindrical hollow sleeve mounted to the end of the shaft and projecting away from the end of the shaft, an upwardly projecting bearing holder mounted to the bottom of the vessel wall and projecting upwardly inside part of the hollow portion of the sleeve, and a roller bearing assembly mounted in between the bearing holder and the sleeve. | 2009-08-20 |
20090207693 | Seismic Location and Communication System - A method and system for determining the location of miners trapped in an underground mine that includes recording a reference seismic signature for each of a plurality of underground base stations in the mine in advance of an emergency. The reference seismic signatures are created by generating first a seismic signal with a high signal-to-noise ratio at each base station, monitoring the signal with a permanent array of surface seismic sensors, and recording each unique signature on a central computer. In the event of an emergency, trapped miners can generate a second seismic signal at any of the underground base stations which can be easily identified with the central computer by using the pre-recorded reference seismic signature to overcome a weak signal-to-noise ratio. | 2009-08-20 |
20090207694 | ULTRASONIC IN-BUILDING POSITIONING SYSTEM BASED ON PHASE DIFFERENCE ARRAY WITH RANGING - A method for determining position of a mobile electronic device includes emitting an acoustic pulse from the position of the mobile electronic device. The acoustic pulse is detected at a known position at three spaced apart locations along each of at least two lines extending in different directions. The range and phase difference of the acoustic pulse between each of the detecting locations is determined. A relative position of the device with respect to the known position is obtained from the range and phase differences. | 2009-08-20 |
20090207695 | Method for Production of an Antenna Section for an Underwater Antenna - The invention relates to a method for production of an antenna section comprising a hydrophone ( | 2009-08-20 |
20090207696 | HYBRID TRANSDUCER - An embodiment of the invention is directed to a hybrid geometry type acoustic transducer. A hybrid geometry type acoustic transducer as embodied herein leverages different type transducer physical configurations. More specifically, embodiments of the hybrid transducer combine specific features of traditional Tonpilz resonators and PZT-composite transducers to exploit the beneficial characteristics of both. The outward construction of an embodied hybrid transducer mimics a Tonpilz resonator incorporating a headmass and a tailmass sandwiching a piezoelectric active material. However, rather than using a conventional ceramic ring stack or plate form of active material, a layer of diced or “pillared” active material is provided between the headmass and the tailmass with no filler material other than a gas, such as air, for example, or others, or a vacuum environment. Acoustic projectors constructed using this invention benefit with higher bandwidth and efficiency due to coupling loss that is lower than in prior designs. Likewise, when a hydrophone is constructed using aspects of this invention, exceptional hydrophone figure of merits are obtained. A method for making a hybrid transducer is described. | 2009-08-20 |
20090207697 | Water Inflatable Volumetric Hydrophone Array - A hydrophone array includes an inflatable shaped housing enclosing an interior space and formable between a collapsed configuration and an expanded configuration, a framework of compliant material disposed within the interior of the inflatable housing, and a plurality of hydrophones attached to the compliant material at respective positions, wherein said hydrophones are arranged in a predetermined geometric array when the shaped housing is in the expanded configuration. Also provided herein is a system and method for deploying the hydrophone array. | 2009-08-20 |