32nd week of 2011 patent applcation highlights part 25 |
Patent application number | Title | Published |
20110194328 | VARIABLE RESISTANCE MEMORY DEVICE AND RELATED METHOD OF OPERATION - A variable resistance memory device comprises a variable resistance memory cell, a switch that selectively passes a write voltage to an input terminal of the variable resistance memory cell, and a trigger circuit that controls the switch to cut off the write voltage from the input terminal upon determining that the variable resistance memory cell is programmed to a target state by detecting voltage fluctuation of the one side of variable resistance memory cell. | 2011-08-11 |
20110194329 | MEMORY COMPONENT, MEMORY DEVICE, AND METHOD OF OPERATING MEMORY DEVICE - A memory component includes: a first electrode; a memory layer; and a second electrode which are provided in that order, wherein the memory layer includes an ion source layer containing aluminum (Al) together with at least one chalcogen element selected from the group consisting of tellurium (Te), sulfur (S), and selenium (Se), and a resistance variable layer provided between the ion source layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide. | 2011-08-11 |
20110194330 | MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS - The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage. | 2011-08-11 |
20110194331 | SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE - The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source and drain electrodes of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a signal line connected to a capacitor as a reading signal line or a signal line connected to one of a source and drain electrodes of the reading transistor as a reading signal line so that a reading potential is supplied to the reading signal line, and then detecting a potential of the bit line. | 2011-08-11 |
20110194332 | SEMICONDUCTOR DEVICE - An object is to provide a semiconductor device capable of accurate data retention even with a memory element including a depletion mode transistor. A gate terminal of a transistor for controlling input of a signal to a signal holding portion is negatively charged in advance. The connection to a power supply is physically broken, whereby negative charge is held at the gate terminal. Further, a capacitor having terminals one of which is electrically connected to the gate terminal of the transistor is provided, and thus switching operation of the transistor is controlled with the capacitor. | 2011-08-11 |
20110194333 | System and Method to Select a Reference Cell - A system and method to select a reference cell is disclosed. In a particular embodiment, a method is disclosed that includes receiving an address corresponding to a bit cell within a first bank of a memory. The method also includes accessing a second reference cell of a second bank of the memory in response to a first reference cell in the first bank being indicated as bypassed. | 2011-08-11 |
20110194334 | DIODE ASSISTED SWITCHING SPIN-TRANSFER TORQUE MEMORY UNIT - A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching. | 2011-08-11 |
20110194335 | MAGNETIC MEMORY WITH PHONON GLASS ELECTRON CRYSTAL MATERIAL - A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element. | 2011-08-11 |
20110194336 | Memory Cells, Memory Cell Constructions, and Memory Cell Programming Methods - Some embodiments include memory cells including a memory component having a first conductive material, a second conductive material, and an oxide material between the first conductive material and the second conductive material. A resistance of the memory component is configurable via a current conducted from the first conductive material through the oxide material to the second conductive material. Other embodiments include a diode comprising metal and a dielectric material and a memory component connected in series with the diode. The memory component includes a magnetoresistive material and has a resistance that is changeable via a current conducted through the diode and the magnetoresistive material. | 2011-08-11 |
20110194337 | Non-Volatile Memory Cell With Precessional Switching - A method and apparatus for writing data to a non-volatile memory cell, such as a spin-torque transfer random access memory (STRAM) memory cell. In some embodiments, a selected resistive state is written to a magnetic tunneling structure by applying a succession of indeterminate write pulses thereto until the selected resistive state is verified. | 2011-08-11 |
20110194338 | Memory Devices Including Multi-Bit Memory Cells Having Magnetic and Resistive Memory Elements and Related Methods - An integrated circuit memory device may include an integrated circuit substrate, and a multi-bit memory cell on the integrated circuit substrate. The multi-bit memory cell may be configured to store a first bit of data by changing a first characteristic of the multi-bit memory cell and to store a second bit of data by changing a second characteristic of the multi-bit memory cell. Moreover, the first and second characteristics may be different. Related methods are also discussed. | 2011-08-11 |
20110194339 | MICROELECTRONIC PROGRAMMABLE DEVICE AND METHODS OF FORMING AND PROGRAMMING THE SAME - A microelectronic programmable structure and methods of forming and programming the structure are disclosed. The programmable structure generally includes an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying a bias across the electrodes, and thus information may be stored using the structure. | 2011-08-11 |
20110194340 | Phase Change Device with Offset Contact - A programmable resistance memory combines multiple cells into a block that includes one or more shared electrodes. The shared electrode configuration provides additional thermal isolation for the active region of each memory cell, thereby reducing the current required to program each memory cell. | 2011-08-11 |
20110194341 | SPIN-TORQUE BASED MEMORY DEVICE WITH READ AND WRITE CURRENT PATHS MODULATED WITH A NON-LINEAR SHUNT RESISTOR - A spin-torque based memory device includes a write portion including a fixed ferromagnetic spin-polarizing layer, a spin-transport layer having a spin accumulation region formed above the fixed ferromagnetic spin-polarizing layer. The memory device further includes a read portion in electrical contact with the spin-transport layer. The read portion includes a free layer magnet, a read non-magnetic layer, and a reference layer. The memory device further includes a metal contact region formed overlying the read portion and a nonlinear resistor formed between an upper surface of the spin transport layer and the metal contact region and modulating write and read current paths depending on an applied voltage, thereby creating different current paths for write and read processes. | 2011-08-11 |
20110194342 | NONVOLATILE MEMORY CIRCUIT USING SPIN MOS TRANSISTORS - Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected. | 2011-08-11 |
20110194343 | STRAM WITH COMPENSATION ELEMENT AND METHOD OF MAKING THE SAME - Spin-transfer torque memory having a compensation element is disclosed. A spin-transfer torque memory unit includes a free magnetic layer having a magnetic easy axis and a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit; a reference magnetic element having a magnetization orientation that is pinned in a reference direction; an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the magnetic reference element; and a compensation element adjacent to the free magnetic layer. The compensation element applies a bias field on the magnetization orientation of the free magnetic layer. The bias field is formed of a first vector component parallel to the easy axis of the free magnetic layer and a second vector component orthogonal to the easy axis of the free magnetic layer. The bias field reduces a write current magnitude required to switch the direction of the magnetization orientation of the free magnetic layer. | 2011-08-11 |
20110194344 | SEMICONDUCTOR DEVICE - To provide a semiconductor device that can suppress deterioration in transistors and has a small layout area. In a nonvolatile semiconductor memory device according to the present invention, a control voltage (4 V) between a write voltage (10 V) and a reference voltage (0 V) is applied to a gate of a P-channel MOS transistor of a memory gate drive circuit corresponding to a selected memory gate line and also the reference voltage (0 V) is applied to a gate of an N-channel MOS transistor, and the write voltage is applied to the memory gate line. Since the transistors are turned on with a gate-source voltage lower than the conventional one, deterioration in the transistors can be suppressed. | 2011-08-11 |
20110194345 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE INCLUDING FAILURE DETECTION CIRCUIT AND METHOD OF DETECTING FAILURE ON NONVOLATILE SEMICONDUCTOR STORAGE DEVICE - A nonvolatile semiconductor storage device includes: a word line; a reading circuit; and a failure detection circuit. The word line is connected to gates of a plurality of nonvolatile memory cell transistors. The reading circuit is connected to one end of the word line and supplies one of a reading selection voltage and a reading non-selection voltage to the word line. The failure detection circuit is connected to the other end of the word line and detects a voltage of the word line supplied with the one of the reading selection voltage and the reading non-selection voltage by comparing the voltage with a plurality of reference voltages. | 2011-08-11 |
20110194346 | FLASH MEMORY DEVICE USING ADAPTIVE PROGRAM VERIFICATION SCHEME AND RELATED METHOD OF OPERATION - A method of programming a flash memory device comprises programming selected memory cells, performing a verification operation to determine whether the selected memory cells have reached a target program state, and determining a start point of the verification operation based on a programming characteristic associated with a detection of a pass bit during programming of an initial program state. | 2011-08-11 |
20110194347 | Nonvolatile Memory Devices Having Improved Read Reliability - Memory systems include at least one nonvolatile memory array having a plurality of rows of nonvolatile multi-bit (e.g., N-bit, where N>2) memory cells therein. A control circuit is also provided, which is electrically coupled to the nonvolatile memory array. The control circuit is configured to program at least two pages of data into a first row of nonvolatile multi-bit memory cells in the nonvolatile memory array using a first sequence of read voltages to verify accuracy of the data stored within the first row. The control circuit is also configured to read the at least two pages of data from the first row using a second sequence of read voltages that is different from the first sequence of read voltages. Each of the read voltages in the first sequence of read voltages may be equivalent in magnitude to a corresponding read voltage in the second sequence of read voltages. | 2011-08-11 |
20110194348 | DYNAMIC AND ADAPTIVE OPTIMIZATION OF READ COMPARE LEVELS BASED ON MEMORY CELL THRESHOLD VOLTAGE DISTRIBUTION - A process is performed periodically or in response to an error in order to dynamically and adaptively optimize read compare levels based on memory cell threshold voltage distribution. One embodiment of the process includes determining threshold voltage distribution data for a population of non-volatile storage elements, smoothing the threshold voltage distribution data using a weighting function to create an interim set of data, determining a derivative of the interim set of data, and identifying and storing negative to positive zero crossings of the derivative as read compare points. | 2011-08-11 |
20110194349 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - In one embodiment, a nonvolatile semiconductor memory device includes a substrate provided with a memory cell part and sense amplifiers on a surface of the substrate, first isolation regions and first device regions disposed in the substrate under the memory cell part, and second isolation regions and second device regions disposed in the substrate under the sense amplifiers. The device further includes a plurality of interconnects disposed on the substrate in the sense amplifiers, extending in a first direction parallel to the surface of the substrate, being adjacent to one another in a second direction perpendicular to the first direction, and arranged in the same interconnect layer. At least one of the second device regions includes first and second stripe portions extending in the first direction, being adjacent in the second direction, and having stripe shapes, and a connecting portion disposed to connect the first stripe portion and the second stripe portion. The device further includes a source contact disposed on the connecting portion, and electrically connected to one of the interconnects. | 2011-08-11 |
20110194350 | COMPENSATION OF BACK PATTERN EFFECT IN A MEMORY DEVICE - In one or more of the disclosed embodiments, a read operation is compensated for back pattern effect. A bit line current is generated by a read operation that biases the word lines. As part of a back pattern effect measurement phase, at predetermined time intervals an indication of the discharge status of the bit line is stored in a latch of a set of N latches coupled to each bit line. At the end of the measurement phase, the set of latches contains a multiple bit word that is an indication of the back pattern effect experienced by that particular series string of memory cells. This back pattern effect indication is used in subsequent read operations to adjust the timing of the operation. | 2011-08-11 |
20110194351 | SOURCE SIDE ASYMMETRICAL PRECHARGE PROGRAMMING SCHEME - A method for programming NAND flash cells to minimize program stress while allowing for random page programming operations. The method includes asymmetrically precharging a NAND string from a positively biased source line while the bitline is decoupled from the NAND string, followed by the application of a programming voltage to the selected memory cell, and then followed by the application of bitline data. After asymmetrical precharging and application of the programming voltage, all the selected memory cells will be set to a program inhibit state as they will be decoupled from the other memory cells in their respective NAND strings, and their channels will be locally boosted to a voltage effective for inhibiting programming. A VSS biased bitline will discharge the locally boosted channel to VSS, thereby allowing programming of the selected memory cell to occur. A VDD biased bitline will have no effect on the precharged NAND string, thereby maintaining a program inhibited state of that selected memory cell. | 2011-08-11 |
20110194352 | PROGRAMMING METHODS AND MEMORIES - Memory devices and programming methods for memories are disclosed, such as those adapted to program a memory using an increasing channel voltage for a first portion of programming, and an increasing but reduced channel voltage for a second portion of programming. | 2011-08-11 |
20110194353 | METHOD OF PROGRAMMING MEMORY CELLS FOR A NON-VOLATILE MEMORY DEVICE - A method of programming memory cells for a non-volatile memory device is provided. The method includes performing an incremental step pulse program (ISPP) operation based on a program voltage, a first verification voltage, and a second verification voltage, and changing an increment value of the program voltage based on a first pass-fail result of the memory cells, the first pass-fail result being generated based on the first verification voltage. The ISPP operation is finished based on a second pass-fail result of the memory cells, the second pass-fail result being generated based on the second verification voltage. | 2011-08-11 |
20110194354 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - When data is written to a memory cell transistor, a write controller controls in such a manner that a verification operation subsequent to a program operation is carried out while a program voltage is increased stepwise for each program operation. The write controller controls in such a manner that a verification operation subsequent to a program operation by which a threshold voltage of a memory cell transistor to be written has become equal to or higher than a verification level for the first time is carried out twice or more at the same verification level, verification operations of the second and subsequent times are carried out after a second program operation which is carried out with the memory cell transistor set in an unselected state. | 2011-08-11 |
20110194355 | VERIFY WHILE WRITE SCHEME FOR NON-VOLATILE MEMORY CELL - A verify while write (VWW) scheme for a non-volatile memory (NVM) cell is provided. The VWW scheme conducts simultaneous write and verify operation by sensing the memory cell current during the write pulse at exactly the same write bias condition in contrast to the “verify+retry-write” write algorithm in the prior art. The VWW scheme removes the iterative “verify and then retry-write” to save both control timing and power consumed in these iterations. Instead, the VWW scheme is composed of single write pulse only in the entire algorithm with exact write pulse width trimmed automatically for multiple memory cells undergoing parallel writing within one write command assertion. Faster write speed, more power efficient write operation and higher reliability of non-volatile semiconductor memory cell are thus achieved with the VWW scheme in this present disclosure. | 2011-08-11 |
20110194356 | METHODS OF FORMING AND OPERATING SEMICONDUCTOR DEVICE - Provided are a semiconductor device and a methods of forming and operating the semiconductor device. The semiconductor device may include active pillars extending from a semiconductor substrate and disposed two dimensionally disposed on the semiconductor substrate, upper interconnections connecting the active pillars along one direction, lower interconnections crossing the upper interconnections and disposed between the active pillars, word lines crossing the upper interconnections and disposed between the active pillars, and data storage patterns disposed between the word lines and the active pillars. | 2011-08-11 |
20110194357 | NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME - Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings. | 2011-08-11 |
20110194358 | SEMICONDUCTOR MEMORY DEVICE USING INTERNAL HIGH POWER SUPPLY VOLTAGE IN SELF-REFRESH OPERATION MODE AND RELATED METHOD OF OPERATION - A semiconductor memory device comprises a memory cell array comprising a plurality of memory banks. The semiconductor memory device performs refresh operations on the memory cell array using a normal refresh operation mode and a self-refresh operation mode. In the normal refresh operation mode, the semiconductor memory device performs refresh operations using an external high power supply voltage, and in the self-refresh operation mode, the semiconductor memory device performs refresh operations using an internal high power supply voltage. In the self-refresh operation mode, the refresh operations are performed in units of memory banks or memory bank groups. | 2011-08-11 |
20110194359 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE - A semiconductor device according to the present invention performs, when a first word structure is designated, control such that input and output of data is performed from a first data input/output terminal and from a second data input/output terminal in response to a first strobe signal and a second strobe signal. The semiconductor device performs, when a second word structure is designated and when a first control signal is supplied, control such that input and output of data is performed from the first data input/output terminal in response to the first strobe signal. The semiconductor device performs, when the second word structure is designated and when a second control signal is supplied, control such that input and output of data is performed from the second data input/output terminal in response to the second strobe signal. | 2011-08-11 |
20110194360 | SEMICONDUCTOR DEVICE AND METHOD OF DETECTING ABNORMALITY ON SEMICONDUCTOR DEVICE - A semiconductor device includes: a plurality of word lines; a word line driver; a first detection circuit; and a control circuit. The plurality of word lines is connected to gates of a plurality of memory cell transistors, respectively. The word line driver supplies one of a selection voltage and a non-selection voltage to each of the plurality of word lines. The first detection circuit detects a first current flowing into the word line driver through a wiring supplying the selection voltage when the selection voltage is supplied to one of the plurality of word lines through the word line driver. The control circuit detects abnormality of the plurality of word lines and the word line driver based on the first current. | 2011-08-11 |
20110194361 | SEMICONDUCTOR DEVICE - An array configuration capable of supplying a necessary and sufficient current in a small area is achieved and a reference cell configuration suitable to temperature characteristics of a TMR element is achieved. In a memory using inversion of spin transfer switching, a plurality of program drivers are arranged separately along one global bit line, and one sense amplifier is provided to one global bit line. A reference cell to which “1” and “0” are programmed is shared by two arrays and a sense amplifier. | 2011-08-11 |
20110194362 | WORD-LINE DRIVER USING LEVEL SHIFTER AT LOCAL CONTROL CIRCUIT - A representative circuit device includes a local control circuit having a level shifter, wherein in response to receipt of a first address signal the level shifter shifts the first address signal from a first voltage level to a second voltage level, providing a level shifted first address signal; and a word-line driver having at least one input for receiving a plurality of address signals, wherein the at least one input includes a first input that is coupled to the local control circuit to receive the level shifted first address signal, and an output that is electrically coupled to a word line of a memory cell array. | 2011-08-11 |
20110194363 | SEMICONDUCTOR MEMORY CELL AND ARRAY USING PUNCH-THROUGH TO PROGRAM AND READ SAME - An integrated circuit device (for example, logic or discrete memory device) comprising a memory cell including a punch-through mode transistor, wherein the transistor includes a source region, a drain region, a gate, a gate insulator, and a body region having a storage node which is located, at least in part, immediately beneath the gate insulator. The memory cell includes at least two data states which are representative of an amount of charge in the storage node in the body region. First circuitry is coupled to the punch-through mode transistor of the memory cell to: (1) generate first and second sets of write control signals, and (2a) apply the first set of write control signals to the transistor to write a first data state in the memory cell and (2b) apply the second set of write control signals to the transistor to write a second data state in the memory cell. In response to the first set of write control signals, the punch-through mode transistor provides at least the first charge in the body region via impact ionization. The transistor may be disposed on a bulk-type substrate or SOI-type substrate. | 2011-08-11 |
20110194364 | NVM OVERLAPPING WRITE METHOD - The disclosed invention provides a structure and method for increasing the operating speed and reduce the overall programming time of a memory array. In one embodiment, the method and structure provided herein reduce the maximum write current consumption, for writing a plurality of data bits to a NVM array, by writing the data bits sharing an activated word line at different times (e.g., activating bit lines associated with an activated word line at different times). Specifically, the write operation of respective data bits, which individually utilize only a fraction of the overall write window of the bits, are interleaved so that the maximum write current of respective bits are offset in time from the maximum write current of another bit. This interleaving of data bit write windows allows a larger number of data bits to be written without exceeding system specifications (e.g., maximum current) reducing overall memory write time. | 2011-08-11 |
20110194365 | BRIDGE DEVICE ARCHITECTURE FOR CONNECTING DISCRETE MEMORY DEVICES TO A SYSTEM - Bridge device architecture for connecting discrete memory devices is disclosed. A bridge device is used in conjunction with a composite memory device including at least one discrete memory device. The bridge device comprises a local control interface connected to the at least one discrete memory device, a local input/output interface connected to the at least one discrete memory device, and a global input/output interface interposed between the local control interface and the local input/output interface. The global input/output interface receives and provides global memory control signals and also receives and provides write data to and read data from the at least one discrete memory device. | 2011-08-11 |
20110194366 | Nonvolatile Data Storage Devices, Program Methods Thereof, and Memory Systems Including the Same - Provided are methods of programming a nonvolatile data storage device including memory blocks sharing a block word line. The methods may include selecting the memory blocks, and the selected memory blocks may include a first memory block that is to be programmed and a second memory block that is to be program-inhibited. The methods may also include applying a program voltage to a selected word line of the first memory block. The methods may further include applying a bipolar prohibition voltage to word lines of the second memory block. | 2011-08-11 |
20110194367 | SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS - Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to the digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided. | 2011-08-11 |
20110194368 | Regulator and semiconductor device - A regulator including a differential amplifier including a differential input stage that differentially receives a reference voltage and an output terminal voltage of the regulator, a drive transistor that has an output connected to an output terminal of the regulator and that has a control terminal connected to an output of the differential amplifier, a first transistor connected between the control terminal of the drive transistor and a first power supply terminal and a second transistor connected between the control terminal of the drive transistor and a second power supply terminal, wherein a control terminal of the first transistor and a control terminal of the second transistor are connected to a first control signal and a second control signal, respectively, the first transistor being on-off controlled by the first control signal and the second transistor being on-off controlled by the second control signal. | 2011-08-11 |
20110194369 | VARIABLE MEMORY REFRESH DEVICES AND METHODS - Memory devices and methods are described such as those that monitor and adjust characteristics for various different portions of a given memory device. Examples of different portions include tiles, or arrays, or dies. One memory device and method described includes monitoring and adjusting characteristics of different portions of a 3D stack of memory dies. One characteristic that can be adjusted at multiple selected portions includes refresh rate. | 2011-08-11 |
20110194370 | Memory Having Asynchronous Read With Fast Read Output - A memory circuit is disclosed. The memory circuit includes memory cells and asynchronous read decode logic configured to decode a received address and to select particular ones of the memory cells for reading. The read decode logic may be comprised of static, combinational logic, and thus the decoding of the received address may be conducted without the use of a clock signal or a cycle of a clock signal. Accordingly, a read operation may be conducted responsive to receiving the read address, without waiting for a subsequent clock edge. Furthermore, read output logic may also be asynchronous, and thus may provide data read from the memory cells without having to wait for a clock edge. The read output logic may include push-pull driver circuits coupled to global bit lines. The push-pull driver circuits may drive their corresponding global bit lines based on the data read from corresponding memory cells. | 2011-08-11 |
20110194371 | MOTORIZED BONE CEMENT MIXING AND DELIVERY SYSTEM THAT ALLOWS A USER TO DETACH THE DELIVERY DEVICE FROM THE MIXER FOR DELIVERY - A bone cement mixing and delivery system including a mixer and a delivery device. The mixer includes a paddle for mixing the components and a piston that pushes the mixed cement into the attached delivery device. The delivery device includes a tube into which the bone cement is forced from the mixer, and a plunger that forces the cement out of the tube during the medical procedure. The tube includes an entry port through which cement is introduced into the tube from the mixer. A one-way valve attached to the tube allows the cement to flow from the mixer through the entry port. After the cement is loaded in the tube, the delivery device is removed from the mixer. The valve blocks flow out of the entry port when the plunger is depressed. | 2011-08-11 |
20110194372 | METHOD FOR PREPARING A COMPOSITE MATERIAL OF MULTI COMPONENTS - The invention relates to a method for preparing a composite material of more than one component with the steps of providing at least two resin components (K | 2011-08-11 |
20110194373 | METHOD FOR CONTROLLED MIXING OF FLUIDS VIA TEMPERATURE - Embodiments of the invention provide a method for continuous flow production of mixed fluids. The mixed fluids can comprise a mixture of different fluids or a mixture of the same fluid having different input properties such as temperature. In general, two streams of fluid of varying temperature are supplied to a mixer. The flow rate of each of the input fluids can be regulated to produce a mixed fluid at a desired flow rate and temperature. As an example, mass flow controllers can regulate the flow rates of a hot and cold stream of de-ionized water to produce a stream of de-ionized water at a desired flow rate and temperature. | 2011-08-11 |
20110194374 | STIRRING, EMULSIFYING AND SMALL MOLECULE CLUSTERING APPARATUS FOR PRODUCING OIL-WATER FUEL - An apparatus is used to stir and mix water with oil and simultaneously form small water-in-oil molecular clusters in the process of producing emulsion fuel. The apparatus includes a stirring tank and a stirring device located in the tank. The stirring device includes a rotary shaft and at least two axially extended blades connected to the rotary shaft. The blades respectively have a plurality of evenly distributed perforations formed thereon. When the blades rotate, the water and oil in the tank are continuously cut due to the perforations to thereby become evenly mixed with each other. Tourmaline stones or other power stones, collectively referred to as the tourmaline stones herein, are positioned in the stirring tank to electrolyze the water and form small water molecular clusters. The tourmaline stones also cause the water to contain rich amount of anionic surfactants, which emulsify the oil-water fuel to thereby form emulsion fuel. | 2011-08-11 |
20110194375 | METHODS AND SYSTEMS FOR SEISMIC SENSORS - Methods and systems for determining coil eccentricity of seismic sensors configured or designed for use in seismic signal detection. A direct electrical current is applied to a moving coil of a seismic sensor such that the moving coil is dislocated from a neutral position relative to the magnetic field in the seismic sensor. A predetermined indicator is measured and eccentricity of the coil (δ) relative to the center of the magnetic filed is determined using the predetermined indicator. | 2011-08-11 |
20110194376 | Free Charge Carrier Diffusion Response Transducer For Sensing Gradients - Devices for sensing gradients are constructed from material whose properties change in response to gradients. One embodiment of the device is a transducer ( | 2011-08-11 |
20110194377 | APPARATUS AND METHOD FOR IMAGING A SUBSURFACE USING ACCUMULATED ENERGY OF WAVEFIELD - Provided is an apparatus of imaging a subsurface of a target area. The apparatus includes: an observed wavefield acquiring unit configured to acquire an observed wavefield for a target area based on seismic data; a parameter storage configured to store a characteristic parameter for the target area; a modeled wavefield creator configured to create a modeled wavefield corresponding to the observed wavefield using the characteristic parameter stored in the parameter storage; an energy calculator configured to calculate accumulated energies of the observed wavefield and the modeled wavefield, wherein the accumulated energies are defined as energies accumulated over time with respect to the observed wavefield and the modeled wavefield; and a parameter updating unit configured to update the characteristic parameter stored in the parameter storage such that a difference between the accumulated energy of the observed wavefield and the accumulated energy of the modeled wavefield is minimized. | 2011-08-11 |
20110194378 | SEISMIC SOURCE SEPARATION - Seismic acquisition systems are disclosed that allow contemporaneous seismic sources to be separated from a composite signal comprising two or more constituent seismic sources. In some embodiments, a representation of the composite signal may be developed that includes a noise contribution of undesired signals present in the composite signal. Additionally, an operator, referred to herein as an “annihilator”, may be developed such that it may be conditioned and inverted to minimize undesired noise contributions in the composite signal. This inversion may assist in recovering the constituent seismic sources from the composite signal. Furthermore, in some embodiments, the accuracy with which the constituent source measurements are approximated may be increased by implementing them as random sweeps having a conventional length. | 2011-08-11 |
20110194379 | Methods For Subsurface Parameter Estimation In Full Wavefield Inversion And Reverse-Time Migration - Method for converting seismic data to obtain a subsurface model of, for example, bulk modulus or density. The gradient of an objective function is computed ( | 2011-08-11 |
20110194380 | MEASURING APPARATUS - A measuring apparatus includes an acoustic wave detecting unit that detects acoustic waves generated from a subject irradiated with light; and a member that is disposed between the acoustic wave detecting unit and the subject and has an acoustic speed value smaller than an average acoustic speed value inside the subject. And a thickness of the member is greater than a value obtained by dividing the acoustic speed value inside the subject by the minimum frequency detectable by the acoustic wave detecting unit. | 2011-08-11 |
20110194381 | Routine Clock With Variable Indicators - A routine clock for visually and audibly identifying time periods and events is disclosed. The routine clock may have indicators placed on the routine clock that may be variable in size corresponding to variable time periods. Within the time periods, unique events may be identified and when the time for a specific event has been reached, an audio announcement or visual indication or both may occur. | 2011-08-11 |
20110194382 | Chronograph timepiece - To provide a chronograph timepiece which takes up a minimal region and which enables a related lever to return to an original position when a chronograph action instruction button is not pressed. A chronograph timepiece includes a plurality of heart cams, a start-stop button, a reset-to-zero button, a start-stop lever that rotates around a common rotation center when the start-stop button is forced to be inserted, a reset-to-zero instruction lever that rotates around the common rotation center when the reset-to-zero button is forced to be inserted, a hammer operating lever that rotates in a first direction when the start-stop lever rotates and rotates in a second direction when the reset-to-zero instruction lever rotates, and a hammer lever that causes the plurality of heart cams to be reset to zero by corresponding hammer portions when the hammer operating lever rotates in the second direction and causes the hammer portions to be estranged from the heart cams or the estranged states to be maintained when the hammer operating lever rotates in the first direction. | 2011-08-11 |
20110194383 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194384 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194385 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194386 | LIBRARY APPARATUS, STORAGE MEDIUM EXCHANGING DEVICE, AND STORAGE MEDIUM EXCHANGING METHOD - A storage medium exchanging device to discharge a movable cell, which is one of plural magazine cells for storing a storage medium inserted from a doorway, and to store the movable cell, include a carrying part on which the movable cell is mounted; and a wrong insertion preventing part which generates discharging force to make the carrying part discharged from the magazine and blocks at least a part of non-doorway of the discharged movable cell. | 2011-08-11 |
20110194387 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194388 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194389 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194390 | CONTROL METHOD FOR ADJUSTING LASER POWER OF LASER BEAM IRRADIATING MULTI-LAYER OPTICAL STORAGE MEDIUM AND RELATED CONTROLLER THEREOF - An exemplary control method for controlling access of a multi-layer optical storage medium includes: receiving a layer jump request for moving a focus point from a first recording layer of the multi-layer optical storage medium to a second recording layer of the multi-layer optical storage medium, and in response to the layer jump request, adjusting a laser power of a laser beam irradiating the multi-layer optical storage medium from a first power level to a second power level power level. The first power level is utilized for reproducing information from the first recording layer, and the second power level is utilized for reproducing information from the second recording layer. | 2011-08-11 |
20110194391 | LASER DEVICE, OPTICAL PICKUP, AND OPTICAL DISK DEVICE - A laser device includes a semiconductor laser, a signal generating circuit generating a pulse signal for driving the semiconductor laser, an amplifying circuit amplifying the pulse signal, and a control circuit unit provided between the amplifying circuit and the semiconductor laser and controlling the pulse signal by letting alternating-current components of the pulse signal pass through and removing at least part of direct-current components of the pulse signal. | 2011-08-11 |
20110194392 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194393 | RECORDABLE OPTICAL DISK, RECORDING DEVICE, RECORDING METHOD, AND REPRODUCTION DEVICE - The present invention is to realize a proper inner zone layout in an optical disk having at least three layers. A test area is provided in the inner zone (inner circumference side area) in each of recording layers. The test areas of each layer are so disposed as to be prevented from overlapping with each other in the layer direction. Furthermore, the number of management information recording/reproduction areas overlapping with the test area in the layer direction at a position closer to the laser-incident surface than this test area is set equal to or smaller than one in each test area of each recording layer. The management information recording/reproduction areas are each so disposed as to be prevented from overlapping with the test areas in the respective recording layers in the layer direction on the disk substrate side of the test areas. | 2011-08-11 |
20110194394 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194395 | OPTICAL RECORDING MEDIUM, INFORMATION RECORDING METHOD, AND INFORMATION REPRODUCING METHOD - According to one embodiment, an optical recording medium is provided in which interlayer crosstalk is low and in which stable and high-quality recording characteristics can be obtained. To this end, an optical recording medium comprises a first recording part which includes a first recording layer and a first light reflecting layer and which is disposed on a side closer to a light receiving surface, and a second recording part which includes a second recording layer and a second light reflecting layer and which is disposed on a side farther from the light receiving surface, the first recording part and the second recording part being stacked, wherein the thickness of the second light reflecting layer is larger than the thickness of the first light reflecting layer. | 2011-08-11 |
20110194396 | OPTICAL PICKUP APPARATUS, OBJECTIVE OPTICAL ELEMENT AND OPTICAL INFORMATION RECORDING REPRODUCING APPARATUS - An optical pickup apparatus according to the present invention includes: a first light source for emitting a first light flux; a second light source for emitting a second light flux; a third light source for emitting a third light flux; and an objective optical element. The objective optical element has an optical surface including at least two areas provided with optical path difference providing structures. The objective optical element converges the first to third light fluxes each passing through the predetermined areas on the objective optical element onto respective information recording surfaces of the first to third optical disks. The optical pickup apparatus provides a wavelength dependency of a spherical aberration so as to correct a change in a spherical aberration due to a refractive index change with a temperature change of the objective optical element. | 2011-08-11 |
20110194397 | OPTICAL PICKUP DEVICE - An optical pickup device has a DVD/CD laser diode for emitting a DVD/CD laser beam as linear polarized light, and a BD laser diode for emitting a BD laser beam. The optical pickup device has a dichroic mirror that regularly reflects a part of the DVD/CD laser beam, transmits a part of the DVD/CD laser beam, and transmits return light of the BD laser beam. The dichroic mirror is formed so that a product of reflectance of outward light of the DVD/CD laser beam and transmittance of return light of the DVD/CD laser beam becomes 20% or more to 25% or less. A light receiving element receives the return light of the DVD/CD laser beam transmitted through the dichroic mirror or the return light of the BD laser beam transmitted through the dichroic mirror. | 2011-08-11 |
20110194398 | MEMS MEMORY MICROPROBE AND RECORDING APPARATUS - According to one embodiment, a MEMS memory microprobe includes a probe tip, a lever, and a base. The probe tip is arranged to oppose a recording medium and is brought into contact with the recording medium to perform recording or reproduction of information when a current or voltage is applied between them. In the probe tip, a plurality of electrodes used in the recording or reproduction and a plurality of support portions which form the probe tip together with the electrodes are alternately arranged, and the electrodes and the support portions form a single plane which opposes the recording medium. | 2011-08-11 |
20110194399 | Radio frequency transponder for use with a medium - A radio frequency transponder for use with a disc, such as a CD or DVD has an antenna formed by depositing a conductive solution on a surface of disc outside at adjacent to its outer periphery outside of the disc storage area to yield at least one conductive region. A transponder circuit is coupled to the antenna for supplying an RF signal to the antenna in response to a signal received from the antenna. | 2011-08-11 |
20110194400 | Method of Using a Quantized Beamforming Matrix from Multiple Codebook Entries for Multiple-Antenna Systems - A quantized multi-rank beamforming scheme for multiple-antenna systems such as a multiple-input-multiple-output (MIMO) wireless downlink. User equipment (UE) estimates downlink channel and transmit power and determines rank and power allocations. A quantized beamforming matrix is then determined by the UE using successive beamforming. The UE also determines channel quality indices (CQI) which it feeds-back to the wireless downlink base station along with the index of the quantized beamforming matrix. The base station uses the CQI information to select a UE for scheduling of downlink transmission and the quantized beamforming matrix index received from the selected UE to beamform the downlink transmission to the UE. Base station overhead and is minimized while providing near-optimal performance given the constraints of a limited feed-back channel and computational complexity of the UE. | 2011-08-11 |
20110194401 | REFERENCE SEQUENCE CONSTRUCTION FOR FAST CELL SEARCH - A method and apparatus for fast cell search based on a chirp reference signal transmission is disclosed herein. A primary synchronization channel (P-SCH) and two secondary synchronization channels (S-SCH | 2011-08-11 |
20110194402 | METHOD AND APPARATUS FOR WAVEFORM INDEPENDENT RANGING - A system and method for calculating a time of arrival (TOA) of an electromagnetic signal is presented. A method receives a fast Fourier transform (FFT) signal that is a FFT of an original electromagnetic signal containing symbol data. The FFT signal is either multiplied or divided with a value to remove the symbol data. Removing the symbol data generates a perturbed data values representing perturbed signal with a perturbed covariance. The method calculates a perturbed covariance of the perturbed data values. After the perturbed covariance is calculated, the method at least partially corrects the perturbed covariance to produce a corrected covariance. The TOA of the original electromagnetic signal is calculated based, at least in part, on the perturbed covariance. | 2011-08-11 |
20110194403 | Fault isolation in trill networks - In one embodiment, a method includes generating at an ingress routing bridge in a TRansparent Interconnection of Lots of Links (TRILL) network, a trace message for a specified flow along a path from the ingress routing bridge to a destination reachable through the TRILL network, transmitting a single trace message from the ingress routing bridge to a next-hop routing bridge in the TRILL network, receiving a plurality of reply messages in response to the transmitted trace message, and identifying the routing bridges in the path and a location of any fault in the path. An apparatus for fault isolation in a TRILL network is also disclosed. | 2011-08-11 |
20110194404 | SYSTEM AND METHOD FOR FAST PROTECTION OF DUAL-HOMED VIRTUAL PRIVATE LAN SERVICE (VPLS) SPOKES - A novel and useful system and method for fast protection of dual homed Virtual Private LAN Service (VPLS) spokes. Fast protection is achieved by forwarding traffic to the dual homed VPLS spoke from the VSI that is not currently the one currently serving it, as long as the traffic is known unicast. Egress traffic at the VSI that does not currently serve the VPLS-spoke is re-routed over a protection transport entity to the VPLS-spoke through the device of the VSI currently serving it. Broadcast, multicast and unknown (BMU) traffic is sent to the VPLS spoke only by the BMU-primary VSI. BMU frames received at the BMU-secondary VSI are dropped. A fast election process serves to elect the BMU-primary for coordinating between the two VSIs serving the same VPLS spoke. In addition, a flag is inserted in each frame at an ingress VSI to indicate whether the frame is known or unknown unicast. Unknown unicast frames are forwarded to the VPLS spoke only by the BMU-primary. | 2011-08-11 |
20110194405 | NETWORKS HAVING MULTIPLE PATHS BETWEEN NODES AND NODES FOR SUCH A NETWORK - A network ( | 2011-08-11 |
20110194406 | METHOD FOR PROCESSING THE BEARING REESTABLISHMENT FAILURE - A method for processing bearer reestablishment failure is disclosed in the present invention for preventing a SGW from doing error processing due to the bearer reestablishment failure in a SAE network. The method comprises the following steps: a mobility management entity (MME) sending a notification message to a service gateway (SGW) after reestablishment of a bearer, the notification message carrying effectiveness parameters indicating the effectiveness state of the bearer, and the SGW storing the effectiveness parameters; the SGW not delivering data packets if the effectiveness state of the bearer is failure when the SGW is to deliver data packets. | 2011-08-11 |
20110194407 | Systems and Methods of Mobile Relay Mobility in Asynchronous Networks - A system and method of managing adjustment of synchronization timing for handover of a mobile relay is disclosed. The method includes repositioning coverage of the mobile relay from a first network access point to a second network access point and adjusting a synchronization timing of the mobile relay in an asynchronous network of the wireless communication system. | 2011-08-11 |
20110194408 | FAULT TOLERANT MODE FOR 100BASET ETHERNET - Today, 100BaseT is commonly used in industrial Ethernet application. As a result of being in such an environment, Ethernet cables are subject to abuse, which can result in costly failures and repairs. Here, a system is provided that enables use of remaining and largely undamaged twisted-pairs within Ethernet cables to maintain 100BaseT connections without costly repairs and failures. | 2011-08-11 |
20110194409 | OVERSUBSCRIBED PACKET STREAM-BASED INTERCONNECT PROTOCOL - A network device includes a receiver component that generates flow control information. The network device also includes a transmitter component that receives a packet for forwarding to the receiver component, receives flow control data for the packet from the receiver component, and provides the packet and the flow control data for the packet to a fabric component. The fabric component performs a congestion management operation for the packet, and forwards the packet to the receiver component based on the flow control data and results of the congestion management operation. | 2011-08-11 |
20110194410 | Method and Arrangement in a Telecommunication System - A mobile station for use with a mobile network, and being arranged to be assigned one or more Temporary Block Flows, TBFs, by the mobile network, and to receive RLC/MAC Blocks from the mobile network, each of which RLC/MAC Blocks is associated with one of said TBFs, and to identify a received RLC/MAC Block by means of a Temporary Flow Identity, TFI, which has been assigned by the mobile network to the TBF with which the RLC/MAC Block is associated. The mobile station is arranged to recognize TFIs which belong to a first group of TFIs as well as TFIs which belong to a second group of TFIs, with a TFI in the second group comprising a TFI in the first group of TFIs together with additional information in the received RLC/MAC block. | 2011-08-11 |
20110194411 | APPLYING ROUTER QUALITY OF SERVICE ON A CABLE MODEM INTERFACE ON A PER-SERVICE-FLOW BASIS - In one embodiment, a router that accesses a cable network through a cable modem receives, from the cable modem, a plurality of service-flow classifications utilized by the cable modem to describe service flows on the cable network. Based on the received service-flow classifications from the cable modem, the router determines traffic destined for the cable network that corresponds to each service-flow on the cable network. The router receives, from the cable modem, an indication of network backpressure for a particular service-flow on the cable network. The indication of network backpressure is received when a threshold of network backpressure has been surpassed for the particular service-flow on the cable network. The router controls particular traffic that corresponds to the particular service-flow on the cable network based on the indication of network backpressure for the particular service-flow on the cable network. | 2011-08-11 |
20110194412 | METHOD AND APPARATUS FOR WIRELESS RESOURCE ALLOCATION FOR RELAY IN WIRELESS COMMUNICATION SYSTEM - A method of allocating a radio resource for a relay station in a wireless communication system is disclosed. The method comprise allocating a relay zone to the relay station in a subframe and transmitting a relay control channel to the relay station by using the relay zone, wherein the subframe comprises a plurality of orthogonal frequency division multiplexing (OFDM) symbols in a time domain and a plurality of subcarriers in a frequency domain, wherein the subframe is divided into a user zone used by a user equipment in a cell and the relay zone used by the relay station, and wherein the relay zone comprises some of the plurality of subcarriers. According to the present invention, a subframe structure provides backward compatibility with a legacy wireless communication system. A relay station can effectively find a radio resource allocated to the relay station, thereby decreasing a decoding time. | 2011-08-11 |
20110194413 | Receiving Data in a Sensor Network - A sensor network has a plurality of wireless sensors which transmit to an intermediate receiving device which relays data to a central server. A method is provided for receiving data packets at the intermediate receiving device from a plurality of the transmitting devices. Data packets are sensed on a communication medium at the receiving device and the total traffic intensity of data packets from the transmitting devices is estimated. A detection threshold for data packets is provided and adapted as a function of the total intensity. The receiving device receives data packets with a signal strength above the current detection threshold. | 2011-08-11 |
20110194414 | IDENTIFYING MODULAR CHASSIS COMPOSITION BY USING NETWORK PHYSICAL TOPOLOGY INFORMATION - A method and apparatus for identifying internal occupants of a communications system apparatus with an Ethernet backplane and at least one internal occupant. The method comprising: verifying that a system switch processor (“SSP”) has been assigned an IP address; requesting a discovery protocol data package from the SSP; determining whether the discovery protocol data package corresponds to at least one internal occupant; and if the discovery protocol data package corresponds to the at least one internal occupant, then discovering occupant information corresponding to the at least one internal occupant. The apparatus comprising the means for verifying that a system switch processor (“SSP”) has been assigned an IP address; the means for requesting a discovery protocol data package from the SSP; the means for determining whether the discovery protocol data package corresponds to at least one internal occupant; and if the discovery protocol data package corresponds to the at least one internal occupant, then the means for discovering occupant information corresponding to the at least one internal occupant. | 2011-08-11 |
20110194415 | METHOD FOR OPERATING A MESH-TYPE NETWORK, PARTICULARLY AS DEFINED IN AN IEEE 802.11S STANDARD, FORMED BY A PLURALITY OF NETWORK NODES - The invention relates to a method for operating a mesh-type network, particularly as defined in an IEEE 802.11s standard, formed by a plurality of network nodes, said network operating at least a first network node that functions as access point for stations which are dissociated from the network and a second network node that functions as connector point for stations that are dissociated from the network. When switching a dissociated station from a radio service area of the first network node to the radio service area of the second network node in said mesh network, an updating of allocation information of nodes based on a routing failure message which is defined according to a routing protocole valid for the mesh network is carried out. | 2011-08-11 |
20110194416 | COMMUNICATIONS CONTROL METHOD, SIGNAL GENERATING APPARATUS, AND RADIO COMMUNICATIONS APPARATUS INCLUDING THE SIGNAL GENERATING APPARATUS IN MOBILE COMMUNICATIONS SYSTEM - A method of controlling communications is disclosed. The method includes a step of determining whether reception of information from a mobile station is normal; a step of generating a first signal when it is determined to be normal, generating a second signal when it is determined to be abnormal and when the mobile station is instructed to retransmit information using a first radio resource used in previous transmission, and when it is determined to be abnormal and when the mobile station is instructed to retransmit the information using a second radio resource different from the first radio resource, generating the first signal and a third signal including information on the second radio resource; and a step of transmitting any one of the first signal, the second signal, and a combination of the first signal and the third signal, the first signal and the second signal and the combination of the first signal and the third signal being generated by the step of generating. | 2011-08-11 |
20110194417 | SYSTEM AND METHOD TO PROVIDE AGGREGATED ALARM INDICATION SIGNALS - In an example embodiment, a method and system to provide aggregated alarm indication signals is provided. In example embodiments, an affected intermediate node detects a signal failure. A list of affected networks is determined, and a single aggregated alarm indication signal (AIS) message is generated per MEG level. The aggregated AIS message is then multicast to affected nodes. Instead of sending one AIS message per affected network, a single aggregated AIS message from the affected intermediate node may be generated and sent regardless of the number of affected networks. | 2011-08-11 |
20110194418 | IDENTIFICATION OF A FAULT - An apparatus, method, and system are provided for determining a location of an error source. Equalization coefficients may be retrieved and an average period of time between localized peak amplitudes may be determined. The average period of time may be multiplied by a velocity of propagation associated with a communication channel to determine an approximate location of the error source. The equalization coefficients may correspond to the inverse of the frequency response associated with the communication channel and may be updated over time using replacement or combination (e.g., convolution) techniques. | 2011-08-11 |
20110194419 | WIRELESS COMMUNICATION SYSTEM FOR EFFICIENT MULTICAST TRANSMISSION USING ADAPTIVE MODULATION AND CODING MECHANISM - Disclosed is a wireless communication system for efficient multicast transmission using an AMC scheme. The wireless communication system and the AMC scheme enable a user participating in a multicast group to be provided with efficient service, and provide more users with a multicast broadcast service through the AMC scheme using a proposed group MCS level determination algorithm. | 2011-08-11 |
20110194420 | METHOD FOR EFFICIENTLY PERFORMING COVERAGE LOSS OPERATION DURING SLEEP MODE IN A BROADBAND WIRELESS ACCESS SYSTEM - A method for detecting coverage loss during a sleep mode of a mobile station and an apparatus for performing the same are disclosed. The method for detecting coverage loss of a mobile station, which is operated in a sleep mode, in a broadband wireless access system comprises the steps of awaking regardless of a sleep window of a sleep cycle at a first time when a super frame header (SFH) is transmitted from a serving base station; detecting the super frame header; and operating for the sleep window or listening window in accordance with the sleep cycle if the detected result is successful, and awaking until the super frame header is successfully detected if the detected result is failed. | 2011-08-11 |
20110194421 | System and Method of Controlling In-Bound Path Selection Based on Historical and Continuous Path Quality Monitoring, Assessment and Predictions - A system and method of automatically controlling in-bound traffic from a first communications peer to a second communications peer based on an input from a historical path quality assessment and prediction system is disclosed. The second communications peer receives an input from the historical path quality assessment and prediction system, selects a path through a relay based on the received input, requests allocation of the relay, and sends an address of the selected relay to the first communications peer. The system and method works in concert with an Interactive Connectivity Establishment (ICE) mechanism, or takes advantage of the features of the Interactive Connectivity Establishment (ICE) mechanism. | 2011-08-11 |
20110194422 | COMMUNICATION INFORMATION ACQUISITION CREATION SYSTEM, NETWORK SWITCH, AND NETWORKS SWITCH EVALUATION METHOD - The present invention provides a communication information acquisition creation system | 2011-08-11 |
20110194423 | MOBILE STATION APPARATUS AND METHOD FOR TRANSMITTING SIGNALS IN WIRELESS COMMUNICATION SYSTEM - A method for transmitting signal, at a mobile station, in a wireless communication system is provided. Inter-cell interference level control parameter information may be different for each frequency partition due to use of an FFR scheme. This method is advantageous in that, when uplink transmission is performed, system throughput and cell edge-user throughput are improved and inter-cell interference level control is efficiently performed, thereby improving a Signal to Interference plus Noise Ratio (SINR) at the receiving end. | 2011-08-11 |
20110194424 | APPARATUS AND METHOD FOR MEASURING HOME CELL/PRIVATE NETWORK CELL IN MOBILE COMMUNICATION SYSTEM - Disclosed is a method of measurement on a home cell/private network cell, by a user equipment (UE), in a mobile communication system, the method including the steps of: transmitting a request message requesting the measurement to a network node, the request message including an indicator instructing at least one of register, join, and use of the home cell/private network cell; receiving a response message corresponding to the request message from the network node, the response message including context information for measurement control of at least one home cell/private network cell accessible by the UE; and selectively executing measurement on the accessible home cell/private network cell by using the context information. | 2011-08-11 |
20110194425 | REMOTE NETWORK DEVICE COMPONENT TESTING - A network device receives, from a remote user device, a requested test that includes test Internet protocol (IP) packets, and converts the test IP packets into hardware test commands. The network device also performs, based on the hardware test commands, the requested test on a component of a network device card to produce hardware test results. The network device further converts the hardware test results into test results in an IP packet format, and provides the tests results in the IP packet format to the remote user device. | 2011-08-11 |
20110194426 | HIERARCHICAL QUEUING AND SCHEDULING - In an example embodiment, there is disclosed herein logic encoded in at least one tangible media for execution and when executed operable to receive a packet. The logic determines a client associated with the packet. The client associated with a service set, and the service set associated with a transmitter. The logic determines a drop probability for the selected client determines a current packet arrival rate for the selected client and determines whether to enqueue or drop the packet based on the drop probability for the selected client and the current packet arrival rate associated with the selected client. The drop probability is based on a packet arrival rate and virtual queue length for the, which is based on a packet arrival rate and virtual queue length for the service set that is based on a packet arrival rate and virtual queue length for the transmitter. | 2011-08-11 |
20110194427 | RESOURCE SELECTION FOR DUAL RADIO TERMINALS - Systems, methods and apparatus described herein include features that enable dual radio access. In one embodiment, the access point directs an access terminal through sequential measurements, which are selected by the access point based on the radio access capability of the access terminal, service preferences of the user and measurement reports. In a complementary method, an access terminal obtains the sequential measurements chosen by the access point. In another embodiment, the access point directs an access terminal through a set of measurements, which are selected by the access point based on the radio access capability of the access terminal and service preferences of the user. In another embodiment, an access terminal selects which subset of measurements to obtain based on the radio access capability of the access terminal and optionally service preferences of the user. | 2011-08-11 |