| 31st week of 2011 patent applcation highlights part 20 |
| Patent application number | Title | Published |
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| 20110187363 | METHOD AND APPARATUS FOR SENSING THE PRESENCE OF EXPLOSIVES, CONTRABAND AND OTHER MOLECULES USING NUCLEAR QUADRUPOLE RESONANCE - Stimulated emissions due to nuclear quadropole resonance are detected utilizing a terminated balanced transmission line and a directional coupler for the detection of explosives, contraband, narcotics and the like that exist between the transmission lines, with either a stepped frequency generator utilized to scan between 100 KHz and 10 MHz, or wherein parallel fixed frequency sources are coupled to the transmission line, thereby to permit correlation with expected lines, with the frequency sources being low power so as to not create a safety hazard and so as not to interfere with radiation sensitive devices such as film or electronic circuits that are in the vicinity of the balanced transmission line. | 2011-08-04 |
| 20110187364 | DETERMINING A POSITION OF A SUBAREA OF AN OBJECT UNDER EXAMINATION AND THE STRUCTURE THEREOF IN A MAGNETIC RESONANCE SYSTEM - A method is disclosed for determining a location of a subarea of an area under examination in a magnetic resonance system. The subarea is arranged at the edge of a field-of-view of the magnetic resonance system. In at least one embodiment of the method, at least one slice position is determined for an MR image in which the B | 2011-08-04 |
| 20110187365 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - In one embodiment, a magnetic resonance imaging apparatus includes an input unit and a direction setting unit. The input unit receives a setting operation to set a plurality of image taking regions within a position determining image, from an operator of the apparatus. The direction setting unit sets phase encoding directions for the plurality of image taking regions to be in the same direction as one another, regardless of setting operations performed by the operator via the input unit. | 2011-08-04 |
| 20110187366 | METHOD AND MAGNETIC RESONANCE DEVICE FOR IMAGING OF PARTICLES - In a magnetic resonance method and apparatus for imaging a particle that is located in an examination subject, a pulse sequence is emitted that includes an excitation pulse that generates a transverse magnetization of the examination subject from a magnetization appearing in a basic magnetic field, so the particle causes a magnetic interference field in the applied basic magnetic field in a magnetic resonance measurement. After the excitation pulse, at least one spectrally selective refocusing pulse is generated in a non-resonant frequency range at the generation of a spin echo. | 2011-08-04 |
| 20110187367 | METHOD AND MAGNETIC RESONANCE SYSTEM TO REDUCE DISTORTIONS IN DIFFUSION IMAGING - In a method and magnetic resonance apparatus to reduce distortions in magnetic resonance diffusion imaging, a magnetic resonance data acquisition system is operated to acquire magnetic resonance data in a first measurement with a first diffusion weighting, and to acquire magnetic resonance data in a second measurement with a second, different diffusion weighting. A non-linear, system-specific distortion-correcting function is determined on the basis of system-specific information that is specific to said magnetic resonance data acquisition system. Correction parameters are calculated to correct distortions in subsequently-acquired diffusion-weighted magnetic resonance images, based on the data acquired in the first and second measurements with the system-specific distortion-correcting function applied thereto. The subsequently-acquired diffusion-weighted magnetic resonance images are corrected using the correction parameters to at least reduce distortions therein. | 2011-08-04 |
| 20110187368 | MAGNETIC RESONANCE METHOD AND SYSTEM TO CREATE AN IMAGE DATA SET - In a magnetic resonance method and system to create a difference image, essentially only one k-space point in a k-space data set belonging to the difference image is acquired at least twice in the form of k-space measurement values after a radiation of an RF excitation pulse. The difference image is thereby created depending on acquired k-space data set by means of taking the difference of the respective at least two results acquired per k-space point. For each essentially only one k-space point shift multiple phase coding gradients are activated in respective spatial directions, followed by a first readout of the essentially only one k-space point for an acquisition of a first of the k-space measurement values. The phase coding gradients are subsequently modified such that a gradient moment for each of the phase coding gradients is zero for a time period from the first readout of the essentially only one k-space point up to a second readout of the essentially only one k-space point. The essentially only one k-space point is subsequently read out a second time. | 2011-08-04 |
| 20110187369 | MAGNETIC RESONANT IMAGING GRADIENT DRIVER ARCHITECTURE - Embodiments of the present disclosure include a magnetic resonant imaging (MRI) system including a gradient driver configured to deliver a pulse sequence to gradient coils in the MRI system. The gradient driver may be interleaved, and may include two or more interleaved drivers, such that a high amplitude pulse may be output by operating the two interleaved parts of the gradient driver while spreading the electrical loss and maintaining the thermal stability of the system. In one embodiment, each interleaved driver may be rated to output approximately half a maximum amplitude of a current utilized by the gradient coil, and only one interleaved driver may be in operation if only one interleaved driver is sufficient for delivering a necessary pulse to the coils. Further, the interleaved drivers may alternate in operation to maintain thermal stability in the switching semiconductors of the gradient driver. | 2011-08-04 |
| 20110187370 | GRADIENT FIELD POWER SUPPLY AND MAGNETIC RESONANCE IMAGING APPARATUS - According to one embodiment, there is provided a magnetic resonance imaging apparatus in which a gradient field power supply apparatus supplies currents to gradient field coils corresponding to spatial coordinate axis directions to form gradient fields in a static field space which change along the respective spatial coordinate axis directions, the gradient field power supply apparatus includes a transformer configured to supply power supplied to a primary winding to a current output circuit via a plurality of secondary windings, with the number of phases of the primary windings being equal to or a multiple of the number of phases of the secondary windings, and the secondary windings of the respective phases of output channels corresponding to the respective spatial coordinate axis directions being wound around the primary windings of the respective phases. | 2011-08-04 |
| 20110187371 | Transmit-Receive Switching Circuit for NMR Spectrometer and NMR Spectrometer Incorporating Same - A transmit-receive switching circuit is offered which is for use in an NMR spectrometer that employs a solid-state NMR probe using a cooled detection coil. The switching circuit is cryogenically cooled to reduce thermal noise in use. The switching circuit has a first terminal for applying high-power RF pulses sent in from the power amplifier of the NMR spectrometer, a second terminal for sending the RF pulses applied from the first terminal to the NMR detector via crossed-diodes and for receiving and entering a low-power NMR signal detected by the NMR detector, and a third terminal for sending the NMR signal entered from the second terminal toward a preamplifier. Plural stages of shunts are connected to the transmission line connecting the second and third terminals such that one stage of shunt corresponds to a 90° phase shift in the RF radiation. | 2011-08-04 |
| 20110187372 | Acoustic Excitation With NMR Pulse - NMR measurements are made along with acoustic measurements using one tool. The antenna of the NMR sensor is used to create acoustic signals. Interference between the acoustic and NMR measurements is avoided due to the frequency difference, and by having the acoustic excitation during a wait time of the NMR pulse sequence. | 2011-08-04 |
| 20110187373 | STEERABLE MAGNETIC DIPOLE ANTENNA FOR MEASUREMENT-WHILE-DRILLING APPLICATIONS - A steerable or non-steerable, magnetic dipole antenna for Measurement-While-Drilling (MWD) or Logging-While-Drilling (LWD) applications. The antenna elements use a hole arrangement in addition to grooves in a steel tool body, which is typically a drill collar. This antenna embodiment is extremely robust, meaning that does not significantly reduce the structural integrity of the tool body in which it is disposed. The antenna embodiment is also relatively wear resistant. The resultant magnetic dipole generated by this antenna is also electrically steerable in inclination angle from a common origin. A variable dipole moment inclination angle combined with independently measured tool rotation orientation during normal drilling allows the antenna to generate a magnetic dipole moment that may be directed at any three dimensional angle and from a common origin point at the centroid of the antenna. The antenna can also be embodied to be more sensitive to resitivity in a particular azimuthal direction. | 2011-08-04 |
| 20110187374 | Microresistivity Imaging with Differentially Raised Electrodes - A microresistivity logging tool includes a measuring electrode deployed in and electrically isolated from a guard electrode. The measuring electrode is radially recessed with respect to at least a portion of the guard electrode. The raised portion of the guard electrode preferably extends radially outward from the tool body such that it contacts the borehole wall during drilling. A return electrode is spaced and electrically insulated from the guard electrode. Tools in accordance with the present invention enable good current focusing to be achieved while at the same time providing protection for the measuring electrode. | 2011-08-04 |
| 20110187375 | MEASURING DEVICE OF THE ELECTRIC PROPERTIES OF SOLID OR LIQUID GEOLOGICAL SAMPLES - The present invention relates to a measuring device ( | 2011-08-04 |
| 20110187376 | System and Method for Testing a Circuit - In one embodiment, a sensor for circuit testing has a first terminal and a second terminal. The first terminal is configured to be coupled to a first node of a first circuit via a first capacitor, and the second terminal is configured to be coupled to a second node of the first circuit. The sensor also has at least one transmitter and at least one receiver that measures a first transmission factor between the first terminal and the second terminal. The sensor determines that the first circuit is in a first state if the first transmission factor is above a first threshold, and determines that the first circuit is in a second state if the first transmission factor is below the first threshold. | 2011-08-04 |
| 20110187377 | Battery Charger Tester With Individual Cell Temperature Measurement - A method and apparatus for sensing the temperature of each individual cell of a battery during the testing and charging. The method and apparatus can monitor the temperature of the cells of the battery, the charger or both. Additionally, a user can be notified when the temperature is at or exceeds a predetermined level. The temperature data is also used to aid in efficiently charging the battery and determining of the battery is defective. | 2011-08-04 |
| 20110187378 | STATE OF CHARGE DETERMINATION FOR AN ELECTRICAL ACCUMULATOR - In a method for determining the state of charge of an electrical accumulator, individual cell voltages are recorded, and the highest and/or the lowest individual cell voltage is ascertained. A present maximum charge and/or a present minimum charge of the appertaining accumulator cell is determined using a characteristic curve and the highest and/or the lowest individual cell voltage. | 2011-08-04 |
| 20110187379 | Discharge Ionization Current Detector - A discharge ionization current detector capable of supplying plasma gas in large quantity to stabilize plasma simultaneously with lowering the sample dilution ratio to improve detection sensitivity is provided. A gas supply pipe | 2011-08-04 |
| 20110187380 | System for Locating a Partial Break in a Wire Loop Antenna - Described is a system for locating a partial break in a wire loop antenna. More specifically, the system generates two test signals, each test signal having a signal pattern distinguishable from the other. The system transmits the test signals by way of the antenna such that each test signal radiates from the antenna. The system receives the radiating test signals and generates a signal indicator for each test signal, each signal indicator reflecting properties of its respective test signal. Each signal indicator is analyzed with respect to the other to determine the location of the partial break. Because the test signals have distinguishable signal patterns, the analysis of the signal indicators is simplified and, in certain circumstances, made possible. | 2011-08-04 |
| 20110187381 | Time Domain Reflectometry in a Coherent Interleaved Sampling Timebase - A system and method for performing a time domain reflectometry measurement. The system includes a coherent interleaved sampling timebase, a sampling strobe generator for generating one or more sampling strobes in accordance with the coherent interleaved sampling timebase, a time domain reflectometry sampling strobe generator for generating one or more time domain reflectometry strobes in accordance with one or more of the generated sampling strobes; and a sampling module for sampling a time domain reflectometry signal in accordance with one or more of the one or more generated sampling strobes and one or more of the one or more generated time domain reflectometry strobes. The system further includes an analog to digital converter for analog to digital converting the samples of the time domain reflectometry signal and a memory for storing the converted samples of the time domain reflectometry signal. | 2011-08-04 |
| 20110187382 | Dielectric Film and Layer Testing - A system for testing and a method for making a semiconductor device is disclosed. A preferred embodiment includes a conductor overlying a dielectric layer. The conductor is coupled to a first test pad via a first conducting line and to a second test pad via a second conducting line. | 2011-08-04 |
| 20110187383 | STATUS DETECTING DEVICE AND STORAGE MEDIUM STORING PROGRAM - A status detecting device that includes a first contact member, a second contact member, an applying component, a grounding component, a detecting component, and an executing component is provided. The applying component applies a predetermined voltage to the first contact member. The grounding component grounds the second contact member. The detecting component detects at least one of a potential between the applying component and the first contact member, or a potential between the second contact member and the grounding component. The executing component executes predetermined processing, based on a detection result from the detecting component. | 2011-08-04 |
| 20110187384 | ELECTRICAL INTERCONNECTION INTEGRATED DEVICE WITH FAULT DETECTING MODULE AND ELECTRONIC APPARATUS COMPRISING THE DEVICE - An electrical interconnection integrated device is described, comprising: a plurality of electrical terminals connectable to an integrated electronic circuit on a chip common to said interconnection device; at least an inside electrical device provided with a respective input connected to a first terminal of said plurality and a respective output; a fault detecting logic module having a first input connected to said output of the inner electrical device and provided with a detecting terminal for supplying a fault detecting signal. | 2011-08-04 |
| 20110187385 | CABLE TEST METHOD - A cable testing method includes a tester that includes at least one connector electrically coupled, such as by conductive traces, to a computer. Both ends of the cable are connected to the at least one connector. The computer then sends a signal to one of the conductive traces of the conductor, at one of the ends of the cable, while at the same time monitoring for a signal at the other contacts of the conductor that are in contact with conductive traces of the cable. The process of sending power while monitoring may then be repeated for other of the conductive traces of the cable, for example until substantially all of the conductive traces of the cable are tested. The process of testing multiple of the conductive traces sequentially may be performed automatically by the computer, allowing performance of the cable to be tested quickly, completely, and accurately. | 2011-08-04 |
| 20110187386 | METHOD OF DETECTING MEM DEVICE FAULTS WITH SINGLE CURRENT PULSE - A method of detecting a fault within a micro electro-mechanical device is provided. The micro electro-mechanical device has a support structure and an actuating arm that is movable relative to the support structure because of thermal expansion of at least part of the actuating arm caused by heat inducing current flow through at least that part. The method comprises the steps of passing a first current pulse having a predetermined duration t | 2011-08-04 |
| 20110187387 | METHOD OF GENERATING A SCENARIO OF ELECTROMAGNETIC NOISE - Method of generating a scenario of electromagnetic noise for monitoring the reliability of a sensitive apparatus, characterized in that it includes the steps consisting in: defining environmental electromagnetic conditions relating to the environment of the sensitive apparatus, determining a positioning of the sensitive apparatus in the environment, and generating, on the basis of the environmental electromagnetic conditions and of the positioning of the sensitive apparatus, a scenario of electromagnetic noise including a set of permanent noises and a set of transient noises. | 2011-08-04 |
| 20110187388 | SINGLE-USE BIOMASS SENSING DEVICE, METHOD FOR PRODUCING THIS DEVICE AND SINGLE-USE BIOREACTOR INCORPORATING THIS SENSOR - A single use bioreactor or container including an enclosure provided for containing a biological medium, and at least one device for making at least one impedance measurement in a physical, physico-chemical and/or biological process in this medium. The sensing device is fixed through a wall of the enclosure in such a way as to be an integral part thereof and includes a detection part in direct contact with an inside of the bioreactor or container and a connection part extending towards an outside of the enclosure. | 2011-08-04 |
| 20110187389 | CAPACITANCE MEASURING CIRCUIT FOR TOUCH SENSOR - Disclosed herein is a capacitance measuring circuit for a touch sensor. The capacitance measuring circuit includes a reference voltage generation unit for generating a first reference voltage and a second reference voltage, a MUX unit for selecting one from among electrode voltages, a voltage comparator for comparing a voltage generated by the reference voltage generation unit with the electrode voltage, a charging/discharging circuit unit for performing charging of the input electrode voltage from the first reference voltage to the second reference voltage or performing discharging of the input electrode voltage from the second reference voltage to the first reference voltage, a timer unit for receiving an external control signal, measuring charging time and discharging time of the charging/discharging circuit unit, measuring entire charging time and entire discharging time, and outputting corresponding output signals, and a control unit for receiving an output signal of the voltage comparator and the external control signal, and controlling the charging/discharging circuit unit and the timer unit. | 2011-08-04 |
| 20110187390 | TOUCH SENSING SYSTEM, CAPACITANCE SENSING CIRCUIT, AND CAPACITANCE SENSING METHOD - A touch sensing system including a touch input interface and a capacitance sensing circuit is provided. The touch input interface includes a plurality of sensing capacitors for outputting a capacitance under test and a reference capacitance. The capacitance sensing circuit includes a first sensing channel, a second sensing channel, and a difference comparing unit. During a first period of the sensing period, the first sensing channel senses the capacitance under test, and the second sensing channel senses the reference capacitance. During a second period of the sensing period, the first sensing channel senses the reference capacitance, and the second sensing channel senses the capacitance under test. The difference comparing unit outputs a difference according to the capacitance under test and the reference capacitance. Additionally, a capacitance sensing method is also provided. | 2011-08-04 |
| 20110187391 | METHOD FOR DETECTING DETACHMENT OF A REINFORCING COMPONENT - A method for detecting detachment of a reinforcing component that is attached to a body skin component of a vehicle body of a vehicle, the body skin component and the reinforcing component forming an electric capacitor together with an intermediate adhesive layer, said capacitor having a capacitance that changes if there is at least partial detachment of the body skin component from the reinforcing component, the capacitance of the capacitor or a change in the capacitance of the capacitor being measured in order to detect detachment of the reinforcing component. | 2011-08-04 |
| 20110187392 | FLOW METER - A flow meter includes a main body having a first end and a second end, a flexible electrical resistor coupled to the main body and extending outwardly from the second end thereof, wherein an electrical resistance of the flexible electrical resistor varies in response to a flexure thereof, and an electrical circuit in electrical communication with the electrical resistor to detect a flexure of the electrical resistor. | 2011-08-04 |
| 20110187393 | MOISTURE DETECTION SENSORS FOR BUILDING STRUCTURES - A moisture detection sensor self-adhesive tape is used in a building structure to detect moisture penetration and includes a substrate of dielectric, hydrophobic material. Two elongate, parallel, conductors are secured to the top surface of the substrate and a protective layer of non-hygroscopic, water pervious material secured to the to the top surface of the substrate, over the conductors. A pressure sensitive mounting adhesive is placed on a bottom surface of the substrate and covered with a release sheet. The sensor may include moisture probes adapted to penetrate the protective layer, the respective conductors and the substrate and to extend into a building component to which the substrate has been adhered. The preferred moisture probe is a U-shaped metal staple configured to be driven in by a conventional power stapler. | 2011-08-04 |
| 20110187394 | Method and Device for Checking the Seal of Structural Seals - A method for determining damaged faulty and/or weak points in a structural seal. The seal is provided with an electrically conductive layer arranged inside or outside the structural seal and extends over substantially the entire surface of the structural seal and to which layer an electrical test voltage is applied. To establish the damaged, faulty and/or weak points, a further electrically conductive layer is used, which is electrically separated from the aforementioned electrically conductive layer by the structural seal and extends over substantially the entire surface of the structural seal. The level of the test voltage between the electrically conductive layers charged with voltage is selected such that when at least one electrically non-conductive damaged, faulty and/or weak point is present in the structural seal, the electrical disruptive strength is exceeded and an electric spark or arc is formed at the location of the damaged, faulty and/or weak point. | 2011-08-04 |
| 20110187395 | CORROSION SENSORS - A corrosion sensor includes an insulating substrate, a thin film of a first metallic material formed on the substrate; and an array of areas what includes a second metallic material provided at the surface of the thin film. A method for manufacturing such a sensor is also disclosed. An exemplary embodiment is disclosed in which the thin film is patterned to define a number of tracks, the resistance of which can be monitored in order to determine the degree to which the thin film has corroded. | 2011-08-04 |
| 20110187396 | QUIESCENT CURRENT (IDDQ) INDICATION AND TESTING APPARATUS AND METHODS - An embodiment of an electronic device includes a logic circuit, a switching element, and a quiescent current (IDDQ) evaluation circuit. The logic circuit is coupled to a first ground node. The switching element is coupled between the first ground node and a second ground node. The switching element is configurable in an electrically non-conductive state when the electronic device is in an IDDQ evaluation state, and in an electrically conductive state when the electronic device is not in the IDDQ evaluation state. When the electronic device is in the IDDQ evaluation state, the IDDQ evaluation circuit is configured to provide a first output signal when an IDDQ indicating voltage across the first and second ground nodes exceeds a reference voltage. Other embodiments include methods for producing an indication of IDDQ in an electronic device and methods for fabricating an electronic device with the capability of producing an IDDQ indication. | 2011-08-04 |
| 20110187397 | Cantilever Microprobes For Contacting Electronic Components and Methods for Making Such Probes - Embodiments disclosed herein are directed to compliant probe structures for making temporary or permanent contact with electronic circuits and the like. In particular, embodiments are directed to various designs of cantilever-like probe structures. Some embodiments are directed to methods for fabricating such cantilever structures. In some embodiments, for example, cantilever probes have extended base structures, slide in mounting structures, multi-beam configurations, offset bonding locations to allow closer positioning of adjacent probes, compliant elements with tensional configurations, improved over travel, improved compliance, improved scrubbing capability, and/or the like. | 2011-08-04 |
| 20110187398 | Cantilever Microprobes For Contacting Electronic Components and Methods for Making Such Probes - Embodiments disclosed herein are directed to compliant probe structures for making temporary or permanent contact with electronic circuits and the like. In particular, embodiments are directed to various designs of cantilever-like probe structures. Some embodiments are directed to methods for fabricating such cantilever structures. In some embodiments, for example, cantilever probes have extended base structures, slide in mounting structures, multi-beam configurations, offset bonding locations to allow closer positioning of adjacent probes, compliant elements with tensional configurations, improved over travel, improved compliance, improved scrubbing capability, and/or the like. | 2011-08-04 |
| 20110187399 | SIGNAL DISTRIBUTION STRUCTURE AND METHOD FOR DISTRIBUTING A SIGNAL - A signal distribution structure for distributing a signal to a plurality of devices includes a first signal guiding structure including a first characteristic impedance. The signal distribution structure also includes a node, wherein the first signal guiding structure is coupled to the node. The signal distribution structure includes a second signal guiding structure including one or more transmission lines. The one or more transmission lines of the second signal guiding structure are coupled between the node and a plurality of device connections. The second signal guiding structure includes, side-viewed from the node, a second characteristic impedance which is lower than the first characteristic impedance. The signal guiding structure also includes a matching element connected to the node. | 2011-08-04 |
| 20110187400 | SEMICONDUCTOR TEST APPARATUS AND TEST METHOD - In a semiconductor test apparatus, a first device is tested as a device under test in a state where the first device provided with a transmitter transmitting a signal and a second device provided with a receiver receiving the signal transmitted by the transmitter, are connected together. The transmitter includes an equalizer circuit that shapes the waveform of the differential signal to be transmitted. The receiver includes a latch circuit that latches data corresponding to the differential signal thus received with the use of a clock, the timing of which is variable. A control unit varies, in a matrix, a parameter of the equalizer circuit and an edge timing of the clock CLK supplied to the latch circuit. | 2011-08-04 |
| 20110187401 | Test Couplet With Strip Conductor Technology - A test coupler for supplying a device under test with test signals contains a first coaxial connector, a waveguide port, and a first strip conductor. Test signals of a lower frequency range are supplied to the first coaxial connector. Test signals of an upper frequency range are supplied to the waveguide port. The test coupler guides the test signals on the first strip conductor to the device under test. | 2011-08-04 |
| 20110187402 | POWER SUPPLY TESTING SYSTEM - A system includes a plurality of power supply units to be tested, an electric load, a power meter, a multimeter, and a computer. Each of the plurality of power supply units has an input terminal connected to an AC power source via a switch module and an output terminal capable of outputting a plurality of power rails to an output bus via the switch module. The electric load is connected to the output bus for receiving the plurality of power rails. The power meter is configured for measuring an input power of each of the plurality of power supply units. The multimeter is configured for measuring an output power of each of the plurality of power supply units. The computer configured to calculate a conversion efficiency of each of the plurality of the power supply units. | 2011-08-04 |
| 20110187403 | SYSTEM FOR TESTING POWER SUPPLY PERFORMANCE - A system for testing DC power supply performance includes a control circuit electrically connected to the DC power supply, a test device, and a control device electrically connected to the test device. The control circuit includes a micro controller capable of outputting control signals, a switch control module, and a switch module. The switch control module receives the control signals and powers up according to the control signals. The switch module is electrically connected to the DC power supply input and output terminals respectively, under control of the switch control module. The test device is electrically connected to the switch module and is electrically connected with the DC power supply input and output terminals according to the control signals. The test device reads voltages at the DC power supply input and output terminals which are transmitted to the control device. | 2011-08-04 |
| 20110187404 | METHOD OF DETECTING FAILURE AND MONITORING APPARATUS - A method of detecting a failure in an information processing apparatus is provided. The method includes detecting at least one of a power supply failure and a unit failure, monitoring the detected unit failures, and determining a detected unit failure for a first unit is erroneous if the monitoring indicates another of the units receiving power from a same power supply system as the first unit has also detected a unit failure. The power supply failure indicates a failure associated with a power supply system affecting more than one of the units, and the unit failure indicates a failure of one of the units. | 2011-08-04 |
| 20110187405 | TRANSCEIVER CIRCUITS - A transceiver circuit supports a bidirectional mode and the bidirectional transceiver circuit is signal-compatible with JEDEC SSTL 2. A differential transceiver circuit supports a bidirectional mode and is also signal-compatible with JEDEC SSTL 2. Finally, transceiver circuits which, in interaction with the bidirectional transceiver circuits, allow a bus system to be set up. | 2011-08-04 |
| 20110187406 | Semiconductor Chip And Semiconductor Module Including The Semiconductor Chip - A semiconductor chip including a termination resistance and a semiconductor module including the semiconductor chip. The semiconductor chip comprising a plurality of memory cells, the semiconductor chip including: at least one first center pads disposed on a center region of the semiconductor chip and connected to the plurality of memory cells; at least one first edge pads disposed on an edge region of the semiconductor chip and connected to a first transmission line of a semiconductor module; at least one second edge pads disposed on the edge region of the semiconductor chip and connected to a chipset voltage application unit of the semiconductor module; at least one first redistribution patterns connected between the at least one first center pads and the at least one first edge pads; and at least one second redistribution patterns connected between the at least one first edge pads and the at least one second edge pads, wherein an impedance of the at least one second redistribution patterns is impedance matched to an impedance of the first transmission line. | 2011-08-04 |
| 20110187407 | RADIO FREQUENCY-ENABLED ELECTROMIGRATION FUSE - Embodiments of the invention provides a method, device, and system for programming an electromigration fuse (eFuse) using a radio frequency (RF) signal. A first aspect of the invention provides a method of testing circuitry on a semiconductor chip, the method comprising: receiving a radio frequency (RF) signal using at least one antenna on the semiconductor chip; powering circuitry on the semiconductor chip using the RF signal; activating a built-in self test (BIST) engine within the circuitry; determining whether a fault exists within the circuitry using the BIST; and programming an electromigration fuse (eFuse) to alter the circuitry in response to a fault being determined to exist. | 2011-08-04 |
| 20110187408 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus has a plurality of chips stacked therein, and generation timing of read control signals for controlling read operations of the plurality of stacked chips is controlled such that times after a read command is applied to when data are outputted from respective chips are made to substantially correspond to one another. | 2011-08-04 |
| 20110187409 | RECONFIGURABLE SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes: a plurality of the functional blocks; a plurality of configuration data memories in which a plurality of configuration data are stored; and a plurality of programmable switches configured to control connection between said plurality of functional blocks based on one of the plurality of configuration data which is stored in a common one of said plurality of configuration data memories. | 2011-08-04 |
| 20110187410 | NONVOLATILE LATCH CIRCUIT AND LOGIC CIRCUIT, AND SEMICONDUCTOR DEVICE USING THE SAME - To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion configured to hold data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element. In addition, a capacitor electrically connected to a source electrode or a drain electrode of the transistor is included. | 2011-08-04 |
| 20110187411 | SEMICONDUCTOR INTEGRATED CIRCUIT FOR CONTROLLING OUTPUT DRIVING FORCE - A semiconductor integrated circuit includes a pre driver unit configured to receive a pre drive signal and a driving force control signal and output a main drive signal; a main driver unit configured to receive the main drive signal and output output data to an output terminal; a terminal connecting unit configured to receive a determination signal and connect to or disconnect from the output terminal in response to the determination signal; a terminal sensing unit configured to sense the output terminal and output a terminal state signal; and a driving force determining unit configured to receive a reset signal and the terminal state signal and output the driving force control signal. | 2011-08-04 |
| 20110187412 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICES - Improvements in Complementary Metal Oxide Semiconductor (CMOS) devices; in particular, field effect transistors (FETs) and devices using said transistors which are able to take advantage of the higher carrier mobility of electrons compared to holes by replacing the conventional p-channel transistor with an n-channel transistor having a double gate (or vice versa): Such a Unipolar CMOS (U-CMOS) transistor can be realised by adapting the source and/or the drain such that when the body region undergoes inversion at a first surface current, is able to flow between the drain and the source and when the body region undergoes inversion at a second surface current is not able to flow between the drain and the source. Various logic gates may be constructed using U-CMOS transistors. | 2011-08-04 |
| 20110187413 | PHASE DETECTING CIRCUIT AND PLL CIRCUIT - A phase detecting circuit includes a latch circuit that switches, based on an OR signal and an AND signal of two clock signals to be subjected to phase comparison, one of outputs used for generation of two pulse signals on an advance phase side and a delay phase side to a preparation operation state for performing the phase comparison and a circuit operation state after the phase comparison, and holds the output in the states. | 2011-08-04 |
| 20110187414 | PBTI TOLERANT CIRCUIT DESIGN - In an embodiment related to a sense amplifier, the sense amplifier includes a cross latch includes a pair of nodes, a first pair of transistors, a second pair of transistors, a third node, and a circuit. The pair of nodes includes a first node and a second node configured to store data for the sense amplifier. The second pair of transistors includes a first NMOS transistor and a second NMOS transistor. A first gate of the first NMOS transistor is coupled to the first node, and a second gate of the second NMOS transistor is coupled to the second node. The third node is coupled to a first source of the first NMOS transistor and a second source of the second NMOS transistor. When appropriate, the circuit is configured to provide a voltage level to the third node. | 2011-08-04 |
| 20110187415 | TRANSMISSION INPUT CIRCUIT - A transmission input circuit of the present invention is provided with: a current detection resistor which receives an input of a line current flowing through a transmission line and generates a line current detection voltage; a constant current circuit which generates a predetermined reference current; a first switch which performs a switching operation at an empty timing where a transmission current is not flowing, to thereby allow the reference current to flow from the constant current circuit to the current detection resistor, and generate a reference voltage, in which a threshold voltage corresponding to the reference current is added to a load current detection voltage corresponding to the load current; a capacitor which is connected to the current detection resistor via the first switch; a second switch which performs a switching operation in synchronization with the first switch to thereby sample-hold the reference voltage generated by the current detection resistor in the capacitor; and a comparator which receives an input of the line current detection voltage generated by means of the current detection resistor, to one of input terminals, receives an input of the reference voltage held in the capacitor to an other input terminal, and outputs a voltage component of the line current detection voltage which exceeds the reference voltage, as a transmission current detection signal. | 2011-08-04 |
| 20110187416 | SMART DRIVER FOR FLYBACK CONVERTERS - The present invention discloses a smart driver used in flyback converters adopting a transconductance amplifier to turn on a synchronous rectifier FET, and a comparator to quickly turn off the synchronous rectifier FET. | 2011-08-04 |
| 20110187417 | RADIO FREQUENCY SWITCH CIRCUIT - A radio frequency (RF) switch circuit in which an RF switch and a switch controller are formed on a single CMOS substrate and floating resistors are connected to a deep N type well substrate, an N type well substrate, and a P type well substrate to thereby increase linearity with respect to input power. In the RF switch having at least one NMOS (N type Metal Oxide Semiconductor) switch changing a transmission path of an RF signal, an N type terminal formed on a first deep N type well substrate receives driving power through a floating resistor, a P type terminal formed on a first P type substrate receives body power through a floating resistor, and the two N type terminals formed on the first P type substrate receive gate power through a floating resistor, and in the switch controller having at least one NMOS switch and at least one PMOS (P type Metal Oxide Semiconductor) switch controlling changing of a path of the RF switch, an N type terminal formed on a second deep N type well substrate and an N type terminal formed on the first N type substrate receive driving power through floating resistors. | 2011-08-04 |
| 20110187418 | CLOCK SIGNAL FREQUENCY DIVIDING CIRCUIT AND METHOD - A mask circuit ( | 2011-08-04 |
| 20110187419 | SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE CONTROLLER THEREWITH - A semiconductor integrated circuit is capable of accurately detecting the characteristics of a chip. The semiconductor integrated circuit includes a monitor circuit and a control circuit. The control circuit generates a clock pulse signal having M successive pulses (M is 2 or a greater integer), and outputs the clock pulse signal to the monitor circuit. The monitor circuit includes a frequency divider and a ring oscillator. The frequency divider frequency divides the clock pulse signal by M and generates the resulting signal as an enable signal. The ring oscillator generates an oscillation signal as a monitor output value during a period defined in accordance with the enable signal. | 2011-08-04 |
| 20110187420 | FREQUENCY MULTIPLIER DEVICE AND METHOD THEREOF - The present invention provides a method for identifying a specific number of communicating points having relatively smallest accumulated path values from a plurality of transmitting points for a receiving point in a communication system. The method includes steps of: (a) defining a first coordination of each of the plurality of transmitting points and the receiving point on a complex plane; (b) transferring the first coordination of the receiving point to a second coordination thereof, in which the second coordination of the receiving point is near an origin of the complex plane; and (c) identifying the specific number of transmitting points having relatively smallest accumulated path values based on the second coordination of the receiving point. | 2011-08-04 |
| 20110187421 | SIGNAL GENERATION METHOD AND APPARATUS AND TEST METHOD AND SYSTEM USING THE SAME - According to a first aspect of the present invention there is provided a signal generation system for generating a predetermined analog signal. The system comprises a clock generator ( | 2011-08-04 |
| 20110187422 | Temperature compensation for an oscillator crystal - An electronic device is equipped with an oscillator interface to be coupled to an oscillator crystal of an oscillator element. The electronic device includes an oscillator circuit which is coupled to the oscillator interface and generates an oscillator signal. The electronic device is further provided with a temperature measurement interface to be coupled to a temperature sensor of the oscillator element so as to receive the temperature signal. For accomplishing temperature compensation, the electronic device is provided with a measurement controller coupled to the measurement interface and configured to measure a first value of the temperature signal at a first point of time and a second value of the temperature signal at a second point of time. A frequency drift estimator is provided so as to estimate a frequency drift of the oscillator signal on the basis of the first value of the temperature signal and a second value of the temperature signal. By means of a compensation logic, a frequency compensation signal for the oscillator circuit is generated on the basis of the estimated frequency drift. | 2011-08-04 |
| 20110187423 | MULTI-OUTPUT PLL OUTPUT SHIFT - Controlling a PLL includes providing a voltage controlled oscillator (VCO) and coupling an output of the VCO to a shifter circuit. The shifter circuit has a shifter circuit output, the shifter circuit also including an activation input for receiving an activation signal, the shifter circuit causing at least one pulse of the output signal to be suppressed at the shifter output upon receipt of the activation signal. Controlling also includes coupling the shifter circuit output to a first frequency divider. | 2011-08-04 |
| 20110187424 | TIME-DOMAIN MEASUREMENT OF PLL BANDWIDTH - A method and a device for determining closed loop bandwidth characteristic of a Phase Locked Loop (PLL) ( | 2011-08-04 |
| 20110187425 | PHASE-LOCKED LOOP SYSTEMS USING ADAPTIVE LOW-PASS FILTERS IN SWITCHED BANDWIDTH FEEDBACK LOOPS - Methods and systems directed toward a PLL circuit ( | 2011-08-04 |
| 20110187426 | HIGH SPEED CHARGE PUMP - In an embodiment, a primary charge pump and replica charge pump may be coupled to matching control mechanisms and loads. In an embodiment, the replica charge pump may produce an error current originating from charge pump timing mismatches in a steady locked loop state. The error current produced by the replica charge pump may be measured by a difference amplifier to adjust at least one current source to compensate for the error current originating from the timing mismatches. To adjust the current sources, the amplifier may cause the current source to produce an equal but opposite current to cancel the effects of the error current, resulting in a constant output voltage. | 2011-08-04 |
| 20110187427 | LATENCY CONTROL CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME - A latency control circuit includes a delay unit configured to delay an input signal for a delay corresponding to a phase difference between an external clock and an internal clock and generate a delayed input signal, a delay information generation unit configured to generate a delay information based on a latency information and a delay amount of the input signal caused by a chip including the latency control circuit, a shift unit configured to shift the delayed input signal for a time period corresponding to the delay information in synchronism with the internal clock and an asynchronous control unit configured to selectively control the shift unit to output the delayed input signal without performing a shift operation. | 2011-08-04 |
| 20110187428 | Electrothermal frequency reference - An electrothermal frequency-locked loop (EFLL) circuit is described. This EFLL circuit includes an oscillator in a feedback loop. A drive circuit in the EFLL circuit generates a first signal having a fundamental frequency, and an electrothermal filter (ETF) in the EFLL circuit provides a second signal based on the first signal. This second signal has the fundamental frequency and a phase (relative to the first signal) that corresponds to a temperature-dependent time constant of the ETF. Moreover, a sensing component in the EFLL circuit determines a parameter associated with a temperature of the ETF. For example, the parameter may be the temperature or may be other than the temperature, such as the fundamental frequency and/or the phase of the second signal. Furthermore, the EFLL circuit includes a compensation circuit that compensates for frequency changes associated with changes in the temperature based at least on the parameter so that the fundamental frequency is approximately independent of the temperature. | 2011-08-04 |
| 20110187429 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus has a plurality of chips stacked therein. Read control signals for controlling read operations of the plurality of chips are synchronized with a reference clock such that the time taken from the application of a read command to the output of data for each of the plurality of chips is maintained substantially the same. | 2011-08-04 |
| 20110187430 | Multi-Chip Module with Master-Slave Analog Signal Transmission Function - The present invention discloses a multi-chip module with master-slave analog signal transmission function. The multi-chip module comprises: a master chip having a first setting input pin for receiving an analog setting signal to generate an analog setting in the master chip, and the master chip duplicating the analog setting to output a first analog output; and a first slave chip for receiving the first analog output from the master chip to generate an internal setting of the first slave chip. | 2011-08-04 |
| 20110187431 | Voltage Level Translator Circuit - A voltage translator circuit ( | 2011-08-04 |
| 20110187432 | SEMICONDUCTOR DEVICE - A semiconductor device including a common delay circuit configured to delay an input signal in response to a delay control code to output a first delayed input signal and a second delayed input signal; a first delay circuit configured to delay the first delayed input signal in response to the delay control code and to output a first output signal; and a second delay circuit configured to delay the second delayed input signal in response to the delay control code and to output a second output signal. | 2011-08-04 |
| 20110187433 | On-Chip Self Calibrating Delay Monitoring Circuitry - The present disclosure relates to on-chip self calibrating delay monitoring circuitry. | 2011-08-04 |
| 20110187434 | SWITCHABLE CAPACITIVE ELEMENT WITH IMPROVED QUALITY FACTOR, AND METHOD OF PRODUCTION - A switchable capacitive element having an adjustable capacitance and an improved quality factor is specified. To this end, the characteristic variables of the switchable capacitive element are optimized in accordance with the equations cited in the description. | 2011-08-04 |
| 20110187435 | SEMICONDUCTOR DEVICE - To prevent damage on an element even when a voltage high enough to break the element is input. A semiconductor device of the invention operates with a first voltage and includes a protection circuit which changes the value of the first voltage when the absolute value of the first voltage is higher than a reference value. The protection circuit includes: a control signal generation circuit generating a second voltage based on the first voltage and outputting the generated second voltage; and a voltage control circuit. The voltage control circuit includes a transistor which has a source, a drain, and a gate, and which is turned on or off depending on the second voltage input to the gate and thus controls whether the value of the first voltage is changed based on the amount of current flowing between the source and the drain. The transistor also includes an oxide semiconductor layer. | 2011-08-04 |
| 20110187436 | INTEGRATION CIRCUIT - An integration circuit includes a first differential amplifier that reduces an input offset, which is an offset of a threshold voltage of a transistor that composes a differential pair, using a first clock signal as a clock signal for chopping, a first and a second input terminals that are connected to an inverting input terminal and a noninverting input terminal of the first differential amplifier circuit, and a first capacitance that is connected between the inverting input terminal of the first differential amplifier circuit and an output terminal of the first differential amplifier circuit. The integration circuit changes a frequency of the first clock signal input to the first differential amplifier circuit according to a potential difference between the first and the second input terminals. | 2011-08-04 |
| 20110187437 | Radio-Frequency (RF) Amplifier Circuits and Related Techniques - A power combining and outphasing system and related techniques for simultaneously providing both wide-bandwidth linear amplification and high average efficiency is described. Providing linear amplification encompasses the ability to dynamically control an RF output power level over a wide range while still operating over a wide frequency bandwidth. The system and techniques described herein also operate to maintain high efficiency across a wide range of output power levels, such that a high average efficiency can be achieved for highly modulated output waveforms. | 2011-08-04 |
| 20110187438 | Reducing current leakage in a semiconductor device - An integrated circuit, method of controlling power supplied to semiconductor devices, a method of designing an integrated circuit and a computer program product are disclosed. The integrated circuit comprises: a semiconductor device for handling data; a power source for powering said semiconductor device, said power source comprising a high voltage source for supplying a high voltage level and a low voltage source for supplying a low voltage level; a plurality of switching devices arranged between at least one of the high or low voltage sources and the semiconductor device. There is also a control device for controlling a first set of the plurality of switching devices to connect one of the high or low voltage sources to the semiconductor device and for controlling a second set of the plurality of switching devices to connect the one of the high or low voltage sources to the semiconductor device. At least some of the first set of the plurality of switching devices have a higher resistance when closed and providing a connection than at least some of the second set of the plurality of switching devices such that when the first set of the plurality of switching devices connect the semiconductor device to the one of the voltage sources the semiconductor device operates with a lower performance than when the second set of the plurality of switching devices connect the semiconductor device to the one of said voltage sources. | 2011-08-04 |
| 20110187439 | OUTPUT CIRCUIT - A low-side off-detection signal compares the gate signal of a low-side transistor with a predetermined first level to generate a low-side off-detection signal indicating that the low-side transistor is off. The low-side detection transistor is of the same type as the low-side transistor, with the source connected to the ground terminal, and the gate receiving the low-side transistor gate signal. A first resistor is arranged between the drain of the low-side detection transistor and the power supply terminal. A first bypass circuit is arranged in parallel with the first resistor, and is configured to switch to the conduction state when a control signal is a level which instructs the low-side transistor to switch off, and to switch to the cut-off state when the control signal level instructs the low-side transistor to switch on. The drain signal of the low-side detection transistor is output as the low-side off-detection signal. | 2011-08-04 |
| 20110187440 | ELECTRONIC APPARATUS AND POWER SUPPLY DEVICE - The electronic apparatus includes a direct-current voltage generation part that generates a direct-current voltage from a commercial power supply; a switching part that switches between an on-state in which the direct-current voltage from the direct-current voltage generation part is output, and an off-state in which the output of the direct-current voltage is shut down, a control part that controls operation of the direct-current voltage generation part; and a power supply maintaining part connected to the direct-current voltage generation part, the power supply maintaining part instructing the switching part to be in the on-state or the off-state, and consequently, enables provision of a soft-switch electronic apparatus that after recovery of a power failure, automatically returns to a state before occurrence of the power failure. | 2011-08-04 |
| 20110187441 | Temperature Compensation Via Power Supply Modification to Produce a Temperature-Independent Delay in an Integrated Circuit - A method and circuitry for adjusting the delay of a variable delay line (VDL) in a delay locked loop (DLL) or other delay element or subcircuit on an integrated circuit is disclosed. Such delay circuitry will inherently have a delay which is a function of temperature. In accordance with embodiments of the invention, such temperature-dependent delays are compensated for by adjusting the power supply voltage of the VDL, delay element, or subcircuit. Specifically, a temperature sensing stage is used to sense the temperature of the integrated circuit, and hence the VDL, delay element, or subcircuit. Information concerning the sensed temperature is sent to a regulator which derives the local power supply voltage from the master power supply voltage, Vcc, of the integrated circuit. If the temperature sensed is relatively high, which otherwise would increase the delay though the VDL, delay element, or subcircuit, the regulator increases the local power supply voltage, thus decreasing the delay and offsetting the increase in delay due to temperature. Through this scheme, and assuming the temperature sensing stage is properly tuned, temperature-dependent delays can be reduced to approximately zero. | 2011-08-04 |
| 20110187442 | LATCH-CONTROL PROTECTION CIRCUIT - A latch-control protection circuit applied in a power converter is provided. The protection circuit has a comparing circuit unit and a logic gate. The comparing circuit unit is utilized to selectively output a default signal or a comparing signal according to a state signal from the logic gate, wherein the default signal is utilized for latching the state signal and the comparing signal is corresponded to the power condition of the power converter. The logic gate generates the state signal according to the output signal of the comparing circuit unit and a system judging signal. The output signal may be the default signal or the comparing signal. The system judging signal indicates the condition of the power converter. | 2011-08-04 |
| 20110187443 | SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING THE SAME - A semiconductor apparatus includes a plurality of pump control units respectively located in a plurality of chips, connected in series through a first TSV, and configured to sequentially delay a period signal, transmit delayed period signals and generate pump control signals based on the period signal or the delayed period signals; and a plurality of voltage pump units respectively located in the plurality of chips, and configured to generate a pumping voltage in response to the pump control signals generated from the plurality of pump control units. | 2011-08-04 |
| 20110187444 | VOLTAGE TRIMMING CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS - A voltage trimming circuit of a semiconductor memory apparatus may include a first voltage generation block configured to select voltage levels of a first node and a second node and divide a voltage between the first node and the second node to generate a first division voltage group; a second voltage generation block configured to select voltage levels of a third node and a fourth node and divide a voltage between the third node and the fourth node to generate a second division voltage group; a first switch block configured to select one division voltage of the first division voltage group to output the selected division voltage as a first reference voltage; and a second switch block configured to select one division voltage of the second division voltage group to output the selected division voltage as a second reference voltage. | 2011-08-04 |
| 20110187445 | COMPLEMENTARY BAND-GAP VOLTAGE REFERENCE CIRCUIT - A complementary band-gap voltage reference circuit comprising first and second groups of transistors, each group containing a first transistor of npn type and a second transistor of pnp type and the transistors of different types in the same group having different emitter current conduction areas. The emitter-collector paths of the first transistors of each group are connected in parallel so as to present differential base-emitter voltages. The second transistors of each group are connected with their emitter-collector paths in parallel with a base-emitter junction of the first transistor of the same group so as to present differential base-emitter voltages of the second transistors across the first and second groups of transistors. The output regulated voltage is an additive function of the differential base-emitter voltages and of additive base-emitter voltages of transistors with smaller emitter current conduction area and different type. | 2011-08-04 |
| 20110187446 | SEMICONDUCTOR DEVICE - A semiconductor device includes a bonding option pad, an internal power supply, and a MOS transistor. The bonding option pad is selectively wire-bonded to two voltage supply portions through which external power supply voltages with different power supply potentials are supplied from an external power supply. The internal power supply is caused to generate a pre-specified internal power supply voltage. The MOS transistor stabilizes an output level of the internal power supply voltage. The source and drain of the MOS transistor are shorted together and connected to the bonding option pad, and the gate there. | 2011-08-04 |
| 20110187447 | MIXED-MODE CIRCUITS AND METHODS OF PRODUCING A REFERENCE CURRENT AND A REFERENCE VOLTAGE - In an embodiment, a circuit includes a first transistor having a first current electrode, a control electrode, and a second current electrode coupled to a power supply terminal. The circuit further includes a resistive element having a first terminal coupled to the control electrode of the first transistor and a second terminal coupled to the power supply terminal. The circuit also includes a feedback circuit for providing a first current to the first control electrode of the first transistor and for preserving substantially the first current related to a voltage at the control electrode of the first transistor, through the resistive element. The feedback circuit includes an output terminal for providing an output signal in response to a voltage at the control electrode of the first transistor. In an embodiment, the first transistor is a floating-gate device with programmable threshold voltage. | 2011-08-04 |
| 20110187448 | Wideband analog bandpass filter - A wideband bandpass filter includes an RF input terminal, an RF output terminal, a plurality of electrically tunable coupling capacitors coupled in series between the RF input and output terminals, and a plurality of resonating circuits each including an electrically tunable resonator capacitor coupled to one of the coupling capacitors. At least one resistance is coupled in series between at least one of the coupling capacitors for providing enhanced out of band rejection of the filter. | 2011-08-04 |
| 20110187449 | Wideband analog lowpass filter - A low pass filter includes an RF input terminal, an RF output terminal, a plurality of inductors coupled in series between the RF input and output terminals, at least one electrically tunable capacitor coupled between ground and a node of one of the inductors. At least one of the inductors includes a winding, and a resistance and a capacitance coupled in series across a portion of the winding to enhance the out of band rejection of the low pass filter. | 2011-08-04 |
| 20110187450 | OUTPUT CIRCUIT OF SEMICONDUCTOR APPARATUS HAVING TWO DIFFERENT TYPES OF DECOUPLING CAPACITORS - An output circuit of a semiconductor apparatus having two different types of decoupling capacitors is presented. The output circuit includes a first pad, a second pad, a main output unit and a decoupling capacitor region. The first and second pads are configured to respectively provide a power supply voltage and a ground voltage. The main output unit is coupled to the first and second pads. One end of the decoupling capacitor region is coupled to the first pad and the other end is coupled to the second pad. The decoupling capacitor region includes a first decoupling capacitor region spaced apart from a portion of the main output unit by a first distance, and a second decoupling capacitor region spaced apart from the main output unit by a second distance which is greater than the first distance. | 2011-08-04 |
| 20110187451 | POWER AMPLIFIER - There is provided a power amplifier that can reduce power consumption by selectively turning a plurality of amplifiers on or off according to the power of a signal to be transmitted. A power amplifier according to an aspect of the invention may include: a first amplification section amplifying an input signal by a predetermined gain; a second amplification section having a plurality of amplification units re-amplifying the input signal, amplified by the first amplification section, by predetermined gains; and a switch section supplying or cutting off power to the plurality of amplification units according to an switching signal to selectively operate the plurality of amplification units. | 2011-08-04 |
| 20110187452 | SOUND AND MUSIC PLAYBACK DEVICE - A sound and music playback device includes: an output amplifier; a power supply circuit that supplies electric power to the output amplifier; and an output signal level judging circuit; wherein an output voltage value of the power supply circuit is changed based on a level of a sound and music signal to be outputted. | 2011-08-04 |
| 20110187453 | Linearizer incorporating a phase shifter - The present invention pertains to a pre-distorter linearizer that incorporates a balanced-to-unbalanced transmission line transition as a phase shifter to feed the linear and non-linear arms of the linearizer with signals of substantially the same amplitude and with a frequency-independent and substantially 180-degree phase difference. Preferably the balanced-to-unbalanced transmission line transition is a slotline-to-microstrip transition. Several alternatives are shown to enhance the bandwidth performance of the linearizer. Using a slotline-to-microstrip transition as a phase shifter provides for a very physically compact and inexpensive design. Furthermore, the flexibility of the slotline-to-microstrip architecture allows the linearizer to be easily integrated into systems that use both solid-state and vacuum-tube amplifiers. | 2011-08-04 |
| 20110187454 | DISTORTION COMPENSATING APPARATUS, TRANSMITTING APPARATUS, AND DISTORTION COMPENSATING METHOD - An apparatus includes: a unit that stores the look-up table including distortion compensation coefficients; a unit that selects addresses according to an input signal, acquires coefficients stored at the selected addresses, and performs the predistortion of the input signal by using the acquired coefficients; a unit that calculates an error signal by comparing with the input signal a feedback signal that indicates an output of a power amplifier to which a result of the predistortion is inputted; a unit that calculates coefficients from the error signal and the acquired coefficients by using the adaptive algorithm; a unit that, for each of the selected addresses, selects coefficients as adequate coefficients from among the calculated coefficients according to the error signal; and a unit that, for each of the selected addresses, calculates an average value of the adequate coefficients and replaces a stored coefficient in the look-up table with the average value. | 2011-08-04 |
| 20110187455 | Adaptive Digital Predistortion Device and Method - The present invention relates to an adaptive digital predistortion device and method. The adaptive digital predistortion device comprising: a predistortion unit for predistorting an input signal according to a predistortion parameter stored in a look-up table; a cost function generation unit for generating a cost function; a fixed segment point determination unit for determining a fixed segment point; and an update unit for updating parameters (u | 2011-08-04 |
| 20110187456 | Coupling Isolation Method and Operational Amplifier Using the Same - A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result. | 2011-08-04 |
| 20110187457 | Output Buffer Circuit Capable of Enhancing Stability - An output buffer circuit capable of enhancing stability includes an operational amplifier, a capacitive load and an output control unit. The operational amplifier has a positive input terminal, a negative input terminal and an output terminal, and generates an output voltage to the output terminal according to an input voltage received by the positive input terminal. The output control unit is coupled between the output terminal of the operational amplifier and the capacitive load, and is utilized for controlling electrical connection between the output terminal of the operational amplifier and the capacitive load to forma signal output path and for adjusting impedance of the signal output path when the signal output path is formed. | 2011-08-04 |
| 20110187458 | POWER AMPLIFIER - There is provided a power amplifier capable of improving harmonics characteristics of an output signal of an amplifier circuit by compensating a phase of the output signal. A power amplifier according to an aspect of the invention may include: an amplification section having a plurality of amplification units each amplifying a radio frequency (RF) signal according to a gain being controlled; a phase correction section performing phase correction by removing harmonic components of respective output signals from the plurality of amplification units of the amplification section; and a coupling section coupling the respective output signals phase-corrected by the phase correction section. | 2011-08-04 |
| 20110187459 | EMITTER-FOLLOWER TYPE BIAS CIRCUIT - An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET. | 2011-08-04 |
| 20110187460 | CMOS power amplifiers having integrated one-time programmable (OTP) memories - CMOS power amplifiers (PAs) are disclosed having one or more integrated one-time programming (OTP) memories that are utilized to control at least in part operation of the CMOS PAs. The integrated OTP memories within the CMOS power amplifiers (PAs) allow adjustments, such as one-time factory trimming, of CMOS PA integrated circuits to optimize or improve performance. With this capability, for example, the tuning and biasing of stages within a multi-stage amplifier within a CMOS PA can be measured during factory test and adjusted by setting one or more bits in the OTP memories, as desired. Further, the operation of other circuitry within the PA can also be controlled at least in part with parameter settings stored in the OTP memories. | 2011-08-04 |
| 20110187461 | POWER AMPLIFIER - According to one embodiment, a variable attenuator is arranged in an input stage, a plurality of transistors are cascaded on the later part of this variable attenuator, temperature sensors are arranged in the vicinity of two or more of the plurality of transistors to detect temperatures, the amount of gain change of the plurality of transistors is calculated from the temperature detection results individually obtained by the temperature sensors, the variable attenuator is controlled in such a manner as to reduce the amount gain change so that the input signal level can be controlled, and thereby the gain that tends to vary in accordance with temperature changes can be stabilized. | 2011-08-04 |
| 20110187462 | PRODUCING A DESIRED FREQUENCY USING A CONTROLLED OSCILLATOR WITH KNOWN TEMPERATURE SENSITIVITY - A controlled oscillator is tuned to produce a desired, temperature independent frequency. A first frequency ratio is determined between a first frequency of the output signal generated by the controlled oscillator and a frequency of an output signal from another oscillator. The first frequency is determined based on a sensed temperature. A desired frequency of the output signal of the controlled oscillator is used to determine a desired frequency ratio between the desired frequency and the frequency of the output signal from the other oscillator. The controlled oscillator is tuned and the frequency ratio measured until the tuning has caused the desired frequency ratio to be achieved, thereby causing the controlled oscillator to provide the desired frequency. | 2011-08-04 |
