30th week of 2013 patent applcation highlights part 15 |
Patent application number | Title | Published |
20130187238 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a first conductivity type, a third semiconductor layer of a second conductivity type, an isolation layer, and a guard ring layer of the second conductivity type. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer to be joined to the second semiconductor layer. The isolation layer surrounds a periphery of the third semiconductor layer and is deeper than the third semiconductor layer. The guard ring layer is provided between the third semiconductor layer and the isolation layer, adjacent to the third semiconductor layer, and deeper than the third semiconductor layer. | 2013-07-25 |
20130187239 | STRUCTURE AND METHOD OF Tinv SCALING FOR HIGH k METAL GATE TECHNOLOGY - A complementary metal oxide semiconductor structure including a scaled nFET and a scaled pFET which do not exhibit an increased threshold voltage and reduced mobility during operation is provided. The method includes forming a plasma nitrided, nFET threshold voltage adjusted high k gate dielectric layer portion within an nFET gate stack, and forming at least a pFET threshold voltage adjusted high k gate dielectric layer portion within a pFET gate stack. The pFET threshold voltage adjusted high k gate dielectric layer portion in the pFET gate stack can also be plasma nitrided. The plasma nitrided, nFET threshold voltage adjusted high k gate dielectric layer portion contains up to 15 atomic % N | 2013-07-25 |
20130187240 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device including a semiconductor layer of a first conductivity type in a cell region, a first base layer of a second conductivity type on the semiconductor layer in the cell region; a second base layer of the second conductivity type on the semiconductor layer in an intermediate region; a conductive region of a first conductivity type in the first base layer; a gate electrode on a channel region placed between the conductive region and the semiconductor layer; a first electrode connected to the first and second base layers; a second electrode connected to the semiconductor layer; and a gate pad on the semiconductor layer via an insulating film in a pad region and connected to the gate electrode, an impurity concentration gradation in the gate pad side of the second base layer has a gentler VLD structure than an impurity concentration gradation in the first base layer. | 2013-07-25 |
20130187241 | INTERFACIAL LAYER REGROWTH CONTROL IN HIGH-K GATE STRUCTURE FOR FIELD EFFECT TRANSISTOR - A field effect transistor having a gate structure comprising a high-K dielectric layer, a gate electrode located on the high-K dielectric layer, and an interfacial layer located in between the high-K dielectric layer and a channel region of the field effect transistor. The interfacial layer comprises a layer of SiO | 2013-07-25 |
20130187242 | CHANNEL SURFACE TECHNIQUE FOR FABRICATION OF FinFET DEVICES - A FinFET (p-channel) device is formed having a fin structure with sloped or angled sidewalls (e.g., a pyramidal or trapezoidal shaped cross-section shape). When using conventional semiconductor substrates having a (100) surface orientation, the fin structure is formed in a way (groove etching) which results in sloped or angled sidewalls having a (111) surface orientation. This characteristic substantially increases hole mobility as compared to conventional fin structures having vertical sidewalls. | 2013-07-25 |
20130187243 | METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS - A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a high-leakage dielectric formed over an active region of a FET and a low-leakage dielectric formed on the active region and adjacent the high-leakage dielectric. The low-leakage dielectric has a lower leakage than the high-leakage dielectric. Also provided is a structure and method of fabricating the structure. | 2013-07-25 |
20130187244 | PROGRAMMABLE FETs USING Vt-SHIFT EFFECT AND METHODS OF MANUFACTURE - Programmable field effect transistors (FETs) are provided using high-k dielectric metal gate Vt shift effect and methods of manufacturing the same. The method of controlling Vt shift in a high-k dielectric metal gate structure includes applying a current to a gate contact of the high-k dielectric metal gate structure to raise a temperature of a metal forming a gate stack. The temperature is raised beyond a Vt shift temperature threshold for providing an on-state. | 2013-07-25 |
20130187245 | MICRO ELECTRO MECHANICAL SYSTEM STRUCTURES - A micro electro mechanical system (MEMS) structure includes a first substrate structure including a bonding pad structure. The bonding pad structure has at least one recess therein. A second substrate structure is bonded with the bonding pad structure of the first substrate structure. | 2013-07-25 |
20130187246 | BACKSIDE INTEGRATION OF RF FILTERS FOR RF FRONT END MODULES AND DESIGN STRUCTURE - A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device. | 2013-07-25 |
20130187247 | MULTI-BIT MAGNETIC TUNNEL JUNCTION MEMORY AND METHOD OF FORMING SAME - A spin-torque transfer (STT) magnetic tunnel junction (MTJ) memory includes a unitary fixed magnetic layer, a magnetic barrier layer on the unitary fixed magnetic layer, a free magnetic layer having a plurality of free magnetic islands on the magnetic barrier layer, and a cap layer overlying the free magnetic layer. Also a method of forming an STT-MTJ memory. | 2013-07-25 |
20130187248 | MAGNETORESISTIVE EFFECT ELEMENT AND MAGNETIC MEMORY - The present invention makes it possible to inhibit an MR ratio from decreasing by high-temperature heat treatment in a magnetoresistive effect element using a perpendicular magnetization film. The magnetoresistive effect element includes a data storage layer, a data reference layer, and an MgO film interposed between the data storage layer and the data reference layer. The data storage layer includes a CoFeB film coming into contact with the MgO film, a perpendicular magnetization film, and a Ta film interposed between the CoFeB film and the perpendicular magnetization film. The CoFeB film is magnetically coupled to the perpendicular magnetization film through the Ta film. | 2013-07-25 |
20130187249 | STRUCTURES AND DESIGN STRUCTURES FOR IMPROVED ADHESION OF PROTECTIVE LAYERS OF IMAGER MICROLENS STRUCTURES - Structures and design structures for improved adhesion of protective layers of imager microlens structures are disclosed. A method of fabricating a semiconductor structure includes forming an interfacial region between a microlens and a protective oxide layer. The interfacial region has a lower concentration of oxygen than the protective oxide layer. | 2013-07-25 |
20130187250 | Semiconductor Devices Having an Enhanced Absorption Region and Associated Methods - Photosensitive semiconductor devices and associated methods are provided. In one aspect, for example, a photosensitive semiconductor device can include an electromagnetic radiation absorption layer having a thickness of less than or equal to about 200 μm, wherein the electromagnetic radiation absorption layer includes a semiconductor material and an enhanced absorption region. The electromagnetic radiation absorption layer is operable to absorb greater than or equal to about 40% of incident electromagnetic radiation having at least one wavelength greater than or equal to about 1064 nm. | 2013-07-25 |
20130187251 | PHOTODIODE ARRAY - A photodiode array has a plurality of photodetector channels formed on an n-type substrate having an n-type semiconductor layer, with a light to be detected being incident to the photodetector channels. The array comprises: a p | 2013-07-25 |
20130187252 | BONDPAD INTEGRATED THEROMELECTRIC COOLER - An integrated circuit has thermoelectric cooling devices integrated into bondpads. A method for operating the integrated circuit includes turning a thermal switch to a thermoelectric cooler operate position when the integrated circuit is powered up, turning the thermal switch to a thermoelectric cooler operate position to allow the thermoelectric cooler to operate when the integrated circuit powers down, and turning the thermal switch to a thermoelectric cooler off position when a predetermined integrated circuit chip temperature is reached. | 2013-07-25 |
20130187253 | HIGH DENSITY MULTI-ELECTRODE ARRAY - A high density micro-electrode array includes a transistor layer including a plurality of access transistors and a substrate in operable communication with the transistor layer including, wherein at least a portion of the substrate includes a plurality of trenches. The system includes a plurality of electrodes at least partially located in the plurality of trenches, wherein each of the plurality of electrodes is connected to at least one of the plurality of access transistors and wherein each of the electrodes is separated by a distance less than approximately one microns. | 2013-07-25 |
20130187254 | Semiconductor Chip and Methods for Producing the Same - A fabrication method for thickening pad metal layers comprises: growing a first metal layer on a silicon substrate; etching the first metal layer to obtain a metal wire comprising a metal fuse and a pad; growing a passivation layer on the metal wire; etching the passivation layer to obtain a first window to expose a pad area; growing a second metal layer on the passivation layer having the first window; etching the second metal layer to obtain a metal layer covering the pad area only and expose the passivation layer outside the pad area; and etching the passivation layer outside the pad area to obtain a second window to expose a metal fuse area. | 2013-07-25 |
20130187255 | POWER INDUCTORS IN SILICON - Various methods and systems are provided for power inductors in silicon (PIiS) In one embodiment, a PIiS includes a magnetic core of magnetic material embedded in a silicon substrate, and a conductive winding having a plurality of turns, where adjacent turns of the conductive winding have a space therebetween, and where at least a portion of the magnetic core is encircled by the conductive winding In another embodiment, a DC to DC converter includes a PIiS, which includes a magnetic core of magnetic material embedded in a silicon substrate, a conductive winding having a plurality of turns, where at least a portion of the magnetic core is encircled by the conductive winding, and a cap layer of magnetic material disposed on at least one side of the silicon substrate The DC to DC converter also includes an integrated circuit mounted on the cap layer of the power inductor in silicon | 2013-07-25 |
20130187256 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes an n-type first guard ring layer provided between an emitter layer and a collector layer on a surface side of a base layer, and having a higher n-type impurity concentration than the base layer, and an n-type second guard ring layer provided between the first guard ring layer and a buried layer, connected to the first guard ring layer and the buried layer, and having a higher n-type impurity concentration than the base layer. The first guard ring layer has an n-type impurity concentration profile decreasing toward the second guard ring layer side, and the second guard ring layer has an impurity concentration profile decreasing toward the first guard ring layer side. | 2013-07-25 |
20130187257 | Semiconductor device and method for manufacturing the same - A method is disclosed for manufacturing a semiconductor device. The method includes providing a substrate and forming a well region in the substrate by an ion implantation. The method also includes forming, by rapid thermal oxidation and on the substrate having the well region, an oxide layer for repairing the substrate damaged by the ion implantation. Further, the method includes removing the oxide layer and forming a gate oxide layer on the repaired substrate having the well region. | 2013-07-25 |
20130187258 | Sawing Underfill in Packaging Processes - A method includes bonding a first and a second package component on a top surface of a third package component, and dispensing a polymer. The polymer includes a first portion in a space between the first and the third package components, a second portion in a space between the second and the third package components, and a third portion in a gap between the first and the second package components. A curing step is then performed on the polymer. After the curing step, the third portion of the polymer is sawed to form a trench between the first and the second package components. | 2013-07-25 |
20130187259 | Electronic Device and a Method for Fabricating an Electronic Device - An electronic device includes a semiconductor chip. A contact element, an electrical connector, and a dielectric layer are disposed on a first surface of a conductive layer facing the semiconductor chip. A first conductive member is disposed in a first recess of the dielectric layer. The first conductive member electrically connects the contact element of the semiconductor chip with the conductive layer. A second conductive member is disposed in a second recess of the dielectric layer. The second conductive member electrically connects the conductive layer with the electrical connector. | 2013-07-25 |
20130187260 | PACKAGED SEMICONDUCTOR DEVICES, AND RELATED METHODS AND SYSTEMS - A packaged semiconductor device includes at least first and second lead-fingers. A molded structure forms a cavity and is molded around portions of each of the first and second lead-fingers to thereby mechanically attach each of the first and second lead-fingers to the molded structure. A semiconductor structure (e.g., a IC, chip or die) is attached within the cavity. First and second bond wires respectively providing electrical connections between the semiconductor structure and the first and second lead-fingers. A further portion of each of the first and second lead-fingers is mechanically attached to a bottom surface of the semiconductor structure to inhibit relative mechanical motion between the semiconductor structure, the molded structure and the first and second lead-fingers. | 2013-07-25 |
20130187261 | SEMICONDUCTOR DEVICE - Conventional semiconductor devices have a problem that it is difficult to prevent the short circuit between chips and to improve accuracy in temperature detection with the controlling semiconductor chips. In a semiconductor device of the present invention, a first mount region to which a driving semiconductor chip is fixedly attached and a second mount region to which a controlling semiconductor chip is fixedly attached are formed isolated from each other. A projecting area is formed in the first mount region, and the projecting area protrudes into the second mount region. The controlling semiconductor chip is fixedly attached to the top surfaces of the projecting area and the second mount region by use of an insulating adhesive sheet material. This structure prevents the short circuit between the two chips, and improves accuracy in temperature detection with the controlling semiconductor chip. | 2013-07-25 |
20130187262 | DEVICES INCLUDING COMPOSITE THERMAL CAPACITORS - Embodiments of the present disclosure include devices or systems that include a composite thermal capacitor disposed in thermal communication with a hot spot of the device, methods of dissipating thermal energy in a device or system, and the like. | 2013-07-25 |
20130187263 | SEMICONDUCTOR STACKED PACKAGE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor stacked package is provided. A singulation process is performed on a wafer and a substrate, on which the wafer is stacked. A portion of the wafer on a cutting region is removed, to form a stress concentrated region on an edge of a chip of the wafer. The wafer and the substrate are then cut, and a stress is forced to be concentrated on the edge of the chip of the wafer. As a result, the edge of the chip is warpaged. Therefore, the stress is prevented from extending to the inside of the chip. A semiconductor stacked package is also provided. | 2013-07-25 |
20130187264 | LOW OHMIC CONTACTS - A method for forming a device is disclosed. A substrate with a contact region is provided. Vacancy defects are formed in the substrate. The vacancy defects have a peak concentration at a depth D | 2013-07-25 |
20130187265 | PACKAGE STRUCTURE AND SEMICONDUCTOR STRUCTURE THEREOF - A semiconductor structure comprises a carrier, a plurality of under bump metallurgy layers, a plurality of copper containing bumps and an organic barrier layer, wherein the carrier comprises a protective layer and a plurality of conductive pads, mentioned protective layer comprises a plurality of openings, the conductive pads exposed by the openings, mentioned under bump metallurgy layers being formed on the conductive pads, mentioned copper containing bumps being formed on the under bump metallurgy layers, each of the copper containing bumps comprises a top surface and a ring surface in connection with the top surface, mentioned organic barrier layer having a first coverage portion, and mentioned first coverage portion covers the top surface and the ring surface of each of the copper containing bumps. | 2013-07-25 |
20130187266 | INTEGRATED CIRCUIT PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME - An integrated circuit package assembly includes a first integrated circuit package and a second integrated circuit package disposed under the first integrated circuit package. Solder bumps are disposed between the first integrated circuit package and the second integrated circuit package providing electrical signal connections between the first integrated circuit package and the second integrated circuit package. At least one support structure is disposed between the first integrated circuit package and the second integrated circuit package to facilitate thermal conduction between the first integrated circuit package and the second integrated circuit package without providing electrical signal connections. | 2013-07-25 |
20130187267 | INCREASED SURFACE AREA ELECTRICAL CONTACTS FOR MICROELECTRONIC PACKAGES - A multilayer microelectronic device package includes one or more vertical electrical contacts. At least one semiconductor material layer is provided having one or more electrical devices fabricated therein. An electrical contact pad can be formed on or in the semiconductor material layer. Another material layer is positioned adjacent to the semiconductor material layer and includes a conductive material stud embedded in or bonded to the layer. A via is formed through at least a portion of the semiconductor material layer and the electrical contact pad and into the adjacent layer conducting material stud. The via is constructed such that the via tip terminates within the conducting material stud, exposing the conducting material. A metallization layer is disposed in the via such that the metallization layer contacts both the electrical contact pad and the conducting material stud exposed by the via tip. | 2013-07-25 |
20130187268 | Semiconductor Packaging Structure and Method - A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections. | 2013-07-25 |
20130187269 | PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME - A package assembly including a semiconductor die electrically coupled to a substrate by an interconnected joint structure. The semiconductor die includes a bump overlying a semiconductor substrate, and a molding compound layer overlying the semiconductor substrate and being in physical contact with a first portion of the bump. The substrate includes a no-flow underfill layer on a conductive region. A second portion of the bump is in physical contact with the no-flow underfill layer to form the interconnected joint structure. | 2013-07-25 |
20130187270 | Multi-Chip Fan Out Package and Methods of Forming the Same - A package includes a die having a conductive pad at a top surface of the die, a stud bump over and connected to the conductive pad, and a redistribution line over and connected to the stud bump. An electrical connector is over and electrically coupled to the redistribution line. | 2013-07-25 |
20130187271 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a first bump that is located over a surface of a semiconductor element, and is formed on a first bump formation face distanced from a back surface of the semiconductor element at a first distance, and a second bump that is located over the surface of the semiconductor element, and is formed on a second bump formation face distanced from the back surface of the semiconductor element at a second distance being longer than the first distance, the second bump having a diameter larger than a diameter of the first bump. | 2013-07-25 |
20130187272 | SEMICONDUCTOR MODULE - According to one embodiment, a semiconductor module includes a semiconductor chip that is mounted on a printed substrate, a terminal electrode that is formed on the printed substrate so as to be electrically connected to the semiconductor chip, a metal coating layer that is formed on the terminal electrode, a plating lead wire that is electrically connected to the terminal electrode, and a gap that is formed in the plating lead wire. | 2013-07-25 |
20130187273 | SEMICONDUCTOR DEVICES WITH COPPER INTERCONNECTS AND METHODS FOR FABRICATING SAME - Semiconductor devices having copper interconnects and methods for their fabrication are provided. In one embodiment, a semiconductor device is fabricated with a copper interconnect on substrate such as an FEOL processed substrate. The method includes forming a copper layer on a substrate. The copper layer is formed from grains. The copper layer is modified such that the modified copper layer has an average grain size of larger than about 0.05 microns. In the method, the modified copper layer is etched to form a line along the substrate and a via extending upwards from the line. | 2013-07-25 |
20130187274 | SEMICONDUCTOR DEVICE HAVING A NANOTUBE LAYER AND METHOD FOR FORMING - A method of forming a semiconductor device includes forming a first conductive layer over the substrate. A dielectric layer, having a first opening, is formed over the first conductive layer. A seed layer is deposited over the first dielectric layer and in the first opening. A layer is formed of conductive nanotubes from the seed layer over the first dielectric layer and over the first opening. A second dielectric is formed over the layer of conductive nanotubes. An opening is formed in the second dielectric layer over the first opening. Conductive material is deposited in the second opening. | 2013-07-25 |
20130187275 | SEMICONDUCTOR DEVICE AND FABRICATION PROCESS THEREOF - A three dimensional semiconductor integrated circuit device includes a stacking of a plurality of semiconductor chips each including a plurality of through via-plugs, in each of the semiconductor chips, a plurality of through via-plugs are connected commonly with each other by a connection pad provided on a top surface or bottom surface of the semiconductor chip, the connection pad on a top surface of a first semiconductor chip being joined directly to a corresponding connection pad on a bottom surface of a second semiconductor chip stacked thereon. | 2013-07-25 |
20130187276 | MICROELECTRONIC DEVICE HAVING METAL INTERCONNECTION LEVELS CONNECTED BY PROGRAMMABLE VIAS - A microelectronic device, including: a substrate and a plurality of metal interconnection levels stacked on the substrate; a first metal line of a given metal interconnection level; a second metal line of another metal interconnection level located above the given metal interconnection level, the first and second lines are interconnected via at least one semiconductor connection element extending in a direction forming a nonzero angle with the first metal lines and the second metal line; and a gate electrode capable of controlling conduction of the semiconductor connection element. | 2013-07-25 |
20130187277 | CRACK STOPPER ON UNDER-BUMP METALLIZATION LAYER - A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings. | 2013-07-25 |
20130187278 | STRUCTURE FOR INTERCONNECTING COPPER WITH LOW DIELECTRIC CONSTANT MEDIUM AND THE INTEGRATION METHOD THEREOF - The present invention belongs to the technical field of semiconductor devices, and discloses a structure for interconnecting a medium of low dielectric constant with copper and the integration method thereof. It includes: using a combination of copper interconnections and air gaps to reduce capacity, and a special structure to support copper conductors so as to maintain the shape of copper conductors after removing the medium. The advantage of the present invention is that it can realize the complete air gap structure without short circuit or disconnection of copper conductors as well as the complete air gap structure with long conductors, thus reducing RC delay. | 2013-07-25 |
20130187279 | SEMICONDUCTOR DEVICE STRUCTURES INCLUDING BURIED DIGIT LINES AND RELATED METHODS - Methods of forming semiconductor device structures include forming trenches in an array region and in a buried digit line end region, forming a metal material in the trenches, filling the trenches with a mask material, removing mask material in the trenches to expose a portion of the metal material, and removing the exposed portion of the metal material. A plurality of conductive contacts are formed in direct contact with the metal material in the buried digit line end region. Methods of forming a buried digit line contact include forming conductive contacts physically contacting metal material in trenches in a buried digit line end region. Vertical memory devices and apparatuses include metallic connections disposed between a buried digit line and a conductive contact in a buried digit line end region. | 2013-07-25 |
20130187280 | Crack-Arresting Structure for Through-Silicon Vias - The subject matter disclosed herein relates to structures formed on semiconductor chips that are used for at least partially addressing the thermally induced stresses and metallization system cracking problems in a semiconductor chip that may be caused by the presence of through-silicon vias (TSV's), and which may be due primarily to the significant differences in thermal expansion between the materials of the TSV's and the semiconductor-based materials that generally make up the remainder of the semiconductor chip. One device disclosed herein includes a substrate and a crack-arresting structure positioned above the substrate, the crack-arresting structure comprising a plurality of crack-arresting elements and having a perimeter when viewed from above. The device also includes a conductive structure positioned at least partially within the perimeter of the crack-arresting structure, and a conductive element extending through an opening in the crack-arresting structure, wherein the conductive element is conductively coupled to the conductive structure. | 2013-07-25 |
20130187281 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING OF SAME - A method for manufacturing a semiconductor device, includes: forming a first metal layer on a semiconductor substrate, the semiconductor substrate including a diffusion layer; forming an insulating layer having an opening on the first metal layer; forming a second metal layer on the first metal layer in the opening of the insulating layer; removing the insulating layer; covering an exposed surface of the second metal layer with a third metal layer, the third metal layer including a metal having an ionization tendency lower than that of the second metal layer; and forming an electrode interconnect including the first metal layer, the second metal layer, and the third metal layer by removing the first metal layer using the third metal layer as a mask. | 2013-07-25 |
20130187282 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, METHOD FOR GENERATING MASK DATA, MASK AND COMPUTER READABLE RECORDING MEDIUM - A semiconductor device has first wiring layers and a plurality of dummy wiring layers that are provided on the same level as the first wiring layers. The semiconductor device defines a row direction, and first virtual linear lines extending in a direction traversing the row direction. The row direction and the first virtual linear lines define an angle of 2-40 degrees, and the dummy wiring layers are disposed in a manner to be located on the first virtual linear lines. The semiconductor device also defines a column direction perpendicular to the row direction, and second virtual linear lines extending in a direction traversing the column direction. The column direction and the second virtual linear lines define an angle of 2-40 degrees, and the dummy wiring layers are disposed in a manner to be located on the second virtual linear lines. | 2013-07-25 |
20130187283 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - Provided is a method of manufacturing a semiconductor device of a multilayer wiring structure that comprises a CF | 2013-07-25 |
20130187284 | Low Cost and High Performance Flip Chip Package - A low cost and high performance flip chip package is disclosed. By assembling the package using a substrate panel level process, a separate fabrication of a substrate is avoided, thus enabling the use of a coreless substrate. The coreless substrate may include multiple stacked layers of laminate dielectric films having conductive traces and vias. As a result, electrical connection routes may be provided directly from die contact pads to package contact pads without the use of conventional solder bumps, thus accommodating very high density semiconductor dies with small feature sizes. The disclosed flip chip package provides lower cost, higher electrical performance, and improved thermal dissipation compared to conventional fabricated substrates with solder bumped semiconductor dies. | 2013-07-25 |
20130187285 | CARRIER, SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF - A fabrication method of a semiconductor package includes the steps of: providing a carrier having a concave portion and a releasing layer formed on a surface thereof; disposing a chip on the releasing layer in the concave portion; forming an encapsulant on the chip and the releasing layer; removing the releasing layer and the carrier; and forming a circuit structure on the encapsulant and the chip. The design of the concave portion facilitates alignment of the chip to prevent it from displacement, thereby improving the product reliability. A semiconductor package fabricated by the fabrication method is also provided. | 2013-07-25 |
20130187286 | LEAD FRAMELESS HERMETIC CIRCUIT PACKAGE - A open cavity semiconductor chip package that is leadless and does not have a metal lead frame as in conventional packages. The absence of a lead frame minimizes leakage paths and allows the novel package to be more readily fabricated as a hermetic package. A dual sided insulative or dielectric film is employed as the base interconnect between a semiconductor chip and outside contacts. Electrical connection from the top side of the film to the bottom side of the film is made through conductive micro-vias. The semiconductor chip is mounted on a paddle in a central opening in the film and wire bonded to pads on the film. After mounting of the chip, a cover or lid is attached to the film to encapsulate the assembly and maintain hermeticity of the package. | 2013-07-25 |
20130187287 | Semiconductor Device and Method of Fabricating the Same - A semiconductor device includes a circuit pattern over a first surface of a substrate, an insulating interlayer covering the circuit pattern, a TSV structure filling a via hole through the insulating interlayer and the substrate, an insulation layer structure on an inner wall of the via hole and on a top surface of the insulating interlayer, a buffer layer on the TSV structure and the insulation layer structure, a conductive structure through the insulation layer structure and a portion of the insulating interlayer to be electrically connected to the circuit pattern, a contact pad onto a bottom of the TSV structure, and a protective layer structure on a second surface the substrate to surround the contact pad. | 2013-07-25 |
20130187288 | PACKAGE-ON-PACKAGE ASSEMBLY - A package-on-package assembly includes first and second packages and an adhesion member positioned between the first and second packages and adhering the first and second packages to one another. The first package may include a first substrate having a first surface and a second surface facing each other and including a land pad formed on the first surface, a first semiconductor chip formed on the first surface, and a first encapsulant member encapsulating the first surface and the first semiconductor chip and including a through-via spaced apart from the first semiconductor chip and exposing the land pad and a trench formed between the first semiconductor chip and the through-via, and wherein at least a portion of the trench is filled with adhesion member material. | 2013-07-25 |
20130187289 | SEMICONDUCTOR DEVICE STRUCTURES AND ELECTRONIC DEVICES INCLUDING SAME HYBRID CONDUCTIVE VIAS, AND METHODS OF FABRICATION - A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed. | 2013-07-25 |
20130187290 | Three dimensional structure memory - A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques. | 2013-07-25 |
20130187291 | INTEGRATED CIRCUIT DEVICES HAVING BURIED INTERCONNECT STRUCTURES THEREIN THAT INCREASE INTERCONNECT DENSITY - Integrated circuit devices include a semiconductor substrate having a plurality of trench isolation regions therein that define respective semiconductor active regions therebetween. A trench is provided in the semiconductor substrate. The trench has first and second opposing sidewalls that define opposing interfaces with a first trench isolation region and a first active region, respectively. A first electrical interconnect is provided at a bottom of the trench. An electrically insulating capping pattern is provided, which extends between the first electrical interconnect and a top of the trench. An interconnect insulating layer is also provided, which lines the first and second sidewalls and bottom of the trench. The interconnect insulating layer extends between the first electrical interconnect and the first active region. A recess is provided in the first active region. The recess has a sidewall that defines an interface with the interconnect insulating layer. A second electrical interconnect is also provided, which extends on: (i) an upper surface of the first trench isolation region, (ii) the electrically insulating capping pattern; and (iii) the sidewall of the recess. The first and second electrical interconnects extend across the semiconductor substrate in first and second orthogonal directions, respectively. | 2013-07-25 |
20130187292 | Multi-Dimensional Integrated Circuit Structures and Methods of Forming the Same - A structure comprises a first die, a second die, an interposer, a third die, and a fourth die. The first die and the second die each have a first surface and a second surface. First conductive connectors are coupled to the first surfaces of the first and second dies, and second conductive connectors are coupled to the second surfaces of the first and second dies. The interposer is over the first and second dies. A first surface of the interposer is coupled to the first conductive connectors, and a second surface of the interposer is coupled to third conductive connectors. The third and fourth dies are over the interposer and are coupled to the third conductive connectors. The first die is communicatively coupled to the second die through the interposer, and/or the third die is communicatively coupled to the fourth die through the interposer. | 2013-07-25 |
20130187293 | ELECTRONIC DEVICE, METHOD OF MANUFACTURING, AND ELECTRONIC DEVICE MANUFACTURING APPARATUS - According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the first electrode and a second electrode of a second electronic component by heating and pressing the first electrode and the second electrode each other. | 2013-07-25 |
20130187294 | SEMICONDUCTOR DEVICE INCLUDING STACKED SEMICONDUCTOR CHIPS - A semiconductor device comprising a plurality of semiconductor chips and a plurality of through-line groups is disclosed. Each of the through-line groups consists of a unique number of through-lines. The numbers associated with the through-line groups are mutually coprime to each other. When one of the through-lines is selected for the each through-line group, one of the semiconductor chip is designated by a combination of the selected through-lines of the plurality of the through-line groups. | 2013-07-25 |
20130187295 | SENSOR MODULE, PRODUCTION METHOD OF A SENSOR MODULE, AND INJECTION MOLD FOR ENCAPSULATING A SENSOR MODULE - A sensor module an injection mold for covering the sensor module, and to a production method for a covered sensor module including a chip carrier and a sensor chip disposed thereon. A channel is formed between the chip carrier and the sensor chip, by which a medium can be fed to the sensor chip. | 2013-07-25 |
20130187296 | RESIN COMPACT, METHOD FOR PRODUCING RESIN COMPACT, RESIN COMPOSITION, METHOD FOR PRODUCING RESIN COMPOSITION AND ELECTRONIC COMPONENT DEVICE - The present invention is related to a method for producing a resin compact containing an epoxy resin, a curing agent, a curing accelerator and an inorganic filler. The method includes a kneading and crushing process for preparing a first powder material obtained by mixing, heat-melting, kneading and crushing a first component containing the epoxy resin and the curing agent and the inorganic filler, but not containing the curing accelerator; a pulverizing process for preparing a second powder material obtained by pulverizing a second component containing the curing accelerator; a mixing process for preparing a resin composition by dispersing and mixing the first powder material and the second powder material; and a molding process for obtaining the resin compact by compression-molding the resin composition. This makes it possible to obtain a resin compact (particularly, a resin compact for encapsulation) having superior long term storage stability at room temperature, good curable property and fluidity. | 2013-07-25 |
20130187297 | WATER AERATOR USING A COMPRESSED GAS CONTAINER - The water aerator using a compressed gas container is a self-contained unit having a float and a container of compressed gas (e.g., air, oxygen, etc.) installed beneath a perforated diffuser plate that, in turn, is positioned below the float. High-pressure gas from the container flows through a pipe or tube to a regulator valve and pressure gauge at the top of the pipe. A larger diameter low-pressure pipe or tube is placed concentrically about the high-pressure pipe. Regulated low-pressure gas flows down through the outer low-pressure pipe to a dispensing nozzle below the diffuser plate, whereupon the gas flows upward and is broken up by the perforations in the diffuser plate to form smaller aeration bubbles. An electrical power source, pressure switch, and light may be provided to indicate when the compressed gas container is depleted. The device may be motorized. | 2013-07-25 |
20130187298 | SYSTEM FOR DISSOLVING GASES IN FUEL - A system for gasification of liquid fuel includes an absorber to receive liquid fuel and as through separate ports, a vortex reactor to create a vortex of the gas and fuel droplets to enhance absorption of gas into the fuel, and a recirculation loop to remove and recirculate unabsorbed gas and fuel vapors from the absorber back to its tangential inlet port. Gasified fuel collects at the bottom of the absorber for delivery to an engine. | 2013-07-25 |
20130187299 | Pure and Humid Clean Air Attachment for Hot Air Heating Systems and Air conditioning Vents - A device that; hangs below (FIG. # | 2013-07-25 |
20130187300 | PLASTIC LENS MANUFACTURING METHOD - An aspect or the present invention relates to a method of manufacturing a plastic lens, which comprises casting a plastic lens starting material liquid into a cavity in a forming mold and conducting a polymerization reaction of the plastic starting material liquid within the cavity to provide a molded article. The forming mold is one in which two molds are disposed opposite each other, a gasket made of an elastic resin is disposed around the two molds to form the cavity, and at least one of the two molds is made of an elastic resin, one surface of the molded article is a convex surface and the other surface of the molded article is a concave surface, and the concave surface is formed by transferring a molding surface of the mold made of elastic resin. | 2013-07-25 |
20130187301 | METHOD OF, AND APPARATUS FOR, MAKING AN OPTICAL WAVEGUIDE - There is provided a method of making an optical polymer waveguide having an arbitrary refractive index profile, the method including: a) providing a first input optical beam having a first beam intensity profile and a second input optical beam having a second beam intensity profile; b) combining the first and second input optical beams to form an output optical beam having an output beam intensity profile; and c) forming the optical waveguide on a substrate by: exposing the optical materials of the waveguide to the output optical beam; and curing the optical materials using said output optical beam. | 2013-07-25 |
20130187302 | Investment Composition Materials Having a Reducing Agent - An investment composition comprising a reducing agent containing carbon. | 2013-07-25 |
20130187303 | EXTRUSION DIE PRE-HEATING SYSTEM, APPARATUS AND METHOD - A die pre-heating system comprises at least one die oven, a robotic hoist and processing structure in communication with the hoist and the at least one die oven. The processing structure is configured to control the hoist to permit an extrusion die to be loaded into the at least one die oven and to be unloaded from the at least one die oven. The processing structure is also configured to cause the at least one die oven to operate according to a production formula for pre-heating an extrusion die loaded therein. | 2013-07-25 |
20130187304 | METHOD FOR MANUFACTURING A CONTAINER FROM A PREFORM, WITH FEEDBACK DEPENDING ON A MINIMUM PRESSURE DETECTED - Method of manufacturing a container ( | 2013-07-25 |
20130187305 | METHOD FOR PRODUCING HOLLOW STRUCTURAL BODY - It is intended to provide a method of producing a hollow construct, which may be in various shapes such as a fiber or a film as well as in various sizes and has chemical resistance, made of a fluorinated hydrocarbon polymer, a fluorinated carbon polymer or a polymer carrying a nitrogen-containing group, a silicon-containing group, an oxygen-containing group, a phosphorus-containing group or a sulfur-containing group having been introduced into the above-described polymer; and a hollow construct obtained by this method. | 2013-07-25 |
20130187306 | MOULD TOOLS - A mould tool ( | 2013-07-25 |
20130187307 | METHOD OF SEALING COOLING HOLES - A method of sealing a gap between an aerofoil component ( | 2013-07-25 |
20130187308 | Cold Formed Stud - A cold formed metal stud is provided for commercial and residential construction applications. The metal stud of the present invention is suitable for use in both composite and non-composite applications. The metal stud of the present invention includes an intermediate web, a first flange and a second flange. Each of the intermediate web, first flange and second flange can include a number of different features that can enhance the structural and heat transfer characteristics of the metal stud. | 2013-07-25 |
20130187309 | STAMP, METHOD OF FABRICATING THE STAMP, AND IMPRINT METHOD USING THE SAME - A stamp includes a transparent body having an inner chamber containing an inlet/outlet tube configured to have a fluid injected and removed therefrom. | 2013-07-25 |
20130187310 | METHOD FOR PRODUCING A SPACER AND HOLLOW MOLD FOR PRODUCING A SPACER - A method for producing a spacer for insertion as a placeholder for an articular endoprosthesis, whereby a cement is filled into a compressed hollow space of a flexible compressed hollow mold, whereby the flexible hollow mold is expanded by the cement flowing into it, and the cement is filled into the hollow mold until the hollow space is expanded to a final state, whereby the hollow space in its final state determines the shape of the spacer to be produced, and the cement is then cured in said hollow space, and the spacer produced from the cement is removed from the hollow mold after curing. The invention also relates to the hollow mold, which comprises the compressible hollow space, whereby the hollow mold comprises at least one filling opening through which cement can be filled into the hollow space. | 2013-07-25 |
20130187311 | METHOD OF MANUFACTURING CYLINDRICAL BONDED MAGNET AND MANUFACTURING EQUIPMENT FOR CYLINDRICAL BONDED MAGNET - In a method for manufacturing a cylindrical bonded magnet, a molding space having a cylindrical shape is filled with a bonded magnet composition containing a magnetic material and a resin. The magnetic material disposed in the molding space is magnetically oriented using an orientation magnet. The orientation magnet includes a first permanent magnet and a second permanent magnet. The first and second permanent magnets are disposed such that same poles are opposite each other in the axial direction. | 2013-07-25 |
20130187312 | NANOIMPRINT LITHOGRAPHY - The present invention relates to a nanoimprint lithography method. Said nanoimprint lithography method comprises: a preparation step during which a resin ( | 2013-07-25 |
20130187313 | Controlling Crystalline Morphology of a Bioabsorbable Stent - Methods to expand polymer tubing with desirable or optimum morphology and mechanical properties for stem manufacture and fabrication of a stent therefrom are disclosed. | 2013-07-25 |
20130187314 | Manufacturing A Composite - An apparatus and method for manufacturing a composite is provided. A bottom release layer is disposed within a cavity of a volumetrically restraining body structure for supporting a cast material. An air bag is disposed between the bottom release layer and one or more surfaces of the volumetrically restraining body structure within the cavity. An air compressor connected to the air bag pressurizes the air bag. The pressurized air bag compresses the cast material against the bottom release layer. The resin inlets disposed on the cast material infuse resin into the cast material. A vacuum outlet insertably connected in the cavity of the volumetrically restraining body structure, in communication with the cast material, draws a vacuum through the cast material and draws the resin into the cast material. The compression of the cast material reduces excessive resin rich areas in the composite created from the resin infused cast material. | 2013-07-25 |
20130187315 | Lockable Gas Spring Arrangement - A lockable gas spring arrangement includes a gas spring with a closed cylinder, a displaceably guided piston and piston rod. A fastening tube fastened with its one end in the region of the free end of the piston rod and on which a locking element is arranged. The locking element is able to be moved substantially radially to the piston rod between an unlocked position permitting a free insertion movement and a locked position bearing against the front face of the cylinder on the piston rod side when the piston rod is extended. The locking element is able to be urged by a spring into its locked position. The locking element is able to be moved manually from its locked position into its unlocked position and is able to be retained automatically in its unlocked position by a retaining device. | 2013-07-25 |
20130187316 | Gas Spring - A gas spring for forming equipment, including a piston received at least partially in a cylinder for reciprocation between extended and retracted positions, and including a throttling passage disposed between the piston and the cylinder in fluid communication between first and second pressure chambers during at least a portion of the reciprocation of the piston. The throttling passage is of variable cross-sectional area, which varies with a length of the passage to at least partially restrict gas flow therethrough in a manner varying with return of the piston toward its extended position to decelerate the piston at a predetermined rate. | 2013-07-25 |
20130187317 | FLUID-FILLED VIBRATION DAMPING RUBBER DEVICE - Provided is a fluid-filled vibration damping rubber device, including enclosed spaces (primary fluid chamber and auxiliary fluid chamber) formed by chamber walls (vibration damping rubber body and rubber membrane) which deform in accordance with vibration input, the enclosed spaces being filled with a fluid, in which: the chamber walls each include a diene-based rubber; and the fluid includes a glycol-based solution containing a benzotriazole-based compound having an amine group. The fluid-filled vibration damping rubber device is capable of eliminating the degradation of the chamber walls (rubber bodies) and the deterioration of its durability due to the dissolution of components in the rubber bodies into the filling fluid. | 2013-07-25 |
20130187318 | ANTI-VIBRATION DEVICE - The present invention is an anti-vibration device ( | 2013-07-25 |
20130187319 | RUBBER STOPPER - A damper for damping vibrations between a support and a device mounted on the same includes two elastic elements which can be attached to the support by means of a bolt and a securement means. The damper should be suitable for different material thicknesses of the support. This is achieved in that a step is constructed on an outer periphery of a first element, wherein a smaller cross-section formed by the step corresponds to the cross-section of an opening in the support which is functionally assigned thereto, and the part having the smaller cross-section is longer than a thickness of the support, and in that a bore hole is included in an end face of a second element, wherein the cross-section of the bore hole corresponds to that of the opening. | 2013-07-25 |
20130187320 | SHOCK ABSORPTION MOUNT HAVING A HOUSING WITH A CONTOURED INNER SURFACE - A damper bearing comprising a hollow housing ( | 2013-07-25 |
20130187321 | MODULAR ASSEMBLY TABLE FOR SUPPORTING INDUSTRIAL FIXTURES AND TOOLING - A modular assembly table for supporting industrial fixtures and tooling for manufacturing and assembling various workpieces. The modular assembly table may provide a support structure having a base and an upright framing structure connected to the base. At least one guide rod is connected to and supported by the support structure. A fixture plate and an extension plate may be slidably connected to the at least one guide rod. A rigid connector is attached to the fixture plate and the extension plate for maintaining a predetermined distance between the fixture plate and the extension plate. At least one linear actuator may be connected to the support structure and the fixture plate for linearly adjusting the position of the fixture plate on the at least one guide rod. | 2013-07-25 |
20130187322 | CLAMP ASSEMBLY - A lever-operated clamp having a base, a clamp arm pivotally mounted to the base, and a lever which, upon pivoting, moves the clamp arm in a clamping direction of movement. An internally threaded bolt retainer is mounted to the clamp arm and threadably receives a bolt so that the rotational position of the bolt relative to the bolt retainer varies the position of the bolt relative to the clamp arm. A jam nut or internally threaded knob locks the bolt at its adjusted position. | 2013-07-25 |
20130187323 | WELDING STRUCTURE AND WELDING METHOD USING THREE POSITIONING PORTIONS - A welding structure includes a sheet-shaped first part to be welded; a sheet-shaped second part to be welded that is positioned with respect to the first part to be welded by engaging with the first part to be welded, to perform welding; and a first positioning portion, a second positioning portion, and a third positioning portion, at which the first and second parts to be welded engage with each other. The first to third positioning portions are each configured to restrict movement of one of the first and second parts to be welded in a positioning direction, with respect to the other, and enable movement of the one in a movable direction perpendicular to the positioning direction, with respect to the other. The movable direction of each of the first and second positioning portions is the same direction as the positioning direction of the third positioning portion. | 2013-07-25 |
20130187324 | Sheet Aligning Member For sheet Processing Apparatus - A sheet processing apparatus has a process tray onto which a sheet is stacked, an aligning member that conveys the sheet toward a sheet edge regulating member arranged on an upstream end portion of the process tray in a contact state in which the aligning member, the sheet edge regulating member regulating the leading edge of the sheet, and a switching member that switches a state of the aligning member between the contact state where the aligning member is in contact with the sheet, and a non-contact state where the aligning member is spaced apart from the process tray. While the sheet on the process tray is being conveyed toward the sheet edge regulating member by the aligning member, the switching member switches the aligning member from the contact state to the non-contact state, and further switches the aligning member from the non-contact state to the contact state. | 2013-07-25 |
20130187325 | PRINTING APPARATUS AND PROGRAM - There is provided a printing apparatus including a sheet accommodation device including at least one sheet accommodation section which accommodates a sheet before printing, a printing unit which prints an image on a sheet based on print data stored in a storage area, a discharged sheet accommodation device including at least one discharged sheet accommodation section which accommodates the printed sheet, a control device which selects a combination of a sheet accommodation section and a discharged sheet accommodation section such that a storage device completes storing print data into the storage area by a conveyance starting time of a sheet to be printed based on the print data, and which control a conveyance device to feed the sheet to be printed based on the print data from the sheet accommodation section to discharge the sheet to the discharged sheet accommodation section of the selected combination. | 2013-07-25 |
20130187326 | AUTOMATIC DOCUMENT FEEDER - An automatic document feeder includes an upper cover, a document pick-up module, and a conveying channel. The upper cover has a first hooking element. The document pick-up module is arranged between the upper cover and the conveying channel. In addition, the document pick-up module has a second hooking element. When the automatic document feeder is operated in a standby mode, the document pick-up module is swung to a position near the upper cover and the second hooking element is engaged with the first hooking element, so that the document pick-up module is fixed on the upper cover. Since the document pick-up module is not contacted with the document when the automatic document feeder is operated in the standby mode, the possibility of causing an erroneous action of the document pick-up module will be eliminated. | 2013-07-25 |
20130187327 | SHEET-SUPPLY CASSETTE, AND IMAGE RECORDING APPARATUS INCLUDING SHEET-SUPPLY CASSETTE - A sheet-supply cassette including a main member open upward and adapted to store a plurality of recording sheets stacked on each other, each of which is separated from the other recording sheets, and is fed in a sheet-feed direction, by a sheet feeder; an inclined sheet-separate plate provided in a downstream-side portion of the main member as seen in the sheet-feed direction, and which cooperates with the sheet feeder to separate the each recording sheet from the other recording sheets; and a plurality of back-surface support portions which are formed integrally with the downstream-side portion of the main member, such that the back-surface support portions are distant from each other in a perpendicular direction substantially perpendicular to the sheet-feed direction. The inclined sheet-separate plate is detachably attached to the back-surface support portions such that a back surface of the inclined sheet-separate plate is supported by the back-surface support portions. | 2013-07-25 |
20130187328 | SHEET EJECTING DEVICE - Disclosed is a sheet ejecting device. The sheet ejecting device includes a sheet stacking section; a bumping section; a sheet ejecting section; a mode selecting section; and a control section. The sheet ejecting section includes a pair of sheet clamping members which clamps one sheet or a plurality of overlapped sheets at a sheet clamping position and moves the one sheet or the plurality of overlapped sheets to a sheet stacking position in the sheet stacking section. The mode selecting section allows selection of an operation mode of the pair of sheet clamping members between a normal mode in which speed of the pair of sheet clamping members is a normal speed and a low speed mode in which a speed is lower than the normal speed. | 2013-07-25 |
20130187329 | IMAGE FORMING APPARATUS - To simplify control of a sheet feeing/conveying system while preventing a step-out phenomenon, saving power, and reducing cost, provided is an image forming apparatus which detects a load angle of a motor (M | 2013-07-25 |
20130187330 | SHEET CONVEYING APPARATUS AND IMAGE FORMING APPARATUS - A sheet conveying apparatus which conveys a sheet, including: a first conveying path along which the sheet is conveyed; a second conveying path along which the sheet is reconveyed to the first conveying path; a reverse conveyance roller pair, which performs forward rotation to convey the sheet from the first conveying path and reverse rotation to convey the sheet to the second conveying path; a reconveying roller pair disposed in the second conveying path; and a control portion which causes the reconveying roller pair to nip a preceding sheet and a succeeding sheet in an overlaid manner, and thereafter rotates a first roller that is in contact with the preceding sheet while stopping rotation of a second roller that is in contact with the succeeding sheet so that the preceding sheet is conveyed to the first conveying path and the succeeding sheet stays in the second conveying path. | 2013-07-25 |
20130187331 | SHEET ALIGNING DEVICE AND IMAGE FORMING APPARATUS INCLUDING THE SAME - A sheet aligning device may include a sheet conveyance path; a detecting unit configured to detect a side edge of a sheet being conveyed in the sheet conveyance path; a stopper on an upstream side of the detecting unit and configured to open/close so as to allow/prevent passage of the sheet and to position a leading edge of the sheet; a first conveying unit on an upstream side of the stopper, the first conveying unit including a pair of first rollers configured to come in contact with/ separate from each other; a second conveying unit on an upstream side of the first conveying unit, the second conveying unit including a pair of second rollers configured to come in contact with/separate from each other; and a horizontal movement unit configured to move the pair of first rollers in an axial direction based on a detection result output by the detecting unit. | 2013-07-25 |
20130187332 | IMAGE FORMING APPARATUS - To simplify control of a sheet feeding/conveying system while preventing a step-out phenomenon and saving power, provided is an image forming apparatus which detects a load angle of a first motor (M | 2013-07-25 |
20130187333 | MACHINE FOR PROCESSING ELEMENTS IN SHEET FORM, COMPRISING A CHAINSET TENSIONER - A machine for processing elements in sheet form, the machine having chainsets which move gripper bars for moving sheet elements through the machine. At least one tensioner device generates a tension force in the chainsets. The chainset tensioner device includes a drive member capable of generating a variable force, having an intensity dependent on the instantaneous production rate of the machine. Chainset wear is greatly reduced, and the life of the chainsets is lengthened considerably. | 2013-07-25 |
20130187334 | SHEET CONVEYING DEVICE AND IMAGE FORMING APPARATUS WITH THE SAME - A sheet conveying device ( | 2013-07-25 |
20130187335 | TWO-DIMENSIONAL TILING PUZZLE HAVING THREE-DIMENSIONAL FEATURES - A tiling puzzle having a first two-dimensional portion and a second three-dimensional portion that extends away from the plane of the first two-dimensional portion. | 2013-07-25 |
20130187336 | Round Absorbing Airsoft Target Trap Assembly - A round absorbing Airsoft target trap assembly is provided that includes a target frame and a backstop for receiving and reducing the velocity of Airsoft rounds passing through the target frame. | 2013-07-25 |
20130187337 | EMERGENCY SACRIFICIAL SEALING METHOD IN FILTERS, EQUIPMENT, OR SYSTEMS - A system seals a filter or equipment component to a base and will continue to seal the filter or equipment component to the base in the event of hot air or fire. The system includes a first sealing material between the filter or equipment component and the base; and a second sealing material between the filter or equipment component and the base and proximate the first sealing material. The first sealing material and the second seal material are positioned relative to each other and relative to the filter or equipment component and the base to seal the filter or equipment component to the base and upon the event of fire the second sealing material will be activated and expand to continue to seal the filter or equipment component to the base in the event of hot air or fire. | 2013-07-25 |