| 28th week of 2010 patent applcation highlights part 14 |
| Patent application number | Title | Published |
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| 20100176460 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device according to one embodiment includes: a semiconductor substrate having first and second regions; a first transistor comprising a first gate insulating film and a first gate electrode thereon in the first region on the semiconductor substrate, the first gate insulating film comprising a first interface layer containing nitrogen atoms and a first high dielectric constant layer thereon; a second transistor comprising a second gate insulating film and a second gate electrode thereon in the second region on the semiconductor substrate, the second gate insulating film comprising a second interface layer and a second high dielectric constant layer thereon, the second interface layer containing nitrogen atoms at an average concentration lower than that of the first interface layer or not containing nitrogen atoms, and the second transistor having a threshold voltage different from that of the first transistor; and an element isolation region on the semiconductor substrate, the element isolation region containing oxygen atoms and isolating the first transistor from the second transistor. | 2010-07-15 |
| 20100176461 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed. A semiconductor device includes a semiconductor layer formed over an insulating substrate; a first insulating layer formed over the semiconductor layer; a gate electrode formed over the first insulating layer; a second insulating layer formed over the gate electrode; an opening which reaches the semiconductor layer and is formed at least in the first insulating layer and the second insulating layer; and a step portion formed at a side surface of the second insulating layer in the opening. | 2010-07-15 |
| 20100176462 | METHOD OF SIMULTANEOUSLY SILICIDING A POLYSILICON GATE AND SOURCE/DRAIN OF A SEMICONDUCTOR DEVICE, AND RELATED DEVICE - A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second polysilicon layer), forming a second nitride layer over an active region in the semiconductor substrate adjacent to the gate stack, performing a chemical mechanical polishing that stops on the first nitride layer and on the second nitride layer, removing the first nitride layer and the second nitride layer, and performing a simultaneous silicidation of the first polysilicon layer and the active region. | 2010-07-15 |
| 20100176463 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - In order to provide a technique capable of executing an etching process using a dry etching method and a wet etching method in combination with high processing dimensional accuracy, an interlayer insulating film | 2010-07-15 |
| 20100176464 | Sensor Die Structure - A sensor is implemented in an integrated circuit. The sensor includes one or more sensor pads that are provided at or near a surface of the integrated circuit. One or more integrated circuit components such as a sense amplifier are provided in the integrated circuit die adjacent the sensor pads. One or more other components are provided in the integrated circuit die adjacent the sensor pads. | 2010-07-15 |
| 20100176465 | METHOD OF EPITAXIALLY GROWING PIEZORESISTORS - A method of forming a device with a piezoresistor is disclosed herein. In one embodiment, the method includes providing a substrate, etching a trench in the substrate to form a vertical wall, growing a piezoresistor layer epitaxially on the vertical wall, and separating the vertical wall from an underlying layer of the substrate that extends along a horizontal plane such that the piezoresistor layer is movable with respect to the underlying layer within the horizontal plane. | 2010-07-15 |
| 20100176466 | Semiconductor device and method of making the same - A semiconductor device includes a sensor member and a cap member. The sensor member has a surface and includes a first sensing section. The first sensing section includes first and second portions that are located on the surface side of the sensor member and electrically insulated from each other. The cap member has a surface and includes a cross wiring portion. The surface of the cap member is joined to the surface of the sensor member in such a manner that the first sensing section is sealed by the sensor member and the cap member. The cross wiring portion electrically connects the first portion to the second portion. | 2010-07-15 |
| 20100176467 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a chip base material; a capacitor formed on the base material; and a cover formed over the base material to cover the capacitor, and having a side portion and an upper portion. The base material is provided with a bonding pattern connecting the base material and the cover to cover the capacitor. The bonding pattern includes a region A having a substantially uniform pattern width A, and at least one region B having a pattern width B which is larger than the width pattern width A. | 2010-07-15 |
| 20100176468 | Microelectromechanical Apparatus and Method for Producing the Same - A microelectromechanical apparatus (X) includes a microelectromechanical component ( | 2010-07-15 |
| 20100176469 | MICROMECHANICAL COMPONENT AND METHOD FOR PRODUCING A MICROMECHANICAL COMPONENT - A micromechanical component includes a substrate that has a front side and a backside, the front side having a functional pattern, which functional pattern is electrically contacted to the backside in a contact region. The substrate has at least one contact hole in the contact region, which extends into the substrate, starting from the backside. | 2010-07-15 |
| 20100176470 | NOVEL FREE LAYER/CAPPING LAYER FOR HIGH PERFORMANCE MRAM MTJ - An MTJ MRAM cell and its method of formation are described. The cell includes a composite free layer having the general form (Ni | 2010-07-15 |
| 20100176471 | Magnetic Element With Storage Layer Materials - According to an embodiment of the invention, a magnetic tunnel junction (MTJ) element includes a reference ferromagnetic layer, a storage ferromagnetic layer, and an insulating layer. The storage ferromagnetic layer includes a CoFeB sub-layer coupled to a CoFe sub-layer and/or a NiFe sub-layer through a non-magnetic sub-layer. The insulating layer is disposed between the reference and storage ferromagnetic layers. | 2010-07-15 |
| 20100176472 | NONVOLATILE MAGNETIC MEMORY DEVICE - A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure. | 2010-07-15 |
| 20100176473 | IMAGING PHOTODETECTION DEVICE - An imaging photodetection device includes a plurality of photodetectors ( | 2010-07-15 |
| 20100176474 | BACK-LIT IMAGE SENSOR AND METHOD OF MANUFACTURE - A backside-illuminated image sensor includes photoelectric converters disposed in a front-side of a substrate and arranged to define pixels, back-side interlayer dielectric patterns disposed on the back-side of the substrate over the photoelectric converters, color filters arranged over the back-side interlayer dielectric patterns, and micro-lenses arranged over the color filters, wherein adjacent back-side interlayer dielectric patterns are separated by an intervening gap region having a refractive index less than that of the back-side interlayer dielectric patterns. | 2010-07-15 |
| 20100176475 | OPTICAL DEVICE AND METHOD FOR FABRICATING THE SAME - An optical device according to an aspect of the present invention includes: a semiconductor substrate layer including a plurality of elements; at least one optical component which is formed at the first principal surface side of the semiconductor substrate layer and transmits incident light of desired wavelength; and an interconnect layer formed on second principal surface of the semiconductor substrate layer. In the semiconductor substrate layer, (i) a photoelectric conversion element region is formed at a position corresponding to the at least one optical component, and (ii) at least one element among the plurality of elements is formed near the second principal surface. At least a part of the at least one optical component is formed as a part of the semiconductor substrate layer, and the interconnect layer includes the conductive material electrically connected to the photoelectric conversion element region and the at least one element. | 2010-07-15 |
| 20100176476 | OPTICAL DEVICE, SOLID-STATE IMAGING DEVICE, AND METHOD - An optical device including: an optical element including a light-receiving unit as a part of a top surface; a transparent member deposited on the optical element to cover the light-receiving unit; and a sealant formed to seal around the transparent member. The transparent member includes: a first protrusion formed in an upper region of a side surface of the transparent member such that a step is created on the side surface; and a tapered surface on an end surface of the first protrusion, the tapered surface being sloped such that a to cross-sectional area of the transparent member decreases towards an upper side of the transparent member. The sealant covers entirely at least a part of the side surface of the transparent member, the part of the side surface being located below the first protrusion. | 2010-07-15 |
| 20100176477 | Negative Feedback Avalanche Diode - A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor. | 2010-07-15 |
| 20100176478 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - Provided are a novel method and a novel structure for bringing a Ge or SiGe compound and a metal into ohmic contact with each other. A semiconductor device is provided with a portion composed of only i) Ge or SiGe compound, ii) a metal, and iii) an insulator or a semiconductor arranged between the material i) and the metal ii). In the semiconductor device, A) the material i) and the metal ii) have Schottky junction in the case where the holes of the material i) are majority carriers, and/or B) the material i) and the metal ii) are in an ohmic contact when the electrons of the material i) are majority carriers. | 2010-07-15 |
| 20100176479 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device including depositing a hardmask layer on a layer of the semiconductor device, selectively etching a pattern of continuous lines in the hardmask layer, depositing an antireflective coating over remaining portions of the hardmask layer, depositing a photoresist layer on the antireflective coating, patterning the photoresist layer with a plurality of isolation trenches via a lithography process, each of the isolation trenches extending perpendicular to and crossing portions of at least one of the continuous lines of the underlying hardmask layer, and with each isolation trench having an initial width. The method further includes reducing the width of each of the isolation trenches from the initial width to desired width via a shrinking process, etching the antireflective coating underlying the isolation trenches to expose intersecting portions of the underlying continuous lines, and etching the exposed intersecting portions of the underlying continuous lines of the hardmask layer to form a pattern of line segments having line ends separated by the desired width. | 2010-07-15 |
| 20100176480 | Semiconductor device, method for manufacturing the same, and multilayer substrate having the same - A method for manufacturing a semiconductor device includes: preparing a wafer formed of a SOI substrate; forming a circuit portion in a principal surface portion; removing a support substrate of the SOI substrate; fixing an insulation member on a backside of a semiconductor layer so as to be opposite to the circuit portion; dicing the wafer and dividing the wafer into multiple chips; arranging a first conductive member on the insulation member so as to be opposite to a part of the low potential reference circuit, and arranging a second conductive member on the insulation member so as to be opposite to a part of the high potential reference circuit; and coupling the first conductive member with a first part of the low potential reference circuit, and coupling the second conductive member with a second part of the high potential reference circuit. | 2010-07-15 |
| 20100176481 | Memory Device and Manufacturing Method Thereof - A memory device and a manufacturing method thereof are provided. The manufacturing method of memory device includes the following steps. Firstly, a substrate having a substrate surface is provided. Next, at least two memory units separated via a space are formed on the substrate. Then, an insulating layer covering the memory units and the substrate surface is formed. After that, a mask layer only covering the bottom of the insulating layer is formed on the insulating layer. Afterwards, the part of the insulating layer partially covered by the mask layer is etched. Then, the mask layer is removed. Next, the part of the insulating layer where the mask layer is removed is etched. Lastly, a protecting layer is formed on the memory units and in the space between the memory units. | 2010-07-15 |
| 20100176482 | LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH SUBSEQUENT SELF ALIGNED SHALLOW TRENCH ISOLATION - A semiconductor substrate structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer; an insulator with etch stop characteristics formed on the electrically conductive layer; an upper insulating layer formed on the etch stop layer; and a semiconductor layer formed on the upper insulating layer. A scheme of subsequently building a dual-depth shallow trench isolation with the deeper STI in the back gate layer self-aligned to the shallower STI in the active region in such a semiconductor substrate is also disclosed. | 2010-07-15 |
| 20100176483 | FUSE ELEMENT AND SEMICONDUCTOR INTEGRATED CIRCUIT WITH THE SAME - A fuse element according to the present invention and a semiconductor integrated circuit with the fuse element include interconnects and a via connected to a region for connecting the interconnects. A first angle between a first side surface of the via and the connect region is smaller than a second angle between a second side surface opposite the first side surface and the connect region. | 2010-07-15 |
| 20100176484 | ESD protection device, composite electronic component of the same, manufacturing method of composite substrate, and manufacturing method of ESD protection device - The present invention provides an ESD protection device and the like having improved durability against repeated use. The ESD protection device includes a base | 2010-07-15 |
| 20100176485 | STORAGE CAPACITOR HAVING AN INCREASED APERTURE RATIO AND METHOD OF MANUFACTURING THE SAME - Disclosed is a method of manufacturing a storage capacitor having increased aperture ratio: providing a substrate having a metal layer disposed thereon, and said metal layer is covered correspondingly with a first dielectric layer and a second dielectric layer in sequence; forming a photoresist layer with a uniform thickness to cover said second dielectric layer; performing a process of exposure-to-light and development to a portion of said photoresist layer that is correspondingly disposed over said metal layer sequentially, so that its thickness is less than its original thickness; removing said photoresist layer and etching said portion of said second dielectric layer, so that a thickness of said portion of said second dielectric layer is less than its original thickness, and the etching depth of said portion is greater than that of the other remaining portions of said second dielectric layer; and forming an electrode layer on said second dielectric layer. | 2010-07-15 |
| 20100176486 | Semiconductor device and method of manufacturing the same - A semiconductor device includes a memory cell region and a peripheral circuit region. The memory cell region includes a first region and a second region surrounding the first region. The first region includes a plurality of first electrodes, a plurality of first support portions, and a second support portion. The plurality of first electrodes upwardly extends. The plurality of first support portions upwardly extends along the plurality of first electrodes. Each of the plurality of first support portions mechanically supports corresponding one of the plurality of first electrodes. The second support portion contacts with the plurality of the first support portions. The second support portion connects between each of the plurality of first electrodes. | 2010-07-15 |
| 20100176487 | ELECTRONIC COMPONENT WITH REACTIVE BARRIER AND HERMETIC PASSIVATION LAYER - An electronic component is provided on a substrate. A thin-film capacitor is attached to the substrate, the thin-film capacitor includes a pyrochlore or perovskite dielectric layer between a plurality of electrode layers, the electrode layers being formed from a conductive thin-film material. A reactive barrier layer is deposited over the thin-film capacitor. The reactive barrier layer includes an oxide having an element with more than one valence state, wherein the element with more than one valence state has a molar ratio of the molar amount of the element that is in its highest valence state to its total molar amount in the barrier of 50% to 100%. Optionally layers of other materials may intervene between the capacitor and reactive barrier layer. The reactive barrier layer may be paraelectric and the electronic component may be a tunable capacitor. | 2010-07-15 |
| 20100176488 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - A semiconductor memory device includes a word line interconnect layer having a plurality of word lines extending in a word line direction and a bit line interconnect layer having a plurality of bit lines extending in a bit line direction alternately stacked on a silicon substrate. A variable resistance film is disposed between the word line and the bit line. A first pin diode extending in the word line direction is provided between the word line and the variable resistance film, and a second pin diode extending in the bit line direction is provided between the bit line and the variable resistance film. A region of an upper surface of the pin diode other than an immediately underlying region of the variable resistance film is located lower than the immediately underlying region. | 2010-07-15 |
| 20100176489 | Microelectromechanical systems structures and self-aligned harpss fabrication processes for producing same - Disclosed are one-port and two-port microelectromechanical structures including variable capacitors, switches, and filter devices. High aspect-ratio micromachining is used to implement low-voltage, large value tunable and fixed capacitors, and the like. Tunable capacitors can move in the plane of the substrate by the application of DC voltages and achieve greater than 240 percent of tuning. Exemplary microelectromechanical apparatus comprises a single crystalline silicon substrate, and a conductive structure laterally separated from the single crystalline silicon substrate by first and second high aspect ratio gaps of different size, wherein at least one of the high aspect ratio gaps has an aspect ratio of at least 30:1, and is vertically anchored to the single crystalline silicon substrate by way of silicon nitride. | 2010-07-15 |
| 20100176490 | METHODS OF FORMING RELAXED LAYERS OF SEMICONDUCTOR MATERIALS, SEMICONDUCTOR STRUCTURES, DEVICES AND ENGINEERED SUBSTRATES INCLUDING SAME - Methods of fabricating relaxed layers of semiconductor materials include forming structures of a semiconductor material overlying a layer of a compliant material, and subsequently altering a viscosity of the compliant material to reduce strain within the semiconductor material. The compliant material may be reflowed during deposition of a second layer of semiconductor material. The compliant material may be selected so that, as the second layer of semiconductor material is deposited, a viscosity of the compliant material is altered imparting relaxation of the structures. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Methods of fabricating semiconductor structures and devices are also disclosed. Novel intermediate structures are formed during such methods. Engineered substrates include a plurality of structures comprising a semiconductor material disposed on a layer of material exhibiting a changeable viscosity. | 2010-07-15 |
| 20100176491 | Epitaxially Coated Silicon Wafer and Method For Producing Epitaxially Coated Silicon Wafers - Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm in both steps, and subsequently epitaxially coated on the polished front side, and then removed from the reactor. In a second method, gas flows introduced into the reactor by injectors are distributed into outer and inner zones of the chamber, such that the inner zone gas flow acts on a wafer central region and the outer zone gas flow acts on a wafer edge region, the inner/outer distribution of the etching medium I/O=0-0.75. Silicon wafers having an epitaxial layer having global flatness value GBIR of 0.02-0.06 μm, relative to an edge exclusion of 2 mm are produced. | 2010-07-15 |
| 20100176492 | Method for Forming a Pattern on a Semiconductor Using an Organic Hard Mask - A composition for the organic hard mask includes a polyamic acid compound, and a method for forming a pattern is used in a manufacturing process of semiconductor devices by coating the composition for organic hard mask film on an underlying layer, and depositing a second hard mask film with a silicon nitride SiON film thereon to form a double hard mask film having an excellent etching selectivity, thereby obtaining a uniform pattern. | 2010-07-15 |
| 20100176493 | METHOD OF SPLITTING A SUBSTRATE - A process for splitting a semiconductor substrate having an identification notch on its periphery, by creating a weakened zone in the substrate by implanting atomic species into the substrate while the substrate is held in place on a portion of its periphery during the implanting; and splitting the substrate along the weakened zone by placing the held portion of the substrate in a splitting-wave initiation sector while positioning the notch for initiating a splitting wave followed by the propagation of the wave into the substrate. During splitting the notch is positioned so that it is in a quarter of the periphery of the substrate diametrically opposite the sector for initiating the splitting wave or in the quarter of the periphery of the substrate that is centered on the sector. | 2010-07-15 |
| 20100176494 | Through-Silicon Via With Low-K Dielectric Liner - A semiconductor substrate having a through-silicon via with an air gap interposed between the through-silicon via and the semiconductor substrate is provided. An opening is formed partially through the semiconductor substrate. The opening is first lined with a first liner and then the opening is filled with a conductive material. A backside of the semiconductor substrate is thinned to expose the first liner, which is subsequently removed and a second liner formed with a low-k or extra low-k dielectric is formed in its place. | 2010-07-15 |
| 20100176495 | LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS - A semiconductor wafer structure for integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate; an electrically conductive layer formed on the lower insulating layer; an upper insulating layer formed on the electrically conductive layer, the upper insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; and a semiconductor layer formed on the upper insulating layer. | 2010-07-15 |
| 20100176496 | MATERIAL FOR FORMING EXPOSURE LIGHT-BLOCKING FILM, MULTILAYER INTERCONNECTION STRUCTURE AND MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE - To provide a material for forming an exposure light-blocking film which includes at least one of a silicon compound expressed by the following structural formula (1) and a silicon compound expressed by the following structural formula (2), wherein at least one of R | 2010-07-15 |
| 20100176497 | INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM - An integrated circuit package-on-package stacking system includes a leadframe interposer including: a leadframe having a lead; a molded base on a portion of the lead for only supporting the lead; and the leadframe interposer singulated from the leadframe, wherein the lead is bent to support a stack-up height. | 2010-07-15 |
| 20100176498 | POWER MODULE PACKAGE HAVING EXCELLENT HEAT SINK EMISSION CAPABILITY AND METHOD FOR MANUFACTURING THE SAME - A power module package includes a power circuit element, a control circuit element, a lead frame, an aluminum oxide substrate having a heat sink and an insulation layer, and a sealing resin. The control circuit element is electrically connected with the power circuit element to control chips within the power circuit element. The lead frame has external connection terminal leads in its edge and has a first surface to which the power circuit element and the control circuit element are attached and a second surface which is used as a heat transmission path. The heat sink is a plate made of metal such as aluminum and the electrical insulation layer is formed at least on an upper surface of the heat sink and made of aluminum oxide. The electrical insulation layer may be formed over an entire surface of the heat sink. Here, the insulation layer is attached to the second surface by an adhesive, on a region below where the power circuit element is attached, to the first surface of the lead frame. In addition, the sealing resin encloses the power circuit element and the control circuit element, the lead frame, and the metal oxide substrate and exposes the external connection terminals of the lead frame. | 2010-07-15 |
| 20100176499 | Semiconductor device with lead frame having lead terminals with wide portions of trapezoidal cross section - A semiconductor device in which a semiconductor chip, a lead frame and metal wires for electrically connecting the lead frame are sealed with sealing resin. The lead frame has a plurality of lead terminal portions, a supporting portion for supporting the semiconductor chip, and hanging lead portions supporting the supporting portion. Each of the lead terminal portions adjacent to the hanging lead portion is a chamfered lead terminal portion having, at its head, a chamfered portion formed substantially in parallel with the hanging lead portion so as to avoid interference with the hanging lead portion. | 2010-07-15 |
| 20100176500 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of electrodes formed on a semiconductor chip, and a plurality of wires each connecting each of the electrodes to an inner lead, and each having a plurality of bending points. A first wire of the plurality of the wires has a slope extending upwardly from a first bending point toward a second bending point, where the first bending point is being located at an upper end of a rising portion. The second bending point of the first wire is the highest bending point in the first wire. A second wire of the plurality of the wires has a slope extending downwardly from a first bending point toward a second bending point, where the first bending point is located at an upper end of a rising portion. The second bending point of the second wire is the lowest bending point in the second wire. | 2010-07-15 |
| 20100176501 | Method and Apparatus for Stacked Die Package with Insulated Wire Bonds - A semiconductor package has a substrate with a plurality of contact pads. A first semiconductor die is mounted to the substrate. First bond wires are formed between each of the center-row contact pads of the first semiconductor die and the substrate contact pads. The first bond wires include an electrically insulative coating formed over the shaft that covers a portion of a surface of a bumped end of the first bond wires. An epoxy material is deposited over the first semiconductor die. A second semiconductor die is mounted to the epoxy material. Second bond wires are formed between each of the center-row contact pads of the second semiconductor die and the substrate contact pads. The second bond wires include an electrically insulative coating formed over the shaft of the second bond wires that covers a portion of a surface of a bumped end of the second bond wires. | 2010-07-15 |
| 20100176502 | Wafer level vertical diode package structure and method for making the same - A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer. | 2010-07-15 |
| 20100176503 | SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING - A semiconductor package system includes providing a substrate having a plurality of thermal vias extending through the substrate. A solder mask is positioned over the plurality of thermal vias. A plurality of thermally conductive bumps is formed on at least some of the plurality of thermal vias using the solder mask. An integrated circuit die is attached to the plurality of thermally conductive bumps. An encapsulant encapsulates the integrated circuit die. | 2010-07-15 |
| 20100176504 | SEMICONDUCTOR DEVICE - A semiconductor device including: a semiconductor member having thereon a plurality of interconnect pads: and a mounting member having a plurality of electrode terminals electrically and mechanically connected to the respective interconnect pads for mounting the semiconductor chip on the mounting member, the electrode terminals forming a plurality of I/O cells each having part of the electrode terminals, the part of electrode terminals including signal terminals, the I/O cells forming a first group of the I/O cells and a second group of I/O cells disposed on an inner position of the mounting member with respect to the first group. The higher integration of the semiconductor device having the higher performances can be realized because the interconnect lines can be drawn to the outer periphery of the chip from the interconnect pads corresponding to each of the I/O cells when the chip is miniaturized or the number of the ball electrodes is increased. | 2010-07-15 |
| 20100176505 | POWER SEMICONDUCTOR MODULE AND FABRICATION METHOD THEREOF - An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress can escape. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board serving as a current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and cracks of the cover plate. | 2010-07-15 |
| 20100176506 | THERMOELECTRIC 3D COOLING - The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips. | 2010-07-15 |
| 20100176507 | SEMICONDUCTOR-BASED SUBMOUNT WITH ELECTRICALLY CONDUCTIVE FEED-THROUGHS - A submount for a micro-component includes a semiconductor substrate having a cavity defined in a front-side of the substrate in which to mount the micro-component. The submount also includes a thin silicon membrane portion at a bottom of the cavity and thicker frame portions adjacent to sidewalls of the cavity. The substrate includes an electrically conductive feed-through connection extending from a back-side of the substrate at least partially through the thicker silicon frame portion. Electrical contact between the feed-through connection and a conductive layer on a surface of the cavity is made at least partially through a sidewall of the cavity. | 2010-07-15 |
| 20100176508 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF ASSEMBLY THEREOF - A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material. | 2010-07-15 |
| 20100176509 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes: a mount body; a semiconductor chip mounted on the mount body via projecting connecting terminals; and a filling resin filled between the mount body and the semiconductor chip to seal the connecting terminals, the filling resin being retained inside the semiconductor chip in such a way as not to run out of at least one side portion in four side portions defining an outer peripheral portion of the semiconductor chip. | 2010-07-15 |
| 20100176510 | Fusible I/O Interconnection Systems and Methods for Flip-Chip Packaging Involving Substrate-Mounted Stud Bumps - A semiconductor device has a semiconductor die with bond pads formed on a surface of the semiconductor die. A UBM is formed over the bond pads of the semiconductor die. A fusible layer is formed over the UBM. The fusible layer can be tin or tin alloy. A substrate has bond pads formed on a surface of the substrate. A plurality of stud bumps containing non-fusible material is formed over the bond pads on the substrate. Each stud bump includes a wire having a first end attached to the bond pad of the substrate and second end of uniform height electrically connected to the bond pad of the semiconductor die by reflowing the fusible layer or applying thermal compression bonding. An underfill material is deposited between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and substrate. | 2010-07-15 |
| 20100176511 | SEMICONDUCTOR DEVICE WITH A LINE AND METHOD OF FABRICATION THEREOF - A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained. | 2010-07-15 |
| 20100176512 | STRUCTURE AND METHOD FOR BACK END OF THE LINE INTEGRATION - An improved semiconductor structure consists of interconnects in an upper interconnect level connected to interconnects in a lower interconnect level through use of a conductive protrusion located at the bottom of a via opening in an upper interconnect level, the conductive protrusion extends upward from bottom of the via opening and into the via opening. The improved interconnect structure with the conductive protrusion between the upper and lower interconnects enhances overall interconnect reliability. | 2010-07-15 |
| 20100176513 | STRUCTURE AND METHOD OF FORMING METAL INTERCONNECT STRUCTURES IN ULTRA LOW-K DIELECTRICS - A metal interconnect structure in ultra low-k dielectrics is described having a capped interconnect layer; an interconnect feature with a contact via and a contact line formed in a dielectric layer, where the via is partially embedded into the interconnect layer; and a thin film formed on the dielectric layer and separating the dielectric layer from the contact line. A method of fabricating the interconnect structure is also described and includes forming a first dielectric on a capped interconnect element; forming a thin film over the first dielectric; forming a second dielectric on the thin film; forming a via opening on the second dielectric, the thin film and extending into the first dielectric; forming a line trench on a portion of the second dielectric; and filling the via opening and the line trench with a conductive material for forming a contact via and a contact line, where the contact via is partially embedded in the interconnect element. | 2010-07-15 |
| 20100176514 | INTERCONNECT WITH RECESSED DIELECTRIC ADJACENT A NOBLE METAL CAP - The invention comprises a copper interconnect structure that includes a noble metal cap with dielectric immediately adjacent the copper/noble metal cap interface recessed from the noble metal cap. | 2010-07-15 |
| 20100176515 | CONTACT PAD SUPPORTING STRUCTURE AND INTEGRATED CIRCUIT - The invention provides a contact pad supporting structure. The contact pad supporting structure includes an underlying first conductive plate and an overlying second conductive plate, wherein the first and second conductive plates are separated by a first dielectric layer. A plurality of circular ring-shaped via plug groups comprising a plurality of circular ring-shaped via plugs is through the first dielectric layer, electrically connecting to the first and second conductive plates. All of the circular ring-shaped via plugs of each of the circular ring-shaped via plug groups are disorderly arranged. | 2010-07-15 |
| 20100176516 | Substrate having optional circuits and structure of flip chip bonding - The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface. The substrate pad is disposed on the surface of the substrate body. The first conductive trace is connected to a first circuit, and has a first breaking area so it forms a discontinuous line. The second conductive trace is connected to a second circuit, and has a second breaking area so tit forms a discontinuous line. The second conductive trace and the first conductive trace are connected to the same substrate pad. Thus, the substrate can choose to connect different circuits, so the substrate can be applied to different products by connecting the desired circuit, thus reducing the manufacturing cost. | 2010-07-15 |
| 20100176517 | Electronic device - Differences in contraction forces of a sealing resin can be alleviated and strain on a package can be reduced even when electronic components are unevenly positioned on a substrate. An electronic device ( | 2010-07-15 |
| 20100176518 | SYSTEM AND METHOD FOR CONVERTING AN ENGINE TO AN ALTERNATE FUEL - An engine conversion kit for converting an engine that combusts gasoline to an engine that combusts a fuel other than gasoline, such as E85 which is 85 percent ethanol and 15 percent gasoline includes a carburetor having a vent passageway that defines a vent size, and an automatic choke system. The kit includes a second carburetor including a primer passageway and a second vent passageway having a second vent size that is smaller than the vent size. The second carburetor is adapted to attach to the engine and replace the carburetor. A primer bulb is configured to connect to the engine and is operable to force air into the primer passageway | 2010-07-15 |
| 20100176519 | CARBURETTORS - A carburettor includes a primary air passage ( | 2010-07-15 |
| 20100176520 | MICROBUBBLE THERAPY METHOD AND GENERATING APPARATUS - A micro bubble generating system includes a shell having a well for retaining a first liquid to immerse an object. A micro bubble apparatus is provide to the shell for providing a pressurized mixture of a second liquid and a dissolved gas into the well so as to create a plurality of micro bubbles within the first liquid for engaging the object. A micro bubble generating apparatus may include a housing body having a first fluid passage for a pressurized mixture of a liquid and a dissolved gas in a direction towards a fluid flow. An orifice member can be releasably engaged with the housing body and the orifice member may have a second fluid passage being disposed therein; and the second fluid passage being disposed at an angle with respect to the first fluid passage for generating a plurality of micro bubbles from the mixture; and an opening in the housing body for releasing the plurality of micro bubbles. | 2010-07-15 |
| 20100176521 | MICROBUBBLE THERAPY METHOD AND GENERATING APPARATUS - A micro bubble generating system includes a shell having a well for retaining a first liquid to immerse an object. A micro bubble apparatus is provide to the shell for providing a pressurized mixture of a second liquid and a dissolved gas into the well so as to create a plurality of micro bubbles within the first liquid for engaging the object. | 2010-07-15 |
| 20100176522 | OPTICAL-PARTS MOLDING DIE AND OPTICAL-PARTS MANUFACTURING METHOD - A die having a plurality of cavities and a temperature sensor for acquiring a temperature value in which the number of the cavities is larger than that of electrothermal conversion elements. When viewed from a direction perpendicular to the surface of a parting line, all cavities and a temperature sensor are arranged in a region occupied by the electrothermal conversion elements. Interval between the outlines of the cavities is smaller than the minimum interval between the outline of the cavity and the electrothermal conversion element, and the shortest distance between the electrothermal conversion element and the temperature measuring portion of a temperature measuring element is shorter than the minimum interval between the outline of the cavity and the electrothermal conversion element. | 2010-07-15 |
| 20100176523 | Device for and Method of Manufacturing Optical Part - A device to manufacture an optical component, wherein a fixed metal mold | 2010-07-15 |
| 20100176524 | METHOD AND APPARATUS FOR NANOPOWDER AND MICROPOWDER PRODUCTION USING AXIAL INJECTION PLASMA SPRAY - A method and system for production of powders, such as micropowders and nanopowders, utilizing an axial injection plasma torch. Liquid precursor is atomized and injected into the convergence area of the plasma torch. The hot stream of particles is subsequently quenched and the resultant powders collected. | 2010-07-15 |
| 20100176525 | FORMWORK AND METHOD FOR CONSTRUCTING RAMMED EARTH WALLS - The invention is a formwork system and a method of using the formwork to construct rammed earth walls. The formwork comprises end panels which can be quickly assembled and disassembled to provide end stops to support side panels without the need for through-ties. The end panels comprise integral handholds for access to the full height of the formwork. The end panels are stackable, rotatable and interchangeable, such that one set of formwork may be used to create several different wall configurations. The finished wall contains an internal support structure and insulating core, without through-holes. | 2010-07-15 |
| 20100176526 | Method of gas blow forming packaging and device for implementing same - The invention relates to a method of gas blow forming packaging in a mould using a preform and comprising recovery of the blow gas. The inventive method comprises the following steps consisting in: —) pre-blowing the gas into the preform at a first pressure (P | 2010-07-15 |
| 20100176527 | Extruder Arrangement - An extruder arrangement comprising a screw extruder for viscous masses, in particular plastic melts or natural or artificial rubber mixtures. The screw extruder comprises an outlet connection that is coupled to a gear pump and further comprises an extruder screw. The outlet connection is arranged adjacent on the side of the extruder screw and a detachable cover or lid is arranged at the front side of the extruder screw. | 2010-07-15 |
| 20100176528 | METHOD FOR PRODUCING VESSELS WITH FEEDBACK DEPENDING ON THE PRE-BLOWING STARTING POINT - Method for producing a vessel ( | 2010-07-15 |
| 20100176529 | Vehicle Foam Assemblies And Methods Of Creating Vehicle Interior Trim - Vehicle foam assemblies and methods of creating vehicle interior trim are provided for placing one or more insert components onto and/or into a foam tool; laying a skin proximate to the one or more insert components; placing a substrate proximate to the skin; and introducing foam to form or re-form the skin against and/or around the one or more insert components. | 2010-07-15 |
| 20100176530 | MOLD FOR PRODUCING SILICA CRUCIBLE - In a mold for use in the production of a silica crucible, a mold cover corresponding to a small-diameter thinned portion of an upper part of the silica crucible is detachably disposed on a mold substrate corresponding to a main body of the silica crucible, and the mold cover has a barrier function against arc heating, and an inner diameter of the mold cover is smaller than that of the mold substrate but larger than that of the silica crucible. | 2010-07-15 |
| 20100176531 | PRODUCTION METHOD OF POLYMER FILM - In a mixing tank ( | 2010-07-15 |
| 20100176532 | LCD Window for Animal Training Device and Method for Manufacture - A housing forming a portion of an animal training device having a framing wall adapted to frame an LCD disposed internally of the housing. The framing wall defines an interior surface and a window for viewing of the LCD. A window pane is integrally formed with the window about the outer perimeter of the window and extends laterally outwardly of the perimeter of the window to overlie a portion of the inner surface of the framing wall proximate the window thereby integrating the pane with the framing wall, thereby effecting an extended seal between the pane and the framing wall and simultaneously enhancing the strength and rigidity of the framing wall. In one embodiment, the pane is integrally molded with the framing wall. | 2010-07-15 |
| 20100176533 | SEAL MANUFACTURING METHOD - The invention provides a method for manufacturing a seal integrally provided with conducting members, the method capable of suppressing generation of burrs even if the conducting members have complicated structures, e.g., when the conducting members are laid on each other while displaced from each other. | 2010-07-15 |
| 20100176534 | Method and apparatus for potting an electronic device - Method and apparatus for potting an electronic device. The apparatus comprises an enclosure having a first inner volume with the electronic device disposed therein; a fill control element disposed within the first inner volume, wherein a second inner volume of the fill control element is fluidly coupled to the first inner volume; and a sealant disposed within a remaining portion of the first inner volume, the remaining portion not occupied by the electronic device or the fill control element, wherein air is trapped within at least a first portion of the second inner volume. | 2010-07-15 |
| 20100176535 | LOW PROFILE SHORT TAPERED TIP CATHETER - A low profile, short, tapered distal tip catheter and methods for its manufacture are provided. The catheter tip is configured to have a taper over a relatively short length resulting in a low profile that is useful when navigating the catheter tip into tight passages such as the Papilla of Vater. The configuration of the tip and process for making it can be employed in any medical catheter but are found to be most useful in a multilumen papillotome catheter used in biliary procedures. | 2010-07-15 |
| 20100176536 | MOLDING APPARATUS AND METHOD - Disclosed are an apparatus and method for molding an object. An object is compressed by an upper mold and a lower mold base part to form a top surface of a product, and the upper mold and the lower mold base part descend in a state where the object is compressed to form a lateral surface of the product through lateral surfaces of the upper mold and a lower mold. | 2010-07-15 |
| 20100176537 | SOLUTION CASTING PROCESS - A static and closed solution casting process comprises the following steps: dissolve a solute in a solvent to prepare a casting solution; place membrane-casting plate on bracket, and adjust the bracket to make the membrane-casting plate horizontal; pour the casting solution into membrane-casting plate such that the casting solution is uniformly spread out in the membrane-casting plate; arrange heating arrangement over the membrane-casting plate; arrange cooling side plate around the membrane-casting plate; arrange cooling bottom plate below the membrane-casting plate; supply cooling liquor to the connected interlayer of the cooling side plate and the cooling bottom plate; enclose the membrane-casting plate, the bracket, the heating arrangement, the cooling side plate and the cooling bottom plate inside an insulated case made by heat insulator; heat the casting solution in the membrane-casting plate by driving the heating arrangement to totally evaporate the solvent in the casting solution; and then continuously heat in order to enhance the crystallinity of the final membrane; stop heating; and remove the condensed solvent from the cooling bottom plate and peel the final membrane from the membrane-casting plate. This process is of simple technique, cheap equipment and low cost of membrane preparation, and the final membrane has the advantages such as high crystallinity and isotropic etc. | 2010-07-15 |
| 20100176538 | SYSTEMS AND METHODS OF INSTALLING HOOK FASTENER ELEMENTS IN A MOLD ASSEMBLY - Various embodiments of a mold assembly system include a mold defining at least one trench along a surface of the mold and two or more hook fastener elements disposed on the surface of the trench in an end-to-end relationship. Each hook fastener elements includes: (1) an elongated base, (2) a plurality of hooks extending upwardly from an upper surface of the base, and (3) a magnetic material disposed within the base. The hook fastener elements are unattached to each other and are separately disposed within the trench, and the magnetic portion of the trench is configured to attract the hook fastener elements toward the magnetic portion and hold the hook fastener elements adjacent thereto in an end-to-end relationship substantially along the length of the trench. In one embodiment, the hook fastener elements are substantially the same length and are usable in straight trenches, curved trenches, or trenches having various lengths. | 2010-07-15 |
| 20100176539 | MANUFACTURING METHOD OF THREE-DIMENSIONALLY SHAPED OBJECT - An equipment for metal-laser sintering process includes a powder layer forming unit, an irradiation unit which irradiates light beams, a correction target on which a correction mark serving as a fiducial in correction of the irradiation points of the light beams is formed, and an imaging camera which takes an image of the correction mark. The correction target is formed of a material which is melted by irradiation of light beam so as to be formed a through hole. The correction target is disposed on the substrate and the light beams are irradiated to penetrate the correction target so that the correction mark is formed. Subsequently, the imaging camera takes an image of the correction mark and the location of the correction mark is measured, and thus, correction of the irradiation points is performed. Since the correction mark is formed to be a through hole, contrast becomes clear so that location of the correction mark can be measured easily, and the correction of the irradiation points of the light beams can be performed easily. | 2010-07-15 |
| 20100176540 | BLOWING APPARATUS FOR EXPANDING CONTAINERS - The invention relates to a blowing apparatus ( | 2010-07-15 |
| 20100176541 | COMPOSITION FOR CERAMICS WITH CARBON LAYER AND MANUFACTURED METHOD OF CERAMICS USING THIS - Disclosed herein is a composition comprising 50 to 73% by weight of loess, 9 to 20% by weight of clay, 3 to 10% by weight of wood flour, 3 to 7% by weight of lignum carbonized carbon body powder, 11 to 15% by weight of water and 1 to 5% by weight of ceramic glaze to manufacture a ceramic moulding including a carbon layer therein. Preferably, the composition according to the present invention further comprises elvan powder and Schmotte. Meanwhile, the present invention also provides a method of manufacturing a ceramic moulding with a carbon layer comprising forming a moulding out of the composition and firing the formed moulding with oxidizing flames. | 2010-07-15 |
| 20100176542 | FILTER DEVICE FOR MOLTEN METAL FILTRATION - A filter for molten metal, the filter comprising a perforated surface and the perforated surface retaining a filter media for contact with a molten metal passing in use across the perforated surface between perforations of the perforated surface. | 2010-07-15 |
| 20100176543 | Sign Pole Guard - A sign pole guard designed to encapsulate a U-channel metal sign post with a sheet of transparent, flexible material having a reflective covering to provided better visibility and an added layer of protection for individuals who may come into physical contact with the sign post itself. In addition, the sign pole guard comprises a strip of transparent, flexible material to be affixed to the edging of a metal street sign for added protection. | 2010-07-15 |
| 20100176544 | SUPPORT STRUCTURE FOR STABILIZER AND SUPPORT METHOD FOR STABILIZER - Forming a recess ( | 2010-07-15 |
| 20100176545 | BREAKAGE PREVENTING DEVICE FOR TILTING TABLE INDEXING DEVICE - In a tilting table indexing device driven by a direct-drive motor, a tilting table is prevented from rotating beyond an allowable rotation range when power is shut off in an emergency, such as power outage, and thus a breakage accident of, for example, a tool or a workpiece is reliably prevented from occurring. In a tilting table indexing device ( | 2010-07-15 |
| 20100176546 | Sheet handling apparatus - An apparatus for collating or inserting inserts including a raceway for transporting sets of inserts at a raceway transport rate and an insert feed line for feeding an individual insert to each of the sets of inserts on the raceway at the raceway transport rate. The insert feed line having a singulater for separating the individual insert from bundles of inserts at a separation rate, the singulater including a lifter lifting at least one insert from the bundles of inserts, the lifting effecting separation of the individual insert from the bundles of inserts at the separation rate wherein, the singulater has a controller for controlling the singulater separation rate so that the singulater separation rate is variable with respect to a predetermined raceway transport rate, to allow the insert feed line to feed the individual insert to each set of inserts transported on the raceway at the raceway transport rate. | 2010-07-15 |
| 20100176547 | DOUBLE INHIBIT MECHANISM - Described herein is a system and device for singulating mail pieces during mail processing and sorting. A double inhibit mechanism, mounted opposite a feed belt assembly and having at least two degrees of freedom at its downstream end, can maintain contact with mail in the mail path while separating overlapping mail pieces and allowing only single pieces to pass thereby. | 2010-07-15 |
| 20100176548 | Drive mechanism for stacker linkage - A cassette having a scissor type linkage for displacing a received substrate payment from an initial receiving guide to a storage arrangement is powered by a two bar drive linkage. The two bar drive linkage has one bar connected to said housing and the free end of the other bar member connected adjacent a central pivot of the scissor type linkage. A link member is connected to the pivot connection of the bars to each other with an opposite end connected to a worm driven crank arm. The drive linkage provides a mechanical advantage as a payment substrate is added to the storage arrangement. | 2010-07-15 |
| 20100176549 | SHEET DECELERATION APPARATUS AND METHOD - The present disclosure relates to sheet deceleration apparatus and methods for decelerating a sheet of material for use in a sheet stacking or other application. The deceleration apparatus includes a pair of rotatable rollers, being rotatable about first and second axes, the rollers positioned on opposite sides of the travel path. At least one of the rollers is moveable relative to the other to nip the sheet between the rollers to reduce the travel speed of the sheet. A vacuum conveyor is further provided along the travel path subsequent the pair of rollers to control delivery of the sheet to a stacking hopper. A third rotatable roller, or similar apparatus, may be included in some embodiments, for pushing the sheet of material away from the vacuum conveyor at the appropriate time. | 2010-07-15 |
| 20100176550 | BOARD GAME EXTENSION - A board game extension is configured to be placed between a first existing board game and a second existing board game. The board game extension has a first side with a length that is substantially equal to a length of a side of the first existing board game, and a second side with a length that is substantially equal to a length of a side of the second existing board game. The board game extension includes a first landing location having dimensions corresponding to a first existing landing location on the first existing board game. In one embodiment, the board game extension also includes a second landing location having dimensions corresponding to a second existing landing location on the second existing board game. | 2010-07-15 |
| 20100176551 | Board Game - A board game | 2010-07-15 |
| 20100176552 | Interactive chocolate board game - The present invention relates to an interactive board game comprising a playing surface having a series of tabs, wherein each opened tab reveals clues or directions to the next tab to be opened. In one embodiment, the board game comprises individual cells containing a prize, such as a chocolate, located under each tab, which are accessible upon opening the tabs. | 2010-07-15 |
| 20100176553 | Card Table, Related Devices and Methods - A card table includes a table top, a plurality of indicators attached to the table top associated with respective player locations, and a control unit in signal communication with the plurality of indicators. The control unit is adapted to activate at least one of the plurality of indicators to associate a rotating player responsibility therewith and to automatically shift the at least one activated indicator based on detection of an event occurring between hands. | 2010-07-15 |
| 20100176554 | RING TOSS GAME - A ring toss game has a pair of target boxes, pegs, and throwing elements. The tops of the target boxes have holes into which the pegs can be placed. The pegs are sized to receive the throwing elements. Different sized pegs may be used, and the holes on the target box may be in a linear configuration. The target boxes may also be raised at an angle to facilitate playing of a ring toss game. The throwing elements may be annular rings, close loops of rope, or loops of rubber tubing. In some embodiments of the invention the target boxes have handles to assist with portability. In other embodiments the parts of the game are provided as a kit. | 2010-07-15 |
| 20100176555 | Game device, game system and game program - It is judged whether a pressure continues for not less than a predetermined time or not, that is, it is judged whether there is possibility of hand-push or not. When the pressure continues for not less than a predetermined time, it is decided that there is a possibility of hand-push. | 2010-07-15 |
| 20100176556 | Method Of Manufacturing Of A Compliant Plate Seal Assembly - A compliant plate seal manufacturing method is provided. The method includes assembling a plurality of compliant plates and a plurality of spacer shims into a weld fixture, thereby forming a leaf pack having a front and rear end and sides and a curvature, welding the sides of the leaf pack to hook plates on the weld fixture, removing a portion of the weld fixture, removing a portion of the hook plates and applying a radial flow plate to the leaf pack. | 2010-07-15 |
| 20100176557 | OIL WIPER RING - An oil wiper ring, comprising a body with a radially external running surface, an inner circumferential surface and an upper and lower face, and which possesses at least two slide ribs, which may be provided with a wear-resistant layer, such ribs becoming conically thinner, in the radial direction of their end faces, and which are opposite a sliding mating surface, such that they proceed from the body, at a specifiable angle, in order to form an angled side face, so that the free end of each slide rib, commencing in the region at the oil chamber side, is shaped to slope towards an area at the combustion chamber side, such that the associated transitional areas, on the one hand, from the region of the circumferential slide rib towards the angled side faces, and on the other hand, from the angled side faces to the piston ring body, are rounded, i.e. have predetermined radii. | 2010-07-15 |
| 20100176558 | METALLIC FLAT GASKET - The invention relates to a metallic-flat gasket ( | 2010-07-15 |
| 20100176559 | GASKET AND GASKET ASSEMBLY FOR SEALING A PROBE IN A DISPOSABLE SYSTEM - A gasket for sealing a probe having a probe head and a probe cable between connector flanges, wherein the probe head has a diameter larger than the probe cable, has a generally annular body. The generally annular body includes an upper surface for sealing against an upper connector flange and a lower surface for sealing against a lower connector flange, and has a generally annular inner wall and a generally annular outer wall, the generally annular inner wall forming an aperture. The generally annular body also includes at least one hinge, the hinge including a radially arranged probe cable insertion port, and a slit. The slit comprises opposing slit sidewalls. When the hinge is open, the slit sidewalls allow the probe cable to be inserted into the probe cable insertion port, and when the hinge is closed, the slit sidewalls contact each other with the probe cable insertion port to form a generally annular seal around the probe cable with the probe head in the aperture. | 2010-07-15 |
