27th week of 2011 patent applcation highlights part 17 |
Patent application number | Title | Published |
20110163725 | CONNECTORS FOR BATTERY-POWERED DEVICES - A battery-powered device can be simultaneously coupled to a non-battery power supply and to information signals from a battery. Power contacts on the device are coupled to the power supply, while one or more information contacts on the battery are coupled to corresponding contacts on the device. | 2011-07-07 |
20110163726 | BATTERY PACK, CHARGING APPARATUS, AND CHARGING SYSTEM - A battery pack includes a battery cell, a charge calculator that calculates an amount of charge of the battery cell, a charge setting that sets multiple amounts of charge with different upper limits, a charge selecting switch that selects one of the amounts of charge, and a battery controller having a communication function that sends, to the charging apparatus, charge information about the battery cell and charging command information that instructs charging to be continued to an upper limit for the selected amount of charge. | 2011-07-07 |
20110163727 | Method for Regulating or Controlling the Charge State of an Electrical Energy Accumulator of a Hybrid Vehicle - A method controls or regulates the charge state of an electrical energy accumulator of a hybrid vehicle, where, in some operating states, the energy accumulator is charged from a low to a higher charge state level by way of an electric machine driven by an internal-combustion engine of the hybrid vehicle and operating as a generator. The level of the charge state to which the energy accumulator is charged by the internal-combustion engine is selected as a function of a parameter representing the load of the electrical system or correlating thereto. | 2011-07-07 |
20110163728 | POWER MANAGEMENT CIRCUIT OF RECHARGEABLE BATTERY STACK - A system includes a sensing module and a switching module. The sensing module is configured to sense output voltages of first and second cells connected in series in a rechargeable battery stack. The switching module is configured to alternately connect a capacitance across the first cell and the second cell at a switching frequency when a difference in the output voltages is greater than or equal to a first threshold. The switching module is further configured to stop alternately connecting the capacitance when the difference is less than or equal to a second threshold, wherein the first threshold is greater than the second threshold. | 2011-07-07 |
20110163729 | Resonant transformer systems and methods of use - Resonant transformer systems and methods of use are described. One aspect may include a primary winding, a secondary winding, and at least one output winding. In further aspects, a transformer may be coupled to the secondary winding. In one aspect, the output winding is coupled to rectifying circuitry, which may be coupled to one or more capacitors. | 2011-07-07 |
20110163730 | CURRENT MODE BANG-BANG REGULATOR AMPLIFIER - An improved CMBB regulator includes a current amplifier circuit that allows both load transient performance and noise immunity to be optimized simultaneously. The current amplifier circuit measures a voltage drop across a sense resistor to determine a power driver output current. The current amplifier circuit separates AC and DC current information and applies separate gain factors to the AC and DC current information. AC and DC current information modified by the gain factors is then recombined and used to pass current through an output resistor. A current amplifier output voltage is input to a comparator circuit that provides an output that indicates whether the current amplifier output voltage is above, equal to, or below a desired voltage level. The comparator output is then used to provide feedback control to a power driver circuit. | 2011-07-07 |
20110163731 | THRESHOLD VOLTAGE MONITORING AND CONTROL IN SYNCHRONOUS POWER CONVERTERS - A method of providing threshold voltage monitoring and control in synchronous power converters is provided. The method includes establishing a threshold voltage level for at least one of a gate drive voltage for an upper and a lower power switch in a synchronous power converter, each threshold voltage level controlling a switching delay time for one of the upper and lower power switches. The method further includes detecting body diode conduction levels for at least one of the upper and lower power switches and adjusting the threshold voltage level for at least one of the upper and lower power switches, based on the detected body diode conduction levels, to fine-tune a body diode conduction time around an equilibrium for the at least one of the upper and lower power switches. | 2011-07-07 |
20110163732 | Synchronous buck converter using shielded gate field effect transistors - A synchronous buck converter includes a high-side switch and a low-side switch serially coupled to one another. The low-side switch includes a field effect transistor that comprises: a trench extending into a drift region of the field effect transistor; a shield electrode in a lower portion of the trench, wherein the shield electrode is insulated from the drift region by a shield dielectric; a gate electrode in the trench over the shield electrode, wherein the gate electrode is insulated from the shield electrode by an inter-electrode dielectric; source regions adjacent the trench; a source metal contacting the source regions; and a resistive element having one end contacting the shield electrode and another end contacting the source metal in the field effect transistor. | 2011-07-07 |
20110163733 | Method for locating sub-surface natural resources - A method for locating sub-surface natural resources. The method utilizes lightning data to discern relatively likely locations for finding the sub-surface natural resources. | 2011-07-07 |
20110163734 | ARRANGEMENT FOR MEASURING AT LEAST ONE VALUE OF A VOLTAGE APPLIED TO AN ELECTRONIC COMPONENT - An arrangement for measuring values of a voltage applied to an electronic component. The arrangement comprises a first signal transmitter which can emit a first switching signal, a first switch coupled to the first signal transmitter and can be controlled by the first switching signal. The electronic component is connected in series to the first switch and can be coupled, via the same, to an electric energy source. A second signal transmitter, which can emit a second switching signal. A second switch is coupled to the second signal transmitter and can be controlled by the second switching signal. A capacitive accumulator is connected in series to the second switch and can be connected in parallel, via the same, to the electronic component or to the series connection formed by the electronic component and the first switch. An analog/digital converter which is connected in parallel to the capacitive accumulator. | 2011-07-07 |
20110163735 | SYSTEM FOR MEASURING HIGH-FREQUENCY SIGNALS WITH STANDARDIZED POWER-SUPPLY AND DATA INTERFACE - In a system for measuring at least one high-frequency signal, comprising at least one broadband probe and at least one measuring apparatus, each broadband probe and each measuring apparatus comprise a high-frequency connection for transmitting a high-frequency signal, and each measuring apparatus, or instead of a measuring apparatus each signal processing unit, comprises power supply connections for supplying power to each of the broadband probes, and comprise data signal connections for transmitting communication data between the measuring apparatus or signal processing unit and the broadband probe head. The power supply and data signal connections of each measuring apparatus, each signal processing unit, and each broadband probe are each identical with respect to the signal assignment and signal specification and are designed in accordance with an interface standard, and in each measuring apparatus, each signal processing unit and either directly in the broadband probe or in an adapter unit electrically connected to the broadband probe head are each guided in an identically standardized jack. | 2011-07-07 |
20110163736 | METHOD TO DETECT CLOCK TAMPERING - This invention relates to a method of receiving a first potentially unreliable clock signal having a first frequency; receiving a second reliable clock signal having a second frequency; wherein the first frequency and the second frequency have an expected relationship; determining whether the first potentially unreliable clock signal has changed with respect to the second reliable clock signal by: determining an actual relationship between the first potentially unreliable frequency and the second reliable frequency; and generating an alarm signal if the actual relationship is different to the expected relationship. | 2011-07-07 |
20110163737 | Tire Pressure Measurement System with Reduced Current Consumption - A tire pressure measurement system (TPMS) includes a capacitor and an integrated circuit configured to receive a supply voltage. The integrated circuit includes a voltage regulator and a measurement unit. The voltage regulator is configured to be turned on and off for predetermined periods of time such that the capacitor is charged and discharged, respectively. The voltage regulator and the capacitor are connected to the measurement unit in order to selectively provide electric charge at a voltage between predetermined upper and lower limits. | 2011-07-07 |
20110163738 | CURRENT DETECTION CIRCUIT AND TRANSFORMER CURRENT MEASURING SYSTEM - A current detection circuit and a transformer current measurement system are offered, in which when elements and circuit, which cannot operate originally unless a transformer with small excitation inductance is used, are connected to a primary side of the transformer, even if the transformer, whose excitation inductance is large, is used, transformer current (primary current and secondary current) can be measured without deteriorating operations of the elements and circuit. | 2011-07-07 |
20110163739 | SELF-PINNED SPIN VALVE MAGNETORESISTANCE EFFECT FILM AND MAGNETIC SENSOR USING THE SAME, AND ROTATION ANGLE DETECTION DEVICE - Provided are a self-pinned spin valve magnetoresistance effect film, a magnetic sensor using the same, and a rotation angle detection device. The self-pinned spin valve magnetoresistance effect film has a strong coupling magnetic field in a pinned layer, a small reduction in the change in resistance, and superior resistance to magnetic fields without reducing the coercive force in a first ferromagnetic layer, which is a pinned layer in the film, even when exposed to a strong external magnetic field. By inserting a non-magnetic layer between a ground layer and a pinned layer to form the spin valve magnetoresistance effect film, the self-pinned spin valve magnetoresistance effect film having superior resistance to magnetic fields, a magnetic sensor using the same, and a rotation angle detection device are obtained. | 2011-07-07 |
20110163740 | BLANKET PROBE - A blanket probe for detecting the thickness of a wall having a non-planar surface has a probe portion comprising a planar substrate that is flexible in one or two dimensions, an array of detectors mounted on the substrate and at least one interface for communicating signals to and from each detector. | 2011-07-07 |
20110163741 | MAGNETIC TESTING METHOD AND MAGNETIC TESTING APPARATUS - A magnetic testing apparatus has a magnetizing device applying a rotating magnetic field to a material to be tested, a testing signal detecting device, and a signal processing device applying signal processing to the testing signal. The signal processing device has a first synchronous detecting device detecting a testing signal by using the first current as a reference signal, a second synchronous detecting device detecting an output signal of the first synchronous detecting device by using the second current as a reference signal to extract a candidate flaw signal, and a testing image display device displaying a testing image in which each of pixels has a gray level corresponding to an intensity of the candidate flaw signal at each of positions of the material to be tested, and a phase of the candidate flaw signal at each of the positions is capable of being identified. | 2011-07-07 |
20110163742 | Magnetic Field Characterization of Stresses and Properties in Materials - Described are methods for monitoring of stresses and other material properties. These methods use measurements of effective electrical properties, such as magnetic permeability and electrical conductivity, to infer the state of the test material, such as the stress, temperature, or overload condition. The sensors, which can be single element sensors or sensor arrays, can be used to periodically inspect selected locations, mounted to the test material, or scanned over the test material to generate two-dimensional images of the material properties. Magnetic field or eddy current based inductive and giant magnetoresistive sensors may be used on magnetizable and/or conducting materials, while capacitive sensors can be used for dielectric materials. Methods are also described for the use of state-sensitive layers to determine the state of materials of interest. These methods allow the weight of articles, such as aircraft, to be determined. | 2011-07-07 |
20110163743 | THREE-LAYER MAGNETIC ELEMENT, METHOD FOR THE PRODUCTION THEREOF, MAGNETIC FIELD SENSOR, MAGNETIC MEMORY, AND MAGNETIC LOGIC GATE USING SUCH AN ELEMENT - This three-layer magnetic element comprises, on a substrate, a first oxide, hydride or nitride layer O having a metal magnetic layer M mounted thereon, the latter having either a second oxide, hydride or nitride layer O′, or a non-ferromagnetic metal layer M′ mounted thereon. | 2011-07-07 |
20110163744 | CELLULAR TISSUE MAGNETIC SIGNAL DETECTING APPARATUS - A cellular tissue magnetic signal detecting device for detecting a magnetic signal locally generated in a cellular tissue including an excitable cell generating an electrical excitation, the cellular tissue magnetic signal detecting device includes: a magnetic sensor head operative to approach the cellular tissue within 1000 μm; and a magnetic detecting section detecting the magnetic signal with a resolution of 1000 μm or less at a noise level of 1 nT or less, and a response speed of 1 ms or less based on an output signal from the magnetic sensor head; the magnetic sensor head including magneto impedance sensor. | 2011-07-07 |
20110163745 | CONSTRUCTION ELEMENT MADE OF A FERROMAGNETIC SHAPE MEMORY MATERIAL AND USE THEREOF - The invention relates to the field of materials science and relates to a component, which can be used, for example, for microcomponents, microsensors and microactuators. The object of the present invention is to disclose a component in which a clearly greater relative length change occurs. The object is attained through a component of a ferromagnetic shape memory material, produced by a method in which at least one sacrificial layer is applied onto a single-crystalline or biaxially textured substrate, onto which sacrificial layer an epitaxial or textured layer of a ferromagnetic shape memory material with a layer thickness of ≦50 μm is applied, subsequently the sacrificial layer is removed at least partially, and during or after the layer application a structuring at least of the ferromagnetic shape memory material is realized such that an aspect ratio is achieved in which at least one length is greater by at least a factor of 3 than the thickness of the layer or the shortest dimension of the component. | 2011-07-07 |
20110163746 | Integrated Lateral Short Circuit for a Beneficial Modification of Current Distribution Structure for xMR Magnetoresistive Sensors - The invention relates to a magnetoresistive device formed to sense an externally applied magnetic field, and a related method. The magnetoresistive device includes a magnetoresistive stripe formed over an underlying, metallic layer that is patterned to produce electrically isolated conductive regions over a substrate, such as a silicon substrate. An insulating layer separates the patterned metallic layer from the magnetoresistive stripe. A plurality of conductive vias is formed to couple the isolated regions of the metallic layer to the magnetoresistive stripe. The conductive vias form local short circuits between the magnetoresistive stripe and the isolated regions of the metallic layer to alter the uniformity of a current flow therein, thereby improving the position and angular sensing accuracy of the magnetoresistive device. In an advantageous embodiment, the metallic layer is formed as electrically conductive stripes oriented at approximately a 45° angle with respect to an axis of the magnetoresistive device. | 2011-07-07 |
20110163747 | HOUSING FOR A MAGNETOMETER, A COMBINATION INCLUDING A MAGNETOMETER WITHIN A WATERPROOF HOUSING, AND A SYSTEM AND METHOD FOR LOCATION AND REMOVAL OF UNEXPLODED ORDINANCE UNDERWATER - A waterproof housing that encloses a hand-held magnetometer for underwater use and includes a first portion open at one end and connected to a second portion with one end open and accessible through the first portion and terminating at a closed end. The magnetometer has first and second housings and is inserted into the first portion open end so that the second housing is received into the second portion and the first housing is received into the first portion. A base seal is inserted into the first portion open end to provide a fully functional magnetometer protected from water incursion at depth. | 2011-07-07 |
20110163748 | METHOD, SYSTEM AND COMPUTER-ACCESSIBLE MEDIUM FOR PROVIDING MULTIPLE-QUANTUM-FILTERED IMAGING - The present disclosure describes exemplary embodiments of process, system, computer-accessible medium and processing arrangement which can be used to provide multiple-quantum-filtered imaging. For example, provided herein is an exemplary system that can include an arrangement which can be configured to extract and/or determine at least one Nuclear Magnetic Resonance (NMR) signal provided from an anatomical sample utilizing differences of phases of excitation pulses provided from an apparatus. The NMR signal(s) can relate to at least one multiple-quantum coherence in a presence of B | 2011-07-07 |
20110163749 | RF SHIMMING WITH RF POWER REGULARIZATION USING A MULTI-CHANNEL RF TRANSMIT SYSTEM FOR MRI - A magnetic resonance system comprises: a magnetic resonance scanner ( | 2011-07-07 |
20110163750 | METHOD AND APPARATUS FOR CORRECTING THE UNIFORMITY OF A MAGNETIC FIELD - In a method and apparatus for correcting the uniformity of a magnetic field, an active shim shell is placed in the magnetic field, a magnetic resonance image of the active shim shell obtained, and the placement position of the active shim shell is determined by analyzing the magnetic resonance image. The value of a shim current in the active shim shell is determined so as to meet the uniformity requirements of the magnetic field according to the placement position. The value of the shim current in said active shim shell is set to the determined value of the shim current. | 2011-07-07 |
20110163751 | TRANSCEIVE SURFACE COIL ARRAY FOR MAGNETIC RESONANCE IMAGING AND SPECTROSCOPY - A surface coil array comprises a surface coil support and an arrangement of non-overlapping magnetically decoupled surface coils mounted on the support. The surface coils encompass a volume into which a target to be imaged is placed. Magnetic decoupling circuits act between adjacent surface coils. Impedance matching circuitry couples the surface coils to conventional transmit and receive components. | 2011-07-07 |
20110163752 | Apparatuses and Methods for Determining Potential Energy Stored in an Electrochemical Cell - A battery includes a first terminal, a second terminal, an outer layer, and a power indicator apparatus. The power indicator apparatus comprises an electrical conductor and a mechanical switch. The electrical conductor is configured to be in continuous electrical communication with the first terminal. The mechanical switch is configured to be actuated by an application of pressure at a single location, and upon actuation, to place the electrical conductor in electrical communication with the second terminal such that the power indication apparatus can facilitate a reading of a potential energy stored in the battery. Methods of determining a potential energy stored in the battery are also provided herein. | 2011-07-07 |
20110163753 | Sensor system and method for detection of fluids with a certain material composition - A method for detecting fluids having a certain material composition is disclosed. The method comprises at least the following steps: ionizing the fluid using at least one high-voltage electrode coupled to a high-voltage source, such that the high voltage electrode generates charge carriers and emits these charge carriers which are at least partially re-collected by measurement electrodes; measuring electrical quantities at the plurality of measurement electrodes being spaced apart from each other as well as from the high voltage electrode; determining the spatial distribution of the measured electrical quantities; comparing the spatial distribution of the measured electrical quantities with at least one reference distribution; providing an output signal responsive to the comparison and indicating the presence of a fluid component and/or the concentration of the fluid component in the fluid. | 2011-07-07 |
20110163754 | Ionization Gauge With Emission Current And Bias Potential Control - An ionization gauge that measures pressure has an electron source that emits electrons, and an anode that defines an ionization space. The gauge also includes a collector electrode to collect ions formed by an impact between the electrons and a gas and to measure pressure based on the collected ions. The electron source is dynamically varied in emission current between a plurality of emission levels dependent on pressure and a second parameter other than pressure. The ionization gauge may also vary various operating parameters of the gauge components according to parameters stored in a non-volatile memory and selected by a user. | 2011-07-07 |
20110163755 | SELF-ALIGNING TEST FIXTURE FOR PRINTED CIRCUIT BOARD - A printed circuit board (“PCB”) test fixture is provided comprising a PCB support, an electrical tester, first and second enclosure portions, and an actuator. The PCB support is configured for supporting a PCB being tested in a PCB test position. The first enclosure portion includes a pressing device which is configured for effecting, with respect to a PCB supported in the PCB test position on the PCB support, pressing of a circuit of the PCB against the electrical tester so as to provide an operative circuit. The second enclosure portion extending peripherally about the PCB support. The actuator is coupled to a one of the first enclosure portion and the second enclosure portion and configured to effect an application of force to the one of the first enclosure portion and the second enclosure portion. The PCB support is disposed between the first and second enclosure portions. | 2011-07-07 |
20110163756 | METHOD AND DEVICE FOR DETECTING FAILURES IN INDUCTIVE CONDUCTIVITY MEASUREMENTS OF A FLUID MEDIUM - Exemplary embodiments of the present invention are directed to methods and devices for detecting open-circuit and short-circuit failure in an electromagnetic (inductive) measurement of the conductivity of liquids and on the sensor and cable wiring. An electromagnetic measurement of the conductivity of a liquid is performed by immersing a sensor into the liquid, wherein the sensor includes at least 2 toroidal cores, one of them carrying an excitation coil and the other carrying an induction coil. When an AC excitation voltage is applied to the excitation coil, an induced current or voltage can be measured in the induction coil which is proportional to the conductivity of the measured liquid. | 2011-07-07 |
20110163757 | ELECTRONIC LOAD SIMULATOR DEVICE FOR TESTING RF COILS - The invention relates to a magnetic resonance coil testing arrangement ( | 2011-07-07 |
20110163758 | Efuse Macro - An eFuse with at least one fuse unit is provided. The fuse unit includes a common node, a sensing unit with a first input terminal and a second input terminal, at least one fuse coupled between the common node and the first input terminal of the sensing unit with a resistance, and a switching unit coupled between the common node and the second input terminal of the sensing unit. A resistance of the switching unit is equivalent to a first resistance in a normal mode and equivalent to a second resistance in a test mode, and the second resistance is higher than the first resistance. The sensing unit generates an output signal indicating whether the fuse is blown or not according to the resistances of the fuse and the switching unit. | 2011-07-07 |
20110163759 | CIRCUIT FAULT DETECTING DEVICE AND METHOD - To detect accurately an insulation fault in a load circuit, Power supply lines and an electric heater (a load circuit) are connected by a detecting portion to detect a detected voltage (detected value) in accordance with the magnitude of a leakage current Id that flows through a ground between the power supply lines and the electric heater, and an evaluation as to whether or not there is a breakdown of insulation of the electric heater relative to the ground is performed by an evaluating portion based on the detected value obtained when the relay contact points are open. | 2011-07-07 |
20110163760 | TEST CIRCUIT AND SYSTEM - A test circuit and system for testing one or more electrical properties of an electronic circuit or other device under test (DUT) by applying and monitoring test signals to the DUT is disclosed. The test circuit can utilize a plurality of universal interface channel circuits in a single automated test system to provide a unique and flexible approach for testing electronic circuits or devices that has many advantages. A single data acquisition circuit can coupled to one or more universal interface channel circuits. Each of the universal interface channel circuits can be independently commanded by the data acquisition circuit to provide one of a variety of test signals to a DUT as desired. | 2011-07-07 |
20110163761 | PARTICULATE MATTER DETECTION DEVICE AND INSPECTION METHOD OF THE PARTICULATE MATTER DETECTION DEVICE - The particulate matter detection device of the present invention is a particulate matter detection device | 2011-07-07 |
20110163762 | OPEN LOOP LOAD PULL ARRANGEMENT WITH DETERMINATION OF INJECTIONS SIGNALS - Measurement arrangement and method for active load pull measurements of a device under test ( | 2011-07-07 |
20110163763 | ELECTRICAL CAPACITANCE SENSOR - Disclosed is an electrical capacitance sensor comprising: a board | 2011-07-07 |
20110163764 | ANTI-ENTRAPMENT SYSTEM - An anti-entrapment system for preventing an object from being entrapped by a translating device such as a vehicle window includes a capacitance sensor and a controller. The sensor has a jacket with a cavity, a dielectric element within the cavity, and first and second electrical conductors. The conductors are within the cavity on opposite sides of the dielectric element such that the conductors are separated from one another by a separation distance. The capacitance of the sensor changes in response to an electrically conductive object moving in proximity to at least one of the conductors. The controller is configured to control a translating device as a function of the capacitance of the sensor. The jacket is attachable to a seal configured to receive the translating device. | 2011-07-07 |
20110163765 | CAPACITIVE OCCUPANT DETECTION SYSTEM HAVING WET SEAT COMPENSATION AND METHOD - An occupant detection system and method are provided. The system includes a capacitive sensor having an electrode arranged in a seat proximate to an expected location of an occupant for sensing an occupant presence approximate thereto. The capacitive sensor is configured to provide an output indicative of the sensed occupant presence. Occupant detection circuitry is included for processing the capacitive sensor output and determining a wet seat condition and generating a wet seat fault based on a determined wet seat condition. The occupant detection circuitry further detects a state of occupancy of the seat based on the capacitive sensor output and the wet seat fault. | 2011-07-07 |
20110163766 | CAPACITANCE MEASUREMENT CIRCUIT WITH DYNAMIC FEEDBACK - Methods, devices, and systems that measure capacitance are disclosed. Typically, an accumulator circuit couples to the capacitance and includes an accumulator and switch(es) that charge the accumulator over a series of switch-controlled charging or discharging cycles governed by a first control signal. The accumulator circuit provides an accumulator signal based on the charge on the first accumulator. A discharge circuit couples to the accumulator circuit and includes an optional variable current device, the discharge circuit partially discharging the accumulator based on a second control signal. A control circuit, which couples to the accumulator circuit and the discharge circuit, dynamically adjusts the first and/or second control signals to keep the accumulator signal in a desired range. The dynamically adjusted control signal can be used as a measure of the capacitance. Such methods and systems may be used in capacitive touch sensing devices such as capacitive buttons and capacitive touch panels. | 2011-07-07 |
20110163767 | OCCUPANT DETECTION SYSTEM AND METHOD - An occupant detection system and method are provided. The system includes a capacitive sensor having an electrode arranged in a seat proximate to an expected location of an occupant for sensing an occupant presence approximate thereto. The capacitive sensor is configured to provide an output indicative of the sensed occupant presence. The system also includes a force sensor arranged within the seat providing an output indicative of a sensed force applied to the seat. The system further includes occupant detection circuitry for processing the capacitive sensor output and force sensor output and detecting a state of occupancy of the seat based on the capacitive sensor output and the force sensor output. | 2011-07-07 |
20110163768 | TOUCH SCREEN DEVICE, CAPACITANCE MEASURING CIRCUIT THEREOF, AND METHOD OF MEASURING CAPACITANCE - According to the present invention, a charging and discharging circuit is electrically connected to an operation signal line and a detection signal line, and repeats a charging and discharging operation of a node capacitor. The present invention also includes an integration capacitor electrically connected to the detection signal line and an integration circuit charging the integration capacitor to a unit charging voltage every charging and discharging operation of the node capacitor such that the integration capacitor is charged to a first voltage that is integrated according to a charging and discharging number. The integration circuit may include a reset switch electrically connected to the integration capacitor and discharging the first voltage integrated and charged to the integration capacitor for initializing. | 2011-07-07 |
20110163769 | METHODS OF DETERMINING MID-STROKE POSITIONS OF ACTIVE MATERIAL ACTUATED LOADS - Systems for and methods of determining at least one mid-stroke position of an active material actuated load by causing a stress induced rapid change in electrical resistance within the active material element, or modifying an ancillary circuit, when the load is at the mid-stroke position(s). | 2011-07-07 |
20110163770 | ELECTRICAL NETWORK REPRESENTATION OF A DISTRIBUTED SYSTEM - A method for determining characteristics of a multi-material object is provided. The method includes producing a rotating electric field by providing an applied electrical signal set of individual electrical signal patterns to electrodes surrounding the multi-material object. The method also includes obtaining a measured electrical signal of electrical signals from the electrodes corresponding to each electrical signal pattern applied. An electrical network is determined based on the applied electrical signal set, the measured electrical signal set and an inverse of the applied electrical signal set. The method further includes determining the characteristics of the multi-material object by analyzing the electrical network. | 2011-07-07 |
20110163771 | TEST APPARATUS AND DRIVER CIRCUIT - A test apparatus includes: a driver circuit that supplies, to a device under test, a test signal corresponding to an input signal; and a judging section that judges pass/fail of the device under test, based on the load voltage or the load current supplied to the device under test when supplying a test signal of a constant current or a constant voltage to the device under test from the driver circuit, where the driver circuit includes: a driver section that outputs the test signal; a supply current detecting section that detects a supply current supplied to the driver section; and an output control section that controls a voltage or a current of the test signal outputted from the driver section to the predetermined value, based on the supply current detected by the supply current detecting section. | 2011-07-07 |
20110163772 | MICRO CONTACT PROBE COATED WITH NANOSTRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a micro contact probe used for a probe card. | 2011-07-07 |
20110163773 | MEASURING PROBE - A measuring probe, particularly for a non-contacting vector network analysis system, having a housing and at least one coupling structure disposed on the housing and designed for coupling an HF signal from a signal line, such that at least one additional signal probe is disposed on the housing for coupling an electrical signal into the signal line. | 2011-07-07 |
20110163774 | PROBE CARD - In one embodiment, a probe card includes a substrate, a probe provided on the substrate, and a contact terminal. The contact terminal is provided at a position on the substrate where the contact terminal comes in contact with the probe when a shape anomaly is generated in the probe. | 2011-07-07 |
20110163775 | UNIVERSAL FRONT/BACK POST TERMINAL BLOCK AND TEST LINK - A terminal board is part of a terminal board assembly for terminating and testing of railroad wires. The board includes a first terminal block with a front post and a back post installed on a plane, along with a plurality of terminal blocks with front posts. A control test link, with an insulating material lining one of three holes, is installed on the front posts of terminal blocks. A test nut, connectable to the front post of the first terminal block, has a face with a depression formed therein to contact the test link when installed on the front post of the first terminal block over the insulating material. First wiring is attached on the plane's front, and second wiring is terminated on the plane's back. A surge protection component and the control test link are pre-installed on the front of the plane, providing for easy removal. | 2011-07-07 |
20110163776 | POWER SUPPLY TESTING SYSTEM - A system for testing a conversion efficiency of a power supply unit includes a power meter, a plurality of switches, a multimeter, a microcontroller unit (MCU), a computer, and a signal conversion circuit for communicatively connecting the MCU to the computer. The power meter is capable of measuring an input power supplied to the power supply unit. The switches are powered on/off according to a sequence predetermined by the computer. The multimeter is configured to measure an output power of the power supply. The computer is capable of reading data measured from the power meter and the multimeter and calculating a conversion efficiency of the power supply unit. | 2011-07-07 |
20110163777 | METHOD FOR PRODUCTION OF A FAULT SIGNAL, AND AN ELECTRICAL PROTECTIVE DEVICE - A fault signal indicates a single-pole or a double-pole fault in a three-phase electrical power grid which occurred during a present electric oscillation in the electrical power grid. The method assures that single-pole or double-pole faults occurring during oscillation can be detected with high reliability in that a symmetry signal is produced during the oscillation, which indicates whether the oscillation is symmetrical or unsymmetrical, and the phases of the electrical power grid are checked for an existing fault, wherein the symmetry signal is used for carrying out the check. The fault signal is produced if a fault was detected during the check. A protective device has an accordingly equipped control unit. | 2011-07-07 |
20110163778 | IMPEDANCE CALIBRATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE WITH THE IMPEDANCE CALIBRATION CIRCUIT AND LAYOUT METHOD OF INTERNAL RESISTANCE IN THE IMPEDANCE CALIBRATION CIRCUIT - An impedance calibration circuit for impedance matching between a semiconductor memory device and an external device includes a driving circuit and a comparing circuit. The driving circuit has a plurality of internal resistances, with one or more of the internal resistances being a variable resistance. The driving circuit compares the impedance of the internal resistances to the input/output impedance of the external device in order to provide a calibration voltage. The comparing circuit compares the calibration voltage to a reference voltage and provides a code signal for calibrating the impedance corresponding to output data with the input/output impedance of the external device. The impedance calibration circuit calibrates an impedance mismatch between the impedance calibration circuit and a data input/output driver by adjusting the impedance of the impedance calibration circuit through the variable resistance. | 2011-07-07 |
20110163779 | LOW POWER CONSUMPTION MIS SEMICONDUCTOR DEVICE - A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized. | 2011-07-07 |
20110163780 | Field programmable gate arrays using resistivity-sensitive memories - Field programmable gate arrays using resistivity-sensitive memories are described, including a programmable cell comprising a configurable logic, a memory connected to the configurable logic to provide functions for the configurable logic, the memory comprises a non-volatile rewriteable memory element including a resistivity-sensitive memory element, an input/output logic connected to the configurable logic and the memory to communicate with other cells. The memory elements may be two-terminal resistivity-sensitive memory elements that store data in the absence of power. The two-terminal memory elements may store data as plurality of conductivity profiles that can be non-destructively read by applying a read voltage across the terminals of the memory element and data can be written to the two-terminal memory elements by applying a write voltage across the terminals. The memory can be vertically configured in one or more memory planes that are vertically stacked upon each other and are positioned above a logic plane. | 2011-07-07 |
20110163781 | METHOD AND APPARATUS FOR IDENTIFYING CONNECTIONS BETWEEN CONFIGURABLE NODES IN A CONFIGURABLE INTEGRATED CIRCUIT - Some embodiments provide a method that defines a set of connections that connect the nodes in a configurable node array. The method identifies different sets of connections for connecting a set of the nodes. For each identified set of connections, the method computes a metric score that quantifies a quality of the identified set of connections. The method then selects one of the identified sets of connections to connect the configurable nodes in the array. | 2011-07-07 |
20110163782 | FLEXIBLE BUS DRIVER - A bus driver has a ground terminal and a first and a second terminal. In a first operation mode the bus driver provides at the first terminal a first output voltage comprising a first data signal; and at the second terminal the bus driver provides a second output voltage comprising a second data signal. In a second operation mode the bus driver provides at the first terminal a first output voltage comprising a third data signal; and at the second terminal the bus driver provides a second output voltage, wherein a curve of the second output voltage is synchronous however inverted in relation to a curve of the first output voltage. An engine comprises a bus driver as set out above. | 2011-07-07 |
20110163783 | NO POP SWITCH - A switch can be configured to receive a first signal at a first input and provide an output signal at an output, depending on a state of the switch. A switch state change can be delayed until an indication of a requested switch state different than a current switch state is received and the first signal reaches a threshold. | 2011-07-07 |
20110163784 | FRACTIONAL FREQUENCY DIVIDER - A fractional-n frequency divider that overcomes the presence of so-called dead zones in known frequency divider circuits, n divider cells ( | 2011-07-07 |
20110163785 | SIMPLE INTERLEAVED PHASE SHIFT CLOCK SYNCHRONIZATION FOR MASTER/SLAVE SCHEME - An apparatus for interleaved phase shift clock synchronization includes a master clock generator and at least one slave clock generator. The master clock generator provides a ramp signal or reset signal for each slave clock generator to generate a clock synchronized with the clock of the master clock generator, and the master and slave clock generators have different reference voltages for generating clocks. Therefore, the clocks generated will be synchronized and interleaved phase with each other. | 2011-07-07 |
20110163786 | MULTI-PHASE SIGNAL GENERATOR AND METHOD - A multi-phase signal generators and methods for generating multi-phase signals are described. In one embodiment, a clock generator generates quadrature signals including those having 90, 180, 270 and 360 degrees phase difference with a first signal. The rising edge of an intermediate signal is compared with the rising edges of two of the other signals to generate an UP and DN pulse signal, respectively. The UP and DN signals are used to adjust the delay of a delay line producing the signals to synchronize the signals. In some embodiments, a reset signal generator is used to truncate the UP or DN signal pulse. | 2011-07-07 |
20110163787 | DIGITAL PHASE LOCKING LOOP AND METHOD FOR ELIMINATING GLITCHES - The present disclosure discloses a digital phase locking loop and a method. The digital phase locking loop includes a trigger and a delay line. The trigger receives a delayed clock signal output by the delay line, and receives a signal of a selection end of a first delay element in the delay line; the selection end is in a gating state before triggering of the trigger. The trigger samples the signal of the selection end of the first delay element, and outputs the sampled signal to a selection end of a second delay element in the delay line; the selection end of the second delay element is in the gating state after triggering of the trigger. The signal of the selection end of the first delay element is sampled by the trigger, and the sampled result is used as the signal of the selection end of the second delay element, thus reducing glitches caused by transition. | 2011-07-07 |
20110163788 | METHOD AND DEVICE FOR GENERATING SHORT PULSES - There is described a method and corresponding pulse generating device, for generating an output pulse signal having an output pulse duration. The method comprises: receiving at an input port an input pulse signal comprising an input pulse duration; duplicating the input pulse signal into a first digital pulse signal and a second digital pulse signal each comprising the input pulse duration; delaying at least one of the first and the second digital pulse signals by a time delay to obtain respectively a first and a second delayed digital pulse signal, a time delay difference between the first and the second delayed digital pulse signals being substantially equal to the output pulse duration; logically combining the first and the second delayed digital pulse signals to generate the output pulse signal with the output pulse duration smaller than the input pulse duration; and outputting the output pulse signal at an output port. | 2011-07-07 |
20110163789 | DUTY CYCLE CORRECTION CIRCUIT AND METHOD FOR CORRECTING DUTY CYCLE AND SEMICONDUCTOR DEVICE INCLUDING THE DUTY CYCLE CORRECTION CIRCUIT - Provided are a duty cycle correction circuit and method for correcting a duty cycle, and a semiconductor device including the duty cycle correction circuit. The duty cycle correction circuit includes a code generator configured to generate a first and a second duty code for adjusting the duty cycle of a clock to a target duty cycle, and a duty cycle corrector including a plurality of inverter circuits connected in series and whose driving capabilities are adjusted in response to the first and second duty code, wherein the duty cycle corrector is configured to correct the duty cycle of the clock based on the driving capabilities of the inverter circuits and to output a corrected clock. | 2011-07-07 |
20110163790 | SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING METHOD - A signal processing circuit includes: a phase modulating path arranged to adjust a phase component of an input signal to generate an adjusted phase component such that a phase difference of the input signal falls within a target phase difference range; and an amplitude modulating path arranged to exchange a sign of an amplitude component of the input signal corresponding to the phase component to generate an adjusted amplitude component when the phase modulating path adjusts the phase component. | 2011-07-07 |
20110163791 | OUTPUT CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING PRE-EMPHASIS FUNCTION - Disclosed is an output circuit that receives an input signal and that outputs a pre-emphasized output signal when an input signal transitions. The output circuit comprises a transistor applying de-emphasis to the output signal and a de-emphasis level control circuit comprising another transistor controlling a de-emphasis level. The transistor applying de-emphasis and the transistor controlling a de-emphasis level are connected in common to a current source and transistor controlling a de-emphasis level is made conductive at a time of de-emphasis to limit a current flowing through the transistor applying de-emphasis to the output signal. | 2011-07-07 |
20110163792 | HIGH FREQUENCY SWITCH - Provided is a high frequency switch wherein first switch circuits, each of which includes a first PIN diode, are connected in parallel to one or more first λ/4 signal transmitting paths which transmit transmitting signals, and second switch circuits, each of which includes a second PIN diode, are connected in parallel to one or more second λ/4 signal transmitting paths which transmit receiving signals to a receiving terminal. A first control voltage is applied to the cathode of the first PIN diode, and a second control voltage is applied to the cathode of the second PIN diode. Furthermore, a biasing circuit which applies a constant bias voltage is connected to each anode of the first PIN diode and the second PIN diode. | 2011-07-07 |
20110163793 | SEMICONDUCTOR DEVICE AND ELECTRONIC APPLIANCE USING THE SAME - A semiconductor device with less power consumption and an electronic appliance using the same. The semiconductor device of the invention is supplied with a first potential from a high potential power source and a second potential from a low potential power source. Upon input of a first signal to an input node, an output node outputs a second signal. With the semiconductor device of the invention, a potential difference of the second signal can be controlled to be smaller than a potential difference between the first potential and the second potential, thereby power consumption required for charging/discharging wires can be reduced. | 2011-07-07 |
20110163794 | POWER SUPPLY CONTROL CIRCUIT - A power supply control circuit comprises an output transistor which controls supply of electric power to a load and a gate driving circuit which generates control signals “a” and “b” for controlling on/off of the output transistor | 2011-07-07 |
20110163795 | SEMICONDUCTOR CIRCUIT AND COMPUTER SYSTEM - A device includes, but is not limited to, a first transistor, a first current mirror circuit, a second transistor, and a first compensation circuit. The first transistor is controlled by a first control voltage. The first current mirror circuit is driven by the first transistor as a first current source. The second transistor is driven by the first current mirror circuit. The second transistor has a first output voltage that varies depending on the first control voltage. The first compensation circuit reduces variations of the first output voltage. The variations of the first output voltage are caused by variations in performance of the first and second transistors. | 2011-07-07 |
20110163796 | Load Switch System Driven by a Charge Pump - A method for operating a load switch, wherein a charge pump drives a gate of the load switch, comprises the steps of: controlling a charge pump frequency as a function of states of the load switch; generating a charge pump output as a function of the charge pump frequency; and providing the charge pump output to the gate of the load switch. | 2011-07-07 |
20110163797 | POWER SWITCH WITH REVERSE CURRENT BLOCKING CAPABILITY - A switching circuit controls the flow of current between its input and output in accordance with the state of a control signal applied to the circuit. When the control signal is in a first state and the voltage applied to the input is higher than the voltage at the output, the circuit provides a low resistance path between its input and output terminals thereby enabling current to flow from the input to the output. When the control signal is in the first state and the voltage at the output is higher than the voltage at the input, the circuit inhibits current flow from the output to the input. When the control signal is in a second state, the circuit is turned off thus inhibiting current flow between the input and the output. | 2011-07-07 |
20110163798 | VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR MEMORY USING THE SAME - The voltage generation circuit having a standard voltage generation circuit, a reference voltage, a minimum voltage setting circuit, and a voltage setting circuit that gradually sets voltage by switching a plurality of the gate transistors to switch a combination of resistive elements. The voltage generation circuit includes a differential amplifier that has one input terminal connected to the reference voltage generated by the standard voltage generation circuit and another input terminal connected to the minimum voltage setting circuit. The differential amplifier has an output node showing the result of a difference voltage of the inputs. The voltage generation circuit includes a pump control circuit that outputs a control signal controlling a charge-pump motion, based on the differential voltage, and a charge pump circuit that sets up and outputs the voltage by the control signal. | 2011-07-07 |
20110163799 | Bi-directional Trimming Methods and Circuits for a Precise Band-Gap Reference - A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process. | 2011-07-07 |
20110163800 | POWER SUPPLY CONTROL CIRCUIT - A power supply control circuit comprises an output transistor | 2011-07-07 |
20110163801 | Methods and Circuits for Optimizing Performance and Power Consumption in a Design and Circuit Employing Lower Threshold Voltage (LVT) Devices - Methods and circuits for optimizing performance and power consumption in a circuit design and circuit employing one or more lower threshold voltage (Lvt) cells or devices are described. A base supply voltage amplitude is determined for providing operating power for the circuit. The base supply voltage amplitude is a low or lowest voltage level that still satisfies a performance specification for the circuit. Providing a low or lowest base supply voltage level reduces or minimizes the standby (i.e., non-switching) power consumption in the Lvt device(s) since current leakage is reduced as the supply voltage level is reduced. Reducing the supply voltage level used to power the Lvt device(s) also reduces active power consumption for the circuit as well. Thus, total power consumption is optimized or reduced while still receiving the benefit of using Lvt devices to optimize or increase performance of a circuit layout and circuit. | 2011-07-07 |
20110163802 | Amplifier Arrangement and Method for Signal Amplification - An amplification arrangement comprises a signal-processing element (SVE) with an integrator element (INT) that is coupled on the input side with a first input (E | 2011-07-07 |
20110163803 | Programmable Gain Amplifier and Embedded Filter - There is provided an integrated circuit having a programmable gain amplifier and an embedded filter. The programmable gain amplifier and the filter comprise a gain element having an inverting input for receiving an input and a feedback signal, a non-inverting input coupled to ground, and an output. The gain element also has one or more feedback loops coupling the output of the gain element to the inverting input of the gain element. Each feedback loop has a switch coupled in series with at least one passive component. Each switch has a first state to connect the corresponding feedback loop and a second state to disconnect the corresponding feedback loop. Each switch is programmatically configurable to provide a first gain and a first bandwidth and a second gain and a second bandwidth such that the first bandwidth is substantially equal to the second bandwidth. | 2011-07-07 |
20110163804 | Power Amplifier with Feedback Impedance for Stable Output - In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold. | 2011-07-07 |
20110163805 | Time - Alignment of Two Signals Used for Digital Pre-Distortion - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2011-07-07 |
20110163806 | DISTORTION COMPENSATION AMPLIFICATION DEVICE - It is intended to increase the efficiency of a distortion compensation amplification device having a pre-distorter | 2011-07-07 |
20110163807 | IMPEDANCE MATCHING CIRCUIT AND METHOD THEREOF - A circuit comprises an amplifier circuit and a trimming circuit. The amplifier circuit includes an operational amplifier. The operational amplifier has a first input configured to receive input signals, and the operational amplifier also has a second input and an amplifier output. One of the first input or the second input is a negative input. The trimming circuit is coupled to the amplifier output. The trimming circuit includes a termination resistor coupled in parallel with at least one trimming resistor. The termination resistor is coupled to a first switch in series, and the trimming resistor is coupled to a second switch in series. The amplifier output is connected back to the negative input through the first switch. | 2011-07-07 |
20110163808 | AMPLIFIER WITH IMPROVED INPUT RESISTANCE AND CONTROLLED COMMON MODE - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair. | 2011-07-07 |
20110163809 | PUSH-PULL OUTPUT CIRCUIT - According to one embodiment, a first transistor is connected between a first power supply rail and an output unit. A second transistor is connected between the output unit and a second power supply rail. A gm amplifier includes an input unit and first and second output terminals and amplifies a difference between a signal input to the input unit and a reference voltage. First and second current mirror circuits are connected to be vertically stacked between the first rail and the first terminal as well as a gate of the second transistor. Third and fourth current mirror circuits are connected to be vertically stacked between the second rail and the second terminal as well as a gate of the first transistor. The gate of the first transistor is connected to the first and second circuits. The gate of the second transistor is connected to the third and fourth circuits. | 2011-07-07 |
20110163810 | Low distortion cascode amplifier circuit - An audio amplifier circuit has a first cascode stage configured as a voltage gain stage and having an input for an audio signal, and an output. The circuit has a second cascode stage configured as a unity gain or near unity gain stage and having an input to receive an output from the first cascode stage, and a low impedance output to drive an output stage of an audio power amplifier. The first cascode stage has a first, input transistor having an input biased to a predetermined bias voltage, and a second, output transistor arranged to drive the second cascode stage. The first, input transistor of the first cascode stage may have a common-emitter configuration, and the second, output transistor may have a common-base configuration. The invention extends to an audio amplifier which includes a circuit of the invention. | 2011-07-07 |
20110163811 | Fast Class AB Output Stage - A system for a Class AB Amplifier output stage that includes a first push pull system connected to an output terminal including a first driving transistor coupled to the output terminal and a second push pull system connected to the output terminal including a second driving transistor coupled to the output terminal. The amplifier also includes a current mode amplifier where the current mode amplifier's output is coupled to the first driving transistor's gate. The amplifier further includes a pair of resistors, a first resistor coupled to a first input terminal of the current mode amplifier, a second resistor coupled to a second input terminal of the current mode amplifier and coupled to the second driving transistor. | 2011-07-07 |
20110163812 | ULTRA LOW-POWER CMOS BASED BIO-SENSOR CIRCUIT - An apparatus configured to identify a material having an electric charge, the apparatus having: an inverting gain amplifier including a first field-effect transistor (FET) coupled to a second FET; wherein a gate of the first FET is configured to sense the electric charge and an output of the amplifier provides a measurement of the electric charge to identify the material. | 2011-07-07 |
20110163813 | AMPLIFIER CIRCUIT - An amplifier circuit can include a first supply terminal to receive a first reference voltage; a second supply terminal to receive a second reference voltage; a first pair of circuit paths extending between the first and second supply terminals and including a respective output terminal, the first pair of circuit paths including a first pair of transistors, each having a gate connected to a respective one of the input terminals and a source connected to the first supply terminal, and a second pair of transistors, each having a gate connected via a first impedance to a gate of a respective first transistor, and a source coupled to the second supply terminal. The amplifier circuit can also include a second pair of circuit paths extending between the first and second supply terminals, the second pair of circuit paths including a third pair of transistors, each having a gate connected to one of the input terminals, and a source connected to the first supply terminal, and a fourth pair of transistors, each having a source connected to the second supply terminal, and a gate connected via a second impedance to a gate of a second transistor from a respective first circuit path. | 2011-07-07 |
20110163814 | Hybrid Class Amplifier - A power amplifier ( | 2011-07-07 |
20110163815 | METHOD AND SYSTEM FOR CALIBRATING A FREQUENCY SYNTHESIZER - A digital frequency synthesizer with an automatic calibration system. The digital frequency synthesizer is calibrated by initiating a coarse tuning operation to rapidly reach a preliminary frequency that is proximate to the desired final frequency. A calibration procedure is then executed for adjusting gain in the frequency synthesizer based on the preliminary frequency. This test involves applying one or more test signals to the frequency synthesizer and measuring a signal generated in the frequency synthesizer. This measured signal corresponds to a gain response of the circuit at the preliminary frequency. When the expected gain is known, any difference relative to the gain of the measured signal is used to adjust the gain in a circuit of the frequency synthesizer such that the actual gain substantially matches the expected gain. | 2011-07-07 |
20110163816 | OSCILLATING CIRCUIT, DC-DC CONVERTER, AND SEMICONDUCTOR DEVICE - The oscillating circuit ( | 2011-07-07 |
20110163817 | RESONATOR AND OSCILLATOR USING SAME - There is provided with a resonator which can correct the resonance frequency of a vibrator in a wide range and with a high accuracy and also provided with an oscillator using the resonator. In the resonator configured by the vibrator | 2011-07-07 |
20110163818 | APPARATUS AND METHOD FOR GENERATING A RANDOM BIT SEQUENCE - An apparatus for generating a random bit sequence has a ring oscillator which includes inverting digital devices and on which an oscillator signal can be tapped. An intermediate storage element monitors and stores fluctuating levels of the oscillator signal. At least two controllable switch devices for simultaneously exciting at least two harmonic wave edges of the ring oscillator are provided in a signal path of the ring oscillator. The phasing of the two harmonic wave edges and a potential convergence thereof are subject to statistical fluctuations, which are used as a basis for the random bit generation. A corresponding random number generator can be used in particular as an FPGA for security applications, such as cryptographic methods. The apparatus has substantially digital components, which are easy to produce in a standardized manner. A dedicated regulating circuit is not necessary. The apparatus is also robust toward exterior influences. | 2011-07-07 |
20110163819 | VARIABLE PHASE AMPLIFIER CIRCUIT AND METHOD OF USE - A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair. | 2011-07-07 |
20110163820 | VOLTAGE CONTROLLED OSCILLATOR CIRCUIT, PHASE-LOCKED LOOP CIRCUIT USING THE VOLTAGE CONTROLLED OSCILLATOR CIRCUIT, AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME - A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates. | 2011-07-07 |
20110163821 | PIEZOELECTRIC VIBRATOR AND OSCILLATION CIRCUIT USING THE SAME - In a circuit including a CMOS inverter (inverting amplifier) (IV | 2011-07-07 |
20110163822 | POWER AMPLIFIER - A power amplifier that amplifies an RF modulation signal containing an amplitude modulation component and a phase modulation component, including a polar modulator that outputs an amplitude component signal that is the amplitude modulation component of the RF modulation signal, a direct current power supply that outputs a direct current voltage, a pulse modulator that pulse-modulates the amplitude component signal, a pulse amplification circuit that amplifies a pulse modulation signal, a combining circuit that adds a direct current voltage that is outputted from the direct current power supply to an output signal of the pulse amplification circuit, a low pass filter that smoothens an output signal of the combining circuit, and an RF amplifier that not only amplifies the RF modulation signal, but also amplitude-modulates the amplified signal with an output signal of the low pass filter and outputs the resultant signal. | 2011-07-07 |
20110163823 | ELECTROMAGNETIC BANDGAP STRUCTURE AND CIRCUIT BOARD - In an electromagnetic bandgap structure including a plurality of conductive plates and a stitching via part, in which the plurality of conductive plates are placed on a first planar surface, the stitching via part includes a first via having one end part connected to one of the two conductive plates, a second via having one end part connected to the other of the two conductive plates, a spiral connector forming a spirally-shaped serial link structure on at least one vertical planar surface that is perpendicular to the first planar surface, a first conductive pattern connecting one end part of the spiral connector and the other end part of the first via with each other and a second conductive connecting pattern connecting the other end part of the spiral connector and the other end part of the second via with each other. | 2011-07-07 |
20110163824 | ELECTRONIC CIRCUIT AND ELECTRONIC DEVICE - An electronic circuit includes a first inductor, a second inductor that is magnetically coupled with the first inductor, induced current flowing through the second inductor by a magnetic field generated by the first inductor, and a current changing part that is connected to the second inductor and is configured to change the induced current that flows through the second inductor. | 2011-07-07 |