26th week of 2012 patent applcation highlights part 35 |
Patent application number | Title | Published |
20120163083 | ALTERNATE BIT LINE BIAS DURING PROGRAMMING TO REDUCE CHANNEL TO FLOATING GATE COUPLING IN MEMORY - In a non-volatile storage system, capacitive coupling effects are reduced by reducing the probability that adjacent storage elements reach the lockout condition at close to the same program pulse. A slow down measure such as an elevated bit line voltage is applied to the storage elements of a word line which are associated with odd-numbered bit lines, but not to the storage elements associated with even-numbered bit lines. The elevated bit line voltage is applied over a range of program pulses, then stepped down to ground over one or more program pulses. The range of programming pulses over which the slow down measure is applied, can be fixed or determined adaptively. A program pulse increment can be dropped, then increased, when the bit line voltage is stepped down. Storage elements which are programmed to a highest target data state can be excluded from the slow down measure. | 2012-06-28 |
20120163084 | Early detection of degradation in NAND flash memory - Techniques for early detection of degradation in NAND Flash memories by measuring the dispersion of the threshold voltages (VT's), of a set (e.g. page) of NAND Flash memory cells during read operations are described. In an embodiment of the invention the time-to-completion (TTC) values for the read operation for the memory cells are used as a proxy for dispersion of the threshold voltages (VT's). A Dispersion Analyzer determines the dispersion of the set of TTC values. In one embodiment the delta between the maximum and minimum TTC values is used as the dispersion measurement. If the measured TTC dispersion differs by more than a selected amount from a reference dispersion value, a warning signal is provided to indicate that the page of memory has degraded. The warning signal can be used to take appropriate action such as moving the data to a new page. | 2012-06-28 |
20120163085 | Non-Volatile Memory And Methods With Soft-Bit Reads While Reading Hard Bits With Compensation For Coupling - A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”. | 2012-06-28 |
20120163086 | CONCURRENT OPERATION OF PLURAL FLASH MEMORIES - A device comprises an address storage device. A first circuit includes a first flash memory, configured to sequentially receive first and second addresses and store the first address in the address storage device. The first circuit has a first set of control inputs for causing the first circuit to perform a first operation from the group consisting of read, program and erase on a cell of the first flash memory corresponding to a selected one of the first and second addresses. A second circuit includes a second flash memory, configured to receive the second address. The second circuit has a second set of control inputs for causing the second circuit to read data from a cell of the second flash memory corresponding to the second address while the first operation is being performed. | 2012-06-28 |
20120163087 | Decoder for Nand Memory - An integrated circuit device has multiple blocks of NAND memory cells, and a high voltage switch. The high voltage switch is coupled to a decoder output and the blocks of NAND memory cells. The high voltage switch has an output voltage range with positive and negative voltages. | 2012-06-28 |
20120163088 | SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREFOR - According to one embodiment, a semiconductor memory device includes a memory cell array including memory cells, each of which is arranged at a position of between a word line and a bit line, a row decoder, and a bit line control circuit. And when data is to be read out from the memory cell, a charge control circuit controls the gate voltages of a first transistor, a second transistor, a third transistor, and a fourth transistor, respectively, so that the bit line is charged in accordance with a first characteristic obtained by increasing a current driving capacity of the first transistor during a desired period after start of charge of the bit line, and the bit line is then charged in accordance with a second characteristic obtained by returning the current driving capacity of the first transistor to the lower current driving capacity after elapse of the desired period. | 2012-06-28 |
20120163089 | METHOD FOR WRITING DATA IN SEMICONDUCTOR STORAGE DEVICE AND SEMICONDUCTOR STORAGE DEVICE - A method for writing data in a semiconductor storage device and a semiconductor storage device are provided, that can reduce variations in readout current from a sub storage region which serves as a reference cell for the memory cells of the semiconductor storage device, thereby preventing an improper determination from being made when determining the readout current from a memory cell. In the method, data is written on a memory cell in two data write steps by applying voltages to the first and second impurity regions of the memory cell, the voltages being different in magnitude from each other. | 2012-06-28 |
20120163090 | INFORMATION RECORDING/REPRODUCING DEVICE - According to one embodiment, an information recording/reproducing device includes a recording layer, and a recording circuit configured to record information by generating a phase change in the recording layer while applying a voltage to the recording layer. The recording layer comprises a compound including at least one type of cationic element, and at least one type of anionic element, at least the one type of cationic element is a transition element including a d orbital incompletely filled with electrons, and the average shortest distance between adjacent cationic elements is 0.32 nm or less, and the recording layer is provided with a material selected from (i) A | 2012-06-28 |
20120163091 | SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL - A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n values (n is a natural number equal to or larger than 3). A control circuit controls the potentials of the word line and bit line according to input data and writes data into a memory cell. The control circuit writes data into the memory cell to a k-valued threshold voltage (k<=n) in a write operation, precharges the bit line once, and then changes the potential of the word line an i number of times to verify whether the memory cell has reached an i-valued (i<=k) threshold voltage. | 2012-06-28 |
20120163092 | NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME - The program method of a nonvolatile memory device includes detecting temperature, setting a step voltage, corresponding to an increment of a program voltage in a program operation of an incremental step pulse program (ISPP) method, wherein the step voltage changes based on the detected temperature, and performing the program operation and a program verification operation based on the set step voltage. | 2012-06-28 |
20120163093 | NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF - A programming method of a nonvolatile memory device includes inputting even data and odd data to be programmed into even memory cells coupled to even bit lines and odd memory cells coupled to odd bit lines, respectively, setting a sense signal as a first sense signal or a second sense signal having a lower voltage level than the first sense signal, based on odd data of odd memory cells adjacent to each of the even memory cells to be programmed, programming the even data into the even memory cells by supplying a program voltage, performing a program verify operation on each of the even memory cells in response to the set sense signal, and programming the odd data into the odd memory cells by supplying a program voltage. | 2012-06-28 |
20120163094 | PROGRAMMING METHODS AND MEMORIES - Methods of programming memory cells, and memories incorporating such methods, are disclosed. In at least one embodiment, programming is accomplished by applying a set of incrementing program pulses to program a selected cell to a first target threshold voltage, and applying a set of incrementing inhibit pulses to an unselected cell to fine-tune program the selected cell to a second threshold voltage. | 2012-06-28 |
20120163095 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a plurality of bit lines connected to memory cells; a sense amplifier connected to the plurality of bit lines; a memory unit configured to hold failure data of the bit lines; and a controller configured to perform control such that if it is judged that there is a failure in a second bit line adjacent to a first bit line selected in writing data on the basis of the failure data for the bit lines, the potential of the second bit line is set to a first potential in at least any one of programming and verification. | 2012-06-28 |
20120163096 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME - During data read process, a control circuit gives a read voltage to a selected word line connected to a selected memory cell, and gives read pass voltages, for turning on memory cells, to unselected word lines connected to unselected memory cells. The control circuit respectively gives a first read pass voltage, a second read pass voltage, and a third read pass voltage to a first unselected word line adjacent to the selected word line at a side of at least one of a bit line and a source line, a second unselected word line adjacent to the first unselected word line at a side opposite to the selected word line, and a third unselected word line adjacent to the second unselected word line at a side opposite to the selected word line. The second read pass voltage is higher than the third read pass voltage. | 2012-06-28 |
20120163097 | MEMORY DEVICE, MEMORY CONTROL METHOD, AND PROGRAM - A memory device includes: a non-volatile memory erasing data in a block unit and writing and reading data to and from a block; and a control unit controlling an access operation to the non-volatile memory, monitoring levels of a data change state of the non-volatile memory, and controlling a refresh operation of the non-volatile memory. The control unit executes the refresh operation in accordance with a comparison result between a plurality of set emergency levels of the refresh operation and the levels of the data change state. | 2012-06-28 |
20120163098 | SEMICONDUCTOR MEMORY DEVICE INCLUDING MODE REGISTER SET AND METHOD FOR OPERATING THE SAME - A semiconductor memory device and method for operating the same includes a controller configured to generate a data buffer control signal in a mode register set (MRS) mode, a data buffer configured to buffer and output a plurality of MRS codes inputted through a data pad in response to the data buffer control signal, and a plurality of MRS command generators configured to receive the MRS codes outputted from the data buffer through a data line and generate a plurality of MRS commands based on the received MRS codes. | 2012-06-28 |
20120163099 | MODE-REGISTER READING CONTROLLER AND SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device may include a mode-register reading controller and a mode register. The mode-register reading controller generates a control signal for loading data into an input/output line in response to an enable signal, during a mode-register reading operation. The control signal is generated in response to a mode-register read signal when there is a reset command is input. The mode register loads the data into the input/output line in response to the control signal. | 2012-06-28 |
20120163100 | AUTO-PRECHARGE SIGNAL GENERATOR - An auto-precharge signal generation circuit comprises a signal generator, a set signal generator, and an auto-precharge signal generator. The signal generator is configured to generating a control signal and a precharge control signal in response to receiving a first column address strobe signal and an auto-precharge flag signal. The set signal generator is configured to generating a set signal in response to receiving the control signal and the precharge control signal. The auto-precharge signal generator is configured to generate an auto-precharge signal in response to receiving the set signal and a period set signal. | 2012-06-28 |
20120163101 | MEMORY INTERFACE CIRCUIT, MEMORY INTERFACE METHOD, AND ELECTRONIC DEVICE - A memory interface circuit includes a gating circuit that starts detection of a logic level of a data strobe signal in accordance with a data read command. A clamp circuit clamps the data strobe signal to a first logic level after the data read command is issued. A detection circuit detects a logic level of the data strobe signal, which is driven by the memory, in accordance with the data read command. | 2012-06-28 |
20120163102 | MULTI-PORT MEMORY ARRAY - A multi-port memory array is disclosed. The memory array includes a plurality of memory subblocks and an output network. Each memory subblock includes a plurality of single-read-port memory cells. The output network is configured to redirect information read for a first read port to a second read port on a condition that an equivalence signal indicates that read addresses for the first read port and the second read port are the same. The latching and multiplexing operation may be integrated. The memory cells may be 6-transistor synchronous random access memory (SRAM) cells, 8-transistor SRAM cells, or any type of memory cells. | 2012-06-28 |
20120163103 | MEMORY CELL USING BTI EFFECTS IN HIGH-K METAL GATE MOS - Techniques and circuitry are disclosed for implementing non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate n-type or p-type metal oxide semiconductor (NMOS or PMOS) transistors. A programmed bitcell of, for example, a memory or programmable logic circuit exhibits a threshold voltage shift resulting from an applied programming bias used to program bitcells. In some cases, applying a first programming bias causes the device to have a first state, and applying a second programming bias causes the device to have a second state that is different than the first state. Programmed bitcells can be erased by applying an opposite polarity stress, and re-programmed through multiple cycles. The bitcell configuration can be used in conjunction with column/row select circuitry and/or readout circuitry, in accordance with some embodiments. | 2012-06-28 |
20120163104 | DELAY ADJUSTMENT DEVICE, SEMICONDUCTOR DEVICE AND DELAY ADJUSTMENT METHOD - A semiconductor device including an adjustment mode and a normal operation mode, including a first terminal to be coupled to the memory and configured to output a read command to the memory in the adjustment mode and not to output a write command in the adjustment mode, and a second terminal to be coupled to the memory and configured to receive a data strobe signal from the memory in the adjustment mode and not to output a signal to the memory in the adjustment mode. | 2012-06-28 |
20120163105 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device has a great number of logic circuits and fuse blocks with its space-saving design. In the semiconductor storage device, a plurality of fuse blocks is arranged in a line or row in the vicinity of a gate array. Each fuse block includes a plurality of fuse pieces arranged in a juxtaposed manner and exposed to the exterior through a fuse window. A power-supply wire and a ground wire extend along the juxtaposed direction of the fuse pieces. Spacing in the vicinity of the gate array is used for arrangement of the fuse blocks. | 2012-06-28 |
20120163106 | REFRESH CONTROL CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a refresh counter for counting a refresh signal and outputting a refresh address in response to an active mode signal enabled in an active mode, an external address input buffer for buffering an external address to output an internal address in response to a mode selection signal enabled in an external address refresh mode, an address selector for outputting the refresh address from the refresh counter as a selection row address in a normal refresh mode and outputting the internal address from the external address input buffer as the selection row address in the external address refresh mode in response to the refresh signal and the mode selection signal, and a row address decoder for generating a row address selection signal for sequentially accessing word lines by decoding the selection row address. | 2012-06-28 |
20120163107 | MEMORY DEVICE CAPABLE OF OPERATION IN A BURN IN STRESS MODE, METHOD FOR PERFORMING BURN IN STRESS ON A MEMORY DEVICE, AND METHOD FOR DETECTING LEAKAGE CURRENT OF A MEMORY DEVICE - Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage. | 2012-06-28 |
20120163108 | NON-VOLATILE MEMORY DEVICE AND ELECTRONIC APPARATUS - A non-volatile memory device is provided, which includes a first block for storing a first data group including a test data, a second block for storing a second data group including a complementary data to the first data group, a differential sense amplifier for generating an output value based on a difference between two input signals, a diagnostic circuit for performing a failure diagnosis using a value from the differential sense amplifier, and a control circuit which performs control such that a signal based on the test data and the complementary data is set to the input signal of the differential sense amplifier and the diagnostic circuit executes a failure diagnosis of the differential sense amplifier. The non-volatile memory device performs a failure diagnosis with high reliability capable of distinguishing between a failure of sense amplifier and a failure of a memory cell. | 2012-06-28 |
20120163109 | MEMORY CIRCUIT AND A TRACKING CIRCUIT THEREOF - Memory circuit and a tracking circuit thereof. The tracking circuit includes a dummy bit line (DBL). The tracking circuit further includes a first circuit to discharge the dummy bit line in response to a first signal and a wordline activation signal. The wordline activation signal causes activation of a memory cell. The tracking circuit also includes a second circuit which is responsive to discharge of the dummy bit line to enable access to the memory cell. | 2012-06-28 |
20120163110 | MEMORY DEVICE WITH ROBUST WRITE ASSIST - A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to disable the supply of charge and couple the write enable circuit to at least one of the pair of bit lines after a first determined period following the reception of the write signal. | 2012-06-28 |
20120163111 | REFRESH CONTROL CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE - A refresh control circuit for a semiconductor memory device includes a refresh controller configured to control the number of times a refresh signal is enabled during one refresh period in response to a refresh mode entering signal which indicates the start of a refresh mode, and a mode determination signal having refresh mode information, a refresh counter configured to output a row address for a refresh operation by counting the refresh signal in response to an active signal enabled in an active mode, and a row address decoder configured to decode the row address to generate a row address selection signal for sequentially accessing word lines within a cell array. | 2012-06-28 |
20120163112 | SEMICONDUCTOR STORAGE SYSTEM CAPABLE OF SUPPRESSING PEAK CURRENT - According to one embodiment, in a semiconductor storage system, the power supply wiring is connected to a first semiconductor storage device, and second semiconductor storage device as a common connection, and supplies power to the first and second semiconductor storage devices. A voltage detection circuit is provided in each of the first and second semiconductor storage devices. Each of the voltage detection circuits detects a power supply voltage of the power supply wiring. A control circuit is provided in each of the first and second semiconductor storage devices. When lowering of the power supply voltage is detected by a corresponding voltage detection circuit, each of the control circuits does not shift the operation of the first or second semiconductor storage device to the next operation until the power supply voltage is restored. | 2012-06-28 |
20120163113 | MEMORY CONTROLLER AND MEMORY CONTROLLING METHOD - A memory controller includes: a first generating unit that generates a read-address to read a data element sequence having a plurality of data elements from a bank of a memory; a second generating unit that generates a position signal indicating a position of a data element to be selected from the data element sequence, and an order signal indicating a storing order for storing the data element to be selected into a register; and a selector unit that selects, according to the position signal, the data element to be selected from the data element sequence read out from each of the plurality of the banks, and stores the selected data element in the storing order indicated by the order signal into the register, wherein the data element stored in the register is processed in the storing order by a vector processor. | 2012-06-28 |
20120163114 | NAND logic word line selection - A NAND architecture for selecting a word line driver in a DRAM is disclosed. Separately decoded addresses in the low, mid and high ranges are used to select a final word line driver. The output of the word line driver is at a potential negative with respect to ground for a deselected word line and a positive potential more positive than the power supply potential for a selected word line. | 2012-06-28 |
20120163115 | Nor logic word line selection - A NOR architecture for selecting a word line driver in a DRAM is disclosed. Complements of separately decoded addresses in the low, mid and high ranges are used to select a final word line driver. The output of the word line driver is at a potential negative with respect to ground for a deselected word line and a positive potential more positive than the power supply potential for a selected word line. | 2012-06-28 |
20120163116 | USING A MICROFLUID MIXER - A method includes directing first and second fluids into a plurality of first ports fluidly connected to a mixing chamber disposed between a first plate and a base plate, guiding the first and second fluids into a mixing chamber, directing the first and second fluid into a plurality of second ports fluidly connected to the plurality of first ports, guiding the first and second fluids from the plurality of second ports into another mixing chamber disposed between a second plate and the first plate and fluidly connected to the mixing chamber, activating a heating element to heat one of the first and second fluids entering the mixing chamber, creating a temperature gradient between the first and second fluids entering the mixing chamber, and operating a diaphragm operatively associated with the mixing chamber and the another mixing chamber to agitate the first and second fluids to form a fluid mixture. | 2012-06-28 |
20120163117 | MIXING APPARATUS - An apparatus and a method for mixing a substance such as tattoo ink or nail polish may comprise a rotor rotatable about a fixed axis, one or more holders on the rotor for receiving a container containing the substance and disposing the container perpendicular to the fixed axis, and a motor for applying a force to rotate the rotor around the fixed axis at less than about 120 revolutions per minute (RPM). The method may comprise receiving a container containing the substance into one or more holders on a rotor, in which the rotor is rotatable about a fixed axis, and applying a force to rotate the rotor about the fixed axis at less than about 120 RPM. | 2012-06-28 |
20120163118 | Stirrer organ in composite construction - The invention relates to a stirrer organ ( | 2012-06-28 |
20120163119 | COMBINATION MOTION AND ACOUSTIC PIEZOELECTRIC SENSOR APPARATUS AND METHOD OF USE THEREFOR - Sensors used in mapping strata beneath a marine body are described, such as used in a flexible towed array. A first sensor is a motion sensor including a conductive liquid in a chamber between a rigid tube and a piezoelectric motion film circumferentially wrapped about the tube. A second sensor is a traditional acoustic sensor or a novel acoustic sensor using a piezoelectric sensor mounted with a thin film separation layer of flexible microspheres on a rigid substrate. Additional non-acoustic sensors are optionally mounted on the rigid substrate for generation of output used to reduce noise observed by the acoustic sensors. Combinations of acoustic, non-acoustic, and motion sensors co-located in rigid streamer housing sections are provided. | 2012-06-28 |
20120163120 | PASSIVE NOISE CANCELLING PIEZOELECTRIC SENSOR APPARATUS AND METHOD OF USE THEREOF - Sensors used in mapping strata beneath a marine body and/or structures on a marine body floor are described, such as in a flexible buoyancy adjustable towed array. A first sensor is a traditional acoustic sensor or a novel acoustic sensor using a piezoelectric sensor mounted with a thin film separation layer of flexible microspheres on a rigid substrate. Additional non-acoustic sensors are optionally mounted on the rigid substrate for generation of output used to reduce noise observed by the acoustic sensors. Combinations of acoustic, non-acoustic, and motion sensors co-located in rigid streamer housing sections are provided, which reduce noise associated with different sensor locations and/or localized turbulence. | 2012-06-28 |
20120163121 | EXTRACTING SV SHEAR DATA FROM P-WAVE MARINE DATA - A system and method of processing seismic data obtained using a plurality of towed single-component receivers in a marine environment is described, the towed single-component receivers configured to measure compressional P waves. The method comprises retrieving seismic data from a storage device, the seismic data comprising P-P data and shear mode data, wherein the P-P data and shear mode data were both received at the towed single-component receivers configured to measure compressional P waves to generate the seismic data. The method further comprises processing the seismic data to extract SV-P shear mode data and generating shear mode image data based on the extracted shear mode data. | 2012-06-28 |
20120163122 | Removing Noise from a Seismic Measurement - A technique includes decomposing a signal that is derived from a seismic acquisition into a plurality of signals such that each signal is associated with a different frequency band. For each signal of the plurality of signals, the technique includes performing the following: decomposing the signal into subbands in successive stages, where the subbands are associated with at least different frequency ranges of the signal; selectively applying adaptive noise attenuation in between the successive stages such that the stages decompose noise-attenuated subbands; and reconstructing the signal from the subbands resulting from the decomposition. The technique includes combining the reconstructed signals. | 2012-06-28 |
20120163123 | STRESS IN FORMATIONS FROM AZIMUTHAL VARIATION IN ACOUSTIC AND OTHER PROPERTIES - The present disclosure is related to methods and apparatuses for acoustic velocity well logging. The method may include estimating a magnitude of a principal horizontal stress in a borehole in a formation. The method may include obtaining a far field stress orientation and making a measurement of near borehole stress orientation. The present disclosure also includes an apparatus configured to be conveyed into a borehole and perform the method. Formation stresses and directions may be estimated. | 2012-06-28 |
20120163124 | ULTRASONIC DETECTION DEVICE AND ULTRASONIC DIAGNOSTIC DEVICE - Provided is an ultrasonic detection device including: a capacitive electromechanical transducer including a cell that includes a first electrode and a second electrode disposed so as to oppose with a space; a voltage source for developing a potential difference between the first electrode and the second electrode; and an electric circuit for converting a current, which is caused by a change in electrostatic capacitance between the first electrode and the second electrode due to vibration of the second electrode, into a voltage, in which the capacitive electromechanical transducer provides an output current with a high-pass characteristic having a first cutoff frequency with respect to a frequency, the electric circuit provides an output with a low-pass characteristic having a second cutoff frequency with respect to the frequency, and the second cutoff frequency is smaller than the first cutoff frequency. | 2012-06-28 |
20120163125 | METHOD OF ULTRASOUND TELEMETRY FOR DRONES, WITH DISCRIMINATION OF SPURIOUS ECHOES EMANATING FROM ANOTHER DRONE - The method comprises: a) the emission of an ultrasound burst repeated at a predetermined recurrence frequency; and b) after each emission and for the duration of a time frame (n−1, n, n+1, . . . ) separating two consecutive emissions, the reception of a plurality of successive signal spikes appearing in the course of the same frame. These spikes include spurious spikes (E′ | 2012-06-28 |
20120163126 | Ultrasonic/acoustic transducer - A transducer | 2012-06-28 |
20120163127 | METHOD FOR MONITORING A VICINITY USING SEVERAL ACOUSTIC SENSORS - A method for monitoring a vicinity using a plurality of acoustic sensors ( | 2012-06-28 |
20120163128 | ACOUSTIC TRANSMISSION - In apparatus for the acoustic transmission of power or data through a solid barrier such as a ships hull, assembly of an acoustic transducer to the hull is facilitated by bonding it first to an intermediate element by a thin layer of bonding adhesive and then bonding the intermediate element to the barrier using a second bonding layer. Acoustic matching of the transducer to the intermediate element is achieved by the thin layer, and the mechanically more robust base of the intermediate element can be rubbed on the barrier surface to displace or abrade away any unwanted debris or imperfections which might otherwise prevent the achievement of a thin second bonding layer. This makes the mounting and bonding process more tolerant of imperfections in the barrier surface due to either surface defects or particulate contamination. The transmit and receive transducers may be positioned relative to each other so as to suppress or attenuate multiple-transit signals. Thus the intermediate element may be wedge shaped to aid suppression of triple-transit signals. Transmit and receive transducers may have different wedge angles. | 2012-06-28 |
20120163129 | Acoustic Transducer Chip - An array of acoustic transducing unit cells configured with an acoustic focus or a beam steering orientation. A variety of time delays between consecutively coupled acoustic transducing unit cells provides acoustic focus. In another configuration, a resistive signal path between adjacent acoustic transducing unit cells can be used to acoustically steer an acoustic beam in a direction non-normal to the top surface in which the array is disposed. In a further embodiment, a signal pad is made available at each end of the connections through an array of capacitive micromachined ultrasonic transducing unit cells. | 2012-06-28 |
20120163130 | TAPE CAST MULTILAYER SONAR TRANSDUCER AND METHOD - The invention herein pertains to a single-piece, multi-layer piezoelectric stack in a sonar transducer element utilized in acoustic arrays requiring many thousands of elements. A slurry formed by mixing ceramics, powders, and binders is filtered, dried and cast into a thin film on a moving substrate. When the film has dried, it is removed from the substrate and layered into piezoelectric stacks. Screening a pattern of conductive platinum ink onto a desired layer forms electrodes. Applied heat and pressure forms a unitary body with electrically accessible layers. Burning removes the binders and sintering produces a final density. Dicing the body exposes the desired electrode polarities. A strip of conductive material is applied to connect the electrodes of like polarity and the ceramic parts are polarized. The transducer elements may be arrayed to conform to the curved surfaces such as a ship's hull. | 2012-06-28 |
20120163131 | Mono-directional Ultrasound Transducer for Borehole Imaging - Devices and methods to generate a mono-directional ultrasonic wave are provided. An ultrasonic sensor configured to emit a substantially mono-directional ultrasonic wave includes a first piezoelectric element and a second piezoelectric element. The first piezoelectric element is configured to generate a first ultrasonic wave propagating in a first direction and a second ultrasonic wave propagating in a second direction which is different from the first direction. The second piezoelectric element is located and configured to absorb the second ultrasonic wave, and is configured to convert an energy of the absorbed second ultrasonic wave into an electrical energy. | 2012-06-28 |
20120163132 | Systems and Methods for Wirelessly Programming a Prescription Bottle Cap - Embodiments of the present invention provide systems and methods for wirelessly programming a prescription bottle cap. In an embodiment, the system includes a base station comprising an inductor and processor configured to receive prescription dosage instructions and instruct the inductor to alter a magnetic field in a manner representative of the prescription dosage instructions. In an embodiment, the system further includes a wirelessly programmable cap comprising a sensor configured to detect the magnetic field and to generate the prescription dosage information based on the magnetic field. A control unit is configured to instruct the wirelessly programmable cap to send an alert at a time designated by the prescription dosage information. | 2012-06-28 |
20120163133 | Timepiece and Urn Combination Device - An architecture is presented that provides an hourglass device that can be used as a decorative urn to allow users to display the remains of their loved one in a respectful manner, while also accommodating the storage of valuables in a surreptitious manner. The hourglass and urn combination device is preferably comprised of a base with a hidden compartment contained therein, a top, more than one pillar, a hourglass, and an hourglass support structure that permits the hourglass to rotate with respect thereto. The hourglass may be filled with sand, soil and/or the cremated remains of a loved one such as a family member, friend or pet, or the cremated remains may be stored in the secret compartment in the base with other valuables such as money, jewelry and the like. | 2012-06-28 |
20120163134 | OSCILLATORS HAVING ARBITRARY FREQUENCIES AND RELATED SYSTEMS AND METHODS - Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal. | 2012-06-28 |
20120163135 | TIMEPIECE FACEPLATE, AND TIMEPIECE - To provide a timepiece faceplate that presents a rich stereoscopic effect, and to provide a timepiece comprising the timepiece faceplate, a timepiece faceplate | 2012-06-28 |
20120163136 | ALARM CLOCK AND METHOD FOR CONTROLLING A WAKE-UP ALARM - An alarm clock comprises at least one sensor for detecting a body activity level of a human being and is provided to produce a sequence of alarm signals. Each alarm signal within said sequence is suppressible on the detection of a predetermined body activity level. The body activity level required to suppress an alarm signal increases with each subsequent alarm signal within said sequence. A corresponding method for controlling a wake-up alarm comprises the production of a sequence of alarm signals, each alarm signal within said sequence being suppressible on the detection of a predetermined body activity level of a human being, wherein the predetermined body activity level required to suppress an alarm signal increases with each subsequent alarm signal within said sequence. The body activity level of a human being is detected during said sequence, and a present alarm signal is suppressed when the body activity level presently detected is greater than the predetermined body activity level required to suppress the present alarm signal. | 2012-06-28 |
20120163137 | METHOD AND SYSTEM FOR OPTICALLY COUPLING A LASER WITH A TRANSDUCER IN AN ENERGY ASSISTED MAGNETIC RECORDING DISK DRIVE - A method and system for providing an energy assisted magnetic recording (EAMR) head are described. The EAMR head includes a laser, a slider, and an EAMR transducer. The laser has a main emitter and at least one alignment emitter. The slider includes at least one alignment waveguide, at least one output device, and an air-bearing surface (ABS). The alignment waveguide(s) are aligned with the alignment emitter(s). The EAMR transducer is coupled with the slider and includes a waveguide aligned with main emitter. The waveguide is for directing energy from the main emitter toward the ABS. | 2012-06-28 |
20120163138 | Integrated Heat Assisted Magnetic Recording Head With Extended Cavity Vertical Cavity Surface Emitting Laser Diode - An apparatus includes a transducer assembly including a waveguide and a grating structured to couple electromagnetic radiation into the waveguide; and a body including an extended cavity vertical cavity surface emitting laser diode, and having an air bearing surface, wherein the transducer assembly is positioned adjacent to the body and the laser diode directs electromagnetic radiation onto the grating. A method of making the apparatus is also included. | 2012-06-28 |
20120163139 | HEAT-SINKS FOR OPTICAL NEAR-FIELD TRANSDUCERS - Thermal energy is generated within an optical NFT when in operation within a HAMR head. A heat-sink assembly within the HAMR head extracts thermal energy from the optical NFT and transmits the thermal energy via convection to air surrounding the HAMR head, radiation to surfaces adjacent to the HAMR head, and/or conduction to other parts of the HAMR head. The thermal energy generated within the optical NFT is conducted to the heat-sink. An air-bearing surface of the heat-sink convectively transfers at least some of the thermal energy to air passing between the air-bearing surface and a surface of an adjacent magnetic medium. Further, some of the thermal energy may also radiatively transfer from the air-bearing surface to the magnetic medium. | 2012-06-28 |
20120163140 | MULTI-STAGE FOCUS ACTUATOR AND OPTICAL HEAD - Techniques are provided for using a multi-stage actuator to actuate one or more optical components of an optical head. The multi-stage actuator includes a cross-layer displacement component which actuates an optical component to change the beam focus in a displacement range corresponding to the thickness of the data layers in a holographic disk, such that a beam is impinged on the target data layer. The multi-stage actuator also includes a intra-layer focusing component which actuates the optical component in a smaller range to focus the beam on the target data position. The cross-layer displacement component and the intra-layer focusing component may each include more than one actuator. In some embodiments, the focusing component also actuates the optical component in a tilting motion to compensate for movement or imperfections of the disk during a reading or recording process. | 2012-06-28 |
20120163141 | OPTICAL DISK DEVICE, OPTICAL PICKUP, AND OPTICAL RECORDING MEDIUM - The present invention can properly correct spherical aberration. | 2012-06-28 |
20120163142 | Objective Lens Element and Optical Pickup Device Using the Same - An objective lens element which can obtain appropriate spot performance only by simple position adjustment, and an optical pickup device using the objective lens element are provided. In the objective lens element, an amount of a generated third-order astigmatism of a spot which is formed when symmetry axes of optically functional surfaces are located parallel to the normal line of a base plate and an incident light beam incident such that a central light beam thereof is tilted at 0.5 degree with respect to the normal line of the base plate is converged, is reduced to be less than an amount of a generated spherical aberration of a spot which is formed when the symmetry axes of the optically functional surface are located parallel to the normal line of the base plate and an incident light beam incident parallel to the normal line of the base plate is converged. | 2012-06-28 |
20120163143 | OPTICAL DISC RECORDING METHOD AND OPTICAL DISC RECORDING APPARATUS - An optical disc recording method of determining a disc address when write and read operations are performed for an optical disc during recording power calibration in an optical disc recording apparatus having at least two optical head units including first and second optical head units is disclosed. The method includes: determining a first recording power calibration start address, which is an address at which the first optical head unit starts calibration of the recording power, from a power calibration area provided in advance as an area used to calibrate the recording power; and determining an address obtained by adding a range of the power calibration area used to calibrate the recording power to the first recording power calibration start address as a second recording power calibration start address, which is an address at which the second optical head unit starts calibration of the recording power. | 2012-06-28 |
20120163144 | MEASURING APPARATUS FOR HARD DISK DRIVE - A measuring apparatus includes a first connector connected to a storage controller through a second connector of a motherboard. A control circuit receives voltage signals from the storage controller and converts the voltage signals to hard disk drive (HDD) power signals. A detecting circuit includes an AND gate and first to fourth resistors. A first input terminal of the AND gate is grounded through the first resistor and connected to the control circuit through the second resistor. A second input terminal of the AND gate is grounded through the third resistor and connected to the control circuit through the fourth resistor. An output terminal of the AND gate is connected to a measuring pin of the first connector. The AND gate receives the HDD power signals and outputs a power good (PWG) signal to the measuring pin of the first connector to be measured. | 2012-06-28 |
20120163145 | OPTICAL DATA STORAGE MEDIA - Optical data storage media for bit-wise recording of a microhologram using an incident radiation at a wavelength of about 405 nm are provided. The optical storage medium includes (a) a non-photopolymer polymer matrix; (b) a non-linear sensitizer comprising a phenylethynyl platinum complex, wherein the non-linear sensitizer is capable of triplet-triplet energy transfer from an upper triplet state (T | 2012-06-28 |
20120163146 | METHOD AND APPARATUS FOR WRITING DATA TO OPTICAL STORAGE MEDIUM - A method and apparatus for writing data to an optical storage medium are disclosed. A write signal indicating power levels of a laser diode is generated by encoding and decoding codewords. The codewords are generated and decoded according to a specific requirement proposed by the present invention. By doing so, toggling (i.e. state changing) times occurring in channels transferring the codewords can be significantly reduced to avoid the problems of pulse distortion and disappearance in high frequency transmission. Alternatively, toggles appearing in the respective channels can be spread to avoid interference between the channels. Further, a phase adjustment device for adjusting a phase of each codeword is disclosed. | 2012-06-28 |
20120163147 | SYNCHRONIZATION DETECTING METHOD AND SYNCHRONIZATION DETECTING CIRCUIT - A synchronization detecting circuit detects a synchronous signal from a reproduced signal of a recording medium in which a random shift method is employed. A window generator in the synchronization detecting circuit generates a third window having as a central phase one predicted phase in a second predicted coordinate that is obtained by replicating a first predicted coordinate indicating a predicted phase of each synchronous signal that repeatedly appears in the reproduced signal and having a phase width equivalent to twice a random shift width when the synchronous signal is not detected using a first window after the synchronous signal is detected using a second window by a synchronization detector. | 2012-06-28 |
20120163148 | SYNCHRONIZATION DETECTING METHOD AND SYNCHRONIZATION DETECTING CIRCUIT - A synchronization detecting circuit detects a synchronous signal from a reproduced signal of a recording medium in which a random shift method is employed. A window generator in the synchronization detecting circuit generates a third window having as a central phase one predicted phase in a second predicted coordinate that is obtained by replicating a first predicted coordinate indicating a predicted phase of each synchronous signal that repeatedly appears in the reproduced signal and having a phase width equivalent to twice a random shift width when the synchronous signal is not detected using a first window after the synchronous signal is detected using a second window by a synchronization detector. | 2012-06-28 |
20120163149 | CONTENT TRANSMITTING APPARATUS FOR TRANSMITTING CONTENT WITH COPY CONTROL INFORMATION, CONTENT IDENTIFICATION INFORMATION AND CONTENT STATUS INFORMATION - A content transmitting apparatus and the like which execute copy control of content more securely than conventional, and can count copy number correctly according to the situation, even in the case where content transfer is interrupted are provided. The content reproducing apparatus | 2012-06-28 |
20120163150 | Migrating Data from One Recording Medium to Another - Provided is a storage mechanism that readably migrates a content of data from one recording medium to another over generations in a readable manner and provides the contents of the records from a current recording medium. A read/write controller comprises a mechanism for preparing an archive recording medium of a first generation having a plurality of records recorded therein and a mechanism for migrating the records from the recording medium of the first generation to a recording medium of the next generation (the third generation subsequent to the first generation) and further to recording media of following generations one by one. The migration mechanism generates migration information including a mapping table between record numbers of the first generation and a current generation and holds the migration information as data in the recording medium of the current generation. | 2012-06-28 |
20120163151 | OPTICAL DISC, AND PRODUCTION METHOD AND REPRODUCTION APPARATUS FOR OPTICAL DISC - An optical disc has a data layer including a data-layer substrate made of a transparent material and a data-layer reflection film formed on an upper side of the data-layer substrate, a display layer including a display-layer substrate having a display pattern and a display-layer reflection film formed on a lower side of the display-layer substrate, and an intermediate layer made of a transparent material provided between an upper side of the data layer and a lower side of the display layer. | 2012-06-28 |
20120163152 | OPTICAL INFORMATION REPROCESSING APPARATUS AND OPTICAL INFORMATION REPRODUCING METHOD - In reproduction of a two-dimensional page data from an optical information recording medium utilizing holography, a reproduced two-dimensional page data is divided into a plurality of areas each of which has a predetermined size, the divided two-dimensional areas are individually subjected to adaptive equalizing, and then are coupled to restore the condition of the original two-dimensional page data. | 2012-06-28 |
20120163153 | OPTICAL DISC APPARATUS, FOCUS SEARCH METHOD, AND FOCUS SEARCH PROGRAM - A focus search is performed for an optical disc. A focus drive voltage is output for moving an objective lens in a thickness direction of an optical disc. An average value of focus drive voltages is acquired and recorded while the optical disc is rotating at least one time in an in-focus condition in which a laser beam emitted via the objective lens is in focus to a data layer of the optical disc. A closest-position voltage is set based on the average value, the closest-position voltage being a focus drive voltage at which the objective lens is moved closest to the optical disc in a focus search that is performed after the average value has been recorded. The focus search is performed by moving the objective lens between a specific starting position and a position corresponding to the closest-position voltage. | 2012-06-28 |
20120163154 | Optical Element and Optical Pickup Device Using the Same - An optical element which has optical steps each providing a phase difference to transmitted light and has low light amount loss and a high efficiency is provided. The optical element includes a symmetry axis, a plurality of optically functional surfaces which are ring-shaped regions around the symmetry axis, and a plurality of wall regions connecting the optically functional surfaces to each other. The optically functional surfaces and the wall regions constitute the optical steps. On a cross-section taken by, as a cutting plane, a plane including the symmetry axis, the contour line of each wall region is substantially parallel to a light beam which is incident on the optically functional surface on the outer side and passes near the wall region. The maximum value of the angle between the symmetry axis and the light beam passing near the wall region is equal to or more than 25 degrees. | 2012-06-28 |
20120163155 | Optical System for Optical Pickup - An optical system for optical pickup includes a magnification conversion optical element moving along an optical axis direction in accordance with each recording surface and an objective lens element converging a light beam incident through the magnification conversion optical element, to form a spot on a corresponding recording surface of the recording surfaces, and satisfies the following formula. | 2012-06-28 |
20120163156 | Objective Lens Element - A high-NA and thin objective lens which prevents occurrence of a crack during lens molding and can stably be molded is provided. The present invention is directed to an objective lens having an optical surface having power which is not negative. The objective lens is a single lens and is formed such that a flat portion which is provided at an outer peripheral portion and perpendicular to the optical axis is closer to a disc surface than the position of the top of an exit-side surface of the objective lens and such that the rate of change in sag of the exit-side surface is continuous across the entire region. | 2012-06-28 |
20120163157 | Optical Element and Optical Pickup Device - An optical element which can be shared by three wavelengths for BD, DVD, and CD and which is easily manufactured is provided. An objective lens system includes an optical element | 2012-06-28 |
20120163158 | UV-CURABLE COMPOSITION FOR OPTICAL DISCS AND OPTICAL DISC - A UV-curable composition for optical discs contains a fluorine-containing UV-curable resin having a poly(perfluoroalkylene ether) chain and a UV-curable group. The fluorine-containing UV-curable resin exhibits good compatibility with the composition and satisfactorily localizes in and near a surface of a coating film. Thus, the composition can be used to form an outermost layer of an optical disc such that the droplet size of grease such as that constituting fingerprints adhering to the outermost layer is reduced and scattering of light having a short oscillation wavelength passing through the outermost layer is suppressed. Accordingly, an optical disc on and from which signals can be satisfactorily recorded and read is formed. | 2012-06-28 |
20120163159 | INTERFERENCE RANDOMIZATION FOR UPLINK SIGNALING - A method for transmitting an acknowledgement/negative acknowledgement is described. Cell-specific symbol-level cyclic shift hopping is applied to data single-carrier frequency division multiplexing symbols of the acknowledgement/negative acknowledgement. A discrete Fourier transform is applied to the data single-carrier frequency division multiplexing symbols. Cell-specific symbol-level phase hopping is applied to the data single-carrier frequency division multiplexing symbols. The data single-carrier frequency division multiplexing symbols are transmitted in a slot. | 2012-06-28 |
20120163160 | GROUPING SMALL BURST TRANSMISSIONS FOR DOWNLINK MACHINE-TO-MACHINE COMMUNICATIONS - Briefly, in accordance with one or more embodiments, a mechanism disclosed herein groups transmissions to machine-to-machine (M2M) devices in the downlink which can significantly reduce the overhead of transmission. One or more bursts to be transmitted in the downlink to one or more respective devices are aggregated and concatenated into a concatenated burst comprising one or more sub-bursts corresponding to the one or more bursts. The concatenated burst is encoded as a single payload to be transmitted, and the payload is transmitted to the one or more devices such that the devices are capable of decoding their respective sub-bursts in the concatenated burst. | 2012-06-28 |
20120163161 | SYSTEM AND METHOD FOR MULTI-POINT HSDPA COMMUNICATION UTILIZING A MULTI-LINK RLC SUBLAYER - A method and apparatus for wireless communication may provide a multi-link RLC sublayer in an RNC capable of allocating RLC PDUs among a plurality of MAC entities for use in a Multi-Point HSDPA network. Some aspects of the disclosure address issues relating to out-of-order delivery of the RLC PDUs to a UE, such as unnecessary retransmissions. That is, the disclosed multi-link RLC may be capable of distinguishing between sequence number gaps that are caused by physical layer transmission failures and those caused merely by skew. | 2012-06-28 |
20120163162 | SPLIT MULTI-LINK TRUNKING (SMLT) HOLD-DOWN TIMER FOR INTERNET PROTOCOL (IP) MULTICAST - A method, apparatus and computer program product for providing mulitcast failover and recovery which minimizes lost packets is presented. A first network device returns to a fully active state and starts a multicast hold-down timer. A first message is sent to a second network device, the message indicating at least one Split Multi Link Trunk (SMLT) Virtual Local Area Network (VLAN) Identifier (ID) correlating to the multicast hold-down timer. The first network device receives an acknowledgment of said first message and Layer 2 forwards multicast data traffic to said second network device until the timer expires, whereupon the first device is capable of handling its own multicast data traffic, and then has Layer 2 bridging turned off and enables IP multicast routing. During the period of multicast hold-down timer, the second device will perform IP multicast forwarding on behalf of the first device. | 2012-06-28 |
20120163163 | APPARATUS AND METHOD FOR PROTECTION SWITCHING OF MULTIPLE PROTECTION GROUP - There is provided a protection switching apparatus including: a path management unit to establish a plurality of connection paths for transmitting/receiving packets, and a plurality of protection paths that are able to substitute for the plurality of connection paths, respectively, and to create a protection group including the connection paths and the protection paths; a protection group controller to determine whether failure has occurred on the connection paths, based on path state information for each path included in the protection group, the path state information stored in the protection group table storage, and to issue an instruction for protection switching, according to the result of the determination; and a protection switching unit to perform protection switching of a path in which failure has occurred to a protection path corresponding to the path in which failure has occurred, according to the instruction for protection switching. | 2012-06-28 |
20120163164 | METHOD AND SYSTEM FOR REMOTE LOAD BALANCING IN HIGH-AVAILABILITY NETWORKS - A system is provided for facilitating remote load balancing in a high-availability network. During operation, the system receives a plurality of data frames destined for a destination device, wherein the destination device is coupled to a network via a trunk link, the trunk link coupling the destination device to at least two separate egress switching devices. The system then forwards the data frames via at least two data paths, each of which leads to a respective egress switching device. | 2012-06-28 |
20120163165 | APPARATUS AND METHOD FOR PACKET TRANSPORT SERVICE BASED ON MULTI PROTOCOL LABEL SWITCHING-TRANSPORT PROFILE (MPLS-TP) NETWORK - There is provided a packet processing apparatus for transmitting packets received from a plurality of networks through a Label Switched Path (LSP), the packet processing apparatus including: a packet classifier to classify a received packet to a control packet or a normal packet based on port information included in field information of the received packet, and to decide, if the received packet is a normal packet, a service type for transmitting the normal packet according to whether the normal packet is a reception packet or a transmission packet; and a packet processor to acquire LSP condition information or address information from the field information of the normal packet, and to transmit the received packet and update the header or address information of the received packet, according to the service type decided by the packet classifier, with reference to the LSP condition information or the address information. | 2012-06-28 |
20120163166 | Ethernet Switch Ring (ESR) Protection Method And Transit Node - The present invention discloses an Ethernet Switch Ring (ESR) protection method, for introducing the pre-up state for the transit node, comprising, after the loop failure is recovered, the transit node on the loop will enter the pre-up state if not receiving the loop failure protocol message within the set time; and when the transit node is in the pre-up state and the loop is failed again, i.e., the transit node receives the loop failure protocol message in the pre-up state, the transit node opens the master and slave ports and refreshes the MAC address. Correspondingly, the present invention further discloses an ESR transit node. Since the pre-up state is introduced for the transit node and the transit node controls whether to open the recovered failed port by itself, the unsmooth flow caused by the master node which cannot notify the recovered failed port to open is avoided, and the ring network protection capability and user experience can be improved. | 2012-06-28 |
20120163167 | TRANSMISSION CONTROL PROTOCOL OPTIMIZATION SYSTEMS AND METHODS FOR WIRELESS NETWORKS - The present disclosure provides systems and methods improving Transmission Control Protocol (TCP) network congestion avoidance in wireless networks. Specifically, the present disclosure decouples wired and wireless TCP connections at a wireless access point, thin access point, wireless switch, etc. The wired TCP session is terminated on the wireless access device and a wireless TCP session is automatically started for the last hop to a mobile unit. Advantageously, the wireless TCP session may utilize a congestion avoidance algorithm optimized for wireless network. Furthermore, wireless local area network (WLAN) information may be tied to the TCP stack for improved performed, e.g. an IEEE 802.11 Acknowledgement (ACK) may be considered as equivalent to a TCP ACK from the mobile unit. By splitting a TCP downstream connection into two—wireless and wired, high-jitter, high-loss wireless hops may be hidden from the remote host's TCP socket. | 2012-06-28 |
20120163168 | MOBILE COMMUNICATION SYSTEM FOR DISTRIBUTED LOAD CONTROL AND DISTRIBUTED LOAD CONTROL METHOD FOR USE IN THE SAME - A base station determines whether the base station is in an overload state on the basis of an available resource of the base station and a load state of a mobility management entity (MME), and transmits the call setup request to MME if the base station is determined to be in a non-overload state. MME determines whether MME is in the overload state on the basis of an available resource of MME and a load state of a gateway according to the call setup request transmitted from the base station, and transmits the call setup request to the gateway if MME is determined to be in the non-overload state. The gateway determines whether the gateway is in the overload state according to the call setup request transmitted from MME, and performs a call setup procedure if the gateway is determined to be in the non-overload state. | 2012-06-28 |
20120163169 | OVERLOAD CONTROL APPARATUS AND METHOD FOR MACHINE TYPE COMMUNICATION SERVICE AND WIRELESS COMMUNICATION SYSTEM PROVIDING MACHINE TYPE COMMUNICATION SERVICE - Provided are an overload control apparatus and method for a machine type communication (MTC) service. The overload control method includes, when an overload state has occurred, including an overload indicator (OI) in a MAC subheader in a random access response to be transmitted to a terminal and transmitting the random access response, before an MTC device wanting to perform a random access procedure transmits a random access preamble to the base station, searching for a random access response transmitted from the base station, when the transmitted random access response is searched for, peeking at the random access response and receiving it, and when it is determined that an OI is included in the random access response, waiting, at the MTC device, for a predetermined delay time and transmitting the random access preamble for performing the random access procedure to the base station. | 2012-06-28 |
20120163170 | ENHANCED MULTIPLEXING FOR SINGLE RLC ENTITY - A method and apparatus for interrupting the lower priority packet transmission/reception for higher priority packer transmission reception within the context of a common RLC entity is provided herein. The transmission/reception of lower priority data blocks containing data segments of a first higher layer packet is interrupted to transmit/receive higher priority data blocks containing data segments of a second higher layer packet. After the transmission/reception of a final segment of the second higher layer packet, the transmission/reception of the first higher layer packet is resumed. In some embodiments, a final segment of the second higher layer packet is encapsulated in a final higher priority data block with a remaining data segment of the first higher layer packet. The final higher priority data block further includes a transition indicator to indicate a transition from the second higher layer packet back to the first higher layer packet. | 2012-06-28 |
20120163171 | ROUTING METHOD AND APPARATUS FOR SUPPORTING QoS IN WIRELESS NETWORK - A method for routing and setting up a connection to provide Quality of Service (QoS) required in a wireless network is provided, which allows to use a path capable of providing QoS higher than a certain level between a source node and a destination node. A routing apparatus includes: a connection management unit that receives a connection setup request directed to a destination node, determines a predicted path leading to the destination node and the next node, and transmits a connection setup request to the next node; a resource allocation unit that allocates resources so as to satisfy required QoS; a routing unit that measures available QoS information of a link and enables the exchange of information of the link including the QoS information with the nodes of the network; and a routing information management unit that stores received routing information. | 2012-06-28 |
20120163172 | TRANSMITTING APPARATUS, TRANSMITTING METHOD, AND PROGRAM - A transmitting apparatus includes a rate adjusting unit, a changing unit, a buffer control unit, and a transmitting unit. The rate adjusting unit adjusts a transmission rate of transmitting data. The changing unit changes a size of a buffer for temporarily storing the data, on the basis of the transmission rate. The buffer control unit configured to cause the buffer to temporarily store the data, which is smaller than or equal to an addable size that is smaller than the size of the buffer, and to output the data to the transmitting unit. The transmitting unit transmits the data output from the buffer. | 2012-06-28 |
20120163173 | APPARATUS AND METHOD FOR SCHEDULER IMPLEMENTATION FOR BEST EFFORT (BE) PRIORITIZATION AND ANTI-STARVATION - In various embodiments, a method, computer-readable storage medium, and apparatus for scheduling prioritized best effort (BE) service flows through a wireless network base station includes a controller coupled to a memory. If any one of a plurality of BE service flows are congested, a minimum reserved traffic rate (MRTR) algorithm is used by the controller to ensure that at least a highest priority BE service flow is maintained at least at an associated MRTR. If none of the plurality of BE service flows are congested, a maximum sustained traffic rate (MSTR) algorithm is used by the controller to enable the highest priority BE service flow to be set to at least at an associated MSTR before lower priority service flows are increased. If none of the plurality of BE service flows are congested and each service flow is at their associated MSTR, the controller is configured to distribute any excess bandwidth to each service flow in accordance with an initial set of priority BE traffic flow ratios. | 2012-06-28 |
20120163174 | METHODS AND APPARATUS TO REDUCE FORWARDING STATE ON AN FCOE-TO-FC GATEWAY USING PORT-SPECIFIC MAC ADDRESSES - In one embodiment, an apparatus includes an initialization module configured to receive a Fibre Channel over Ethernet Initialization Protocol (FIP) login request from a network device. The initialization module is configured to select an outbound port based at least in part on a load-balancing calculation. The initialization module is configured to define a destination Media Access Control (MAC) address. The initialization module is configured to associate the destination MAC address with the outbound port. The initialization module is configured to send, to the network device, a signal including the destination MAC address in response to the FIP login request. | 2012-06-28 |
20120163175 | INGRESS RATE LIMITING - A network device monitors the traffic of individual flows through one of its ingress ports and, if the traffic volume exceeds a predetermined threshold, signals for a reduction in data traffic volume transmitted to that ingress port from one or more source devices. Example signals may include without limitation a unicast congestion message sent to the source of a flow, an Explicit Congestion Notification to one or more source devices, and the dropping of packets by the receiving device. In response to such signals, one or more of the source devices decrease the transmission rate of data traffic to the receiving device. | 2012-06-28 |
20120163176 | NETWORK RELAY SYSTEM, NETWORK RELAY DEVICE, AND CONGESTED STATE NOTIFYING METHOD - A network relay device includes a plurality of ports which input and output data packets, a storage in which a destination to which an input data packet is to be transferred and identification information of a port that outputs the input data packet are associated with each other for each of the plurality of ports, and a transmitter which obtains from the storage a destination associated with a port to which a data packet responsible for a congested state of traffic is input out of the plurality of ports, and which transmits a notification of congestion to the obtained destination. | 2012-06-28 |
20120163177 | LOAD MANAGEMENT IN WIRELESS MESH COMMUNICATIONS NETWORKS - Methods and systems for providing a network and routing protocol for utility services are disclosed. A method includes discovering a utility network. Neighboring nodes are discovered and the node listens for advertised routes for networks from the neighbors. The node is then registered with one or more utility networks, receiving a unique address for each network registration. Each upstream node can independently make forwarding decisions on both upstream and downstream packets, i.e., choose the next hop according to the best information available to it. The node can sense transient link problems, outage problems and traffic characteristics. Information is used to find the best route out of and within each network. Each network node maintains multi-egress, multi-ingress network routing options both for itself and the node(s) associated with it. The node is capable of several route maintenance functions utilizing the basic routing protocol and algorithms. | 2012-06-28 |
20120163178 | Multiple-Algorithm Congestion Management - Methods and devices performing management of traffic on a single network device using plural congestion avoidance algorithms are provided. A traffic management method includes (i) separating an incoming traffic in sub-streams of traffic based on at least one characteristic, (ii) managing virtual queues corresponding to the sub-streams of traffic, using congestion avoidance algorithms configured to each operate on one sub-stream of traffic to avoid congestion within a capacity allocated to the one of the at least two sub-streams of traffic, and (iii) dynamically reallocating a total capacity of traffic through the single network device to the virtual queues, a capacity reallocated to a virtual queue depending on a proportion of the incoming traffic, historical or current, in a sub-streams of traffic to which the virtual queue corresponds. | 2012-06-28 |
20120163179 | METHOD FOR PROCESSING TRAFFIC IN UNUSED BAND IN AN INTERMEDIATE ACCESS POINT - A method for efficiently processing traffic in an intermediate access point such as a relay station is disclosed. To process traffic directed from one or more terminals to a base station, an intermediate access point supporting two or more communication scheme receives traffic from the one or more terminals according to a first communication scheme, measures a congestion level of the received traffic, transmits a first traffic being part of the received traffic to a second intermediate access point according to a second communication scheme, if the congestion level is equal to or higher than a predetermined threshold, and transmits a second traffic being remaining traffic of the received traffic except the first traffic to the BS. | 2012-06-28 |
20120163180 | Systems and Methods for Policy Based Routing for Multiple Hops - The present application is directed towards policy based routing for intelligent traffic management via multiple next hops. In some embodiments, the systems and methods disclosed herein may provide management of inbound and outbound traffic across multiple network links, and may further provide reliability in case of link failure, and provide balancing of traffic, responsive to the latency and bandwidth requirements of various applications. Accordingly, these systems and methods may provide intelligent policy-based routing and network and port address translation, sensitive to application traffic types, protocols, source IP addresses and ports, destination IP addresses and ports, or any combination thereof, and can balance traffic loads among multiple available paths based on multiple traffic characteristics. The routing may performed on a packet-by-packet basis, a transaction-by-transaction basis, or a session-by-session basis, and the systems and methods may include capabilities for application-aware health monitoring of available network paths. | 2012-06-28 |
20120163181 | Enabling Coexistence of High-Density and Low-Density Transmissions - Embodiments may comprise logic such as hardware and/or code to enable coexistence of high-density and low-density transmissions with a modified CSMA protocol. Embodiments include a self-CTS (self clear to send) packet transmission prior to transmission of a ready to send (RTS) signal when initiating a high density transmission amidst legacy devices. In many embodiments, the self-CTS or the RTS includes a network allocation vector (NAV) having a value for the duration of the transmission. In some embodiments, the self-CTS may include a flag or bit to indicate the Shading Transmission Starts (STS). | 2012-06-28 |
20120163182 | DETECTION OF UNAUTHORIZED CHANGES TO AN ADDRESS RESOLUTION PROTOCOL CACHE IN A COMMUNICATION NETWORK - A method and apparatus for detecting an unauthorized change in an Address Resolution Protocol (ARP) cache in a communication network includes a step of establishing an authorized ARP cache. Another step includes examining packets from a terminal for a destination address. Another step includes determining if the destination address is incorrect by using the authorized ARP cache. | 2012-06-28 |