24th week of 2011 patent applcation highlights part 50 |
Patent application number | Title | Published |
20110143417 | Stably Tethered Structures of Defined Compositions with Multiple Functions or Binding Specificities - The present invention concerns methods and compositions for stably tethered structures of defined compositions with multiple functionalities and/or binding specificities. Particular embodiments concern stably tethered structures comprising a homodimer of a first monomer, comprising a dimerization and docking domain attached to a first precursor, and a second monomer comprising an anchoring domain attached to a second precursor. The first and second precursors may be virtually any molecule or structure, such as antibodies, antibody fragments, antibody analogs or mimetics, aptamers, binding peptides, fragments of binding proteins, known ligands for proteins or other molecules, enzymes, detectable labels or tags, therapeutic agents, toxins, pharmaceuticals, cytokines, interleukins, interferons, radioisotopes, proteins, peptides, peptide mimetics, polynucleotides, RNAi, oligosaccharides, natural or synthetic polymeric substances, nanoparticles, quantum dots, organic or inorganic compounds, etc. The disclosed methods and compositions provide a simple, easy to purify way to obtain any binary compound attached to any monomeric compound, or any trinary compound. | 2011-06-16 |
20110143418 | COMPOSITIONS AND METHODS RELATING TO ORTHOGONAL MRNA PAIRS - Orthogonal ribosome orthogonal mRNA pairs are provided, as are methods for their selection involving a novel positive-negative selection approach, and methods for their use. Also provided are cellular logic circuits involving orthogonal ribosomes. | 2011-06-16 |
20110143419 | Utilization of Pharmacological Chaperones to Improve Manufacturing and Purification of Biologics - The present invention provides methods for improving the production of recombinant proteins through the use of pharmacological chaperones for the recombinant proteins. As exemplified by the present invention, the binding of a pharmacological chaperone to a recombinant protein expressed by a cell can stabilize the protein and increase export of the protein out of the cell's endoplasmic reticulum, and increase secretion of the protein by the cell. | 2011-06-16 |
20110143420 | Kit for single oxygen atom incorporation into digested peptides - Optimized enzymatic conditions incorporate a single oxygen atom into digested peptides using a peptidase. The incorporation of a single oxygen atom is especially useful for proteolytic | 2011-06-16 |
20110143421 | NOVEL PROTEASE AND USE THEREOF - A novel protease comprising any one of
| 2011-06-16 |
20110143422 | RECOVERY OF RECOMBINANT HUMAN PARAINFLUENZA VIRUS TYPE 2 (HYPIV2) FROM CDNA AND USE OF RECOMBINANT HPIV2 IN IMMUNOGENIC COMPOSITIONS AND AS VECTORS TO ELICIT IMMUNE RESPONSES AGAINST PIV AND OTHER HUMAN PATHOGENS - Recombinant human parainfluenza virus type 2 (HPIV2) viruses and related immunogenic compositions and methods are provided. The recombinant HPIV2 viruses, including HPIV2 chimeric and chimeric vector viruses, provided according to the invention are infectious and attenuated in permissive mammalian subjects, including humans, and are useful in immunogenic compositions for eliciting an immune responses against one or more PIVs, against one or more non-PIV pathogens, or against a PIV and a non-PIV pathogen. Also provided are isolated polynucleotide molecules and vectors incorporating a recombinant HPIV2 genome or antigenome. | 2011-06-16 |
20110143423 | Viral vectors whose replication and, optionally, passenger gene are controlled by a gene switch activated by heat in the presence or absence of a small-molecule regulator - The present invention relates to conditionally replicating viruses or pairs of viruses containing a gene switch that is activatable by transient heat or other proteotoxic stress in the presence or absence of a small molecule regulator. The gene switch controls the expression of a gene for a protein required for efficient viral replication and may also control the activity of a passenger gene. | 2011-06-16 |
20110143424 | RECOMBINANT INFLUENZA VIRUSES FOR VACCINES AND GENE THERAPY - The invention provides compositions and methods useful to prepare segmented, negative strand RNA viruses, e.g., orthomyxoviruses such as influenza A viruses, entirely from cloned cDNAs and in the absence of helper virus. | 2011-06-16 |
20110143425 | TISSUE-DERIVED BIOMATERIAL CARRIER DEVICE - Disclosed is a tissue-derived biomaterial carrier device ( | 2011-06-16 |
20110143426 | DEVICE AND PROCESS TO GENERATE CO2 USED FOR INDOOR CROP PRODUCTION AND UNDERWATER GARDENING - A process and device used to produce CO | 2011-06-16 |
20110143427 | HIGH-THROUGHPUT METHODS AND SYSTEMS FOR PROCESSING BIOLOGICAL MATERIALS - A high-throughput system for processing biological material that comprises: a tray that supports a functionally-closed fluid path subsystem comprising, a vessel for containing and enabling the biological material to separate into two or more distinct submaterials; one or more receptacles to receive one or more of the submaterials from the vessel; a filtration device; a conduit through which one or more submaterials are transported between at least the vessel and the filtration device; and a first engagement structure; a processing unit comprising, a pumping device for moving one or more of the submaterials between at least the vessel and the filtration device via the conduit; a second engagement structure corresponding to the first engagement structure; a locking mechanism for at least temporarily holding the tray in a fixed position relative to the processing unit; a control device that automatically starts and stops the pumping device in response to one or more commands. | 2011-06-16 |
20110143428 | ANTI-VEGF-C ANTIBODIES AND METHODS USING SAME - The invention provides VEGF-C antagonists, such as anti-VEGF-C antibodies, and their use in the prevention and treatment of tumor progression. | 2011-06-16 |
20110143429 | TISSUE ENGINEERED BLOOD VESSELS - Compositions and methods of using tissue engineered blood vessels to repair and regenerate blood vessels of patients with vascular disease are disclosed. | 2011-06-16 |
20110143430 | HEMATOPOIETIC STEM CELL IDENTIFICATION AND ISOLATION - The present invention relates to methods of identifying, collecting and isolating hematopoietic stem cells (HSCs) and compositions of purified HSCs. Specifically, the present invention provides methods of isolating and purifying CD150 | 2011-06-16 |
20110143431 | Method Of Preparing An Undifferentiated Cell - Disclosed is a method of preparing an undifferentiated cell. The method includes contacting a more committed cell with an agent that causes the more committed cell to retrodifferentiate into an undifferentiated cell. | 2011-06-16 |
20110143432 | USE OF EXTRACT OF SELENIUM-ENRICHED YEAST (SE-YE) IN MAMMALIAN CELL CULTURE MEDIA FORMULATIONS - The invention relates to the use of extract of selenium-enriched yeast (Se-YE) as a supplement to the serum-free cell culture media formulations. The cell culture media comprising this supplement are particularly suitable for cultivating mammalian cells and for production of recombinant proteins and monoclonal antibodies. | 2011-06-16 |
20110143433 | Microcarriers for Stem Cell Culture - We disclose a particle comprising a matrix coated thereon and having a positive charge, the particle being of a size to allow aggregation of primate or human stem cells attached thereto. The particle may comprise a substantially elongate, cylindrical or rod shaped particle having a longest dimension of between 50 μm and 400 μm, such as about 200 μm. It may have a cross sectional dimension of between 20 μm and 30 μm. The particle may comprise a substantially compact or spherical shaped particle having a size of between about 20 μm and about 120 μm, for example about 65 μm. We also disclose a method of propagating primate or human stem cells, the method comprising: providing first and second primate or human stem cells attached to first and second respective particles, allowing the first primate or human stem cell to contact the second primate or human stem cell to form an aggregate of cells and culturing the aggregate to propagate the primate or human stem cells for at least one passage. A method of propagating human embryonic stem cells (hESCs) in long term suspension culture using microcarriers coated in Matrigel or hyaluronic acid is also disclosed. We also disclose a method for differentiating stem cells. | 2011-06-16 |
20110143434 | DIBLOCK COPOLYMERS AND POLYNUCLEOTIDE COMPLEXES THEREOF FOR DELIVERY INTO CELLS - Described herein are copolymers, and methods of making and utilizing such copolymers. Such copolymers have at least two blocks: a first block that has at least one unit that is hydrophilic at physiologic pH, and a second block that has hydrophobic groups. This second block further has at least one unit with a group that is anionic at about physiologic pH. The described copolymers are disruptive of a cellular membrane, including an extracellular membrane, an intracellular membrane, a vesicle, an organelle, an endosome, a liposome, or a red blood cell. Preferably, in certain instances, the copolymer disrupts the membrane and enters the intracellular environment. In specific examples, the copolymer is endosomolytic. | 2011-06-16 |
20110143435 | POLYMERIC CARRIER - Provided herein are polymeric carriers suitable for the delivery of polynucleotides (e.g. oligonucleotides) and/or other therapeutic agents into a living cell. | 2011-06-16 |
20110143436 | COMPOSITIONS AND METHODS FOR REPROGRAMMING EUKARYOTIC CELLS - The present invention relates to methods for changing the state of differentiation of a eukaryotic cell, the methods comprising introducing mRNA encoding one or more reprogramming factors into a cell and maintaining the cell under conditions wherein the cell is viable and the mRNA that is introduced into the cell is expressed in sufficient amount and for sufficient time to generate a cell that exhibits a changed state of differentiation compared to the cell into which the mRNA was introduced, and compositions therefor. For example, the present invention provides mRNA molecules and methods for their use to reprogram human somatic cells into pluripotent stem cells. | 2011-06-16 |
20110143437 | METHOD FOR USING DIRECTING CELLS FOR SPECIFIC STEM/PROGENITOR CELL ACTIVATION AND DIFFERENTIATION - A method is provided, including obtaining a population of antigen-presenting cells, enriching a population of stem/progenitor cells within a larger population of cells, activating the population of antigen-presenting cells and, following the activating, inducing at least one process selected from the group consisting of: differentiation, expansion, activation, secretion of a molecule, and expression of a marker, by exposing the enriched stem/progenitor cell population to the population of antigen-presenting cells. Other applications are also described. | 2011-06-16 |
20110143438 | Process for Decellularizing Soft-Tissue Engineered Medical Implants, and Decellularized Soft-Tissue Medical Implants Produced - The invention provides methodologies and apparatus for producing a cellular soft-tissue implants, both in small quantities and in commercializable quantities. Such soft-tissue implants include vascular graft substitutes. An acellular graft is produced by subjecting the tissue sample to an induced pressure mediated flow of an extracting solution, followed by inducing a pressure mediated flow of a treating solution, then washing the treated tissue to produce the acellular graft. The acellular grafts produced are uniform and nonimmunogenic. | 2011-06-16 |
20110143439 | METHOD FOR MANUFACTURING CELL CULTURE SUBSTRATE - A main object of the invention is to provide a new method for producing a cell culture substrate used to cause cells to adhere in a highly precise form onto a base material and then culture the cells. | 2011-06-16 |
20110143440 | Mutations caused by activation-induced cytidine deaminase - Methods for causing mutations in genes expressed in eukaryotic cells are provided. The methods involve expressing an activation-induced cytidine deaminase (AID) in the cells. The mutated genes can be any gene that is operably linked to a promoter, where the gene is within about 2 kilobases of the promoter. Examples include antibody genes. Also provided are cells expressing AID. The cells can be from any eukaryote, and include hybridoma cells and myeloma fusion partners. | 2011-06-16 |
20110143441 | Methods of Reprogramming Animal Somatic Cells - This invention generally relates to methods to obtain mammalian cells and tissues with patterns of gene expression similar to that of a developing mammalian embryo or fetus, and the use of such cells and tissues in the treatment of human disease and age-related conditions. More particularly, the invention relates to methods for identifying, expanding in culture, and formulating mammalian pluripotent stem cells and differentiated cells that differ from cells in the adult human in their pattern of gene expression, and therefore offer unique characteristics that provide novel therapeutic strategies in the treatment of degenerative disease. | 2011-06-16 |
20110143442 | METHOD FOR DETECTING THE PRESENCE OR ABSENCE OF A CHEMICAL SUBSTANCE IN A LIQUID MEDIUM - The invention pertains to a method for determining the presence or absence of at least one chemical substance in a liquid medium, comprising a contacting step of said liquid medium with a device comprising at least one substrate coated, in whole or in part on at least one of its sides, with at least one layer comprising material able to be degraded fully or partly by said chemical substance, said material being chosen from among metals, metal alloys, metal oxides. | 2011-06-16 |
20110143443 | Isolsted Monoclonal - Associated Protein Tau and Kit - A monoclonal antibody which forms an immunological complex with a phosphorylated epitope of an antigen belonging to human abnormally phosphorylated tau proteine. The tau protein can be obtained from a brain homogenate, itself isolated from the cerebral cortex of a patient having Alzheimer's disease. | 2011-06-16 |
20110143444 | METHOD OF EVALUATING FEMALE GENITAL CANCER - According to the method of evaluating female genital cancer of the present invention, amino acid concentration data on concentration values of amino acids in blood collected from a subject to be evaluated is measured, and the state of female genital cancer including at least one of cervical cancer, endometrial cancer, and ovarian cancer in the subject is evaluated based on the concentration value of at least one of Thr, Ser, Asn, Gln, Pro, Gly, Ala, Cit, Val, Met, Ile, Leu, Tyr, Phe, His, Trp, Orn, Lys, and Arg contained in the measured amino acid concentration data of the subject. | 2011-06-16 |
20110143445 | Analysis of Amino Acids And Amine-Containing Compounds Using Tagging Reagents and LC-MS Workflow - A plurality of mass differential tagging reagents is used to label amine functionality in amine-containing compounds. The labeled analytes have distinct retention times on a reversed phase column, and distinct masses. Under high energy collision, reporter groups can be generated and the intensity or the peak area detected for each reporter group can be used for quantitation. One exemplary set of reagents includes a set of three different mass differential reagents comprising tagging weights of 140 atomic mass units, 144 atomic mass units, and 148 atomic mass units, respectively, with reporter groups of 113, 117, and 121 atomic mass units, respectively. A package including each of the mass differential reagents is also provided and can include separate respective containers, for example, one for each of the different reagents. The package can also include one or more standards each comprising a respective known concentration of a respective known amine-containing compound. | 2011-06-16 |
20110143446 | Axial Illumination for Capillary Electrophoresis - System and method for fluorescent light excitation and detection from samples to enhance the numerical aperture and/or reduce the cross-talk of the fluorescent light. | 2011-06-16 |
20110143447 | DIFFERENTIAL RESONATORS FOR NO2 DETECTION AND METHODS RELATED THERETO - A nitrogen dioxide sensor comprising a first beam having a first functionalized sensing surface capable of sensing nitrogen dioxide, the first beam capable of producing a first resonant frequency; and a second beam having a second functionalized reference surface not capable of sensing nitrogen dioxide, the second beam capable of producing a second resonant frequency, wherein differential sensing of nitrogen dioxide may be performed, further wherein the first beam and the second beam are each functionalized with one or more soft bases having comparable viscoelastic properties is provided. In one embodiment, the sensor is a nano-sensor capable of low drift and accurate detection of nitrogen dioxide levels at the zeptogram level. Methods of making and using a nitrogen dioxide sensor are also provided. | 2011-06-16 |
20110143448 | SO2 DETECTION USING DIFFERENTIAL NANO-RESONATORS AND METHODS RELATED THERETO - A sulfur dioxide sensor comprising a first beam having a functionalized sensing surface capable of sensing sulfur dioxide, the first beam capable of producing a first resonant frequency; and a second beam having a functionalized reference surface not capable of sensing sulfur dioxide, the second beam capable of producing a second resonant frequency, wherein differential sensing of sulfur dioxide may be performed, further wherein the first beam is functionalized with a liquid phase of a first polymeric compound and the second beam is functionalized with a liquid phase of a second polymeric compound is provided. In one embodiment, the sensor is a nano-sensor capable of low drift accurately detecting sulfur dioxide levels at the zeptograms level. Methods of making and using a sulfur dioxide sensor are also provided. | 2011-06-16 |
20110143449 | APPARATUS, SYSTEM, AND METHOD FOR CATALYST PRESENCE DETECTION - A system to detect the presence of a catalyst includes an exhaust gas tube, a first temperature sensing device, a second temperature sensing device, a flow rate measurement device, and a processing device. The first temperature sensing device measures a first temperature of exhaust gas upstream of the exhaust gas tube. The second temperature sensing device measures a second temperature of the exhaust gas downstream of the exhaust gas tube. The processing device estimates an expected time delay between the measured inlet and outlet exhaust gas temperatures corresponding to a system with a catalyst present. The processing device may also determine the presence of a catalyst by comparing the measured second temperature to the measured first temperature and comparing the measured second temperature to an estimated delayed first temperature associated with the expected time delay. | 2011-06-16 |
20110143450 | DETECTION DEVICE - The present invention provides devices, in particular lateral flow devices, for detecting a target analyte on a surface, in which the elements of collection and detection are integrated. The present invention also provides methods of use thereof | 2011-06-16 |
20110143451 | Method of Operating a Reagent Ion Source - A method is disclosed for operating a chemical ionization-type (CI-type) source to generate reagent ions for mass spectrometry experiments, such as electron transfer dissociation (ETD) reagent ions. The method includes periodically reversing current flow in the thermionic filament employed to produce the electron stream. Periodic reversal of the filament current avoids or reduces the problem of carbonaceous growth formation associated with prior art reagent ion sources. | 2011-06-16 |
20110143452 | CRYOGENIC VIAL - Provided is a cryogenic vial for storing at least one sample, the vial including a pipette, a cap assembly, and a container having at least one opening in a body portion of the container to allow liquid and/or gas to enter and/or exit the vial to balance the pressure between the inside of vial and the outside environment. The cryogenic vial allows for reduced processing time and minimizes the chance a sample may be lost or damaged while being processed. | 2011-06-16 |
20110143453 | ALBUMIN-BOUND PROTEIN/PEPTIDE COMPLEX AS A BIOMARKER FOR DISEASE - Methods and kits for diagnosis and prognosis using biomarkers comprising albumin-bound protein/peptide complex (ABPPC). | 2011-06-16 |
20110143454 | METHOD FOR DETECTION OF SPECIFIC IMMUNOGLOBULIN CLASS G ANTIBODIES - The invention relates to a method for determining an analyte in a sample by means of an assay that can be carried out in a one-step format without performing washing steps. The method includes a first analyte-specific receptor that contains at least one bonding point for the analyte, e.g., several antibodies on a particle, as well as a second analyte-specific receptor that can selectively bond to an arrangement comprising at least two analyte molecules which are bound to the first receptor. An antibody sandwich immune assay is described in which the detection is based on electrochemiluminescence. | 2011-06-16 |
20110143455 | NOVEL METHODS FOR THE ASSAY OF TROPONIN I AND T AND COMPLEXES OF TROPONIN I AND T AND SELECTION OF ANTIBODIES FOR USE IN IMMUNOASSAYS - Assay systems and specialized antibodies for the detection and quantitation of troponin I and troponin T in body fluids as an indicator of myocardial infarction. Since troponin I and T exist in various conformations in the blood, the ratios of the monomeric troponin I an T and the binary and ternary complexes, as well as which form of troponin present in the blood, may be related to the metabolic state of the heart. Disclosed is a system to determine the presence of a troponin form or a group of troponin forms in a sample of whole blood, serum or plasma. | 2011-06-16 |
20110143456 | METHOD FOR THE EARLY DETECTION OF RENAL INJURY - A method and kit for detecting the immediate or early onset of renal disease and injury, including renal tubular cell injury, utilizing NGAL as an immediate or early on-set biomarker in a sample of blood serum. NGAL is a small secreted polypeptide that is protease resistant and consequently readily detected in the blood serum following renal tubule cell injury. NGAL protein expression is detected predominantly in proximal tubule cells, in a punctuate cytoplasmic distribution reminiscent of a secreted protein. The appearance NGAL in the serum is related to the dose and duration of renal ischemia and nephrotoxemia, and is diagnostic of renal tubule cell injury and renal failure. NGAL detection is also a useful marker for monitoring the nephrotoxic side effects of drugs or other therapeutic agents. | 2011-06-16 |
20110143457 | CYSTATIN C ADSORPTION INHIBITOR - Disclosed is a method by which the adsorption of cystatin C to a container can be inhibited in a simple manner to improve the accuracy of the measurement of cystatin C. Provided are: a cystatin C adsorption inhibitor comprising a non-ionic surfactant; a cystatin C measurement reagent comprising the adsorption inhibitor; and a cystatin C measurement kit. Also provided is a method of inhibiting the adsorption of cystatin C, the method comprising bringing a cystatin C-containing sample into contact with a measurement instrument in the presence of a non-ionic surfactant. The aforementioned non-ionic surfactant is preferably a polyoxyethylene-type surfactant. Alternatively, the aforementioned non-ionic surfactant has preferably a phenoxy structure, more preferably a benzylphenoxy structure. | 2011-06-16 |
20110143458 | TEST DEVICE FOR MEMBRANE ASSAY COMPRISING REFERENCE DISPLAY SECTION - A test device provided with a reference display section that rapidly and clearly indicates proper test completion with improved accuracy and stability is provided. Such test device is a test device for membrane assay using a specific binding reaction of a substance to be detected with a capture reagent immobilized on a membrane carrier and a reagent labeled with a labeling substance, which comprises a reference display section for indicating proper test completion on which a cationic polymer for capturing a labeled reagent has been immobilized. | 2011-06-16 |
20110143459 | SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A semiconductor substrate includes a wafer including an element area and a non-element area delineating the element area, a first layered structure situated in the element area, a first insulating film covering the first layered structure, and exhibiting a first etching rate with respect to an etching recipe, a second insulating film covering the first layered structure covered by the first insulating film in the element area, and exhibiting a second etching rate with respect to the etching recipe, the second etching rate being greater than the first etching rate, and a second layered structure situated in the non-element area, wherein the second layered structure includes at least a portion of the first layered structure. | 2011-06-16 |
20110143460 | METHOD OF MANUFACTURING MAGNETORESISTANCE ELEMENT AND STORAGE MEDIUM USED IN THE MANUFACTURING METHOD - An embodiment of the invention provides a method of manufacturing a magnetoresistance element with an MR ratio higher than that of the related art. | 2011-06-16 |
20110143461 | IN VACUUM OPTICAL WAFER HEATER FOR CRYOGENIC PROCESSING - A vacuum assembly used for warming processed substrates above the dew point to prevent unwanted moisture on the processed substrate surfaces as well as reducing negative impact on manufacturing throughput. The vacuum assembly includes a processing chamber, a substrate handling robot, and a heater which may be an optical heater. The processing chamber is configured to cryogenically process one or more substrates. The transfer chamber is connected to the processing chamber and houses the substrate handling robot. The substrate handling robot is configured to displace one or more substrates from the processing chamber to the transfer chamber. The heater is connected to the transfer chamber above the substrate handling robot such that the heater emits energy incident on the substrate when the substrate handling robot displaces the substrate in the transfer chamber. | 2011-06-16 |
20110143462 | ADJUSTING SUBSTRATE TEMPERATURE TO IMPROVE CD UNIFORMITY - A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for. | 2011-06-16 |
20110143463 | VAPOR DEPOSITION METHOD AND VAPOR DEPOSITION APPARATUS - According to one embodiment, a vapor deposition method is disclosed for forming a nitride semiconductor layer on a substrate by supplying a group III source-material gas and a group V source-material gas. The method can deposit a first semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of not less than 10 atomic percent by supplying the group III source-material gas from a first outlet and by supplying the group V source-material gas from a second outlet. The method can deposit a second semiconductor layer including a nitride semiconductor having a compositional proportion of Al in group III elements of less than 10 atomic percent by mixing the group III and group V source-material gases and supplying the mixed group III and group V source-material gases from at least one of the first outlet and the second outlet. | 2011-06-16 |
20110143464 | Methods and Apparatus for Control of Hydrothermal Nanowire Synthesis - In exemplary implementations of this invention, hydrothermal synthesis of zinc oxide nanowires is morphologically controlled. Metal complex ions are used to suppress growth in a face-selective manner, by electrostatic crystal growth inhibition. This permits the aspect ratio (height/diameter) of the nanowires to be dynamically tuned over a wide range, from needle-like nanowires that are efficient field emitters to flattened nanowires with a platelet-like shape. The nanowire synthesis is all inorganic and occurs at low temperatures (e.g., <=60° C.). The growth inhibition may be predictively modeled, using speciation plots and treating non-zinc complex ions as ligands. Microfluidic channels may be used for the synthesis, with different solutions flowing down different channels, permitting nanowires with different properties to be synthesized in parallel. This invention may be used to produce field emission devices and nanowire-embedded AC electroluminescent devices, and for in-situ fabrication of spatially complex integrated devices in a polymeric microfluidic system. | 2011-06-16 |
20110143465 | Method for Forming a Pixel of an Electroluminescence Device having Storage Capacitors - A method for forming a pixel of an electroluminescence device includes providing a substrate; defining at least a first area for capacitors and a second area for a transistor on the substrate; forming a first conductive layer over the first area; forming a first dielectric layer over the first conductive layer; forming a second conductive layer over the first dielectric layer; forming a second dielectric layer over the second conductive layer; forming a third conductive layer over the second dielectric layer; forming a layer of capping silicon nitride between the second dielectric layer and the third conductive layer; forming a semiconductor layer over the second area; forming a gate oxide layer over the second area; and forming a fourth conductive layer over the gate oxide layer. | 2011-06-16 |
20110143466 | METHOD OF FORMING VERTICAL STRUCTURE LIGHT EMITTING DIODE WITH HEAT EXHAUSTION STRUCTURE - The present invention is to provide a method of forming a vertical structure light emitting diode with a heat exhaustion structure. The method includes steps of: a) providing a sapphire substrate; b) depositing a number of protrusions on the sapphire substrate, each of which has a height of p; c) forming a buffer layer having a number of recesses, each of which has a depth of q smaller than p so that when the protrusions are accommodated within the recesses of the buffer layer, a number of gaps are formed therebetween for heat exhaustion; d) growing a number of luminescent layers on the buffer layer, having a medium layer formed between the luminescent layers and the buffer layer; e) etching through the luminescent layers and the buffer layer to form a duct for heat exhaustion; f) removing the sapphire substrate and the protrusions by excimer laser lift-off (LLO); g) roughening the medium layer; and h) depositing electrodes on the roughened medium layer. | 2011-06-16 |
20110143467 | METHOD FOR FABRICATING INGAAIN LIGHT EMITTING DEVICE ON A COMBINED SUBSTRATE - One embodiment of the present invention provides a method for fabricating an InGaAlN light-emitting semiconductor structure. During the fabrication process, at least one single-crystal sacrificial layer is deposited on the surface of a base substrate to form a combined substrate, wherein the single-crystal sacrificial layer is lattice-matched with InGaAlN, and wherein the single crystal layer forms a sacrificial layer. Next, the InGaAlN light-emitting semiconductor structure is fabricated on the combined substrate. The InGaAlN structure fabricated on the combined substrate is then transferred to a support substrate, thereby facilitating a vertical electrode configuration. Transferring the InGaAlN structure involves etching the single-crystal sacrificial layer with a chemical etchant. Furthermore, the InGaAlN and the base substrate are resistant to the chemical etchant. The base substrate can be reused after the InGaAlN structure is transferred. | 2011-06-16 |
20110143468 | FABRICATING METHODS OF REFLECTIVE LIQUID CRYSTAL DISPLAY AND TOP-EMITTING OLED DISPLAY - Methods for forming a top-emitting organic light emitting display and a reflective type liquid crystal display are provided. The method for forming a top-emitting organic light emitting display comprises: providing a handling substrate; providing a composite layer on the handling substrate; forming an organic light emitting unit on the composite layer; and forming a top electrode on the organic light emitting unit. | 2011-06-16 |
20110143469 | METHOD FOR MANUFACTURING WIRING, THIN FILM TRANSISTOR, LIGHT EMITTING DEVICE AND LIQUID CRYSTAL DISPLAY DEVICE, AND DROPLET DISCHARGE APPARATUS FOR FORMING THE SAME - As a semiconductor device, specifically, a pixel portion included in a semiconductor device is made to have higher precision and higher aperture ratio, it is required to form a smaller wiring in width. In the case of forming a wiring by using an ink-jet method, a dot spreads on a wiring formation surface, and it is difficult to narrow width of a wiring. In the present invention, a photocatalytic substance typified by TiO | 2011-06-16 |
20110143470 | Method and Apparatus for Manufacturing Thin-Film Transistor Array Substrate - A method and apparatus of fabricating a thin film transistor array substrate is disclosed, which is capable of reducing fabrication time owing to a simplified fabrication process, wherein at least one of steps for forming a gate pattern, forming a semiconductor pattern, forming a data pattern, removing an ohmic contact layer pattern exposed between source and drain electrode patterns, and forming a conductive layer pattern is performed by a laser scribing process. | 2011-06-16 |
20110143471 | SURFACE PASSIVATION TECHNIQUES FOR CHAMBER-SPLIT PROCESSING - Surface passivation techniques for chamber-split processing are described. A method includes forming a first Group III-V material layer above a substrate, the first Group III-V material layer having a top surface. A passivation layer is deposited on the top surface of the Group III-V material layer. The passivation layer is removed. Subsequently, a second Group III-V material layer is formed above the first Group III-V material layer. | 2011-06-16 |
20110143472 | NITRIDE NANOWIRES AND METHOD OF PRODUCING SUCH - The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor. | 2011-06-16 |
20110143473 | THIN FILM DEPOSITION APPARATUS AND METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY DEVICE BY USING THIN FILM DEPOSITION APPARATUS - A thin film deposition apparatus to remove static electricity generated between a substrate and a mask, and a method of manufacturing an organic light-emitting display device using the thin film deposition apparatus. | 2011-06-16 |
20110143474 | LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC APPLIANCE, AND METHOD OF MANUFACTURING THE SAME - A light-emitting element is provided which has a light-emitting layer between a first electrode and a second electrode, where the light-emitting layer has a first layer and a second layer; the first layer contains a first organic compound and a third organic compound; the second layer contains a second organic compound and the third organic compound; the first layer is provided to be in contact with the second layer on the first electrode side; the first organic compound is an organic compound with an electron transporting property; the second organic compound is an organic compound with a hole transporting property; the third organic compound has an electron trapping property; and light emission from the third organic compound can be obtained when voltage is applied to the first electrode and the second electrode so that the potential of the first electrode is higher than that of the second electrode. | 2011-06-16 |
20110143475 | METHOD FOR MANUFACTURING OF OPTOELECTRONIC DEVICES BASED ON THIN-FILM, INTERMEDIATE-BAND MATERIALS DESCRIPTION - Method for manufacturing of optoelectronic devices based on thin-film, intermediate band materials, characterized in that it comprises, at least, the following steps: | 2011-06-16 |
20110143476 | ELECTRICAL COUPLING OF WAFER STRUCTURES - A method for electrically coupling a first wafer with a second wafer is provided. The method includes bonding the first wafer with the second wafer using a bonding material. The method further includes forming an opening in the first wafer in a scribe area of the second wafer to expose a surface of a conductive structure of the second wafer. The method further includes forming a conductive layer overlying the first wafer and the opening in the first wafer such that the conductive layer forms an electrical contact with the conductive structure of the second wafer thereby electrically coupling the first wafer with the second wafer. | 2011-06-16 |
20110143477 | METHOD OF MANUFACTURING A PHASE CHANGE MEMORY DEVICE USING A CROSS PATTERNING TECHNIQUE - A method of manufacturing a phase change memory device is provided. A first insulating layer having a plurality of metal word lines spaced apart at a constant distance is formed on a semiconductor substrate. A plurality of line structures having a barrier metal layer, a polysilicon layer and a hard mask layer are formed to be overlaid on the plurality of metal word lines. A second insulating layer is formed between the line structures. Cross patterns are formed by etching the hard mask layers and the polysilicon layers of the line structures using mask patterns crossed with the metal word lines. A third insulating layer is buried within spaces between the cross patterns. Self-aligned phase change contact holes are formed and at the same time, diode patterns formed of remnant polysilicon layers are formed by selectively removing the hard mask layers constituting the cross patterns. | 2011-06-16 |
20110143478 | MODULAR SYSTEM AND PROCESS FOR CONTINUOUS DEPOSITION OF A THIN FILM LAYER ON A SUBSTRATE - A process and associated system for vapor deposition of a thin film layer on a photovoltaic (PV) module substrate is includes establishing a vacuum chamber and introducing the substrates individually into the vacuum chamber. The substrates are pre-heated as they are conveyed through the vacuum chamber, and are then conveyed in serial arrangement through a vapor deposition apparatus in the vacuum chamber wherein a thin film of a sublimed source material is deposited onto an upper surface of the substrates. The substrates are conveyed through the vapor deposition apparatus at a controlled constant linear speed such that leading and trailing sections of the substrate in a conveyance direction are exposed to the same vapor deposition conditions within the vapor deposition apparatus. The vapor deposition apparatus may be supplied with source material in a manner so as not to interrupt the vapor deposition process or non-stop conveyance of the substrates through the vapor deposition apparatus. | 2011-06-16 |
20110143479 | VAPOR DEPOSITION APPARATUS AND PROCESS FOR CONTINUOUS DEPOSITION OF A THIN FILM LAYER ON A SUBSTRATE - An apparatus and related process are provided for vapor deposition of a sublimated source material as a thin film on a photovoltaic (PV) module substrate. A receptacle is disposed within a vacuum head chamber and is configured for receipt of a source material. A heated distribution manifold is disposed below the receptacle and includes a plurality of passages defined therethrough. The receptacle is indirectly heated by the distribution manifold to a degree sufficient to sublimate source material within the receptacle. A molybdenum distribution plate is disposed below the distribution manifold and at a defined distance above a horizontal plane of a substrate conveyed through the apparatus. The molybdenum distribution plate includes a pattern of holes therethrough that further distribute the sublimated source material passing through the distribution manifold onto the upper surface of the underlying substrate. The molybdenum distribution plate includes greater than about 75% by weight molybdenum. | 2011-06-16 |
20110143480 | MICROWAVE ANNEAL OF A THIN LAMINA FOR USE IN A PHOTOVOLTAIC CELL - A cleave plane is defined in a semiconductor donor body by implanting ions into the wafer. A lamina is cleaved from the donor body, and a photovoltaic cell is formed which comprises the lamina. The implant may cause some damage to the crystal structure of the lamina. This damage can be repaired by annealing the lamina using microwave energy. If the lamina is bonded to a receiver element, the receiver element may be either transparent to microwaves, or may reflect microwaves, while the semiconductor material absorbs the microwaves. In this way the lamina can be annealed at high temperature while the receiver element remains cooler. | 2011-06-16 |
20110143481 | MODULAR SYSTEM AND PROCESS FOR CONTINUOUS DEPOSITION OF A THIN FILM LAYER ON A SUBSTRATE - A system and associated process for vapor deposition of a thin film layer on a photovoltaic (PV) module substrate is includes establishing a vacuum chamber and introducing the substrates individually into the vacuum chamber. A conveyor system is operably disposed within the vacuum chamber and is configured for conveying the substrates in a serial arrangement through a vapor deposition apparatus within the vacuum chamber at a controlled constant linear speed. A post-heat section is disposed within the vacuum chamber immediately downstream of the vapor deposition apparatus in the conveyance direction of the substrates. The post-heat section is configured to maintain the substrates conveyed from the vapor deposition apparatus in a desired heated temperature profile until the entire substrate has exited the vapor deposition apparatus. | 2011-06-16 |
20110143482 | SUSPENDED GERMANIUM PHOTODETECTOR FOR SILICON WAVEGUIDE - A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized. | 2011-06-16 |
20110143483 | TRANSPARENT CONDUCTIVE LAYER AND METHOD OF MANUFACTURING THE SAME - A transparent conductive layer includes a substrate, a first conductive layer disposed on the substrate, and a second conductive layer disposed on the first conductive layer, wherein the second conductive layer comprises a textured surface and an opening which exposes the first conductive layer, wherein the opening comprises a diameter of about 1 micrometer to about 3 micrometers. Also disclosed is a method of manufacturing the transparent conductive layer and a photoelectric device. | 2011-06-16 |
20110143484 | Method of fabricating solar cell - A method of fabricating a solar cell is provided. A saw damage removal process is performed on a silicon substrate. A dry surface treatment is performed to a surface of the silicon substrate on form an irregular surface. A metal-activated selective oxidation is performed to the irregular surface. By using an aqueous solution, the irregular surface is etched to form a nanotexturized surface of the silicon substrate. A dopant diffusion process is performed on the silicon substrate to form a P-N junction. An anti-reflection layer is formed on the silicon substrate. An electrode is formed on the silicon substrate. | 2011-06-16 |
20110143485 | METHOD OF MANUFACTURING SOLID-STATE IMAGING APPARATUS - The method of manufacturing the solid-state imaging apparatus of the present invention includes: forming elements of an imaging region and a peripheral region on a substrate; forming a plurality of wiring patterns such that the wiring patterns of the peripheral region are denser than those of the imaging region; and forming an insulating film interposed between the wiring patterns. Further, the manufacturing method includes: etching and removing at least a part of the insulating film on the peripheral region; and planarizing a surface of the insulating film by a CMP process. | 2011-06-16 |
20110143486 | Solar Cell and Manufacturing Method Thereof - Forming an impurity diffusion layer of the second conductivity type and an antireflective film on one surface side of a semiconductor substrate of the first conductivity type; applying the first electrode material onto the antireflective film; forming a passivation film on the other surface side of the semiconductor substrate; forming openings in the passivation film to reach the other surface side; applying a second electrode material containing impurity elements of the first conductive type to fill the openings and not to be in contact with the second electrode material of adjacent openings; applying a third electrode material onto the passivation film to be in contact with the entire second electrode material; forming at a time, by heating the semiconductor substrate at a predetermined temperature after applying the first electrode material and the third electrode material, the first electrodes, a high-concentration region, and the second electrodes and third electrode. | 2011-06-16 |
20110143487 | Method and Structure for Thin Film Tandem Photovoltaic Cell - A tandem photovoltaic cell. The tandem photovoltaic cell includes a bifacial top cell and a bottom cell. The top bifacial cell includes a top first transparent conductive oxide material. A top window material underlies the top first transparent conductive oxide material. A first interface region is disposed between the top window material and the top first transparent conductive oxide material. The first interface region is substantially free from one or more entities from the top first transparent conductive oxide material diffused into the top window material. A top absorber material comprising a copper species, an indium species, and a sulfur species underlies the top window material. A top second transparent conductive oxide material underlies the top absorber material. A second interface region is disposed between the top second transparent conductive oxide material and the top absorber material. The bottom cell includes a bottom first transparent conductive oxide material. A bottom window material underlies the first bottom transparent conductive oxide material. A bottom absorber material underlies the bottom window material. A bottom electrode material underlies the bottom absorber material. The tandem photovoltaic cell further includes a coupling material free from a parasitic junction between the top cell and the bottom cell. | 2011-06-16 |
20110143488 | SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD FOR THE SAME, AND IMAGING APPARATUS - A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges. | 2011-06-16 |
20110143489 | PROCESS FOR MAKING THIN FILM SOLAR CELL - A process for making a component of a thin film solar cell is provided. The process includes steps of making the component in the following sequence: depositing an absorber layer on a transparent substrate, depositing a back-contact layer on the absorber layer and activating the absorber layer. The absorber layer comprises tellurium. A process for making a thin film solar cell is also presented. | 2011-06-16 |
20110143490 | METHODS OF MANUFACTURING CADMIUM TELLURIDE THIN FILM PHOTOVOLTAIC DEVICES - Methods for manufacturing a cadmium telluride based thin film photovoltaic device are generally disclosed. A resistive transparent layer can be sputtered on a transparent conductive oxide layer from a metal alloy target in a sputtering atmosphere of argon and oxygen that includes argon from about 5% to about 40%. A cadmium sulfide layer can then be formed on the resistive transparent layer. A cadmium telluride layer can be formed on the cadmium sulfide layer; and a back contact layer can be formed on the cadmium telluride layer. The sputtering can be accomplished within a sputtering chamber. | 2011-06-16 |
20110143491 | VAPOR DEPOSITION APPARATUS AND PROCESS FOR CONTINUOUS DEPOSITION OF A THIN FILM LAYER ON A SUBSTRATE - An apparatus and related process are provided for vapor deposition of a sublimated source material as a thin film on a photovoltaic (PV) module substrate. A receptacle is disposed within a vacuum head chamber and is configured for receipt of a source material. A heated distribution manifold is disposed below the receptacle and includes a plurality of passages defined therethrough. The receptacle is indirectly heated by the distribution manifold to a degree sufficient to sublimate source material within the receptacle. A distribution plate is disposed below the distribution manifold and at a defined distance above a horizontal plane of a substrate conveyed through the apparatus. The distribution plate includes a pattern of holes therethrough that further distribute the sublimated source material passing through the distribution manifold onto the upper surface of the underlying substrate. | 2011-06-16 |
20110143492 | METHOD OF P-TYPE DOPING OF CADMIUM TELLURIDE - A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed. | 2011-06-16 |
20110143493 | METHOD OF MAKING PHOTOVOLTAIC CELL - Methods of making a photovoltaic (PV) cell are disclosed. The methods comprise at least the steps of, providing a first component comprising a cadmium telluride (CdTe) layer comprising an interfacial region, and subjecting the first component to a functionalizing treatment in the presence of a material comprising copper. | 2011-06-16 |
20110143494 | SCHOTTKY BARRIER DIODES FOR MILLIMETER WAVE SiGe BICMOS APPLICATIONS - A method for forming a Schottky barrier diode on a SiGe BiCMOS wafer, including forming a structure which provides a cutoff frequency (F | 2011-06-16 |
20110143495 | METHODS OF FORMING HIGH-EFFICIENCY MULTI-JUNCTION SOLAR CELL STRUCTURES - In various embodiments, solar cells include a junction including SiGe, a junction including at least one III-V material, and may be formed on silicon substrates and/or with silicon-based capping layers thereover. | 2011-06-16 |
20110143496 | METHOD OF MAKING MONOLITHIC PHOTOVOLTAIC MODULE ON FLEXIBLE SUBSTRATE - A method of making a monolithic photovoltaic module having a flexible substrate is described. The method includes the following steps. First, a flexible substrate is provided, and a first adhesive layer, a metal layer, and a second adhesive layer are formed thereon. The second adhesive layer, the metal layer and the first adhesive layer are etched with at least one etching paste. In addition, a patterned semiconductor body layer patterned by an etching paste or a laser scribing is formed thereon. Furthermore, transparent top electrodes patterned by an etching paste or a cold laser scribing are formed on the patterned semiconductor body layer. | 2011-06-16 |
20110143497 | THICK FILM CONDUCTIVE COMPOSITION USED IN CONDUCTORS FOR PHOTOVOLTAIC CELLS - A method of forming a photovoltaic cell conductor that comprises steps of, applying on a semiconductor substrate a thick film conductive composition comprising inorganic powders comprising electrically conductive powder, first glass frit and second glass frit, and organic medium, wherein total PbO in the glass frits is 80.5 to 83.5 wt % based on the total weight of the first glass frit and the second glass frit, and firing the thick film conductive composition applied on the semiconductor substrate. | 2011-06-16 |
20110143498 | SEMICONDUCTOR PACKAGE WITH A SUPPORT STRUCTURE AND FABRICATION METHOD THEREOF - A semiconductor package with a support structure and a fabrication method thereof are provided. With a chip being electrically connected to electrical contacts formed on a carrier, a molding process is performed. A plurality of recessed portions formed on the carrier are filled with an encapsulant for encapsulating the chip during the molding process. After the carrier is removed, the part of the encapsulant filling the recessed portions forms outwardly protruded portions on a surface of the encapsulant, such that the semiconductor package can be attached to an external device via the protruded portions. | 2011-06-16 |
20110143499 | Vertically packaged MOSFET and IC power devices as integrated module using 3D interconnected laminates - An electronic package for containing at least a top packaging module vertically stacked on a bottom packaging module. Each of the packaging modules includes a semiconductor chip packaged and connected by via connectors and connectors disposed on a laminated board fabricated with a standard printed-circuit board process wherein the top and bottom packaging module further configured as a surface mountable modules for conveniently stacking and mounting to prearranged electrical contacts without using a leadframe. At least one of the top and bottom packaging modules is a multi-chip module (MCM) containing at least two semiconductor chips. At least one of the top and bottom packaging modules includes a ball grid array (BGA) for surface mounting onto the prearranged electrical contacts. At least one of the top and bottom packaging modules includes a plurality of solder bumps on one of the semiconductor chips for surface mounting onto the prearranged electrical contacts. The laminated board of the bottom packaging modules further has a thermal expansion coefficient substantially the same as a printed circuit board (PCB) whereby a surface mount onto the PCB is less impacted by a temperature change | 2011-06-16 |
20110143500 | SEMICONDUCTOR CONNECTION COMPONENT - There is a need for providing a technology capable of decreasing on-resistance of a power transistor in a semiconductor device that integrates the power transistor and a control integrated circuit into a single semiconductor chip. There is another need for providing a technology capable of reducing a chip size of a semiconductor device. A semiconductor chip includes a power transistor formation region to form a power transistor, a logic circuit formation region to form a logic circuit, and an analog circuit formation region to form an analog circuit. A pad is formed in the power transistor formation region. The pad and a lead are connected through a clip whose cross section is larger than that of a wire. On the other hand, a bonding pad is connected through the wire | 2011-06-16 |
20110143501 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - Provided is a method of producing a semiconductor device having a structure wherein a semiconductor chip | 2011-06-16 |
20110143502 | Method for Low Stress Flip-Chip Assembly of Fine-Pitch Semiconductor Devices - A device including a first body ( | 2011-06-16 |
20110143503 | Semiconductor storage element and manufacturing method thereof - A semiconductor storage element includes: a semiconductor layer constituted of a line pattern with a predetermined width formed on a substrate; a quantum dot forming an electric charge storage layer formed on the semiconductor layer through a first insulating film serving as a tunnel insulating film; an impurity diffusion layer formed in a surface layer of the semiconductor layer so as to sandwich the quantum dot therebetween; and a control electrode formed on the quantum dot through a second insulating film. | 2011-06-16 |
20110143504 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of fabricating a liquid crystal display device includes forming a gate electrode; forming a gate insulator on the gate electrode, an active layer on the gate insulator, and an etch stopper on the active layer; depositing an ohmic contact layer, a first metal layer and a second metal layer on the substrate; etching the ohmic contact layer, and the first and second metal layers to form ohmic contact patterns, and first and second metal patterns including source, drain and pixel electrodes using a single photomask. | 2011-06-16 |
20110143505 | METHOD FOR FABRICATING FIELD EFFECT TRANSISTOR - Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate, and resist layers having first and second openings with asymmetrical depths are formed on the dielectric interlayer between the source electrode and the drain electrode. The first opening exposes the dielectric interlayer, and the second opening exposes the lowermost of the resist layers. The dielectric interlayer in the bottom of the first opening and the lowermost resist layer under the second opening are simultaneously removed to expose the capping layer to the first opening and expose the dielectric interlayer to the second opening. The capping layer of the first opening is removed to expose the active layer. A metal layer is deposited on the substrate to simultaneously form a gate electrode and a field plate in the first opening and the second opening. The resist layers are removed to lift off the metal layer on the resist layers. | 2011-06-16 |
20110143506 | METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY DEVICE - A method for fabricating semiconductor memory device includes providing a first semiconductor substrate, and forming a first storage device on the first semiconductor substrate. The method includes forming a switching device on the first storage device, and forming a second storage devices on the switching device. Logic devices are formed below the first storage devices. | 2011-06-16 |
20110143507 | TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device. | 2011-06-16 |
20110143508 | METHOD OF FABRICATING VERTICAL CHANNEL TRANSISTOR - A method of fabricating a vertical channel transistor includes: forming a line type active pattern on a substrate so as to extend in a first horizontal direction; forming a vertical channel isolating the active pattern in a second horizontal direction intersecting the first horizontal direction and extending vertically on the substrate; | 2011-06-16 |
20110143509 | METHOD OF FORMING A SEMICONDUCTOR DEVICE - A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A gate insulating film is formed on an inside wall of the groove. A buried gate electrode is formed on the gate insulating film and on a bottom portion of the groove. A cap insulating film covering the buried gate electrode is formed in an upper portion of the groove. The cap insulating film has a top surface which is different in level from a top surface of the semiconductor substrate. A first inter-layer insulating film is formed on the top surface of the semiconductor substrate and on the top surface of the cap insulating film. The first inter-layer insulating film with a flat top surface fills a gap in level between the top surface of the semiconductor substrate and the top surface of the cap insulating film. | 2011-06-16 |
20110143510 | METHOD OF CONTROLLING GATE THICKNESS IN FORMING FINFET DEVICES - A method of forming a FinFET device is provided. In one embodiment, a fin is formed on a substrate. A gate structure is formed over the fin, the gate structure having a dielectric layer and a conformal first polysilicon layer formed above the dielectric layer. An etch stop layer is formed above the first polysilicon layer and thereafter a second polysilicon layer is formed above the etch stop layer. The second polysilicon layer and the etch stop layer are removed. A metal layer is formed above the first polysilicon layer. The first polysilicon layer is reacted with the metal layer to silicide the first polysilicon layer. Any un-reacted metal layer is thereafter removed and source and drain regions are formed on opposite sides of the fin. | 2011-06-16 |
20110143511 | Method of fabricating n-channel metal-oxide semiconductor transistor - A method of fabricating an NMOS transistor, in which, an epitaxial silicon layer is formed before a salicide process is performed, then a nickel layer needed for the salicide process is formed, and, thereafter, a rapid thermal process is performed to allow the nickel layer to react with the epitaxial silicon layer and the silicon substrate under the epitaxial silicon layer to form a nickel silicide layer. | 2011-06-16 |
20110143512 | METHOD FOR DUAL ENERGY IMPLANTATION FOR ULTRA-SHALLOW JUNCTION FORMATION OF MOS DEVICES - A method for forming a lightly doped drain (LDD) region in a semiconductor substrate. The method includes generating an ion beam of a selected species, and accelerating the ion beam, wherein the accelerated ion beam includes a first accelerated portion and a second accelerated portion. The method further includes deflecting the accelerating ion beam, wherein the first and second accelerated portions are concurrently deflected into a first path trajectory having a first deflected angle and second path trajectory having a second deflected angle. In an embodiment, the first and second path trajectories travel in the same direction, which is perpendicular to the surface region of the semiconductor wafer, and the first deflected angle is greater than the second deflected angle. In an embodiment, the selected species may include an n-type ion comprising phosphorous (P), arsenic (As), or antimony (Sb). | 2011-06-16 |
20110143513 | METHODS OF FORMING A SHALLOW BASE REGION OF A BIPOLAR TRANSISTOR - The disclosed subject matter provides a method of forming a bipolar transistor. The method includes depositing a first insulating layer over a first layer of material that is doped with a dopant of a first type. The first layer is formed over a substrate. The method also includes modifying a thickness of the first oxide layer based on a target dopant profile and implanting a dopant of the first type in the first layer. The dopant is implanted at an energy selected based on the modified thickness of the first insulating layer and the target dopant profile. | 2011-06-16 |
20110143514 | MRAM cell structure - Disclosed herein is an improved memory device, and related methods of manufacturing, wherein the area occupied by a conventional landing pad is significantly reduced to around 50% to 10% of the area occupied by conventional landing pads. This is accomplished by removing the landing pad from the cell structure, and instead forming a conductive via structure that provides the electrical connection from the memory stack or device in the structure to an under-metal layer. By forming only this via structure, rather than separate vias formed on either side of a landing pad, the overall width occupied by the connective via structure from the memory stack to an under-metal layer is substantially reduced, and thus the via structure and under-metal layer may be formed closer to the memory stack (or conductors associated with the stack) so as to reduce the overall width of the cell structure. | 2011-06-16 |
20110143515 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device with first and second groups of transistors, the second group transistors each having a lower operating voltage than that of each of said transistors in said first group, the first group transistors have first gate electrodes formed from a silicon based material layer on a semiconductor substrate through a first gate insulating film, the second group transistors have second gate electrodes formed such that metal based gate materials are respectively filled in gate formation trenches formed in an interlayer insulating film on the semiconductor substrate through a second gate insulating film, and a resistor on the substrate has a resistor main body utilizing the silicon based material layer and is formed on the substrate through an insulating film. | 2011-06-16 |
20110143516 | SELF-ALIGNED, PLANAR PHASE CHANGE MEMORY ELEMENTS AND DEVICES, SYSTEMS EMPLOYING THE SAME AND METHOD OF FORMING THE SAME - Phase change memory elements, devices and systems using the same and methods of forming the same are disclosed. A memory element includes first and second electrodes, and a phase change material layer between the first and second electrodes. The phase change material layer has a first portion with a width less than a width of a second portion of the phase change material layer. The first electrode, second electrode and phase change material layer may be oriented at least partially along a same horizontal plane. | 2011-06-16 |