21st week of 2013 patent applcation highlights part 75 |
Patent application number | Title | Published |
20130132693 | ASYNCHRONOUS REMOTE COPY SYSTEM AND STORAGE CONTROL METHOD - In a previous storage apparatus, differential JNLs are reflected in order of the sequential numbers, to the data volumes thereof. If a first storage apparatus is suspended, it is determined which is newer: the sequential number which the journal recently reflected in a second storage apparatus or the sequential number reflected in a third storage apparatus. In the newer storage apparatus having the newer sequential number, it is determined whether one or more JNLs from the journal having the sequential number next to the sequential number which is not determined to be the newer to the journal having the sequential number determined to be the newer exist, or not. If the result of the determination is positive, from the newer storage apparatus to the previous storage apparatus which is not the newer of the second and the third storage apparatuses, one or more differential JNLs are copied. | 2013-05-23 |
20130132694 | MICROCOMPUTER AND METHOD FOR CONTROLLING MEMORY ACCESS - A microcomputer includes a CPU, a protection information storage configured to store memory protection information specifying an access permission or a prohibited state to a memory space by a program executed by the CPU, a memory access control apparatus configured to determine whether or not to allow a memory access request from the CPU according to the memory protection information, and a reset apparatus configured to invalidate the memory protection information stored in the protection information storage according to a reset request signal output from the CPU to a switching of programs executed by the CPU, the reset request signal being based on a state of execution of the program by the CPU. The reset apparatus sets all valid bit storing fields of a plurality of protection setting registers of the protection information storage to invalid state in response to the reset request signal output by the CPU. | 2013-05-23 |
20130132695 | METHOD OF CONTROLLING MEMORY ACCESS - Provided is a method of controlling memory access. In a system including a first layer element executed in a privileged mode having a first priority of permission to access the entire region of a memory and second and third layer elements executed in an unprivileged mode having a second priority of permission to access a partial region of the memory, the method of controlling memory access determines whether the memory is accessible for each page that is an address space unit, based on which mode a layer element currently accessing the memory is executed in between the privileged mode and the unprivileged mode; and determines whether the memory is accessible based on which one of the first, second and third layer elements corresponds to a domain currently being attempted to be accessed from among a plurality of domains of the memory. Accordingly, a memory domain allocated to a guest operating system kernel is effectively protected from an application executed in the unprivileged mode in which the guest operating system kernel is executed. | 2013-05-23 |
20130132696 | STORAGE SYSTEM MANAGEMENT APPARATUS AND MANAGEMENT METHOD - The present invention is provided to make effective use of a storage area, and to enhance user usability. A management apparatus determines a reallocation destination of each logical storage area on the basis of an access load on each logical storage area by a host computer and an allocation status of each logical storage area in a storage-destination storage tier. A monitoring mode selection part for selecting any one of multiple monitoring modes selects a prescribed monitoring mode from the multiple monitoring modes on the basis of allocation time information related to a time at which each logical storage area is allocated to an allocation-destination storage tier. | 2013-05-23 |
20130132697 | THREE-STAGE MEMORY ARRANGEMENT - An electronic memory arrangement having at least three memory areas, a memory control unit, and a writing memory-accessing unit configured to carry out write access. A reading memory-accessing unit is configured to carry out read accesses. The memory control unit determines read and write access to the at least three memory areas, and the memory control unit is configured such that after the writing of a first data packet to one of the three memory areas, a following second data packet to be written is written to one on the three memory area to which read access does not place simultaneously during the write access of the second data packet. | 2013-05-23 |
20130132698 | HIGH-EFFICIENCY VIRTUAL DISK MANAGEMENT SYSTEM - A virtual disk management system used in a diskless PC network communication agent system consisting of storage media, storage servers and a user-end computer for creating virtual disks having a dynamic space allocation function at the storage media and storing data into and fetching data from the virtual disks. The virtual disk management system uses a physical block index table, a storage media group record table, a virtual disk physical block occupation table and a differential disk relation table for virtual disk control, allowing physical and virtual space address translation to be done at one time to improve virtual disk access performance. | 2013-05-23 |
20130132699 | METHOD FOR TRACKING MEMORY USAGES OF A DATA PROCESSING SYSTEM - Techniques for tracking memory usages of a data processing system are described herein. According to one embodiment, a memory manager is to perform a first lookup operation in a memory allocation table to identify an allocation entry based on a handle representing a memory address of a memory block allocated to a client and to retrieve a trace entry pointer from the allocation entry. The memory manager is then to perform a second lookup operation in a memory trace table to identify a trace entry based on the trace entry pointer and to increment a memory allocation count of the trace entry. The memory allocation count is utilized to indicate a likelihood of the client causing a memory leak. | 2013-05-23 |
20130132700 | METHOD AND SYSTEM FOR DYNAMICALLY UPGRADING A CHIP AND BASEBOARD MANAGEMENT CONTROLLER - The present invention relates to the field of communications, and in particular, to a method and a system for dynamically upgrading a chip and a baseboard management controller. The method includes: obtaining an upgrade file that is used for upgrading a chip; upgrading, based on the upgrade file, data in a flash memory that is used for storing data of the chip, and not performing a reset operation on the chip at this time; and when it is acquired through detection that the state of a service system that is connected to the chip is a service idle state, replicating the upgraded data in the flash memory to a random access memory in the chip, and performing a reset operation on the chip. According to the present invention, the availability and maintainability of the system are improved. | 2013-05-23 |
20130132701 | CONFIGURATION MAPPING USING A MULTI-DIMENSIONAL RULE SPACE AND RULE CONSOLIDATION - A configuration mapping system and method increase the effectiveness of mapping of information from an established product line to a new product offering. In at least one embodiment, the configuration mapping system herein uses configuration mapping rules to map individual product features and entire configurations from established products to a new product offering. The configuration mapping system also provides a way to appropriately map, for example, demand and sales information for the purpose of demand estimation and sales prediction. Conventionally, mapping can be ineffective because the configuration mapping rules usually focus on one part of the product at a time, and, if applied in isolation, the impact on other parts is missed. The systems and method herein provide a way to integrate configuration mapping rules across feature parts, time periods, and product lines into a unified, holistic view, allowing for new insights. | 2013-05-23 |
20130132702 | Processor with Kernel Mode Access to User Space Virtual Addresses - A computer includes a memory and a processor connected to the memory. The processor includes memory segment configuration registers to store defined memory address segments and defined memory address segment attributes such that the processor operates in accordance with the defined memory address segments and defined memory address segment attributes to allow kernel mode access to user space virtual addresses for enhanced kernel mode memory capacity. | 2013-05-23 |
20130132703 | APPARATUSES AND METHODS FOR STORING VALIDITY MASKS AND OPERATING APPARATUSES - Apparatuses and methods for storing a validity mask and operating apparatuses are described. A number of methods for operating an apparatus include storing a validity mask that is associated with a number of pages of memory cells in a group of pages and that provides validity information for the number of pages of memory cells in the group of pages. | 2013-05-23 |
20130132704 | MEMORY CONTROLLER AND METHOD FOR TUNED ADDRESS MAPPING - A memory system maps physical addresses to device addresses in a way that reduces power consumption. The system includes circuitry for deriving efficiency measures for memory usage and selects from among various address-mapping schemes to improve efficiency. The address-mapping schemes can be tailored for a given memory configuration or a specific mixture of active applications or application threads. Schemes tailored for a given mixture of applications or application threads can be applied each time the given mixture is executing, and can be updated for further optimization. Some embodiments mimic the presence of an interfering thread to spread memory addresses across available banks, and thereby reduce the likelihood of interference by later- introduced threads. | 2013-05-23 |
20130132705 | DE-INTERLEAVING DEVICE, DE-INTERLEAVING METHOD, DATA TRANSMISSION SYSTEM, AND DATA TRANSMISSION METHOD - A de-interleaving device for de-interleaving an input data block interleaved by storing data of an original data block including R×C′ portions (C′ represents any divisor of R×C) of data in a matrix of R columns×C rows in row-major order and reading the data of the original data block in column-major order includes a memory configured to store R×C portions of data, a write address generator configured to generate write addresses based on a first incremental value, a read address generator configured to generate read addresses other than other than (n×R)+1th read addresses based on the first incremental value and to generate the (n×R)+1th read addresses based on a second incremental value, and a memory interface configured to successively read data from a read address and to successively write data of an input data block to a write address. | 2013-05-23 |
20130132706 | TABLE LOOKUP OPERATION ON MASKED DATA - Processing of masked data using table lookups is described. A mask is applied to input data to generate masked input data. The mask and the masked input data are used in combination to locate an entry in a lookup table. The entry corresponds to a transformed version of the input data. | 2013-05-23 |
20130132707 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ASSIGNING ELEMENTS OF A MATRIX TO PROCESSING THREADS WITH INCREASED CONTIGUOUSNESS - A system, method, and computer program product are provided for assigning elements of a matrix to processing threads. In use, a matrix is received to be processed by a parallel processing architecture. Such parallel processing architecture includes a plurality of processors each capable of processing a plurality of threads. Elements of the matrix are assigned to each of the threads for processing, utilizing an algorithm that increases a contiguousness of the elements being processed by each thread. | 2013-05-23 |
20130132708 | MULTI-CORE PROCESSOR SYSTEM, COMPUTER PRODUCT, AND CONTROL METHOD - A multi-core processor system includes a first core that is of a multi-core processor and configured to detect preprocessing for access of shared resources by a second core that is of the multi-core processor excluding the first core, when the first core is accessing the shared resources shared by the multi-core processor; and switch a task being executed by the second core to another task upon detecting the preprocessing. | 2013-05-23 |
20130132709 | METHOD AND SYSTEM FOR PROCESSING INSTRUCTION INFORMATION - A method and system for processing instruction information. Each instruction information character string of a sequence of instruction information character strings are sequentially extracted and processed. Each instruction information character string pertains to an associated target object wrapped in a target object storage unit by an associated operation target model. It is independently ascertained for each instruction information character string whether to generate a code line for each instruction information character string, by: determining whether a requirement is satisfied and generating the code line and storing the code line in a code buffer if the requirement has been determined to be satisfied and not generating the code line if the requirement has been determined to not be satisfied. The requirement relates to whether the instruction information character string being processed comprises a naming instruction or a generation instruction. The generated code lines stored in the code buffer are displayed. | 2013-05-23 |
20130132710 | METHOD OF COMPRESSING AND DECOMPRESSING AN EXECUTABLE OR INTERPRETABLE PROGRAM - The method of compressing and decompressing an executable program, can be executed by a microprocessor or interpreted by an interpreter of an integrated circuit device: instructions are reformatted into the format of an initial set of instructions of said program for obtaining instructions in the format of an intermediate set of instructions; repetition templates in the program are determined and, for each repetition template, a pair is defined, formed of said repetition template and of an instruction in the format of a set of instructions; intermediate instructions are replaced by compressed instructions and the links of the compressed program are modified; the compressed program is stored in a memory of the device; and the compressed program is decompressed and the initial instructions are executed by said microprocessor or interpreted by said interpreter. The invention applies, in particular, to the integrated circuits of embedded devices. | 2013-05-23 |
20130132711 | COMPUTE THREAD ARRAY GRANULARITY EXECUTION PREEMPTION - One embodiment of the present invention sets forth a technique instruction level and compute thread array granularity execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. No new instructions are issued and the context state is unloaded from the processing pipeline. When preemption is performed at a compute thread array boundary, the amount of context state to be stored is reduced because execution units within the processing pipeline complete execution of in-flight instructions and become idle. If, the amount of time needed to complete execution of the in-flight instructions exceeds a threshold, then the preemption may dynamically change to be performed at the instruction level instead of at compute thread array granularity. | 2013-05-23 |
20130132712 | HANDLING DEVICE AND METHOD FOR VOLTAGE FAULTS - A handling device and method for voltage faults applicable for using in a computer system. The handling method includes acquiring a signal of voltage fault. According to the signal of voltage fault and by looking up at tables, an operating status of the computer system corresponding to the signal of voltage fault is acquired, and generating a control signal according to the operating status. Then, the computer system according to the control signal is restarted. | 2013-05-23 |
20130132713 | ELECTRONIC EQUIPMENT, METHOD OF CONTROLLING ELECTRONIC EQUIPMENT AND CONTROL PROGRAM FOR ELECTRONIC EQUIPMENT - According to one embodiment, an electronic equipment includes: an application configured to operate an electronic equipment, which serves to instruct OS to start based on settings; an OS starting discriminating module configured to discriminate as to whether or not the OS is started based on instruction of start-up of the application; and a white list object discriminating module configured to discriminate whether or not the application is an object of the white list stored in advance when the OS is started based on instruction of start-up of the application, and configured to instruct refusal of access of the application from the OS when the application is not the object of the white list. | 2013-05-23 |
20130132714 | APPARATUS AND METHOD TO DRIVE DEVICES - A device driving apparatus includes a storage unit to store a plurality of device driving programs, a plurality of devices to receive the plurality of device driving programs, and a switching unit to transfer the plurality of device driving programs. | 2013-05-23 |
20130132715 | STORAGE DEVICE WITH A COMMUNICATIONS FUNCTION - The present invention relates to a storage device with a communications function which comprises an integrated circuit module and an application program. The integrated circuit module comprises at least a USB connector, at least a substrate, at least a controller and at least a memory in which there is at least an authentication code; the application program comprises a communications module and a transmission module wherein the communications module is used to receive digital information of at least a data input device in a computer for both the authentication code and the digital information, which has been received by the communications module, transmitted to at least a server or at least a peer by the transmission module. | 2013-05-23 |
20130132716 | DATA COMMUNICATION APPARATUS, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING CONTROL PROGRAM THEREFOR - A data communication apparatus that is capable of improving operability when inputting authentication information. An authentication unit accepts authentication information inputted when a user logs in to the data communication apparatus and authenticates the user based on the accepted authentication information. A designation unit designates a file transmission destination that is inputted by the authenticated user. A transmission unit transmits a file to the transmission destination inputted. A registration unit registers the transmission destination of the file. A control unit prohibits registration of the authentication information at the time of registration of the transmission destination of the file when the accepted authentication information is used for file transmission, and permits registration of the authentication information at the time of registration of the transmission destination of the file when the inputted authentication information is not used for file transmission. | 2013-05-23 |
20130132717 | Mobile Handset Identification and Communication Authentication - Disclosed is a system and method for authenticating a communications channel between a mobile handset associated with a user and an application server, for uniquely identifying the mobile handset and for encrypting communications between the mobile handset and the application server over the communication channel is provided. The system includes a certificate authority configured to issue digital certificates to the handset and the application server, as well as software applications operating on both the handset and application server. The digital certificates may be used by the handset and application server to uniquely identify one another as well as to exchange encryption keys by means of which further communication between them may be encrypted. | 2013-05-23 |
20130132718 | System And Method For Long-Term Digital Signature Verification Utilizing Light Weight Digital Signatures - Various embodiments of a system and method for long-term digital signature verification utilizing light weight digital signatures are described. Embodiments may include a verifying entity system that receives digitally signed data including a portion of data, signing time, and digital signature. The verifying entity system may receive a digital certificate that includes information for verifying the digital signature and an expiration time for the certificate. The verifying entity system may receive CRL that persists revocation information corresponding to ones of the revoked digital certificates that have already expired. The verifying entity system may utilize the CRL to determine that the digital signature is valid subsequent to its expiration time. The verifying entity system may evaluate the CRL to determine that the digital certificate was not revoked at the signing time. The verifying entity system may determine the digital signature is a valid digital signature and generate a corresponding result. | 2013-05-23 |
20130132719 | INFORMATION PROCESSING APPARATUS, INFORMATION STORAGE APPARATUS, INFORMATION PROCESSING SYSTEM, AND INFORMATION PROCESSING METHOD AND PROGRAM - An information processing apparatus includes a data processing unit which executes processing for decoding and reproducing encrypted content. The data processing unit executes processing for determining whether the content can be reproduced by applying an encrypted content signature file. The encrypted content signature file stores information on issue date of the encrypted content signature file and an encrypted content signature issuer certificate with a public key of an encrypted content signature issuer. In determining whether the content can be reproduced, the data processing unit compares expiration date of the encrypted content signature issuer certificate with the information on issue date of the encrypted content signature file, and does not perform processing for decoding and reproducing the encrypted content when the expiration date is before the issue date, and performs the processing for decoding and reproducing the encrypted content only when the expiration date is not before the issue date. | 2013-05-23 |
20130132720 | SYSTEM AND METHOD FOR MULTI-DIMENSIONAL SECRETION OF DIGITAL DATA - A system and method for multi-dimensional secretion of digital data. Digital data is received for secretion as a secret from one or more of a number of secretion parties. The secret is converted into a multi-dimensional object. The multi-dimensional object including at least four dimensions. Each of the plurality of secretion parties is assigned one of a number of dimensional attributes associated with the multi-dimensional object. The secret is recovered for the number of secretion parties in response to the number of secretion parties selecting a shape associated with the multi-dimensional object and providing all of the number of dimensional attributes previously associated with the multi-dimensional object. | 2013-05-23 |
20130132721 | Method and Apparatus for Providing a Key Certificate in a Tamperproof Manner - A method and a server are configured to provide, in a tamperproof manner, a key certificate for a public device key of a user device, which is installed for a user, by means of a server belonging to a service provider who provides the user with a service via the user device, wherein the server provides the user device with the key certificate if a signing request message received by the user device is successfully verified by the server using a one-time password generated for the user device by the server. | 2013-05-23 |
20130132722 | SYSTEM AND METHOD FOR AUTHENTICATING DATA - Systems and methods for authenticating data and timeliness are disclosed. A method for authentication can comprise processing a data block to determine a first secret element, generating a second secret element based upon the first secret element, generating a non-secret element based upon the second secret element, and comparing the non-secret element to a nonce associated with the first secret element to determine authentication. | 2013-05-23 |
20130132723 | CRYPTOGRAPHIC METHOD FOR COMMUNICATING CONFIDENTIAL INFORMATION - A cryptographic method for communicating confidential information m between a first electronic entity (A) and a second electronic entity (B), includes a distribution step and a reconciliation step, the distribution step including a plurality of steps, one of which consists of the first entity (A) and the second entity (B) calculating a first intermediate value P | 2013-05-23 |
20130132724 | SYSTEM AND METHOD FOR AUTHENTICATING A RESOURCE-CONSTRAINED CLIENT - A system and method for authenticating a resource-constrained client are provided. The method includes transmitting, by the server, a query message including a first modified secret key to the client, wherein the first modified secret key is generated using a first secret key and a first blinding value; receiving, from the client, a response message including a response value, wherein the response value is generated using the first blinding value, a second secret key, and an error value; calculating the error value from the response value; and determining, based on the error value, whether authentication of the client is successful. | 2013-05-23 |
20130132725 | PROTECTION METHOD, DECRYPTION METHOD, RECORDING MEDIUM AND TERMINAL FOR SAID PROTECTION METHOD - Protecting data transmission, either multimedia or a control word, between a security processor and a terminal includes, at the security processor, building a current session key by root key diversification as a function of a parameter transmitted by the terminal, decrypting the data, encrypting it with the session key, and transmitting it, and at the terminal, decrypting it using a secret code to obtain plain data, recording, in advance, secret codes, each enabling decryption of only data encrypted by a corresponding session key obtained by root-key diversification with a parameter, which can be the transmitted parameter, receiving the parameter in a message that also contains the data to be decrypted by the security processor, and in response, selecting, from the secret codes, a code for decrypting the data encrypted with the session key, as a function of the parameter or another parameter in the message. | 2013-05-23 |
20130132726 | DIGITAL CERTIFICATION METHOD AND APPARATUS - A method for recording a document with authenticity certification information. The method includes receiving an indication from a user regarding their intention to accept and/or receive a proposed set of documentary content elements and presenting a visual display of the documentary content elements. The method further includes presenting and detecting an actuatable acknowledgment mechanism and receiving and transmitting account information to an account provider. The method also includes generating a digital certificate and key pairs from one or more items associated the account information. | 2013-05-23 |
20130132727 | ENHANCED CONTENT MANAGEMENT BASED ON WATERMARK EXTRACTION RECORDS - Content screening operations are facilitated in devices that receive a content that is subject to screening obligations. When such a content is received at a device, a watermark extraction record is obtained and accessed to fulfil content screening obligations. Upon the receipt of such an extraction record, verification of the received extraction record is carried out based on a verification rate. If the verification is successful for an extraction record with permissive information, the verification rate is decreased, thereby reducing the processing load of the device. If the verification is unsuccessful, the verification rate is increased, which can adversely affect the processing load of the device. | 2013-05-23 |
20130132728 | DIGITAL SIGNATURE SERVER AND USER TERMINAL - To reduce a load on a user terminal imposed when verifying signature data and at the same time reduce a load on a server, a signature key matrix KM includes a plurality of signature keys Ki-j arranged in a matrix structure of m rows and n columns, and is stored in a signature key matrix database | 2013-05-23 |
20130132729 | METHOD AND SYSTEM FOR PROTECTING BY WATERMARKING AGAINST NON-AUTHORISED USE ORIGINAL AUDIO OR VIDEO DATA WHICH ARE TO BE PRESENTED - For protecting by watermarking against non-authorised use, e.g. non-authorised recording or copying, original audio or video data which are to be presented in a digital cinema, a sender site generates from the original signal at least two differently pre-watermarked versions for successive blocks or frames of the signal, wherein these versions are derived by applying a repeated watermark symbol value to a version and different watermark symbol values to the different versions. The pre-watermarked signal versions are encrypted and transferred e.g. as data files to a digital cinema unit in which they are decrypted. According to the values of a desired watermark information word, corresponding frames or blocks from said decrypted and pre-watermarked versions are assembled in a successive manner, so as to provide and present a watermarked version of said original audio or video signal that carries said watermark information word. | 2013-05-23 |
20130132730 | Method and System for Transmitting Control Data in a Manner that is Secured Against Manipulation - A method and system for detecting manipulation when control data are transmitted from a first control unit to a second control unit via a network, which includes generating integrity check information data for the control data transmitted by the first control unit via an integrity check generating unit on the transmitter side, calculating a cryptographic checksum for the integrity check information data generated on the transmitter side via the integrity check generating unit, transmitting the integrity check information data and the cryptographic checksum to an integrity check verifying unit that verifies the cryptographic checksum on the receiver side, generating integrity check information data on the receiver side for the control data received by the second control unit using the integrity check verifying unit, and comparing the integrity check information data and the integrity check information data with the cryptographic checksum to detect the manipulation of the transmitted control data. | 2013-05-23 |
20130132731 | ACCESS CONTROL SYSTEM AND ACCESS CONTROL METHOD THEREOF - An access control system and an access control method thereof are provided. The access control system comprises a handheld device, an access control server and a terminal recording device. The handheld device has a user identification. The access control server is configured to store a user identification set, connect to the handheld device within a first time interval, determine that the user identification is included in the user identification set, generate a one-time password (OTP) seed set, and transmit the OTP seed set to the handheld device. The terminal recording device connects to the handhold device within a second time interval, and performs a two-way identification certification with the handheld device according to the OTP seed set so that the handheld device performs a data access to the terminal recording device after achieving the two-way identification certification. | 2013-05-23 |
20130132732 | SIMPLIFIED MULTI-FACTOR AUTHENTICATION - A reader element is associated with an identity verification element. The reader element has a biometric input device and is configured, through enrollment of a biometric element is used to encrypt a character sequence associated with the identity verification element. In a verification phase subsequent to the enrollment, a user may be spared a step of providing the character sequence by, instead, providing the biometric element. Responsive to receiving the biometric element, the reader element may decrypt the character sequence and provide the character sequence to the identity verification element. | 2013-05-23 |
20130132733 | System And Method For Digital Rights Management With System Individualization - Various embodiments of a system and method for digital rights management with system individualization are described. In various embodiments, a DRM component may generate a request for machine-specific credentials specific to the system on which the DRM component is implemented. This request may include device information of component(s) of such system. The DRM component may also receive an encrypted response that includes the machine-specific credentials. This encrypted response may be encrypted with a machine-specific encryption key generated from the device information. In various embodiments the response may be generated by an individualization server that verified the request for machine-specific credentials. The DRM component may also, based on the device information of the system on which the DRM component is implemented, generate an encryption key equivalent to the machine-specific encryption key with which the received response is encrypted. The DRM component may decrypt the encrypted response with the generated encryption key. | 2013-05-23 |
20130132734 | Computing device integrity protection - A method of operating a computer system includes: obtaining, at the computer system, verification-input information associated with each of multiple hardware components of the computer system; cryptographically processing, at the computer system, the verification-input information to obtain a cryptographic result; and determining, at the computer system, whether to allow or inhibit, depending upon a comparison of the cryptographic result with a verification value, further operation of at least one of the hardware components. | 2013-05-23 |
20130132735 | APPARATUS AND METHOD FOR HARDWARE-BASED SECURE DATA PROCESSING USING BUFFER MEMORY ADDRESS RANGE RULES - Disclosed is a processor for processing data from a buffer memory. The processor, implemented in hardware, may allow writing of output data, processed based on input data from at least one secure location associated with a secure address range of the buffer memory, to one or more secure locations associated with the secure address range. Further, the processor may block writing of output data, processed based on input data from at least one secure location associated with the secure address range, to one or more insecure locations associated with an insecure address range of the buffer memory. | 2013-05-23 |
20130132736 | System And Method For Establishing A Shared Secret For Communication Between Different Security Domains - Embodiments may include generating an initial verifier for a first process, the initial verifier generated based on a trusted image of the first process. Embodiments may include, subsequent to generating an untransformed secret associated with the first process, using a reversible transform to transform the untransformed secret with the initial verifier to generate a transformed secret associated with the first process. Embodiments may also include, subsequent to the first process being launched outside of a secure domain, and dependent upon a second verifier generated from a current state of the first process being the same as the initial verifier: using the reversible transform to reverse transform the transformed secret with the second verifier to generate a de-transformed secret equal to the untransformed secret. Embodiments may include performing a secure communication protected with a cryptographic key generated based on the de-transformed secret. The communication may be performed across different security domains. | 2013-05-23 |
20130132737 | CRYPTOGRAPHIC SUPPORT INSTRUCTIONS - A data processing system | 2013-05-23 |
20130132738 | Externally Powered System Access - A method, programmed medium and system are provided for an enhanced interface connection for a primary electronic device such that system storage devices (e.g. hard drives, solid state drives, flash drives, etc.) within the primary device may be made available to other nearby devices in the event of a power supply failure or battery failure or to preserve-battery power in the primary system whereby the data on a storage device within a primary system becomes accessible by external devices, without necessitating the removal of the storage medium or full powering-up of the primary system. | 2013-05-23 |
20130132739 | STORAGE DEVICE - A storage device started when connected to a computer so as to be able to communicate. The storage device includes: an interface for controlling communication with the computer, a data storage unit for storing data received from the computer via the interface, a radio signal processing unit for receiving radio signals including ID information at a predetermined timing and for authenticating the received ID information, and a control unit for encrypting data using the authenticated ID information as a key, for sending the encrypted data to a data storage unit, and for disabling communication with the computer via the interface when radio signals including the authenticated ID information are not received by the radio signal processing unit within a predetermined period of time. | 2013-05-23 |
20130132740 | Power Control for Memory Devices - A power controller is configured to deliver different power levels to different types of memory devices. The power controller includes a selecting unit to select a control mode that controls power delivered to a memory device. The selecting unit includes a first input configured to receive a mode signal, multiple control inputs configured to receive several control mode signals, and multiple outputs configured to output power to the memory device. The selecting unit selects the control mode according to the received mode signal and outputs power according to the control modes signals. | 2013-05-23 |
20130132741 | POWER SUPPLY APPARATUS OF COMPUTER SYSTEM AND METHOD FOR CONTROLLING POWER SEQUENCE THEREOF - A power supply apparatus of a computer system and a method for controlling a power sequence thereof are provided. The power supply apparatus includes a power sequence module, a voltage supply unit, and a state recording module. The power sequence module provides voltage enable signals in turn according to first power-good signals. The voltage supply unit provides power voltages in turn according to the voltage enable signals and returns second power-good signals. Components in the computer system also provide third power-good signals when the components receive the power voltages. When one of the third power-good signals is converted from enabled to disabled, the state recording module delays a tolerance period according to the component corresponding to the third power-good signal, and converts the first power-good signal corresponding to the third power-good signal from enabled to disabled after the tolerance period is delayed. | 2013-05-23 |
20130132742 | CHARGING CONTROL METHOD FOR A RECHARGEABLE BATTERY AND PORTABLE COMPUTER - Disclosed are charging control methods for a rechargeable battery and portable computers. The charging control method includes acquiring a control parameter for a charge current of the rechargeable battery; modifying, based on the control parameter, the charge current from a first charge current to a second charge current less than the first charge current; and charging the rechargeable battery with the second charge current. Compared with conventional methods of charging the battery always with the maximal charge current, the present disclosure can improve the battery's lifetime. | 2013-05-23 |
20130132743 | INDUCTIVE RECEIVERS FOR ELECTRICAL DEVICES - A power providing system for an electrical device includes a secondary inductor, wired to the electrical device, for inductively coupling with a primary inductor hardwired to a power supply. The secondary inductor is incorporated into an accessory of the electrical device. | 2013-05-23 |
20130132744 | STATE CONTROL SYSTEM AND METHOD - A controlled apparatus periodically transmits state information indicating the state of the apparatus, and when the state has been changed, transmits state information indicating the state after the change. Upon receiving state information from the controlled apparatus, a control apparatus, when not requesting a change of state in the controlled apparatus, returns the state information to the controlled apparatus, and when requesting a change of the state in the controlled apparatus, changes state parameters in the state information that correspond to the state to be changed to required values and transmits the state information after the change to the controlled apparatus as a control command. The controlled apparatus, upon receiving the control command from the control apparatus, changes to a state in accordance with the state parameters that follow the change and transmits the state information indicating the state after the change to the control apparatus. | 2013-05-23 |
20130132745 | SYSTEM AND METHOD FOR NETWORK ENABLED WAKE FOR NETWORKS - A method is provided in one example embodiment and includes receiving a message at a network element configured for routing packets, where the message directs a network device to change its power state; identifying the network device as being associated with a network for which the network element has responsibility; and communicating at least a portion of the message from the network element to the network device. | 2013-05-23 |
20130132746 | BRIDGING DEVICE AND POWER SAVING METHOD THEREOF - A bridging device and a power saving method thereof are disclosed. The disclosed bridging device includes a connector, a connection detector and a bridging chip. The connector is operative to connect to a host and includes a power pin and a command pin. The connection detector is coupled to the power pin to determine whether the connector is floating, and, outputs a linked signal when the connection is non-floating. The bridging chip is coupled to the command pin and the connection detector. When the bridging chip receives a power saving command transferred from the host via the command pin and the linked signal transferred from the connection detector, the bridging chip executes a power saving operation. | 2013-05-23 |
20130132747 | INFORMATION PROCESSING APPARATUS WITH POWER CONTROL UNIT, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING CONTROL PROGRAM THEREFOR - An information processing apparatus that is capable of reducing power consumption. A power supply unit supplies electric power to devices including first and second devices of the apparatus. A power-state-switching unit switches a power state of the apparatus among a first power state in which the power supply unit supplies power to the devices, a second power state in which the power supply unit does not supply power to the first device without supplying power from a secondary battery to the devices, and a third power state in which the secondary battery supplies power to the second device. A control unit controls so that the secondary battery is charged by the power supplied from the power supply unit in the first power state, and to control so that the secondary battery is not charged by the power supplied from the power supply unit in the second and third power states. | 2013-05-23 |
20130132748 | Control Method for Shared Devices and Electronic Device - The present invention discloses a control method for shared devices and an electronic device. The control method of shared devices is used in an electronic device comprising a first subsystem and a second subsystem, the electronic device having a first state and a second state, the first state being a state wherein both the first subsystem and the second subsystem are in the working state, the second state being a state wherein the first subsystem is in the non-working state and the second subsystem is in the working state, the electronic device further comprising shared devices used by the first subsystem and the second subsystem, the method comprising: acquiring a first instruction, the first instruction, which is generated by the first subsystem and is transmitted to the shared devices during the switching process between the first state and the second state of the electronic device, being used to adjust a current working state of the shared devices; acquiring a second instruction, the second instruction being a control instruction, which is generated when the electronic device is switching between the first state and the second state; controlling the state of the shared devices to be the current working state based on the first instruction and the second instruction. | 2013-05-23 |
20130132749 | ADAPTIVE POWER CONTROL - A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating characteristics of the central processor are significantly different than required by the operations being conducted, and changing the operating characteristics of the central processor to a level commensurate with the operations being conducted. | 2013-05-23 |
20130132750 | ELECTRONIC DEVICE AND METHOD FOR UPDATING A TIME IDENTIFIER ASSOCIATED THEREWITH - An electronic device includes an input device, an output device, a memory capable of storing an alert, and a processor coupled with the input device, the output device and the memory. The processor is configured to identify a current time, receive a command to switch the electronic device from a first operating mode to a second operating mode, and identify a record in a data-store. The record stores a first time identifier. The processor is further configured to identify a second time identifier. The processor automatically changes the second time identifier to be sooner than or equal to the first time identifier, automatically switches the electronic device from the second operating mode to the first operating mode when the current time matches the second time identifier, and presents the alert via the output device when the current time matches the first time identifier. | 2013-05-23 |
20130132751 | ELECTRONIC DISPLAY DEVICE AND POWER SAVING METHOD - An electronic display device detects whether a user is in front of a display via a camera according to a first frequency in a working mode of the electronic display device. If the electronic display device detects that the user is not in front of the display for a first predefined time period, the electronic display device enters a power saving mode by turning off the display. The electronic display device detects whether the user is in front of the display again via the camera according to a second frequency in the power saving mode. The electronic display device reduces the second frequency after the user is not in front of the display for a second predefined time period. The electronic display device enters the working mode by turning on the display when detecting that the user is in front of the display again. | 2013-05-23 |
20130132752 | POWER SUPPLIER OF COMPUTER SYSTEM AND POWER SUPPLY METHOD THEREOF - A power supplier of a computer system and a power supply method thereof are described. The power supply method includes the following steps, receiving a validation code when a computer system enters a working mode from a standby mode; determining whether the validation code is in accordance with a preset code; If the validation code is in accordance with the preset code, executing a power sequence control so that the power supplier generates a plurality of working voltages required by the computer system; and if the validation code is not in accordance with the preset code, powering off the computer system or keeping the computer system in the standby mode. | 2013-05-23 |
20130132753 | INFORMATION PROCESSING DEVICE AND METHOD - An information processing device comprises a first memory, a second memory, data transfer circuitry, power gating circuitry, and a controller. The first memory comprises at least two volatile memory units The controller receives or generates a request for setting the information processing device into a reduced power mode; in response to the request, it selects specific memory units among the memory units; controls the data transfer circuitry to transfer data from the selected memory units to the second memory; and controls the power gating circuitry to power down the selected memory units. | 2013-05-23 |
20130132754 | REDUCING POWER CONSUMPTION BY MASKING A PROCESS FROM A PROCESSOR PERFORMANCE MANAGEMENT SYSTEM - Energy savings can be obtained by masking a computationally-intensive task from a processor performance management system which selects the processor performance state based on the load on the processor (CPU). By preventing the PPM system from reacting to the computational load the application places on the processor, the time to complete execution of the application increases but the energy used by the application may be greatly reduced and thermal stress on the CPU is also reduced (preventing noisy fans from operating). This approach makes it convenient to run a computationally intensive task as a background task. The masking can be achieved by running the task in tiny bursts, with micro-sleeps in between them, so that the average CPU load is low over a time period that the PPM system uses for measuring CPU activity/load. | 2013-05-23 |
20130132755 | POWER MANAGEMENT OF LOW POWER LINK STATES - A method and apparatus for intelligent power management for low power link states. Some embodiments include methods, apparatuses, and systems for a device coupled to a controller via a link; a link power management engine to alter a power state of the link based on a transaction and some knowledge of future transactions between the device and the controller; and a memory or logic to store the link power management engine. In some embodiments, the memory stores information about at least one of the following: the power state of the link, the device buffering, the controller or device state or a history of transactions. In some embodiments, the device is a peripheral of a computer system. In some embodiments, the method may include transitioning the device to various link states. Other embodiments are described. | 2013-05-23 |
20130132756 | ELECTRONIC CIRCUIT AND METHOD FOR STATE RETENTION POWER GATING - An electronic circuit includes a processor having a functional mode and a low power mode, said processor comprising state flip-flops and additional flip-flops; said state flip flips are arranged to store state information about a state of the processor when the processor is in the functional mode; said state flip-flops comprise non-reset flip-flops that are arranged to store at least one non-reset value when the processor exits the functional mode; a power management circuit for providing power to the processor when the processor is in the functional mode, and for preventing power from the processor when the processor is in the low power mode; a non-reset value identification module, coupled to the state flip-flops, said non-reset value identification module is arranged to identify the non-reset flip-flops and to generate non-reset information that identifies the non-reset flip-flops; and a recovery circuit, coupled to a memory module and to the state flip-flops. | 2013-05-23 |
20130132757 | POWER-ON CONTROLLING METHOD AND SYSTEM THEREOF - A power-on controlling method and system are provided. The system includes a power management unit, a voltage regulating module and a power controller. After booting a computer system, the power controller controls the power managing unit to selectively execute a discontinuous mode or a continuous mode according to a selection command, so as to control the voltage regulating module to regulate a system voltage supplied for electric elements in the computer system, thus finishing the system initialization action, and improving the flexibility in monitoring the power of computer system. | 2013-05-23 |
20130132758 | HUB DEVICE AND SYSTEM USING THE SAME - The hub device includes a USB hub IC; a voltage converter that converts a source voltage supplied to the Hub device into a source voltage to be supplied to the USB device/devices connected to the plurality of downstream ports, and, in a case that the USB device/devices is/or in an abnormal condition, outputs a signal notifying the abnormal condition; and a plurality of switch units that interrupts a source voltage to the USB device/devices, and outputs an overcurrent detection signal when overcurrent flows into the USB device/devices, wherein the USB hub IC includes a plurality of overcurrent detection terminals into which the overcurrent detection signal from the plurality of switch units is input, and a signal notifying the abnormal condition causes the plurality of overcurrent detection terminals of the USB hub IC to be in an overcurrent detection condition. | 2013-05-23 |
20130132759 | COMPUTER COMPONENT POWER-CONSUMPTION DATABASE - A computer has components having respective baseline component settings and non-baseline component settings. The computer includes storage media encoded with a program for comparing power consumption when non-baseline settings are in effect with power consumption when a baseline computer setting is in effect to determine power-consumption values to be stored in a database. | 2013-05-23 |
20130132760 | Apparatus and Method for Achieving Glitch-Free Clock Domain Crossing Signals - A computer implemented method includes identifying in an original circuit output signals that drive domain crossing logic separating a first clock domain from a second clock domain. A revised circuit is formed with a register attached to the domain crossing logic. The register receives an output signal and a synchronization signal that precludes the output signal from transitioning at selected clock cycle intervals. | 2013-05-23 |
20130132761 | MEMORY MODULE INCLUDING A PLURALITY OF SYNCHRONOUS MEMORY DEVICES - A memory module that includes a buffer and a plurality of synchronous memory devices. The memory module also includes bidirectional bus lines, and each of the synchronous memory devices has bidirectional data terminals. The buffer is configured to regenerate signals received on the bus lines for receipt by the synchronous memory devices, and to regenerate signals received from any one of the synchronous memory devices for receipt by the bus lines. The memory module may further include command lines and a clock line for providing commands and a clock signal to the synchronous memory devices via a command buffer. The combined data bus width of the memory module may be greater than the data bus width of any single one of synchronous memory device, and the total address space provided by the memory module may be larger than the data space for any single synchronous memory device. | 2013-05-23 |
20130132762 | AUTOMATED NODE FENCING INTEGRATED WITHIN A QUORUM SERVICE OF A CLUSTER INFRASTRUCTURE - A quorum service within a cluster infrastructure layer of a cluster environment comprising a plurality of nodes automatically triggers at least one automated fencing operation integrated within the quorum service, to reliably maintain a node usability state of each node of the plurality of nodes indicating an availability of each node to control and access at least one shared resource of the cluster. The quorum service reports the node usability state of each node as a cluster health status to at least one distributed application within an application layer of the cluster environment, to provide a reliable cluster health status of the plurality of nodes to the at least one distributed application for a failover of said at least one shared resource from control by a failed node from among the plurality of nodes to another node from among the plurality of nodes. | 2013-05-23 |
20130132763 | NETWORK DISRUPTION PREVENTION WHEN VIRTUAL CHASSIS SYSTEM UNDERGOES SPLITS AND MERGES - A method performed by network devices that includes operating in a normal mode, where the network devices form a virtual chassis that corresponds to a single logical network device; detecting when a failure within the virtual chassis occurs; executing a splitting process to form one or more new virtual chassis in correspondence to the failure; determining whether one of the one or more new virtual chassis operates as a functioning virtual chassis based on whether at least one of a set of criteria is satisfied, where the functioning virtual chassis operates according to resources configured for the virtual chassis; and operating as a nonfunctioning virtual chassis when it is determined that the one of the one or more virtual chassis does not satisfy the at least one of the set of criteria, where the nonfunctioning virtual chassis operates in a pass-through mode. | 2013-05-23 |
20130132764 | SYSTEM REDUNDANCY AND SITE RECOVERY - A method may include receiving an order associated with processing a media file and forwarding the order to a resource management system. The method may also include identifying, by the resource management system, tasks associated with fulfilling the order, storing the plurality of tasks and identifying an execution system to execute the tasks. The method may further include forwarding, by the resource management system, the tasks to the execution system. | 2013-05-23 |
20130132765 | Mechanism to Provide Assured Recovery for Distributed Application - A system and method is provided for providing assured recovery for a distributed application. Replica servers associated with the distributed application may be coordinated to perform integrity testing together for the whole distributed application. The replica servers connect to each other in a manner similar to the connection between master servers associated with the distributed application, thereby preventing the replica servers from accessing and/or changing application data on the master servers during integrity testing. | 2013-05-23 |
20130132766 | METHOD AND APPARATUS FOR FAILOVER AND RECOVERY IN STORAGE CLUSTER SOLUTIONS USING EMBEDDED STORAGE CONTROLLER - Disclosed is a storage enclosure having a plurality of servers each having a storage controller. A second storage controller that is not part of any of the plurality of servers is embedded in the storage enclosure. The second storage controller is configured to process I/O commands directed to one of the server's storage controllers when a storage controller fails. In this manner, the storage controllers that are part of the servers may be fully utilized and still have a failover capability to the enclosure storage controller instead of another server storage controller that may also be fully utilized. | 2013-05-23 |
20130132767 | INFORMATION SYSTEM AND I/O PROCESSING METHOD - Information system, including: first and second storage apparatuses connected to a host computer and including volumes designated by a common volume identifier, but being accessible via differing paths of differing priorities. A failure detection storage apparatus connected to the storage apparatuses includes a third volume. Any I/O request designating the common volume identifier, is first sent to the first volume though the first access path, but upon error is then sent to the second volume thorough the second access path. The first or second storage apparatus detecting failure stores, in the third volume, a failure information flag. Upon receiving an I/O request through the second access path, the second storage apparatus determines whether the failure information flag is stored in the third volume, and sends an error reply of the I/O request to the host computer if the failure information flag is stored in the third volume. | 2013-05-23 |
20130132768 | USE OF A VIRTUAL DRIVE AS A HOT SPARE FOR A RAID GROUP - A method that includes identifying a failure indication for a first data storage device that is a member of a first RAID group within a storage array. The method further can include, via a processor external to the storage array, identifying a virtual drive that is defined to include at least one logical storage volume defined in a second RAID group. The virtual drive can be provisioned to serve as a virtual hot spare within the first RAID group to replace the first data storage device. | 2013-05-23 |
20130132769 | USE OF A VIRTUAL DRIVE AS A HOT SPARE FOR A RAID GROUP - A method that includes identifying a failure indication for a first data storage device that is a member of a first RAID group within a storage array. The method further can include, via a processor external to the storage array, identifying a virtual drive that is defined to include at least one logical storage volume defined in a second RAID group. The virtual drive can be provisioned to serve as a virtual hot spare within the first RAID group to replace the first data storage device. | 2013-05-23 |
20130132770 | METHOD AND APPARATUS FOR RECONSTRUCTING REDUNDANT ARRAY OF INEXPENSIVE DISKS, AND SYSTEM - Embodiments of the present invention provide a method and apparatus for reconstructing a RAID, and a system, when a first physical disk is faulty, finding DUs of other physical disks, where the DUs are located on a same LDS as a DU of the first physical disk, in each logic module of a pre-generated layout template, performing exclusive-OR on data read from the DUs of other physical disks, and writing the data into a hot spare DU of a second physical disk; and in the layout template, replacing a DU identifier of the first physical disk with a DU identifier of the second physical disk, where DUs corresponding to DU identifiers in each LDS in the layout template belong to different physical disks. The present invention can reduce time needed for writing the data, shorten time needed for RAID reconstruction and restoration, and improve a reconstruction speed. | 2013-05-23 |
20130132771 | METHOD AND APPARATUS FOR PROVIDING INFORMATION CONSISTENCY IN DISTRIBUTED COMPUTING ENVIRONMENTS - An approach is provided for providing information consistency in distributed computing environments. An information consistency platform determines one or more finite state machines based, at least in part, on one or more states of one or more respective steps of at least one update operation operating on one or more data items, wherein the one or more finite state machines executes, at least in part, the at least one update operation, one or more other operations, or a combination thereof on the one or more data items. | 2013-05-23 |
20130132772 | EMBEDDED MEMORY WITH SYSTEM REPAIR DATA AND SYSTEM REPAIR METHOD THEREFOR - An embedded memory with system repair data is provided. The embedded memory includes a flash memory unit, a storage unit, and a control unit. The flash memory unit stores an in-system programming (ISP) code. The storage unit stores a system repair code. The system repair code is used for rebuilding the ISP code. The control unit is electrically connected to the flash memory unit and the storage unit. The control unit determines whether the ISP code has been broken and reads the system repair code to rebuild the ISP code when the ISP code has been broken. A system repair method for the embedded memory is also provided, which comprises the steps of determining that the ISP code stored in the flash memory unit has been broken, reading the system repair code stored in the memory unit, and rebuilding the ISP code according to the system repair code. | 2013-05-23 |
20130132773 | FAST RESOURCE RECOVERY AFTER THREAD CRASH - A resource recovery system may maintain a counter in memory that indicates a number of times one or more threads of execution, which use shared resources, have crashed. The system may associate a first value of the counter with a resource allocated to a thread of the one or more threads, and may set an indicator associated with the thread to indicate whether the thread has crashed. The system may determine whether to re-allocate the resource to the thread based on the first value of the counter associated with the resource and based on the indicator associated with the thread. | 2013-05-23 |
20130132774 | AUTOMATED TESTING OF APPLICATIONS IN CLOUD COMPUTER SYSTEMS - A system and method for performing automated testing of an application in a cloud environment. A controller initializes an manages a number of virtual machines (VM), each VM including a test engine. The controller retrieves configuration data, determines a number of VMs to deploy, and initializes the VMs. The controller manages each VM by providing test commands and monitoring the results. Each VM receives and executes the test commands. The system may be used to test interactive applications or non-interactive applications. | 2013-05-23 |
20130132775 | DIAGNOSTIC MODULE DELIVERY DEVICE, DIAGNOSTIC MODULE DELIVERY METHOD, AND RECORDING MEDIUM - A diagnostic module delivery server includes a diagnostic selecting unit that reads a failure rate of a component from a component database that stores therein the failure rates of the components obtained based on the maintenance history of the components constituting a maintenance target server. Furthermore, the diagnostic selecting unit determines whether to diagnose the component in accordance with the result of comparing the read failure rate of the component and a failure rate reference value that is stored in a diagnostic reference value database. Furthermore, the diagnostic module delivery server transmits, to the maintenance target server, a diagnostic module that is used to diagnose the component in which it is determined, by the diagnostic selecting unit, that the diagnostics is to be performed. | 2013-05-23 |
20130132776 | METHOD FOR OUTPUTTING POWER-ON SELF TEST INFORMATION, VIRTUAL MACHINE MANAGER, AND PROCESSOR - The present disclosure provides a method for outputting power-on self test information, a virtual machine manager, and a processor. The method includes: receiving trigger information generated by a BIOS program when the BIOS program runs a predefined virtual mode trigger instruction, starting, by a virtual machine manager, the virtual machine manager and monitoring a processor, where the processor is a processor that enters a virtual mode after receiving the trigger information of the BIOS program; when detecting that the processor generates an exit instruction, obtaining power-on self test information after the BIOS program performs a power-on self test operation, and outputting the power-on self test information to a serial port. Power-on self test information may be output without using a motherboard diagnostic card, so that device resources are saved. In addition, the operation is simple, and no human control operation is required. | 2013-05-23 |
20130132777 | ANALYSIS OF SYSTEM TEST PROCEDURES FOR TESTING A MODULAR SYSTEM - The present invention relates to a method of determining an analyzing level for analyzing a system test procedure for testing a modular system having functional modules, comprising acquiring dependency data comprising dependency information describing at least one functional dependency of at least one functional module, acquiring change data comprising change information describing a change in a module test procedure for testing at least part of the at least one functional module located at a first system test level, acquiring impact data comprising impact information describing an impact of the change in the module test procedure on testing a functionality of the at least one functional module based on the dependency information and the change information, determining, based on the impact information, analyzing level data comprising analyzing level information describing an analyzing level being the system test level at which the system test procedure is analyzed. | 2013-05-23 |
20130132778 | ISOLATION OF PROBLEMS IN A VIRTUAL ENVIRONMENT - Problem isolation in a virtual environment is described. In one example, a method ( | 2013-05-23 |
20130132779 | MEMORY MODULES WITH RELIABILITY AND SERVICEABILITY FUNCTIONS - One embodiment of the present invention sets forth a memory module that includes at least one memory chip, and an intelligent chip coupled to the at least one memory chip and a memory controller, where the intelligent chip is configured to implement at least a part of a RAS feature. The disclosed architecture allows one or more RAS features to be implemented locally to the memory module using one or more intelligent register chips, one or more intelligent buffer chips, or some combination thereof. Such an approach not only increases the effectiveness of certain RAS features that were available in prior art systems, but also enables the implementation of certain RAS features that were not available in prior art systems. | 2013-05-23 |
20130132780 | Method for Automatically Detecting and Excluding a Tracing Instruction from Further Trace Data Generation for a Software System, a Computer System, and a Computer Program Product - The invention relates to a method, a computer system, and a computer program product for automatically detecting and excluding a tracing instruction from further trace data generation for a software system on a computer system, wherein the method comprising steps of: providing a binary code of a software system, wherein the binary code comprises a plurality of tracing instructions, each of the tracing instructions configured to initiate trace data generation during runtime of the binary code, generating trace data by running the binary code during runtime, performing an analysis of a present trace data set, deriving a characterizing parameter from the analysis, the characterizing parameter assigned to a tracing instruction out of the plurality of tracing instructions, comparing the characterizing parameter against a threshold criterion also assigned to the tracing instruction, and if the characterizing parameter fulfils the threshold criterion, excluding the tracing instruction from further trace data generation. | 2013-05-23 |
20130132781 | Program Counter (PC) Trace - In one embodiment, an integrated circuit comprises a first processor configured to output program counter (PC) trace records, wherein PC trace records provide data indicating the PCs of instructions retired by the first processor. The integrated circuit further comprises a second source of trace records, and a trace unit coupled to receive the PC trace records from the first processor and the trace records from the second source. The trace unit comprises a trace memory into which the trace unit is configured to store the PC trace records and trace records from the second source. The trace unit is configured to interleave the PC trace records and the trace records from the second source in the trace memory according to the order of receipt of the records. | 2013-05-23 |
20130132782 | METHOD TO IMPROVE I/O RELIABILITY ON A DEGRADED WIDE PORT CONNECTION - A method and system for controller level identification and isolation of a degraded physical link (PHY) in a serial attached small computer system interface (SA-SCSI) or SAS domain. The method and system uses computer readable code embodied within the controller level of an SAS domain to monitor a plurality of PHY pairs associated as connecting through a wide port. The invention compares a history of PHY pair errors to a tunable timer to determine if PHY errors reach a threshold. Should the threshold be exceeded, the controller disables the error prone PHY pair and delivers a notification. The controller may then re-enable the disabled PHY after user action or port power up. | 2013-05-23 |
20130132783 | REPRESENTATION AND MANIPULATION OF ERRORS IN NUMERIC ARRAYS - In an embodiment, a computer system accesses various different data entries in dense data array, where at least one of those data entries in the dense data array is invalid. The computer system creates an associated sparse data array that includes multiple data entries with zero values as well as data entries with non-zero values. The non-zero data entries are configured to store location information and data values for each of the invalid data entries in the dense array. The zero-value data entries are inferred from the location information of the non-zero data entries. The computer system stores the location information and data values of the non-zero data entries in the sparse data array. Those data values stored in the sparse array are proportional to the number of invalid values in the dense array. | 2013-05-23 |
20130132784 | DEVICE AND METHOD FOR DETERMINING A PHYSICAL QUANTITY - In a method and a device for determining a physical quantity from a number of measured values containing errors, grouping of the number of measured values containing errors into a plurality of subgroups of measured values is executed, wherein each subgroup includes a redundancy, so that more measured values than the number of measured quantities are contained in each subgroup. Hereupon, a reliability quantity for each subgroup is calculated based on the redundancy contained in the subgroup. Further, individual evidence is allocated to the measured values containing errors of each subgroup based on the reliability quantity for the respective subgroups. An evidence determiner determines one overall evidence each for each measured value containing errors based on the individual evidence quantities for a respective measured value. Hereupon, a processor calculates the physical quantity using at least some of the measured values containing errors and at least some of the overall evidences. | 2013-05-23 |
20130132785 | DOUBLE DATA RATE SIGNAL TESTING ASSISTANT DEVICE - A DDR signal testing assistant device includes a body. The body is detachably locked to a motherboard integrated with a DDR connector. The DDR connector defines a plurality of pins. The body defines a plurality of testing holes corresponding and mating with the pins. Each testing hole of the body is marked with characters. The characters indicate the denomination or property of each corresponding pin of the DDR connector. | 2013-05-23 |
20130132786 | COMMUNICATION SYSTEM, COMMUNICATION DEVICE, AND DATA FRAME RETRANSMISSION CONTROL METHOD - A mobile station device configured to communicate with a base station device by a time division duplex (TDD) scheme, and to transmit retransmission data to the base station device by an automatic retransmission scheme in response to reception acknowledgement information transmitted from the base station device, the mobile station device including a controller configured to determine a number of frames from a reception of the reception acknowledgement information to a transmission of the retransmission data, based on a position of a reception slot within a reception frame, the reception slot including the reception acknowledgement information. | 2013-05-23 |
20130132787 | LIGHTING CONTROL PROTOCOL - A digital lighting control network protocol with forward and backward frames, each of the frames including an error check code. A no-acknowledgment (NAK) signal is sent from a receiving node to a transmitting node responsive to the error check code. An interface circuit of the receiving node may include an energy storage section to store at least some energy from the network while receiving digital signals, and an output section to transmit digital signals to the network using the stored energy. The interface circuit may also include a high voltage buffer circuit. The transmitting node may send forward frames to receiving nodes based on device type. | 2013-05-23 |
20130132788 | METHOD FOR TRANSMISSION OF DATA IN A RADIO COMMUNICATION SYSTEM, FIRST NETWORK NODE AND SECOND NETWORK NODE THEREOF - The invention relates to a method (MET | 2013-05-23 |
20130132789 | VIDEO TRANSMISSION SYSTEMS AND METHODS OVER CARRIER ETHERNET - The present disclosure provides video transmission systems and methods with video data flows transmitted over a Carrier Ethernet Network at Layer 2 with redundancy in order to provide hitless protection switching and uninterrupted video service delivery, such as during periods of asymmetric congestion or hard network failures. In an exemplary embodiment, the video transmission systems and methods provide the redundancy in a manner similar to 1+1 linear protection with hit-less protection switching. In another exemplary embodiment, the video transmission systems and methods provide encapsulated video signals over Ethernet using standardized Carrier Ethernet frames with additional sequencing information. Optionally, the video transmission systems and methods may also include packet-based forward error correction information for additional resiliency. These video transmission systems and methods provide uninterrupted and error-free video during broadcast despite network events such as fiber breaks, equipment failures, congestion, etc. | 2013-05-23 |
20130132790 | Probability-Based Multi-Level LDPC Decoder - Various embodiments of the present invention are related to methods and apparatuses for decoding data, and more particularly to methods and apparatuses for probability-based multi-level LDPC decoding. For example, in one embodiment an apparatus includes a horizontal updater in a low density parity check decoder operable to iteratively perform row processing to update probabilities of multi-level symbol values, a vertical updater in the low density parity check decoder operable to iteratively perform column processing to update the probabilities of the multi-level symbol values, and a check sum calculation circuit operable to calculate total soft values for the multi-level symbol values. | 2013-05-23 |
20130132791 | INTERRUPTION CRITERIA FOR BLOCK DECODING - While decoding a representation, imported from a channel, of a codeword that encodes K information bits as N>K codeword bits, by updating estimates of the codeword bits in a plurality of iterations, the iterations are interrupted upon satisfaction of an interruption criterion that is either an order-dependent interruption criterion or an interruption criterion that includes an estimate of mutual information of the codeword and a vector that is used in the decoding iterations. Either the iterations are terminated or the iterations are resumed after one or more elements of one or more vectors used in the iterations is/are modified. | 2013-05-23 |
20130132792 | STORAGE DEVICE INCLUDING ERROR CORRECTION FUNCTION AND ERROR CORRECTION METHOD - According to one embodiment, a storage device includes a first encoder, s storage medium, a second encoder, and a wireless communication unit. The first encoder generates a first codeword including a first information part corresponding to at least a part of write data, and a first redundant part used to correct the first information part. The storage medium stores the first codeword. The second encoder generates a second redundant part used to correct a second information part corresponding to the first codeword or the first information part. The wireless communication unit wirelessly transmits the second redundant part to an external storage device. | 2013-05-23 |