19th week of 2011 patent applcation highlights part 19 |
Patent application number | Title | Published |
20110109292 | METHODS AND SYSTEMS FOR CONTROLLING BOOST CONVERTERS - A method for controlling a boost converter having a duty cycle includes the steps of receiving an electric current command for the boost converter, measuring a source current for the boost converter, regulating the duty cycle as a function of the electric current command and the source current, subject to a first minimum limit if a rapid change in duty cycle is required above a predetermined threshold and a second minimum limit if the rapid change in duty cycle is not required. | 2011-05-12 |
20110109293 | SYSTEMS AND METHODS FOR LIMITING INPUT POWER AND RMS INPUT CURRENT DRAWN FROM A DC POWER SOURCE - Systems and methods to source a resistive load, such as a heating resistor, to control temperature while adhering to a specified power draw budget and/or a specified root mean square (RMS) current limit. For example, a sensor block assembly (SBA) heater controls temperature of a MEMS device in a sensor block assembly while adhering to the power draw budget and/or an average current limit. An exemplary embodiment generates a pulse width modulation (PWM) control signal, controls a switch in accordance with the control signal, sources the resistive load from a power source in accordance with the controlled switch, and modifies the duty factor of the switch to reduce the power drawn by the resistive load in response to the power drawn by the resistive load exceeding a power limit defined by a slope-intercept curve. The limiting of power into a resistor load limits the RMS current drawn by that load. | 2011-05-12 |
20110109294 | METHOD FOR DETERMINING PRE-BIAS IN A SWITCH-MODE CONTROLLER - A switch-mode controller, buck converter or DC to DC step-down regulated voltage converter that senses an initial pre-bias voltage at initialization and adjust a duty cycle of the switching frequency to help minimize an output voltage transient at initialization or power-on reset. | 2011-05-12 |
20110109295 | SEMICONDUCTOR DEVICE AND DC-DC CONVERTER - According to one embodiment, a semiconductor device includes a first switching element and a second switching element. The first switching element has a first threshold voltage and a first gate electrode connected to a first gate wiring. The second switching element has a second threshold voltage and a second gate electrode connected to a second gate wiring. The second threshold voltage has a larger absolute value than the first threshold voltage. The second gate wiring has a larger resistance per unit length than the first gate wiring. | 2011-05-12 |
20110109296 | Voltage Regulator Architecture - An integrated circuit includes a bandgap reference generator and a voltage regulator. The bandgap reference generator includes a first current path, and a first bipolar transistor with an emitter-collector path in the first current path. The voltage regulator includes a second current path, wherein the second current path mirrors the first current path; a resistor configured to receive a current of the second current path; a second bipolar transistor with a base and a collector of the second bipolar transistor being interconnected; and a third bipolar transistor connected in series with the second bipolar transistor and the resistor. A base and a collector of the third bipolar transistor are interconnected. | 2011-05-12 |
20110109297 | PARALLEL AC SWITCHING WITH SEQUENTIAL CONTROL - Parallel switches arranged to transfer power between an AC power source and a load may be individually operated during different portions of the AC waveform. In some embodiments, the switches may be operated during alternate cycles of the waveform to cause the individual switches to sequentially conduct the entire load current. | 2011-05-12 |
20110109298 | Power converting device and power supply apparatus - Each voltage converting unit outputs a first signal at a first output and second signal at a second output. Each first transforming unit includes a magnetically coupled primary and secondary coil, the first output of each one of the converting units is connected to a primary coil of a different one of the first transforming units, the primary coil of each one of the first transforming units is electrically connected to one secondary coil of another one of the first transforming units. Each second transforming units includes a magnetically coupled primary and a secondary coil, the second output of each one of the voltage converting units is connected to a primary coil of a different one of the second transforming units, the primary coil of each one of the second transforming units is electrically connected to one secondary coil of another one of the second transforming units. | 2011-05-12 |
20110109299 | Stable Fast Programming Scheme for Displays - A technique for improving the spatial and/or temporal uniformity of a light-emitting display by providing a faster calibration of reference current sources and reducing the noise effect by improving the dynamic range, despite instability and non-uniformity of the transistor devices. A calibration circuit for a display panel having an active area having a plurality of light emitting devices arranged on a substrate, and a peripheral area of the display panel separate from the active area is provided. The calibration circuit includes a first row of calibration current source or sink circuits and a second row of calibration current source or sink circuits. A first calibration control line is configured to cause the first row of calibration current source or sink circuits to calibrate the display panel with a bias current while the second row of calibration current source or sink circuits is being calibrated by a reference current. A second calibration control line is configured to cause the second row of calibration current source or sink circuits to calibrate the display panel with the bias current while the first row of calibration current source or sink circuits is being calibrated by the reference current. | 2011-05-12 |
20110109300 | MULTI-RANGE ELECTRICAL CURRENT MEASUREMENT - An electrical current measurement system. A first low-range current gauge receives a current to be measured and provides a first intermediate value indicative of the amplitude of the current up to a first maximum current. A second low-range current gauge receives any portion of the current having a magnitude that exceeds the first maximum current and provides a second preliminary value indicative of the amplitude of the portion of the current having a magnitude that exceeds the first maximum current up to a second maximum current. An arithmetic unit or a digital processor receives the first intermediate value and the second preliminary value and provides a second intermediate value indicative of the amplitude of the current. A full-range current gauge may also be provided. A selector or the digital processor selects one of the values for display or other output. | 2011-05-12 |
20110109301 | Device And Method For Measuring Current And Power In A Plug Or Receptacle - An aspect of the present disclosure relates to an electrical receptacle configured to receive a plug having two or more prongs and capable of being connected to an associated load. The electrical receptacle may include a housing and a housing cover mounted on the housing including apertures for receiving at least one of the prongs. In addition, the receptacle may include at least two electrical contacts for engaging the prongs positioned in the housing, a magnetic current sensor defining an opening, wherein the magnetic current sensor opening is operatively coupled to an opening defined by at least one of the apertures. Wherein when one of the prongs is inserted through one of the apertures, the prong extends to through the magnetic current sensor and engages at least one of said electrical contacts. | 2011-05-12 |
20110109302 | Presettable transducer for electrical quantities - A presettable voltage sensor includes an electrode faced by an electric field probe and connected to a voltage source; a screening conductive shell wrapping the probe and connected to a reference potential; a dielectric material housed within the shell and interposed between the probe and the electrode; a conditioning circuit connected to an exit of the sensor and having a resistor of resistance R | 2011-05-12 |
20110109303 | PROCESSING CIRCUITRY - A position encoder is described that generates a signal whose phase varies with a position to be determined. A phase detector determines a first phase measurement of the sensor signal during a first mode and a second phase measurement of said sensor signal during a second mode. The phase detector then differences the first and second phase measurements to obtain a phase difference measurement, which it uses to determine an indication of the position to be sensed. A controller controls a signal generator in order to set a start phase of signals generated in at least one of the first and second modes so that the timings at which said sensor signal crosses a reference level are substantially the same. | 2011-05-12 |
20110109304 | ROTATION ANGLE SENSOR - A rotation angle sensor comprises: a resolver stator including an excitation coil for receiving an excitation signal and a detection coil (a sine wave coil and a cosine wave coil) for outputting a detection signal; and a resolver rotor rotatably placed to face the stator. The resolver stator is formed on a stator flat plate. The resolver rotor is made of a flat-shaped rotor flat plate. The stator flat plate and the rotor flat plate are placed in parallel to face each other. The rotor flat plate is formed with a cutout. | 2011-05-12 |
20110109305 | METHOD AND SYSTEM FOR DETERMINING THE ANGULAR POSITION OF A TURBOJET ENGINE ROTOR - The invention relates to a method of determining the angular position of a first rotor of a turbojet, the method consisting in:
| 2011-05-12 |
20110109306 | NON-INTRUSIVE MONITORING OF POWER AND OTHER PARAMETERS - Methods and apparatus for non-intrusive power monitoring and current measurement in a circuit breaker without modification of the breaker panel or the circuit breaker itself. In one example, an inductive pickup sensor senses current from the breaker face, an inductive link transmits power through a steel breaker panel door, and a passive balanced JFET modulator circuit modulates a carrier signal on the inductive link with information regarding the sensed current. A demodulated breaker current signal is available outside of the breaker panel door. The JFET modulator circuit does not require DC power to modulate the carrier signal with the information regarding the sensed current from the breaker. Such methods and apparatus may be interfaced with a spectral envelope load detection system that can monitor multiple loads from a central location. | 2011-05-12 |
20110109307 | Digitally Operating Device for Detecting Metallically Conductive Parts - A facility for generating a detection signal upon the presence of metallic-conducting parts in a conveyed flow that is at least largely nonconductive, in which an alternating electromagnetic field is established in a section of the conveyed flow to be monitored by means of an alternating current generator via a transmitter coil system, whereby a variation of the signal of said field that is triggered by passage of a part is detected by a receiver coil system and serves, in conjunction with a downstream digital-type analytical circuit, for derivation of a detection signal which then triggers an information and/or elimination of said part. The receiver coil system has an analog-to-digital converter assigned to it and the transmission of the received signal to the analytical circuit proceeds in digital form. An analog-to-digital conversion is also provided for the signal of the alternating current generator and the received signal, being available in digital form, and the signal of the alternating current generator, also being available in digital form, are supplied to the analytical circuit for derivation of the detection signal. | 2011-05-12 |
20110109308 | MAGNETIC RESONANCE BASED APPARATUS AND METHOD TO ANALYZE AND TO MEASURE THE BI-DIRECTIONAL FLOW REGIME IN A TRANSPORT OR A PRODUCTION CONDUIT OF COMPLEX FLUIDS, IN REAL TIME AND REAL FLOW-RATE - A method for determining individual component flow-rates in a multi-phase fluid flowing in a pipe comprises the steps of: a) flowing the fluid through a magnetic resonance based apparatus comprising a magnetic resonance module and at least one pre-polarization module through which the fluid phases flow before entering the magnetic resonance module, wherein said pre-polarization module comprises a plurality of cylindrical segments that can be selectively combined so as to modify the effective length of the pre-polarization module, b) selectively using the prepolarization module to polarize a component in a volume of the fluid, c) applying a selective excitation to said fluid volume, d) using a signal resulting from said excitation to obtain a velocity measurement for said component, and e) repeating steps b)-d) until velocity measurements for a desired number of components have been obtained. | 2011-05-12 |
20110109309 | TECHNIQUES FOR CORRECTING MEASUREMENT ARTIFACTS IN MAGNETIC RESONANCE THERMOMETRY - Techniques for correcting measurement artifacts in MR thermometry predict or anticipate movements of objects in or near an MR imaging region that may potentially affect a phase background and then acquire a library of reference phase images corresponding to different phase backgrounds that result from the predicted movements. For each phase image subsequently acquired, one reference phase image is selected from the library of reference phase images to serve as the baseline image for temperature measurement purposes. To avoid measurement artifacts that arise from phase wrapping, the phase shift associated with each phase image is calculated incrementally, that is, by accumulating phase increments from each pair of consecutively scanned phase images. | 2011-05-12 |
20110109310 | DIGITAL NMR SIGNAL PROCESSING SYSTEMS AND METHODS - In some embodiments, a nuclear magnetic resonance (NMR) receiver using digital downconversion and subsampling tracks transmit and/or receive signal phases according to time(s) elapsed since reference times (e.g. reset times) corresponding to known phases. Carrier-frequency (f | 2011-05-12 |
20110109311 | NOISE CANCELING IN-SITU NMR DETECTION - Technologies applicable to noise canceling in-situ NMR detection and imaging are disclosed. An example noise canceling in-situ NMR detection apparatus may comprise one or more of a static magnetic field generator, an alternating magnetic field generator, an in-situ NMR detection device, an auxiliary noise detection device, and a computer. | 2011-05-12 |
20110109312 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - According to one embodiment, an MRI apparatus includes an image generating unit and an SAR calculating unit. The image generating unit receives a magnetic resonance signal generated as a result of transmission of an RF pulse from an object, and generates image data of the object based on the magnetic resonance signal. The SAR calculating unit performs a correction operation on an energy control value of the RF pulse according to an imaging condition, and calculates an SAR value based on an energy value subjected to the correction operation. | 2011-05-12 |
20110109313 | FAST ELECTRON PARAMAGNETIC RESONANCE IMAGING (EPRI) IN THE CW EPR MODE USING RAPID-SCAN IN THE PRESENCE OF ROTATING GRADIENTS AND DIRECT DETECTION WITH TRANSMIT/RECEIVE & DATA PROCESSING IN A DIGITAL SIGNAL PROCESSING PLATFORM - An electron paramagnetic resonance imaging system that includes means for continuously irradiating a sample with RF irradiation; means for imposing on the sample a sinusoidally varying magnetic field along with rotating gradients for spatial encoding; means for directly detecting signal data from the sample, without using field modulation, while irradiating the sample with RF radiation continuously, the means for directly detecting having means for sweeping the sinusoidally varying magnetic field; and means for transmitting, receiving and processing the signal data, using means including a digital signal processor. | 2011-05-12 |
20110109314 | Method and apparatus for improving 2D acceleration in MRI using a new coil array design - The present invention is a coil array for an MRI system that is designed to improve 2D accelerated imaging of an object having significantly different fields of view in two phase-encoding directions. This is achieved by having a first set of coil elements whose sizes are tuned to optimize acceleration along a first phase-encoding direction and a second set of coil elements whose sizes are tuned to optimize acceleration along a second-phase encoding direction. Images acquired in accordance with the present invention exhibit improved signal to noise ratio at a given acceleration factor when compared to images acquired using a traditional MR coil array. | 2011-05-12 |
20110109315 | MR SIGNAL TRANSMISSION IN A LOCAL COIL ARRANGEMENT - In a magnetic resonance tomography local coil arrangement and a method for processing signals received thereby at least one local coil is fashioned to receive at least one reception signal and at least one amplifier is provided that amplifies the at least one reception signal. A frequency converter generates at least one intermediate frequency signal from the at least one reception signal the intermediate frequency of the intermediate frequency signal differing from the reception signal frequency of each reception signal. An analog-digital converter converts the analog intermediate frequency signal into a digitized signal. A shielding device shields against at least radio-frequency signals, the shielding device surrounding at least the analog-digital converter. At least one frequency filter is arranged between the at least one local coil and the analog-digital converter, the frequency filter exhibiting a transmission range for signals with the intermediate frequency of an intermediate frequency signal. The digitized signal is transmitted from the local coil arrangement. | 2011-05-12 |
20110109316 | MAGNETIC RESONANCE IMAGING APPARATUS, PHASE COMPARATOR, CONTROL UNIT AND COIL UNIT - According to one embodiment, an apparatus includes a control unit and a coil unit. The control unit generates a first clock signal, generates a data signal to indicate an operating condition, modulates the first clock signal by the data signal to obtain a modulated signal, generates a clock transmission signal including the modulated signal, and emits the clock transmission signal. The coil unit converts the clock transmission signal into an electric signal, detects the modulated signal from the clock transmission signal, generates a second clock signal synchronous with the first clock signal from the modulated signal, detects an MR signal generated in a subject, digitizes, synchronously with the second clock signal, the MR signal, detects the data signal from the detected modulated signal by using of the second clock signal, controls the operating condition of the coil unit to be the operating condition indicated by the data signal. | 2011-05-12 |
20110109317 | METHOD AND APPARATUS FOR DISPLAYING STATE OF CURRENT CONSUMPTION OF BATTERY IN PORTABLE TERMINAL - A method and apparatus for displaying a state of current consumption of a battery in a portable terminal are provided. The method includes measuring a value of consumed current at a preset period, supplying the measured current value to an Analog-to-Digital Converter (ADC) through an ADC port, confirming battery compensation offset values by the ADC, determining whether values corresponding to the battery compensation offset values are present in a preset table, and if it is determined that the values are present, calculating a battery voltage level compensation value with reference to the table, applying the battery voltage level compensation value to an actual detected voltage, and displaying a remaining amount of the battery according to the compensation value applied voltage. | 2011-05-12 |
20110109318 | SIGNAL CAPTURE SYSTEM AND TEST APPARATUS INCLUDING THE SAME - A signal capture system for capturing a signal and storing the captured signal in a storage apparatus in real time, and a test apparatus including the signal capture system. The signal capture system includes a printed circuit board; a socket that is connected to the printed circuit board and on which a reference memory component is mounted; and an interposer that is mounted on the printed circuit board, is connected to the socket, an external apparatus, and a storage apparatus, receives first signals from the reference memory component and transmits the received first signals to the external apparatus and the storage apparatus, and receives second signals from the external apparatus and transmits the received second signals to the reference memory component and the storage apparatus, wherein a shape of the socket is defined according to a type of the reference memory component. | 2011-05-12 |
20110109319 | TEST CONFIGURATION FOR THE IMPULSE VOLTAGE TEST OF ELECTRIC HIGH-VOLTAGE COMPONENTS - The embodiments relate to a test configuration for an impulse voltage test of electric high-voltage components with a lightning generator. The lightning generator can be moved between a first horizontal position within a cuboid container, and a vertical position relative to the container. A movement between the two positions includes a pivoting movement about a rotational axis. The proofing movement is transverse to the longitudinal direction of the lightning generator. The container can be closed at the top by at least one moveable cover. | 2011-05-12 |
20110109320 | SYSTEM, METHOD, AND APPARATUS FOR A SAFE POWERLINE COMMUNICATIONS INSTRUMENTATION FRONT-END - A safe powerline communications instrumentation front end device including a voltage input for receiving a line voltage from a powerline, a voltage reducer for reducing the voltage of the line voltage, a filtering system for extracting a Power Line Communications (PLC) signal from the line voltage, and an analog output for outputting the PLC signal as an analog signal for communications test equipment. | 2011-05-12 |
20110109321 | TEST APPARATUS AND ELECTRICAL DEVICE - Provided is a test apparatus that tests a device under test, comprising a digital signal generator that outputs in parallel one or more n-bit digital test signals, where n is an integer greater than or equal to 1; a plurality of driver circuits that are connected respectively to a plurality of digital terminals of the device under test; and an analog signal generator that generates an analog test signal by converting, into an analog signal, an n×m-bit digital multi-bit signal based on the one or more digital test signals output by the digital signal generator to the plurality of driver circuits, where m is an integer greater than or equal to 2. | 2011-05-12 |
20110109322 | Testing System and Adapter Thereof Utilizing a Common Power Supply and Display Device to Test Different Main Board Circuits - A testing system utilizing a common power supply and a display device to test different types of a main board circuit is disclosed. The testing system includes a power supply device for outputting a predetermined power; a liquid crystal display for receiving a control signal from the main board circuit to perform a testing procedure; and an adapter. The adapter includes a first circuit coupled electrically between the power supply device and the main board circuit for converting the predetermined power into a power needed by the main board circuit, and a second circuit coupled electrically between the main board circuit and the liquid crystal display for converting a control signal generated by the main board circuit into a signal format required to perform the testing procedure on the liquid crystal display. | 2011-05-12 |
20110109323 | Calibration Structure For Flex Fuel Sensor - A calibration structure ( | 2011-05-12 |
20110109324 | Microwave system for detecting bubbles - The microwave embolus detector is a device that employs microwaves to detect the presence of air emboli in a flow of paste, which is passed through a Teflon tube or hose, as these microwaves are absorbed to a greater or lesser degree by the paste itself but are not absorbed by air. The level of power received by the receiver is constant provided the flow is homogenous. However, when a bubble appears, diffusion takes place as air does not absorb the microwaves, thus the power received will alter as regards the full scale signal of the homogenous flow. Diffusion may also be caused by the presence of lumps. | 2011-05-12 |
20110109325 | Inductive coagulation sensors and devices - This invention provides methods and devices for detecting the viscosity and conductivity of a conductive fluid sample. A sample fluid can be received into a sample chamber between a field inductor and sensor inductor. Electromagnetic fields generated by the field inductor can be modulated due to the counter-emf induced in the sample. The modulations can be detected by the sensor inductor and correlated to electric parameters in the fluid. | 2011-05-12 |
20110109326 | METHOD FOR THE OPERATIVE MONITORING OF TRACK BRAKES - Operative monitoring of track brakes involves passing an electric current through a winding of a brake magnet, measuring the electric current and comparing the temporal progression of the measured current with a saved temporal progression of a reference current. Comparison is achieved by calculating the difference between the measured current and the reference current. The difference between measured current and reference current may be temporally integrated and compared with a threshold value. To determine a magnetic coupling between track brake and track, a calculation may be made as to whether the measured current has local minima and/or local maxima during the activation of the track brake, only the temporal progression of the measured current as the current increases being subjected to a comparison with the reference current. The current may be activated in pulses, with the comparison of the measured current and the reference current being restarted with each pulse. | 2011-05-12 |
20110109327 | Sensor for capacitive detection of a mechanical deflection - A sensor for capacitive detection of a mechanical deflection includes a substrate having a first substrate electrode and a second substrate electrode; and a mass movable relative to the substrate. The mass is divided into: a first electrically separate region having a first ground electrode; and a second electrically separate region of the mass having a second ground electrode. At least one portion of the first ground electrode is situated in a first region between the first substrate electrode and the second substrate electrode, and forms a first differential capacitor. At least one portion of the second ground electrode is situated in a second region between the first substrate electrode and the second substrate electrode, and forms a second differential capacitor. | 2011-05-12 |
20110109328 | Flush-Mounted Capacitive Sensor Mount - In some embodiments, a method of monitoring particulates may include one or more of the following steps: (a) receiving the particulates in a particulate flow restrictor, (b) collecting a particulate sample in a body section of the flow restrictor, (c) sensing moisture content of the particulate with a flush mounted capacitive sensor, (d) allowing the particulate to empty out of the flow restrictor through a narrowed opening in a discharge section of the flow restrictor, (e) concentrating the particulate sample at a sensor surface, (f) shielding the sensor from stray electric fields, and (g) inputting the particulate at the funnel opening of the flow restrictor. | 2011-05-12 |
20110109329 | Physiological Measurement Instrument - A physiological measurement instrument is disclosed, having a detector, implemented as one or more sensors, for measuring values of one or more physiological measured parameters associated with a body of a human or animal subject, and for detecting values of a physical parameter that indicates an operating position of the measurement instrument relative to the body, and an operating-position-determining unit that receives and analyzes output signals from the detector, to determine the operating position of the measurement instrument. | 2011-05-12 |
20110109330 | Dynamic quantity detection device - A dynamic quantity detection device includes a detection portion, a signal process portion, and an operation mode switch portion. The detection portion detects a dynamic quantity applied from an outside and generates a sensor signal in accordance with the dynamic quantity. The signal process portion processes the sensor signal from the detection portion to have a property suitable for an external device. When the sensor signal output from the detection portion is less than or equal to a predetermined threshold value, the operation mode switch portion sets an operation mode to a power save mode by stopping an operation of the signal process portion. When the sensor signal output from the detection portion is greater than the predetermined threshold value, the operation mode switch portion switches the operation mode to a normal mode by activating the signal process portion. | 2011-05-12 |
20110109331 | Method and System for Heater Signature Detection Diagnostics of a Particulate Matter Sensor - A diagnostic method and system is described for diagnosing an operating condition of a conductive particulate matter sensor. The sensor has a substrate with electrical resistance that varies with temperature and two electrodes on the substrate adapted to collect particulate matter between the electrodes, thereby establishing an electrically conductive path through collected particulate matter between the electrodes that can be detected by measuring electrical resistance between the electrodes, R | 2011-05-12 |
20110109332 | ELECTRICAL CHARACTERISTIC MEASURING SUBSTRATE - An electrical characteristic measuring substrate includes a plurality of laminated dielectric layers, front-surface coplanar lines disposed at a front surface of the substrate, back-surface coplanar electrodes disposed at a back surface thereof, and interlayer ground electrodes disposed between dielectric layers. First ends of the front-surface coplanar lines define a front-surface component mounting electrode, and first ends of the back-surface coplanar lines define a back-surface component mounting electrode. The front-surface component mounting electrode and the back-surface component mounting electrode have substantially the same pattern when viewed from the direction perpendicular to the front surface. Each of the front-surface component mounting electrode and the back-surface component mounting electrode has an electrode pattern asymmetric about a substantially central line of the front surface or about that of the back surface. | 2011-05-12 |
20110109333 | Detection of Water Ingress to an Apparatus by Resistance Measurements Between Two Electrodes - An apparatus including a first electrical arrangement that has a resistance between a first electrode and a second electrode in the absence of water and has a different resistance between the first electrode and the second electrode in the presence of water; a mechanical arrangement configured to maintain the presence of water at the first electrical arrangement; and a detecting electrical arrangement configured to detect a change in the resistance of the first electrical arrangement. | 2011-05-12 |
20110109334 | Method for Detecting Component Defects of an Analog Signal Processing Circuit, Especially for a Measurement Transmitter - A method for detecting component defects of an analog signal processing circuit, especially for a measurement transmitter. A test signal TS is generated at a first test point TP | 2011-05-12 |
20110109335 | Direct liquid-contact micro-channel heat transfer devices, methods of temperature control for semiconductive devices, and processes of forming same - An apparatus to test a semiconductive device includes a base plane that holds at least one heat-transfer fluid unit cell. The at least one heat-transfer fluid unit cell includes a fluid supply structure including a supply-orifice cross section as well as a fluid return structure including a return-orifice cross section. The supply-orifice cross section is greater than the return-orifice cross section. A die interface is also included to be a liquid-impermeable material. | 2011-05-12 |
20110109336 | POSITIONING METHOD AND APPARATUS FOR INSPECTING SOLAR BATTERY PANEL - In a positioning method and apparatus capable of preventing a solar battery panel from suffer damage during inspection, the method includes steps of providing a transport platen, a set of positioning device, a first probe row and a second probe row; transporting the solar battery panel to an inspecting region by the transport platen; moving the positioning devices to position the solar battery panel step by step; the first probe row pressing an electrode line on one surface of the solar battery panel; the second probe row pressing an electrode line on the other surface of the solar battery panel, thereby electrically connecting the first probe row and the second probe row. In this way, the solar battery panel can be inspected accurately without suffering damage. | 2011-05-12 |
20110109337 | PROBE WAFER, PROBE DEVICE, AND TESTING SYSTEM - A probe wafer electrically connected to a semiconductor wafer on which a plurality of semiconductor chips are formed includes: a wafer substrate for pitch conversion including a wafer connection surface and an apparatus connection surface opposing the wafer connection surface; a plurality of wafer connection terminals formed on the wafer connection surface of the wafer substrate for pitch conversion, at least one wafer connection terminal provided for each of the semiconductor chips and electrically connected to an input/output terminal of the corresponding semiconductor chip; a plurality of apparatus connection terminals formed on the apparatus connection surface of the wafer substrate in one-to-one relation with the plurality of wafer connection terminals at an interval different from an interval of the wafer connection terminals, to be electrically connected to an external apparatus; and a plurality of transfer paths, each electrically connecting a corresponding wafer connection terminal to an apparatus connection terminal. | 2011-05-12 |
20110109338 | INTERPOSER, PROBE CARD AND METHOD FOR MANUFACTURING THE INTERPOSER - An interposer is disclosed. The interposer includes a substrate capable of being processed by dry etching. The substrate includes a plurality of conductive holes penetrating from one side to the other side of said substrate. Each of said plurality of conductive holes has one end provided with a contact element on at least one side of said conductive hole. | 2011-05-12 |
20110109339 | APPARATUS AND METHOD FOR INSPECTING CIRCUIT OF SUBSTRATE - Disclosed herein is an apparatus and method for inspecting a circuit of a substrate. The apparatus includes a pin probe coming into contact with a first end of an electrode formed on a first side of a substrate, a voltage source for applying a voltage to the pin probe, a film disposed at a second end of the electrode formed on a second side of the substrate, a dielectric fluid sealed in the film, and an electronic ink dispersed in the dielectric fluid, and charged with electricity to flow when the electrode is electrified. The present invention is advantageous in that whether an electrode has been electrified is measured using charged electronic ink, so that the use of a pin probe is limited to one side of a substrate, thus reducing cost required for the entire inspection. | 2011-05-12 |
20110109340 | Interface Adapter For Connecting With A Test Probe - A interface adapter comprising a connecting board having the first ports and the second ports, the first ports being electrically connected with the second ports; a pin header having the first pins and the second pins, the first pins passing through the first ports, the second pins being connected with the second ports; a female header having openings for receiving the first pins, the connecting board being located between the pin header and the female header. The second pin is designed to O-shape or U-shape for providing enough position to connecting the test probe, preventing from disengagement of the chip from the test card. | 2011-05-12 |
20110109341 | Apparatus for Contacting a T/R Module with a Test Device - An apparatus for making contact between a T/R module and a test device, the apparatus including a mechanically guided contact-making unit having a plurality of contact elements for contacting the T/R module. A triplate line substrate is arranged is electrically connected to the T/R module, via which the RF signals can be passed to the test device. One or more register pins for defined alignment of the T/R module with respect to the contact-making unit and a fixing unit for mechanical fixing of the T/R module are provided. A shifting device has a plurality of inclined planes that convert a shifting movement of the shifting device to a movement of the contact-making unit toward the T/R module at right angles to the shifting direction. When the contact-making unit reaches a defined final position the contact is made with the T/R module via the contact elements in one process. | 2011-05-12 |
20110109342 | CROSSTALK SUPPRESSION IN WIRELESS TESTING OF SEMICONDUCTOR DEVICES - An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die. | 2011-05-12 |
20110109343 | SEMICONDUCTOR WAFER DEVICE AND METHOD FOR TESTING THE SAME - In an embodiment, a plurality of semiconductor chip portions is provided with respect to each reticle unit in a semiconductor wafer. Each of the semiconductor chip portions is provided with a first identification code generation circuit to generate a first identification code, and a switching circuit. The switching circuit controls connection with outside. Each of second identification code generation circuits is provided on dicing line areas within each reticle unit, and generates a second identification code to select the corresponding reticle unit. Coincidence detection circuits are provided on the dicing line areas. Each of the coincidence detection circuits determines whether or not the corresponding first and second identification codes and a chip select signal coincide with each other. Bus lines are provided on the dicing line areas. One ends of the bus lines are connected to the circuits, and the other ends are connected to test pads. | 2011-05-12 |
20110109344 | Semiconductor devices having on-die termination structures for reducing current consumption and termination methods performed in the semiconductor devices - Example embodiments disclose a semiconductor device having an on-die termination (ODT) structure that reduces current consumption, and a termination method performed in the semiconductor device. The semiconductor device includes a calibration circuit for generating calibration codes in response to a reference voltage and a voltage of a calibration terminal connected to an external resistor and an on-die termination device for controlling a termination resistance of a data input/output pad in response to the calibration codes and an on-die termination control signal. The termination resistance of the data input/output pad is greater than a resistance of the calibration terminal. | 2011-05-12 |
20110109345 | LOGIC CIRCUIT - A logic circuit includes two two-terminal switching devices and receives first and second pulses as inputs. Each of the two devices has two different stable resistivity values for each applied voltage that is greater than a first threshold voltage (Vth | 2011-05-12 |
20110109346 | APPARATUS AND METHODOLOGY FOR MAXIMUM POWER POINT TRACKING FOR A SOLAR PANEL - Circuitry and methodology for tracking the maximum power point (MPP) of a solar panel is disclosed. The voltage and current generated by the solar panel are monitored and used to generate a pulse signal for charging a capacitor. The changes in the voltage and current generated by the solar panel are also monitored, and that information is used to generate a pulse signal for discharging the capacitor. The charging and the discharging pulse signals are used to charge and discharge the capacitor. A reference signal indicative of the charge level of the capacitor is generated. As the current and voltage generated by the solar panel approach the maximum power point (MPP), the frequency of the discharging pulse signal becomes progressively higher, so that the capacitor charging occurs in progressively smaller increments. When the MPP is reached, the reference signal level becomes steady because the charge level of the capacitor becomes steady. | 2011-05-12 |
20110109347 | SELF-POWERED COMPARATOR - Embodiments of the invention relate to an input-powered comparator. Embodiments of the invention also pertain to an active diode that includes an input-powered comparator and a switch. In a specific embodiment, the input-powered comparator only consumes power when an input source provides sufficiently high voltage. Embodiments of the active diode can be used in an energy harvesting system. The comparator can be powered by the input and the system can be configured such that the comparator only consumes power when the input is ready to provide power to the load or energy storage element. In a specific embodiment, when there is no input, or the input is too low for harvesting, the comparator does not draw any power from the energy storage element (e.g., battery or capacitor) of the system. | 2011-05-12 |
20110109348 | DYNAMIC COMPARATOR WITH BACKGROUND OFFSET CALIBRATION - A dynamic comparator with background offset calibration is provided. The dynamic comparator includes at least one input differential pair, a first back-to-back inverter, a second back-to-back inverter, and an integrator. The input differential pair includes two current branches, wherein one of the current branches has an input referred offset. The first back-to-back inverter determines which one of the two current branches has the input referred offset in response to a first clock signal and generates two control signals accordingly. The integrator generates two calibration voltages for the input differential pair in response to the two control signals, so as to calibrate the input referred offset. The second back-to-back inverter determines a difference between two input signals received by the input differential pair after the input referred offset is calibrated in response to a second clock signal and outputs two comparison signals accordingly. | 2011-05-12 |
20110109349 | Waveform Generation from an Input Data Stream - An output signal is generated from a received input data stream representing a sequence of digital data values. For each group of successive data values in the sequence of data values, a respective waveform pattern is assigned in dependence of the data content of the respective group of successive data values. The output signal is generated by generating the assigned respective waveform patterns corresponding to the input data stream. | 2011-05-12 |
20110109350 | Stable Current Source for System Integration to Display Substrate - A technique to implement a stable and high impedance current sink or source onto a display substrate using a single device. The high output current source or sink circuit includes an input that receives a fixed reference current and provides the reference current to a node in the current source or sink circuit during a calibration operation of the current source or sink circuit. The circuit further includes a first transistor and a second transistor series-connected to the node such that the reference current adjusts the voltage at the node to allow the reference current to pass through the series-connected transistors during the calibration operation. The circuit includes one or more storage devices connected to the node, and an output transistor connected to the node to source or sink an output current from current stored in the one or more storage devices to a drive an active matrix display with a bias current corresponding to the output current. | 2011-05-12 |
20110109351 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined. | 2011-05-12 |
20110109352 | Summation Circuit in DC-DC Converter - An integrated circuit includes a saw-tooth generator including a saw tooth node configured to have a saw-tooth voltage generated thereon; and a first switch having a first end connected to the saw tooth node. The integrated circuit further includes a second switch coupled between an output node and an electrical ground, wherein the first switch and the second switch are configured to operate synchronously. A first current source is connected to the saw tooth node. A second current source is connected to the output node. | 2011-05-12 |
20110109353 | DIGITAL PLL CIRCUIT AND METHOD OF CONTROLLING THE SAME - According to one embodiment, a PLL circuit generates a first signal of 1/m times from a reference clock and a second signal of 1/n times from an output of an oscillator, obtains a quantized phase difference corresponding to a shift amount between the both signals, integrates the phase difference, predicts a control value for the oscillator based on the integrated value, converts the predicted control value into an analog value. Sequential integration is performed for the phase difference until the polarity of the phase difference is reversed from negative to positive and then from positive to negative again, or until the polarity is reversed from positive to negative and then from negative to positive again, a predictive weight value is generated by multiplying the integrated value by a predictive coefficient value of optional ratio, and the control value is obtained by adding the predictive weight value to the integrated value. | 2011-05-12 |
20110109354 | AUTOMATIC CONTROL OF CLOCK DUTY CYCLE - In general, this disclosure is directed to a duty cycle correction (DCC) circuit that adjusts a falling edge of a clock signal to achieve a desired duty cycle. In some examples, the DCC circuit may generate a pulse in response to a falling edge of an input clock signal, delay the pulse based on a control voltage, adjust the falling edge of the input clock signal based on the delayed pulse to produce an output clock signal, and adjust the control voltage based on the difference between a duty cycle of the output clock signal and a desired duty cycle. Since the DCC circuit adjusts the falling edge of the clock cycle to achieve a desired duty cycle, the DCC may be incorporated into existing PLL control loops that adjust the rising edge of a clock signal without interfering with the operation of such PLL control loops. | 2011-05-12 |
20110109355 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - To generate a highly accurate SSC while reducing the circuit area of a clock generation circuit that generates a normal clock and an SSC. A clock signal output from a voltage controlled oscillator is frequency-divided by a frequency divider, and is output as a first frequency-divided clock to a selector. The frequency divider outputs a plurality of second frequency-divided clocks each shifted in phase by 1/m of a period based on a control signal of a control circuit. The selector selects two frequency-divided clocks having the closest phase shift from among the first and second frequency-divided clocks. Based on a weighting data signal output from the control circuit, a phase interpolation circuit phase-shifts the frequency-divided clock by a phase shift obtained by dividing the phase difference between the two frequency-divided clocks, and outputs the resultant clock as an output clock. | 2011-05-12 |
20110109356 | APERTURE GENERATING CIRCUIT FOR A MULTIPLYING DELAY-LOCKED LOOP - A multiplying delay-locked loop (MDLL) is described. In the MDLL, a phase interpolator (PI) provides a correction signal to selection control logic by phase mixing two internal signals (which have different phases) from a sequence of delay elements in the MDLL. This correction signal compensates for a delay associated with the selection control logic, thereby ensuring that a selection pulse or signal output by the selection control logic to a selection circuit (such as a multiplexer) is appropriately timed so that the selection circuit can selectively injection lock the sequence of delay elements using edges in a reference signal. | 2011-05-12 |
20110109357 | DELAY LOCKED LOOP CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE DELAY LOCKED LOOP CIRCUIT - A delay locked loop (DLL) circuit is disclosed. The DLL circuit includes a delay circuit and a phase adjusting circuit. The phase adjusting circuit is configured to receive a clock signal output from the delay circuit, pass the clock signal through a N-divider and a replica path to create a N-divided delay signal, and detect phase information about an external clock signal in response to a rising edge and a falling edge of the N-divided delay signal, wherein N denotes a natural number. The delay circuit is configured to output the clock signal by adjusting a phase of the external clock signal in response to a result of the detection. A semiconductor device, semiconductor system, and method are also disclosed. | 2011-05-12 |
20110109358 | CONTROL VOLTAGE TRACKING CIRCUITS, METHODS FOR RECORDING A CONTROL VOLTAGE FOR A CLOCK SYNCHRONIZATION CIRCUIT AND METHODS FOR SETTING A VOLTAGE CONTROLLED DELAY - Memories, clock synchronization circuits, clock synchronization controller circuits, and methods for setting a voltage controlled delay of a clock synchronization circuit and tracking and recording the control voltage are disclosed. For example, a clock synchronization controller provides an initial control voltage to the voltage controlled delay during initialization of the synchronization circuit until a phase dependent control voltage stabilizes. The stable phase dependent control voltage is substituted for the initial control voltage. Following stabilization of the phase dependent control voltage, a phase detector of the clock synchronization circuit is activated. A recovery control voltage is provided by the clock synchronization controller to the voltage controlled delay during recovery of the clock synchronization from a power-saving mode until the phase dependent control voltage stabilizes. | 2011-05-12 |
20110109359 | Variable Capacitance with Delay Lock Loop - An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A variable capacitance circuit is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals. | 2011-05-12 |
20110109360 | SYSTEM AND METHOD FOR IMPROVED TIMING SYNCHRONIZATION - Embodiments of a method and system for both open-loop and closed-loop timing synchronization are provided in which a master clock signal, and a plurality of signals that define greater periods of time, are distributed to a plurality of host devices. A frame-sync signal is used to define a “frame” consisting of a predetermined number of clock periods, and a reset signal is used to define a larger period consisting of a predetermined number of frames. Due to a variety of system parameters, the innate delay time associated with each respective timing distribution path may differ. The system is operable to adjust the timing signals propagated to the plurality of host devices along each respective timing distribution path to compensate for these differences so that each host device remains synchronized with all other host devices. | 2011-05-12 |
20110109361 | Semiconductor device and information processing system - The semiconductor device includes an output driver and a characteristic switching circuit that switches characteristics of the output driver. The characteristic switching circuit mutually matches a rising time and a falling time of an output signal output from the output driver, when a power voltage supplied to a power line is a first voltage, with a rising time and a falling time of the output signal output from the output driver, when the power voltage supplied to the power line is a second voltage. As a result, an increase in an influence of a harmonic component or a crosstalk when the power voltage is reduced does not occur. Moreover, because a receiving condition on a receiver side does not change even when the power voltage is reduced, signal transmission and reception can be performed correctly irrespective of the power voltage. | 2011-05-12 |
20110109362 | CIRCUIT FOR CONTROLLING AN ENABLING TIME OF AN INTERNAL CONTROL SIGNAL ACCORDING TO AN OPERATING FREQUENCY OF A MEMORY DEVICE AND THE METHOD THEREOF - Provided is a circuit for controlling a data bus connecting a bitline sense amplifier to a data sense amplifier in accordance with a variation of an operating frequency of a memory device, being comprised of a pulse width adjusting circuit for varying a pulse width of an input signal in accordance with the operating frequency of the memory device after receiving the input signal, a signal transmission circuit for buffing a signal outputted from the pulse width adjusting circuit, and an output circuit for outputting a first signal to control the data bus in response to a signal outputted from the signal transmission circuit. | 2011-05-12 |
20110109363 | POWER SUPPLY CONTROLLER AND METHOD - A power supply controller and method for improving the transient response of the power supply controller. The power supply controller includes a pulse width modulation control module connected to a feedback network. The feedback network is composed of an amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal. A compensation network is coupled between the inverting input terminal and the output terminal of the amplifier and a reference voltage is coupled to the non-inverting input terminal of the amplifier. A switch is coupled between the output terminal of the amplifier and an input terminal of the compensation network. The transient response of the controller is improved by operating the controller in a closed loop compensation configuration during a continuously pulsing operating mode and in an open loop compensation configuration during a pulse skip operating mode. | 2011-05-12 |
20110109364 | INPUT CIRCUIT - Provided is an input circuit having hysteresis characteristics that is capable of operating in a wide range of power supply voltage conditions while suppressing power supply voltage dependence of a hysteresis voltage and a response speed. The input circuit is provided with: a circuit for obtaining a small hysteresis voltage under the condition of low power supply voltage (formed of PMOS transistors ( | 2011-05-12 |
20110109365 | DELAY LOCKED LOOP CIRCUIT - The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback clock signal falling within less than 180 degrees from the first edge, switching on of a switching transistor of source current and switching off of the switching transistor of sink current; and iii) following detection of an edge of another reference signal at a point in time about midway between the first edge and a next similar edge of the reference clock signal has past, switching off of the switching transistor of source current while maintaining the switching transistor of sink current switched off. | 2011-05-12 |
20110109366 | Method and Apparatus to Limit Circuit Delay Dependence on Voltage for Single Phase Transition - A delay circuit receives a data input having an input transition and that generates a data output having an output transition. The delay circuit is powered by a voltage source having a voltage. A first delay element is configured to generate a first data signal with a first edge that has a relatively constant delay relative to the input transition irrespective of the voltage of the voltage source. A second delay element is configured to generate a second data signal with a second edge that has a delay relative to the input transition as a function of the voltage of the voltage source. A selection element causes the output transition at the data output to correspond to a latest selected one of the first edge and the second edge. The delay circuit may be employed in a pulse generating circuit. | 2011-05-12 |
20110109367 | MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME - Memories, multi-phase clock signal generators, and methods for generating multi-phase duty cycle corrected clock signals are disclosed. For example, one such clock signal generator includes a delay-locked loop having a first multi-tap adjustable delay line configured to delay a reference signal to provide a plurality of clock signals having different phases relative to the reference clock signal. A periodic signal generated by the delay-locked loop is provided to a second multi-tap adjustable delay line as an input clock signal. Clock signals from taps of the second multi-tap adjustable delay line are provided as the multi-phase duty cycle corrected clock signals. | 2011-05-12 |
20110109368 | Sensor Connection Circuit - A circuit for converting the state of a sensor into a signal interpretable by an electronic circuit, including: a comparator of the voltage level of an input terminal with respect to a reference level, the sensor being intended to be connected between a terminal of application of a first power supply voltage and the input terminal; a current-limiting element between said input terminal and the ground; and a switching element in series with the current source and intended to be controlled by a pulse train. | 2011-05-12 |
20110109369 | Low voltage input level shifter circuit and method for utilizing same - According to one embodiment, a level shifter circuit operable with a low voltage input comprises first and second pull-down switches configured to receive the low voltage input as respective non-inverted and inverted control voltages, first and second pull-up switches coupled between the respective first and second pull-down switches and an output supply voltage, and a pull-up boost switching stage coupled to a node between the first pull-up switch and the first pull-down switch. The pull-up boost switching stage is configured to turn ON in response to the second pull-down switch turning ON, and to turn OFF before the first pull-up switch turns OFF. In one embodiment, the level shifter circuit may be implemented as part of an input/output (IO) pad of an integrated circuit (IC) fabricated on a semiconductor die. | 2011-05-12 |
20110109370 | Level Converter - A level converter for providing an output signal at a circuit output based on an input signal includes an output coupling circuit formed to provide an output signal based on a first partial output signal and a second partial output signal, a driver circuit formed to provide the second partial output signal such that the second partial output signal is switchable between two different signal levels depending on the state of the input signal, wherein an input of the driver circuit is capacitively coupled to the input of the level converter in order to allow for switching between the signal levels of the second partial output signal by the capacitive coupling in response to a change in the state of the input signal, and a holding circuit formed to keep the state of the second partial output signal constant in case of a constant state of the input signal. | 2011-05-12 |
20110109371 | ENERGY-SAVING CIRCUIT FOR A PERIPHERAL DEVICE, PERIPHERAL DEVICE, SWITCHING DEVICE AND METHOD OF OPERATION - An energy-saving circuit applies to a peripheral device for connection to a data bus of a host system. The energy-saving circuit includes a monitoring circuit for monitoring a communication via the data bus, a holding circuit for holding a connection state of the peripheral device, at least one switching element for interrupting a supply voltage for the peripheral device, and a control circuit. The control circuit is set up to recognize by means of the monitoring circuit the beginning of an idle state of the data bus, to hold the connection state of the peripheral device by activation of the holding circuit upon recognition of the idle state, and to interrupt the feeding of a supply voltage for the peripheral device by opening the at least one switching element. | 2011-05-12 |
20110109372 | Semiconductor Device with Thermal Fault Detection - A semiconductor device with a thermal fault detection is disclosed. According to one example of the invention such a semiconductor device includes a semiconductor chip including an active area. It further includes a temperature sensor arrangement that provides a measurement signal dependent on the temperature in or close to the active area, the measurement signal having a slope of a time-dependent steepness, and an evaluation circuit that is configured to provide an output signal that is representative of the steepness of the slope of the measurement signal and further configured to signal a steepness higher than a predefined threshold. | 2011-05-12 |
20110109373 | TEMPERATURE COEFFICIENT MODULATING CIRCUIT AND TEMPERATURE COMPENSATION CIRCUIT - In the conventional temperature compensation circuit, the thermal resistor is used to perform the temperature compensation, but the provided compensation range is limited due to the temperature coefficient of the thermal resistor. The embodiment of the invention provides a temperature coefficient modulating circuit capable of amplifying the temperature coefficient of the thermal resistor, so as to provide a wider compensation range in different applications. | 2011-05-12 |
20110109374 | DYING GASP CHARGE CONTROLLER - In many applications, “dying gasp” periods following power down are used. Conventional circuits supply energy for the “dying gasp” periods generally by use of large external capacitors that are bulky and expensive. Here, a dying gasp charge controller is employed that allows for the use of smaller capacitors at higher voltages, which maintains or exceeds the energy storage capacities of conventional circuits. | 2011-05-12 |
20110109375 | CHARGE PUMP APPARATUS AND CHARGE PUMPING METHOD - A charge pumping method includes: generating a first boosted voltage by boosting an input voltage by a boosting mode of a first multiplier; changing the level of a voltage charged in at least one capacitor provided in the inside of a charge pump circuit, in preparation for a change in the boosting mode; and generating a second boosted voltage by boosting the input voltage by a boosting mode of a second multiplier. | 2011-05-12 |
20110109376 | CIRCUITS AND METHODS FOR CONTROLLING A CHARGE PUMP SYSTEM - A circuit includes a charge pump and a feedback circuit. The charge pump coupled to a switch provides a control signal to the switch. The feedback circuit coupled to the charge pump receives the control signal and adjusts an operating frequency of the charge pump based upon the control voltage. The control voltage is adjusted to a predetermined target voltage by adjusting the operating frequency through the feedback circuit. | 2011-05-12 |
20110109377 | SEMICONDUCTOR INTEGRATED CIRCUIT - A circuit block operates while receiving a clock from an external circuit. A load balance circuit is connected to a shared power supply terminal together with the circuit block, and provides predetermined power consumption. A clock detection unit detects input of the clock from an external circuit. When the clock detection unit detects stopping of input of the clock, the load balance circuit is switched to the active state. | 2011-05-12 |
20110109378 | Method and Device For Supplying Power to a Microelectronic Chip - A method and a device for supplying power to one or more microelectronic chips. The method comprises the steps of reading a process characteristic parameter associated with the chip from a non-volatile storage, wherein the process characteristic parameter represents a manufacturing process characteristics of the chip; determining a minimal voltage (VDD_min) based on the parameter; and supplying electric power to the chip ( | 2011-05-12 |
20110109379 | DIFFERENTIAL TRANSMISSION CIRCUIT - A differential transmission circuit comprises a sending unit that generates a pair of differential signals from an input signal, and sends the differential signals; a receiver that receives the differential signals sent by the sending unit; and a transmission path that transmits the differential signals from the sending unit to the receiver, wherein the sending unit has a selector that selects one of the input signal and a signal obtained by inverting a polarity of the input signal, and generates the differential signals from the signal selected by the selector. | 2011-05-12 |
20110109380 | ACTIVE ANALOG FILTER HAVING A MOS CAPACITOR DEVICE WITH IMPROVED LINEARITY - An active analog filter ( | 2011-05-12 |
20110109381 | Integrated Circuit Die Stacks With Rotationally Symmetric Vias - An integrated circuit die stack including a first integrated circuit die mounted upon a substrate, the first die including pass-through vias (‘PTVs’) composed of conductive pathways through the first die with no connection to any circuitry on the first die; and a second integrated circuit die, identical to the first die, rotated with respect to the first die and mounted upon the first die, with the PTVs in the first die connecting signal lines from the substrate through the first die to through silicon vias (TSVs') in the second die composed of conductive pathways through the second die connected to electronic circuitry on the second die; with the TSVs and PTVs disposed upon each identical die so that the positions of the TSVs and PTVs on each identical die are rotationally symmetrical with respect to the TSVs and PTVs on the other identical die. | 2011-05-12 |
20110109382 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus having a plurality of semiconductor chips is configured in such a manner that the plurality of semiconductor chips share one or more source voltages generated in one of the plurality of semiconductor chips. | 2011-05-12 |
20110109383 | MEMS VARACTORS - MEMS varactors capable of handling large signals and/or achieving a high capacitance tuning range are described. In an exemplary design, a MEMS varactor includes (i) a first bottom plate electrically coupled to a first terminal receiving an input signal, (ii) a second bottom plate electrically coupled to a second terminal receiving a DC voltage, and (iii) a top plate formed over the first and second bottom plates and electrically coupled to a third terminal. The DC voltage causes the top plate to mechanically move and vary the capacitance observed by the input signal. In another exemplary design, a MEMS varactor includes first, second and third plates formed on over one another and electrically coupled to first, second and third terminals, respectively. First and second DC voltages may be applied to the first and third terminals, respectively. An input signal may be passed between the first and second terminals. | 2011-05-12 |
20110109384 | Wireless Signal Corrective Pre-Distortion using Linearly Interpolated Filter Coefficients Derived from an Amplifier Sample Set that is Representative of Amplifier Nonlinearlity - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2011-05-12 |
20110109385 | Digital Compensation for Parasitic Distortion Resulting from Direct Baseband to RF Modulation - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2011-05-12 |
20110109386 | CLASS D AMPLIFIER CAPABLE OF SETTING RESTRAINT POWER - A Class D amplifier capable of setting restraint power is provided, which comprises: an audio amplification unit, a pulse width modulation (PWM) unit, a first pre-drive unit, a second pre-drive unit, a first power transistor set, a second power transistor set and a power restraint unit. The power restraint unit has a comparator circuit and a power restraint circuit. The comparator circuit is configured to compare the level of first/second amplified audio signals against the level of a first reference voltage that is externally settable. When the high level of the first/second amplified audio signals is higher than the level of the first reference voltage, the comparator circuit outputs a first comparison signal and a second comparison signal to the power restraint circuit to restrain the power. | 2011-05-12 |
20110109387 | Power amplification apparatus for envelope modulation of highfrequency signal and method for controlling the same - A power amplification apparatus and method provide for controlling envelope modulation of a Radio Frequency (RF) signal. The power amplification apparatus includes a linear amplifier configured to receive an input signal to be amplified, and generate a linear output signal for compensating for a current ripple of an amplified signal and a switch control signal having a current obtained by dividing the linear output signal by a predetermined ratio. The power amplification apparatus also includes a switching amplifier configured to receive the switch control signal through a multi-mode resistor having a variable resistance, and generate the amplified signal. The variable resistance of the multi-mode resistor determines a switching frequency representing an operating speed of the switching amplifier, and is adjusted according to a communication mode of the input signal. | 2011-05-12 |
20110109388 | DIFFERENTIAL RF AMPLIFIER - An RF amplifier including first and second branches coupled in parallel between first and second supply voltage terminals, and a differential pair including first and second transistors each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor to the first main current terminal of the first transistor, wherein the first branch includes a first resistor coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch includes a second resistor; coupled between the first main current terminal of the second transistor and the first capacitor. | 2011-05-12 |
20110109389 | AMPLIFIER CIRCUIT, INTEGRATED CIRCUIT AND RADIO FREQUENCY COMMUNICATION UNIT - An amplifier circuit for amplifying a differential input signal includes a first feedback resistance, a second feedback resistance, first transconductance circuitry, and second transconductance circuitry. The first feedback resistance is connected between a first input node and a first output node of the amplifier circuit. The second feedback resistance is connected between a second input node and a second output node of the amplifier circuit. The first transconductance circuitry is arranged to inject a transconductance current at a point along the first feedback resistance, and is configurable to vary the point along the first feedback resistance where the transconductance current is injected. The second transconductance circuitry is arranged to inject another transconductance current at a point along the second feedback resistance, and is configurable to vary the point along the second feedback resistance where the another transconductance current is injected. | 2011-05-12 |
20110109390 | TRANSCONDUCTOR CIRCUIT - A transconductor circuit, particularly according to the multi-tanh principle, having a first input node and a second input node, a first differential amplifier coupled to the first and second input nodes, and having a first offset voltage, and a second differential amplifier coupled to the first and second input nodes, and having a second offset voltage different from the first offset voltage. A first resistance circuit is coupled between the first differential amplifier and at least one current source, and a second resistance circuit is coupled between the second differential amplifier and the at least one current source. Varying of the current sources enables control of the transconductance without degrading linearity. | 2011-05-12 |
20110109391 | Power Amplifier with Stabilising Network - A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies. | 2011-05-12 |