17th week of 2009 patent applcation highlights part 14 |
Patent application number | Title | Published |
20090101859 | STEAM VALVE AND GENERATOR SET - A steam valve | 2009-04-23 |
20090101860 | Pump assembly and tappet therefor - A tappet suitable for use with a fluid pump, wherein the tappet comprises a side wall portion and an end face which define an internal chamber of the tappet, the end face having a drive surface for co-operating with a drive arrangement, in use, and a plurality of vents through said end face for allowing fluid flow between the internal chamber and an area outside the tappet. A plurality of longitudinal grooves are formed in an internal surface of said side wall portion, said grooves communicating with respective said vents to form a flow path for fluid into the internal chamber. The invention also relates to a pump assembly having such a tappet. | 2009-04-23 |
20090101861 | Valve - A valve for restricting and closing plastic tubing, comprising a base having a surface for holding a plastics tube, two side guides extending from the base, a top provided with a restriction member and means for raising and lowering the restriction member on to a seat. One of the side guides is pivotally connected to the base and connectable to the top. The top having a bifurcation to accept the guide, a seat being provided on the bifurcation to hold a head on the side guide. The valve can be placed round a plastics tube and the restriction member positioned to set the flow through the tube. To remove the valve from the tubing, depression of the top releases the head of the side guide from its seat opening the valve. | 2009-04-23 |
20090101862 | WATER SOLUBLE FOAM FIRE EXTINGUISHING COMPOSITE MATERIAL - A type of water soluble foam fire extinguishing composite material includes a foaming agent, sodium dodecyl benzene sulphonate (DBN), and water. Said sodium dodecyl benzene sulphonate (DBN) is a replacement for halogenated hydrocarbons, and exerts an extremely great effect on cooling and control of the intensity of a fire; because it has almost no effect on ozone in the stratosphere, it will not worsen global warming. | 2009-04-23 |
20090101863 | Polymer Electrolyte for Dye Sensitized Solar Cell - A polymer electrolyte for dye sensitized solar cell is provided. The electrolyte contains a porous hybrid polymer (the components were listed in formula (1) and formula (2)) and the electrolyte solution (the components were shown in formula (3)). | 2009-04-23 |
20090101864 | Chemical Mechanical Polishing Paste for Tantalum Barrier Layer - A chemical mechanical polishing slurry for Ta barrier layer is disclosed, which comprises abrasive particles A, abrasive particles B larger in size than abrasive particles A, a triazole compound, an organic acid and a carrier. By using the chemical mechanical polishing slurry according to the present invention, the defects, scratches, contaminants and other residues can be reduced significantly, and the polishing selectivity between the barrier layer and the oxide layer can be adjusted by using particles of different sizes, so that the difficulty of adjusting the removing rates of two substrates separately is overcome. Furthermore, both the local corrosion and the general corrosion during the metal polishing process are avoided, and thus the yield rate of the desired products is promoted. | 2009-04-23 |
20090101865 | Electrode Material for a Lithium Secondary Battery, Lithium Secondary Battery, and Preparation Method for the Electrode Material for a Lithium Secondary Battery - Disclosed is an electrode material for a lithium secondary battery, a lithium secondary battery comprising the same, and a method for preparing the electrode material for a lithium secondary battery. The electrode material for a lithium secondary battery includes Si as a principal component, wherein the interplanar spacing of an Si (111) surface is between 3.15 Å and 3.20 Å using X-ray diffraction. This is achieve by first alloying Si with an element selected from the group consisting of Al, B, P, Ge, Sn, Pb, Ni, Co, Mn, Mo, Cr, V, Cu, Fe, Ni, W, Ti, Zn, alkali metals, alkaline earth metals, and combinations thereof, and then eluting X from the resulting alloy. | 2009-04-23 |
20090101866 | EFFICIENT MATTING AGENTS BASED ON PRECIPITATED SILICAS - Highly efficient matting agents based on precipitated silicas and wax-coated precipitated silicas, their preparation, and their use in inks and paints. | 2009-04-23 |
20090101867 | HEAT GENERATING ELEMENT AND PRECURSOR THEREOF - A heat generating element of the present invention contains an oxidizable metal, a moisture retaining agent, water, an electrolyte as an oxidation promoter, and a particulate hardening inhibitor. The particle size of the particulate hardening inhibitor is preferably 25% or smaller of that of the oxidizable metal. The heat generating element in which the oxidizable metal to the particulate hardening inhibitor mass ratio is preferably 1 to 30. The particulate hardening inhibitor preferably has a particle size of 10 μm or smaller. | 2009-04-23 |
20090101868 | Method for reclaim of carbon dioxide and nitrogen from boiler flue gas - This invention discloses a method for the reclaim of carbon dioxide and nitrogen from boiler flue gas, which includes: the flue gas enters into the water-washing and desulfurizing tower from the inferior part and contacts the sulfide solution flowing backward for the cleaning and desulfurizing of the flue gas; the desulfurized flue gas is introduced to the inferior part of the chemical absorber, where the contained carbon dioxide contacts the carbon dioxide adsorption liquid (containing, by the total weight of the liquid, of, besides water, 20-60% water solution of compound amine, 5-10% polyxinolum, 1-5% antioxygen and 1-5% corrosion inhibitor) flowing backward;
| 2009-04-23 |
20090101869 | Liquid crystalline medium and liquid crystal display - The instant invention relates to dielectrically positive liquid crystalline media comprising a dielectrically positive component, component A, comprising a dielectrically positive compound of formula I | 2009-04-23 |
20090101870 | ELECTRON TRANSPORT BI-LAYERS AND DEVICES MADE WITH SUCH BI-LAYERS - There are disclosed bi-layer compositions which are useful as electron transport layers. The bi-layers have a first layer containing electron transport material and a second layer containing a fullerene. Also disclosed are organic light emitting diodes including the electron transport bi-layers. | 2009-04-23 |
20090101871 | SOLID SALT PREPARATION, THE PRODUCTION THEREOF AND ITS USE - The present invention relates to a solid salt preparation with improved ease of handling, which comprises a mixture composed of a salt of a halogen-containing oxy acid and of a solvent. The present invention further relates to a process for the production of these salt preparations and also to their use, in particular in stabilizer compositions for halogen-containing polymers. | 2009-04-23 |
20090101872 | LEAD-FREE CONDUCTIVE COMPOSITIONS AND PROCESSES FOR USE IN THE MANUFACTURE OF SEMICONDUCTOR DEVICES: Mg-CONTAINING ADDITIVE - Described herein are a silicon semiconductor device and a conductive lead-free silver paste for use in the front side of a solar cell device. | 2009-04-23 |
20090101873 | ELECTROMAGNETIC INTERFERENCE SHIELDING POLYMER COMPOSITES AND METHODS OF MANUFACTURE - An electromagnetic interference shielding composite is provided. The electromagnetic interference shielding composite comprises: a high permittivity polymer having a permittivity of at least about 5; a plurality of magnetic particles dispersed within the high permittivity polymer; and a plurality of dielectric particles dispersed within the high permittivity polymer. In another embodiment, an article comprising a device susceptible to electromagnetic radiation and a shielding material disposed to shield the device from electromagnetic radiation is provided. The shielding material comprises, a high permittivity polymer; a plurality of magnetic particles dispersed within the high permittivity polymer; and plurality of dielectric particles dispersed within the high permittivity polymer. | 2009-04-23 |
20090101874 | Pigment compositions consisting of an organic yellow pigment and a phthalocyanine pigment - The invention relates to a pigment composition containing a disazo pigment of formula (I) and at least one phthalocyanine pigment. | 2009-04-23 |
20090101875 | Ionizing-radiation-responsive compositions, methods, and systems - A method, composition and system respond to ionizing radiation to adjust biological activity. In some approaches the ionizing radiation is X-ray or extreme ultraviolet radiation that produces luminescent responses that induce biologically active responses. | 2009-04-23 |
20090101876 | Opening/Closing Device for Manhole Cover - An opening and closing apparatus of a manhole cover has a simple structure and by which opening and closing operation of a cover can be performed safely by a worker alone. An opening and closing apparatus of a manhole cover has such a configuration that the manhole cover is openably and closably coupled to an opening portion of a supporting frame via a rotational joining portion. A hydraulic jack in which a plunger pump is driven by a manual lever raises a ram and the ram lowers due to releasing of an oil returning valve attached on the supporting frame near the rotational joining portion such that the hydraulic jack is rotatable at a lower end portion thereof, and the hydraulic jack and an engagement member fixed attachably to and detachably from the manhole cover are coupled to each other by a pulling member. | 2009-04-23 |
20090101877 | Electric motor driven traversing balancer hoist - A balancer hoist has an electric servomotor driving irreversible gearing in turn driving a hoist chain drive. A float mode and a manual mode are provided using two independent load sensors for sensing the load weight and force applied to a control grip. A traversing control is produced by a tractor carriage rolling on an overhead rail connected to a trolley also traveling on the rail and supported on upper hoist assembly. A load sensor interconnects the tractor carriage and upon hoist assembly to sense forces created by an operator pulling on the chain, which are used to control an electric motor on the tractor carriage driving a pinion gear engaged with a gear rack on the overhead rail to positively drive the carriage, trolley and upper hoist assembly along the rail. A stationary dual hoist system is also described in which two hoist assemblies are interconnected by a chain and sprockets to provide synchronized operation. | 2009-04-23 |
20090101878 | Closing Part and Gate Provided with Such a Closing Part - Closing part for a gate, comprising an elongate horizontal lower girder and upper girder and a closing material which lies substantially in one plane therebetween and which is connected on one side to the lower girder and on the other side to the upper girder, wherein the closing material is tensionable and supports are arranged between the upper and lower girders, which supports are provided with tensioning means, this such that the closing material is tensionable between the upper girder and the lower girder. | 2009-04-23 |
20090101879 | Method for Making Self Aligning Pillar Memory Cell Device - A method for making a memory cell assembly includes forming a memory cell access layer over a substrate to create an access device with a bottom electrode. A memory material layer is formed over the memory cell access layer in electrical contact with the bottom electrode. A first electrically conductive layer is formed over the memory material layer. A first mask, extending in a first direction, is formed over the first electrically conductive layer and then trimmed so that those portions of the first electrically conductive layer and the memory material layer not covered by the first mask are removed. | 2009-04-23 |
20090101880 | PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - An exemplary memory device includes a first dielectric layer with a first conductive contact therein. A phase change material (PCM) is disposed on top of the first dielectric layer and provided with an insulating layer integrally on a top surface of the PCM. A first electrode is disposed over the first dielectric layer and covered a portion of the first conductive contact and the insulating layer in a first direction, contacting to the first conductive contact and a first side of the PCM. A second electrode is disposed over the first dielectric layer and covered a portion of the insulating layer in a second direction, contacting to a second side of the PCM. A second dielectric layer is disposed over the first dielectric layer to cover the first electrode, the second electrode, the insulating layer and the PCM, including a second conductive contact connected to the second electrode. | 2009-04-23 |
20090101881 | SEMICONDUCTOR DEVICES HAVING PHASE CHANGE MEMORY CELLS, ELECTRONIC SYSTEMS EMPLOYING THE SAME AND METHODS OF FABRICATING THE SAME - In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern. | 2009-04-23 |
20090101882 | Programmable Via Devices - A device comprises a heater, a dielectric layer, a phase-change element, and a capping layer. The dielectric layer is disposed at least partially on the heater and defines an opening having a lower portion and an upper portion. The phase-change element occupies the lower portion of the opening and is in thermal contact with the heater. The capping layer overlies the phase-change element and occupies the upper portion of the opening. At least a fraction of the phase-change element is operative to change between lower and higher electrical resistance states in response to an application of an electrical signal to the heater. | 2009-04-23 |
20090101883 | Method for manufacturing a resistor random access memory with a self-aligned air gap insulator - A memory device including a programmable resistive memory material is described along with methods for manufacturing the memory device. A memory device disclosed herein includes top and bottom electrodes and a multilayer stack disposed between the top and bottom electrodes. The multilayer stack includes a memory element comprising programmable resistive memory material and has a sidewall surface. An air gap is adjacent to the sidewall surface and self-aligned to the memory element. | 2009-04-23 |
20090101884 | PHASE CHANGE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - Phase change memory devices and methods for fabricating the same are provided. A phase change memory device includes a first conductive electrode disposed in a first dielectric layer. A second dielectric layer is disposed over the first dielectric layer. A phase change material layer is disposed in the second dielectric layer and electrically connected to the first conductive electrode. A space is disposed in the second dielectric layer to at least isolate a sidewall of the phase change material layer and the second dielectric layer adjacent thereto. A second conductive electrode is disposed in the second dielectric layer and electrically connected to the phase change material layer. | 2009-04-23 |
20090101885 | Method of producing phase change memory device - An area where a lower electrode is in contact with a variable resistance material needs to be reduced in order to lower the power consumption of a variable resistance memory device. The present invention provides a method of producing a variable resistance memory element whereby the lower electrode can be more finely formed. The method of producing a semiconductor device according to the present invention includes forming a small opening by utilizing cubical expansion due to the oxidation of silicon. Thereby forming the lower electrode smaller than that can be formed by lithography techniques. | 2009-04-23 |
20090101886 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - The invention discloses a semiconductor light-emitting device. The semiconductor light-emitting device includes a substrate, a first semiconductor material layer, a light-emitting layer, a second semiconductor material layer, a first transparent insulating layer, a metal layer and at least one electrode. The first semiconductor material layer, the light-emitting layer, and the second semiconductor material layer are formed in sequence on the substrate. An opening is formed on the upper surface of the second semiconductor material layer and extends to the interior of the first semiconductor material layer. The first transparent insulating layer overlays the sidewalls of the opening and substantially overlays the upper surface of the second semiconductor material layer such that a region of the upper surface is exposed. The metal layer fills the opening, overlays the exposed region, and partially overlays the first transparent insulating layer. The at least one electrode is formed on the metal layer. | 2009-04-23 |
20090101887 | SILICON GERMANIUM HETEROSTRUCTURE BARRIER VARACTOR - Methods and heterostructure barrier varactor (HBV) diodes optimized for application with frequency multipliers at providing outputs at submillimeter wave frequencies and above. The HBV diodes include a silicon-containing substrate, an electrode over the silicon-containing substrate, and one or more heterojunction quantum wells of alternating layers of Si and SiGe of one or more electrodes of the diode. Each SiGe quantum well preferably has a floating SiGe layer between adjacent SiGe gradients followed by adjacent Si layers, such that, a single homogeneous structure is provided characterized by having no distinct separations. The plurality of Si/SiGe heterojunction quantum wells may be symmetric or asymmetric. | 2009-04-23 |
20090101888 | METHOD OF MANUFACTURING IN (As) Sb SEMICONDUCTOR ON LATTICE-MISMATCHED SUBSTRATE AND SEMICONDUCTOR DEVICE USING THE SAME - Disclosed is a method of manufacturing a semiconductor device whereby InAs | 2009-04-23 |
20090101889 | OPTICALLY INTERFACE ELECTRICALLY CONTROLLED DEVICES - The present invention presents devices and methods for localized control and transport of excitons as well as separate processing of holes and electrons in a device with an optical input and an optical output. In an embodiment of the invention, an optoelectronic device includes a coupled or wide quantum well structure. A localized gate is arranged over a region of the coupled or wide quantum well structure and a semiconductor barrier layer. A optical input and optical output are arranged over other regions of the coupled or wide quantum well structure that are separated by the gate electrode region. The coupled or wide quantum well structure is dimensioned and formed from materials that create a nonzero distance d between the separated electron and hole of an exciton formed in response to the input. The flow of excitons or separated electrons and holes between the optical input and optical output can be controlled by a voltage potentials applied to the localized gate electrode, optical input, and output gates. | 2009-04-23 |
20090101890 | Azaperylenes as organic semiconductors - A novel semiconductor device comprises an azaperylene organic semiconductor of the formula I (I) wherein each of R1, R2, R3 and R4 independently is selected from H, unsubstituted or substituted alkyl, unsubstituted or substituted alkenyl, unsubstituted or substituted alkynyl, unsubstituted or substituted aryl, halogen, Si(RH) | 2009-04-23 |
20090101891 | Multi-layered bipolar field-effect transistor and method of manufacturing the same - Disclosed herein is a multi-layered bipolar field-effect transistor, including a gate electrode, a gate insulating layer, an electron transport layer, a hole transport layer, a source electrode, and a drain electrode, in which an intermediate separating layer is formed between the electron transport layer and the hole transport layer, and a method of manufacturing the same. The multi-layered bipolar field-effect transistor has advantages in that, since a P-channel and a N-channel are effectively separated, the electrical properties thereof, such as current ON/OFF ratio, electron mobility, hole mobility, and the like, are improved, and, since a device can be manufactured through a solution process without damaging layers, the processability thereof is improved. | 2009-04-23 |
20090101892 | Organic underlayers that improve the performance of organic semiconductors - A process for producing high performance organic thin film transistors in which the molecules in the organic thin film are highly ordered and oriented to maximize the mobility of current charge carriers. The uniform monolayer surface over various substrate materials so formed, result in a more reproducible and readily manufacturable process for higher performance organic field effect transistors that can be used to create large area circuits using a range of materials. | 2009-04-23 |
20090101893 | Organic Thin Film Transistors - A method of forming an organic thin film transistor comprising source and drain electrodes with a channel region therebetween, a gate electrode, a dielectric layer disposed between the source and drain electrodes and the gate electrode, and an organic semiconductor disposed in at least the channel region between the source and drain electrodes, said method comprising: seeding a surface in the channel region with crystallization sites prior to deposition of the organic semiconductor; and depositing the organic semiconductor onto the seeded surface whereby the organic semiconductor crystallizes at the crystallization sites forming crystalline domains in the channel region. | 2009-04-23 |
20090101894 | METHOD FOR FABRICATING METAL-OXIDE SEMICONDUCTOR TRANSISTORS - A method for fabricating a metal-oxide semiconductor transistor is disclosed. First, a semiconductor substrate having a gate structure thereon is provided, and a spacer is formed around the gate structure. An ion implantation process is performed to implant a molecular cluster containing carbon, boron, and hydrogen into the semiconductor substrate at two sides of the spacer for forming a doped region. The molecular weight of the molecular cluster is preferably greater than 100. Thereafter, a millisecond annealing process is performed to activate the molecular cluster within the doped region. | 2009-04-23 |
20090101895 | DISPLAY DEVICE - A display device includes a pixel including: a gate line; a gate insulating film; a substrate; a data line; a pixel electrode; a semiconductor layer formed on the gate line and the gate insulating film; a protective film formed on the data line, the pixel electrode, and the semiconductor layer; and a thin film transistor. A portion of the gate line also serves as a gate electrode of the thin film transistor. A portion of the data line also serves as a drain electrode of the thin film transistor. A portion of the pixel electrode also serves as a source electrode of the thin film transistor. The semiconductor layer is formed of an oxide semiconductor layer. The oxide semiconductor layer is directly connected to the drain electrode and the source electrode, and the data line and the pixel electrode are formed of different conductive films. | 2009-04-23 |
20090101896 | SEMICONDUCTOR DEVICE - In a semiconductor device, a semiconductor chip is connected to a board through an interconnection layer. A plurality of first terminals, a plurality of second terminals and a plurality of third terminals are provided on the board, the interconnection layer and the semiconductor chip, respectively. The second terminals are connected to the first terminals through the board. The third terminals are connected to the second terminals. The interconnection layer is rotatable about a rotation axis perpendicular to an upper surface of the interconnection layer. A first terminal having a specific function out of the first terminals and a third terminal having the specific function out of the third terminals are connected to each other by rotating the interconnection layer. | 2009-04-23 |
20090101897 | PACKAGE FOR A LIGHT EMITTING ELEMENT - A high-brightness LED module includes a substrate with a recess in which a light emitting element is mounted. The recess is defined by a sidewalls and a relatively thin membrane. At least two micro-vias are provided in the membrane and include conductive material that passes through the membrane. A p-contact of the light emitting element is coupled to a first micro-via and an n-contact of the light emitting element is coupled to a second micro-via. | 2009-04-23 |
20090101898 | METHOD AND RESULTING STRUCTURE FOR FABRICATING TEST KEY STRUCTURES IN DRAM STRUCTURES - A method for fabricating test structures on a wafer for integrated circuits. The method includes providing a semiconductor substrate, e.g., silicon wafer. The method includes forming a plurality of integrated circuit chip structures on the semiconductor substrate and forming a plurality of MOS devices on a scribe line formed between a first group and a second group of integrated circuit chip structures concurrently using one or more similar processes during forming the plurality of integrated circuit chip structures. The method includes forming a first contact structure and a second contact structure. The first contact structure is coupled to a first MOS device in the plurality of MOS devices and the second contact structure is coupled to an Nth MOS device in the plurality of MOS devices, where N is an integer greater than 1. | 2009-04-23 |
20090101899 | STACKED STRUCTURE AND METHOD OF PATTERNING THE SAME AND ORGANIC THIN FILM TRANSISTOR AND ARRAY HAVING THE SAME - A stacked structure including a soluble organic semiconductor material and a water soluble photosensitive material is provided. The water soluble photosensitive material is disposed on the surface of the soluble organic semiconductor material. | 2009-04-23 |
20090101900 | Optical Sensor with Photo TFT - An optical sensor is disclosed. Each sensor pixel circuit of the optical sensor includes a first readout TFT for reading out voltage of a charge node, a second readout TFT for controllably resetting the charge node to a first reset voltage, and a photo TFT for discharging the voltage at the charge node to a second reset voltage in absence of an object(s). | 2009-04-23 |
20090101901 | Semiconductor device and manufacturing method thereof - By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer. | 2009-04-23 |
20090101902 | Display device and method of manufacturing the same - A substrate comprising a thin-film-transistor (TFT) region, a pixel region, a gate-line region and a data-line region is provided. A transparent conductive layer and a first metal layer are orderly formed on the substrate. A conductive stack layer is formed within each of the TFT/pixel/gate-line regions and the end of the data-line region. Next, a first insulating layer and a semiconductor layer are orderly formed, and a patterned first insulating layer and a patterned semiconductor layer are formed above the conductive stack layer within the TFT region. Then, a second metal layer and a first photoresist layer are respectively formed. Afterwards, the second and the first metal layers are patterned by using the first photoresist layer as a photomask. Finally, the first photoresist layer is reflowed by heat, and part of the reflowed first photoresist layer covers a channel formed within the TFT region. | 2009-04-23 |
20090101903 | Thin film transistor and method for manufaturing thereof - A thin-film transistor (TFT) includes a gate electrode, a gate dielectric layer, a semiconductor layer, source/drain electrodes, a passivation layer and a protection layer. The gate electrode is disposed on a substrate. The gate dielectric layer covers the gate electrode and the substrate. The semiconductor layer is disposed on the gate dielectric layer and above the gate electrode. The semiconductor layer has a channel region disposed above the gate electrode and source/drain regions disposed at both sides of the channel region. The source/drain electrodes are disposed on the source/drain regions of the semiconductor layer and each has a barrier layer disposed on the source/drain regions of the semiconductor layer and a conductive layer disposed on the barrier layer. The passivation layer is disposed over the surface of the source/drain electrodes. The protection layer is disposed over the substrate, the passivation layer, and the channel region of the semiconductor layer. | 2009-04-23 |
20090101904 | DISPLAY DEVICE - Disclosed herein is a display device including: a support substrate; a drive circuit provided on the support substrate; an interlayer insulating film which covers the drive circuit; organic field light-emitting elements arranged in a display region on the interlayer insulating film; and a lead-out wiring extended from the organic field light-emitting elements to a peripheral region around the display region, wherein the interlayer insulating film includes a laminated film made up of an inorganic insulating film and organic insulating film stacked in this order, the organic insulating film has an isolation trench which surrounds the display region, the isolation trench being devoid of the organic insulating film and having the inorganic insulating film at its bottom, and the drive circuit and lead-out wiring are insulated from each other by the inorganic insulating film where the lead-out wiring crosses the isolation trench. | 2009-04-23 |
20090101905 | DISPLAY UNIT AND METHOD OF MANUFACTURING THE SAME - A display unit includes, on an insulating substrate, a plurality of wirings formed to extend in different directions, a thin-film transistor, and a display element. At least one of the plurality of wirings is a divided wiring having a crossing portion formed at an intersection with the other of the plurality of wirings, and a main portion which is formed in a layer same as the other of the plurality of wirings with an insulating film in between and which is electrically connected to the crossing portion via an conductive connection provided in the insulating film. At least one of the main portion and the crossing portion includes a first layer and a second layer stacked in order from the insulating substrate side, the second layer being in direct contact with the first layer and made of a material of a higher melting point than the first layer. | 2009-04-23 |
20090101906 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A first resist pattern is formed by exposure using a first multi-tone photomask, and a first conductive layer, a first insulating layer, a first semiconductor layer, and a second semiconductor layer are etched, so that an island-shaped single layer and an island-shaped stack are formed. Here, sidewalls are formed on side surfaces of the island-shaped single layer and the island-shaped stack. Further, a second resist pattern is formed by exposure using a second multi-tone photomask, and a second conductive layer and the second semiconductor layer are etched, so that a thin film transistor, a pixel electrode, and a connection terminal are formed. After that, a third resist pattern is formed by exposure from a rear side using metal layers of the first conductive layer and the second conductive layer as masks, and the third insulating layer are etched, so that a protective insulating layer is formed. | 2009-04-23 |
20090101907 | IMAGE DETECTOR - An image detector which includes an active matrix substrate and a protection substrate bonded to the active matrix substrate by an insulating bonding member, in which the insulating bonding member is bonded to the active matrix substrate through an inorganic insulating film disposed in an area around the periphery of the semiconductor layer. | 2009-04-23 |
20090101908 | Liquid crystal display device and method of fabricating the same - A method of fabricating an LCD device includes forming a gate line, a gate electrode, a gate pad electrode at an end of the gate line, and a common line on a substrate; forming a gate insulating layer on the gate electrode; forming an active layer on the gate insulating layer; forming an etch stopper on the active layer; forming first and second ohmic contact layers spaced apart from each other on the active layer and an impurity-doped amorphous silicon pattern contacting the gate insulating layer therebelow, outer sides of the first and second ohmic contact layers being outside the active layer; forming a data line crossing the gate line to define a pixel region, a data pad electrode at an end of the data line, and source and drain electrodes on the first and second ohmic contact layers, respectively; forming a pixel electrode and a common electrode in the pixel region to induce an in-plane electric field; and forming a gate pad terminal electrode on the gate pad electrode. At least one of the data line, the pixel electrode and the common electrode contacts the impurity-doped amorphous silicon pattern therebelow. | 2009-04-23 |
20090101909 | SEMICONDUCTOR PHOTODETECTORS - In one aspect, a method includes forming a pit in a top surface of a substrate by removing a portion of the substrate and growing a semiconductor material with a bottom surface on the pit, the semiconductor material different than the material of the substrate. The pit has a base recessed in the top surface of the substrate. In another aspect, a structure includes a substrate having a top surface, the substrate including at least one pit having a base lower than the top surface of the substrate, and a semiconductor material having a bottom surface formed on the base of the pit. | 2009-04-23 |
20090101910 | Thin-film transistor - A gate-insulated thin film transistor is disclosed. One improvement is that the thin film transistor is formed on a substrate through a blocking layer in between so that it is possible to prevent the transistor from being contaminated with impurities such as alkali ions which exist in the substrate. Also, a halogen is added to either or both of the blocking lay r and a gate insulator of the transistor. | 2009-04-23 |
20090101911 | Thin film transistor, display device having the same, and associated methods - A thin film transistor (TFT), including a substrate, an active layer and a gate electrode on the substrate, and a first gate insulating layer and a second gate insulating layer between the active layer and the gate electrode. Each of the first gate insulating layer and the second gate insulating layer may have a thickness between approximately 200 Å and approximately 400 Å, inclusive. | 2009-04-23 |
20090101912 | ACTIVE DEVICE ARRAY FOR REDUCING DELAY OF SCAN SIGNAL AND FLAT PANEL DISPLAY USING THE SAME - An active device array and flat panel display using the same are provided. The active device array includes a plurality of pixels, a plurality of scan-lines, a plurality of data-lines and a plurality of auxiliary scan-lines, wherein each pixel is electrically connected to a corresponding scan-line and a corresponding data-line. Each scan-line has a first terminal and a second terminal, and the first terminal of scan-line receives a scan signal. The auxiliary scan-lines correspond to the scan-lines. One terminal of each auxiliary scan-line is electrically connected to the first terminal of a corresponding scan-line, and the other terminal thereof is electrically connected to the second terminal of the corresponding scan-line. | 2009-04-23 |
20090101913 | APPARATUS AND METHOD FOR REDUCING PHOTO LEAKAGE CURRENT FOR TFT LCD - A method of forming a thin film transistor (TFT) array panel, comprising the steps of: (i) forming a patterned first conductive layer, which includes a gate line and a shielding portion, on a substrate, (ii) forming a gate insulating layer on the patterned first conductive layer and the substrate, (iii) forming a patterned semiconductor layer on the gate insulating layer, (iv) forming a patterned second conductive layer, which includes a source electrode, and a drain electrode on the patterned semiconductor layer, and a data line that is electrically connected to the source electrode, (v) forming a patterned passivation layer on the patterned second conductive layer and the substrate, and (vi) forming a patterned transparent conductive layer on the patterned passivation layer. | 2009-04-23 |
20090101914 | Semiconductor Image Sensing Device - A signal charge corresponding to an incident light quantity is accumulated in a first node of each pixel circuit. An accumulated charge exhaust circuit includes each of first nodes of the plurality of pixel circuits belonging to the same pixel group, and a second node connected through discharge gates functioning as variable resistance elements. Second node functions as a floating drain during an ON period of a control switch, while accumulating the signal charge overflowing from each pixel circuit, in a capacitor during an OFF period of control switch provided at an intermediate timing in one frame period. When the incident light to the pixel group is intense, a resistance value of each discharge gate is lowered in response to an increase of the signal charge accumulated in capacitor, so that the signal charge accumulated in each pixel circuit can be exhausted once at the above intermediate timing. | 2009-04-23 |
20090101915 | PHOTO SENSOR AND FABRICATION METHOD THEREOF - A photo sensor includes a patterned shielding conductive layer disposed on a transparent substrate, and a buffer dielectric layer, a patterned semiconductor layer, and a dielectric layer disposed on the patterned shielding layer in order. The patterned semiconductor layer includes an intrinsic region, a first doped region, and a second doped region, wherein the first and second doped regions are positioned at two sides of the intrinsic region separately. A patterned transparent conductive layer is disposed on the dielectric layer and covers the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region. The patterned transparent conductive layer is electrically connected to the patterned shielding conductive layer. | 2009-04-23 |
20090101916 | MICROCRYSTALLINE SEMICONDUCTOR FILM, THIN FILM TRANSISTOR, AND DISPLAY DEVICE INCLUDING THIN FILM TRANSISTOR - A thin film transistor with excellent electric characteristics and a display device having the thin film transistor are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode; a microcrystalline semiconductor film including an impurity element which serves as a donor, formed over the gate insulating film; a buffer layer formed over the microcrystalline semiconductor film; a pair of semiconductor films to which an impurity element imparting one conductivity type is added, formed over the buffer layer; and wirings formed over the pair of semiconductor films. The concentration of the impurity element which serves as a donor in the microcrystalline semiconductor film is decreased from the gate insulating film side toward the buffer layer, and the buffer layer does not include the impurity element which serves as a donor at a higher concentration than the detection limit of SIMS. | 2009-04-23 |
20090101917 | THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY APPARATUS HAVING THE SAME - A TFT substrate with reduced pixel defect rate is presented. The TFT substrate includes a pixel electrode, a negative line to apply a reverse voltage to the pixel electrode, and a recovery transistor including a drain electrode overlapping a part of the negative line with a insulating layer disposed between the negative line and the drain electrode. A contact hole is formed on the negative line and the drain electrode, and a bridge electrode connects the negative line and the drain electrode through the contact hole. | 2009-04-23 |
20090101918 | SEMICONDUCTOR ELEMENT AND METHOD FOR MANUFACTURING SAME - A semiconductor device includes: a semiconductor layer | 2009-04-23 |
20090101919 | Photo-Detector Array, Semiconductor Image Intensifier And Methods Of Making And Using The Same - A sensor including an array of light sensitive pixels, each pixel including: at least one hetero-junction phototransistor having a floating base without contact, wherein each phototransistor is a mesa device having active layers exposed at side-walls of the mesa device; and at least one atomic layer deposited high-k dielectric material adjacent to and passivating at least the side-wall exposed active layers. | 2009-04-23 |
20090101920 | WHITE LIGHT EMITTING ELEMENT AND WHITE LIGHT SOURCE - A white light source has an excitation light source and a white light emitting element provided at a position which allows the transmission of light from the excitation light source to generate white light through irradiation with the light from the excitation light source. The white light emitting element has a sapphire substrate made of sapphire or the like which transmits visible light, an InGaAlN semiconductor layer formed on a surface of the sapphire substrate to emit red light through irradiation with visible light, and a fluorescent layer formed on the surface opposite to the surface provided with the semiconductor layer to emit yellow light or green light through irradiation with visible light. | 2009-04-23 |
20090101921 | LED and thermal conductivity device combination assembly - AN LED and thermal conductivity device combination assembly includes a thermal conductivity device, two conducting members each having a metal conducting wire and an insulator surrounding the metal conducting wire and attached to the thermal conductivity device, LED chips each having a positive electrode and a negative electrode disposed at the top side and an insulation layer disposed at the bottom side and bonded to the surface of the thermal conductivity device, lead wires connected between the positive electrode and negative electrode of the LED chips and the metal conducting wires of the conducting members to connect the LED chips in series and in parallel, and a packaging device covering the LED chips. | 2009-04-23 |
20090101922 | LED ARRANGEMENT FOR PRODUCING PURE MONOCHOMATIC LIGHT - In an LED arrangement, two or more LEDs are particularly positioned for the color lights emitted therefrom to be fully mixed to produce a pure monochromatic light. The LEDs may include at least two identical LEDs, and each of the LEDs includes at least two light emitting chips that separately emit a different color light. The LEDs are positioned in a particular manner, so that the light emitting chips located in different LEDs at the same corresponding positions emit different lights. In this manner, the color lights emitted from the LEDs are fully overlapped and mixed to produce a pure monochromatic light having increased illumination intensity and area. | 2009-04-23 |
20090101923 | SEMICONDUCTOR LIGHT EMITTING DEVICE, METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGE USING THE SAME - There is provided a semiconductor light emitting device, a method of manufacturing the same, and a semiconductor light emitting device package using the same. A semiconductor light emitting device having a first conductivity type semiconductor layer, an active layer, a second conductivity type semiconductor layer, a second electrode layer, and insulating layer, a first electrode layer, and a conductive substrate sequentially laminated, wherein the second electrode layer has an exposed area at the interface between the second electrode layer and the second conductivity type semiconductor layer, and the first electrode layer comprises at least one contact hole electrically connected to the first conductivity type semiconductor layer, electrically insulated from the second conductivity type semiconductor layer and the active layer, and extending from one surface of the first electrode layer to at least part of the first conductivity type semiconductor layer. | 2009-04-23 |
20090101924 | Gallium nitride semiconductor device on SOI and process for making same - Methods and apparatus for producing a gallium nitride semiconductor on insulator structure include: bonding a single crystal silicon layer to a transparent substrate; and growing a single crystal gallium nitride layer on the single crystal silicon layer. | 2009-04-23 |
20090101925 | Light Emitting Element and Method for Manufacturing the Same - A light emitting element including: a growth substrate, which has, as a main plane, a plane on which cleavage directions are orthogonal to each other; a first nitride semiconductor layer formed on the main plane of the growth substrate; an active layer formed on the first nitride semiconductor layer; and a second nitride semiconductor layer formed on the active layer. An angle formed on the main plane by the side of the growth substrate and one of the cleavage directions is ranging approximately from 30° to 60°. | 2009-04-23 |
20090101926 | SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a semiconductor light emitting device and a method of manufacturing the same. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer divided in plurality on the first conductive type semiconductor layer, and a second conductive type semiconductor layer divided in plurality on the active layer. | 2009-04-23 |
20090101927 | Method of manufacturing light emitting device - A method of manufacturing a semiconductor light emitting device employs a substrate formed by successively stacking an n-type semiconductor layered portion including an AlGaN layer, a light emitting layer containing In and a p-type semiconductor layered portion on a group III nitride semiconductor substrate having a larger lattice constant than AlGaN. This method includes the steps of selectively etching the substrate from the side of the p-type semiconductor layered portion along a cutting line to expose the AlGaN layer along the cutting line, forming a division guide groove along the cutting line on the exposed AlGaN layer, and dividing the substrate along the division guide groove. | 2009-04-23 |
20090101928 | LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME - Provided are a light emitting diode and a method of fabricating the same. In an inorganic light emitting diode, at least one layer selected from a group consisting of an oxide layer, a nitride layer, and a metal layer is formed on an upper doping layer which is in contact with a transparent electrode, and the plasma treatment is performed on the resultant structure to form a plasma etching layer, thereby enhancing adhesion between the upper doping layer and the transparent electrode. In an organic light emitting diode, at least one layer selected from a group consisting of an oxide layer, a nitride layer, and a metal layer is formed on a plastic substrate which is in contact with a transparent electrode, and the plasma treatment is performed on the resultant structure to form a plasma etching layer, thereby enhancing adhesion between the substrate and the transparent electrode. As a result, the adhesion between the substrate and the transparent electrode or between the upper doping layer and the transparent electrode is enhanced and the layer separation from the transparent electrode is prevented, thereby improving efficiency of the light emitting diode and increasing the production yield. | 2009-04-23 |
20090101929 | ROBUST LED STRUCTURE FOR SUBSTRATE LIFT-OFF - An etching step is performed on an LED/substrate wafer to etch through the LED epitaxial layers entirely around each LED on the substrate wafer to form a gap between each LED on the wafer. The substrate is not etched. When the LEDs/substrates are singulated, edges of each substrate extend beyond edges of the LED die. The LEDs are flip-chips and are mounted on a submount with the LED die between the submount and the substrate. An insulating underfill material is injected under the LED die and also covers the sides of the LED die and “enlarged” substrate. The substrate is then removed by laser lift-off. The raised walls of the underfill that were along the edges of the enlarged substrate are laterally spaced from the edges of the LED die so that a phosphor plate can be easily positioned on top to the LED die with a relaxed positioning tolerance. | 2009-04-23 |
20090101930 | Light emitting device with phosphor wavelength conversion - A light emitting device comprises an excitation source ( | 2009-04-23 |
20090101931 | Light Emitting Diode Structures - Light emitting diode (LED) structures are described that include a first layer and a light-generating layer, wherein light generated in the light-generating layer generally emerges from the LED structure through the upper surface of the first layer. The coupling out of light generated by spontaneous emission is enhanced by the presence of patterning in the first layer, which may take the form of an embedded photonic quasicrystal, a photonic structure comprising an amorphous array of subregions, or a zone plate structure. The invention provides the benefit of improved light extraction from the LED without undesirable far field illumination patterns. | 2009-04-23 |
20090101932 | Semiconductor light-emitting device and method of fabricating the same - The invention provides a semiconductor light-emitting device package structure. The semiconductor light-emitting device package structure includes a substrate, N sub-mounts, and N semiconductor light-emitting die modules, wherein N is a positive integer lager than or equal to 1. Each of the sub-mounts is embedded on the substrate and exposed partially. Each of the semiconductor light-emitting die modules is mounted on the exposed surface of one of the sub-mounts. | 2009-04-23 |
20090101933 | Semiconductor light emitting device and fabrication method of the semiconductor light emitting device - A semiconductor light emitting device which can control of current density and can optimize current density and in which a rise in luminosity is possible, and a fabrication method of the semiconductor light emitting device are provided. The semiconductor light emitting device including: a semiconductor substrate structure including a semiconductor substrate, a first metal layer placed on a first surface of the semiconductor substrate, and a second metal layer placed on a second surface of the semiconductor substrate; and a light emitting diode structure including a third metal layer placed on the semiconductor substrate structure, a current control layer placed on the third metal layer and composed of a transparent insulating film and a current control electrode, an epitaxial growth layer placed on the current control layer, and a surface electrode placed on the epitaxial growth layer, wherein the semiconductor substrate structure and the light emitting diode structure are bonded by using the first metal layer and the third metal layer. | 2009-04-23 |
20090101934 | Monolithic White Light-Emitting Diode - The invention relates to a device comprising a matrix made of III-V nitride, said matrix comprising at least an active first portion through which an electrical current passes and at least a passive second portion through which no electrical current passes, said matrix comprising at least a first zone forming a first quantum confinement region made of a III-V nitride, said first zone being positioned in said active first portion, and at least a second zone forming a second quantum confinement region made of III-V nitride, characterized in that said second zone is positioned to said passive portion of said matrix. | 2009-04-23 |
20090101935 | NITRIDE SEMICONDUCTOR AND METHOD FOR MANUFACTURING SAME - A nitride semiconductor includes: a substrate having a major surface including a first crystal polarity surface and a second crystal polarity surface different from the first crystal polarity surface; and a single polarity layer provided above the major surface and having a single crystal polarity. | 2009-04-23 |
20090101936 | SEMICONDUCTOR LIGHT EMITTING ELEMENT AND WAFER - There are provided a semiconductor light emitting element which allows an improvement in light extraction efficiency without increasing the number of fabrication steps, and a wafer. In a semiconductor light emitting element | 2009-04-23 |
20090101937 | NOVEL METHOD FOR FOUR DIRECTION LOW CAPACITANCE ESD PROTECTION - The invention describes a structure and a process for providing ESD semiconductor protection with reduced input capacitance. The structure consists of heavily doped P+ guard rings surrounding the I/O ESD protection device and the Vcc to Bss protection device. In addition, there is a heavily doped N+ guard ring surrounding the I/O protection device its P+ guard ring. The guard rings enhance structure diode elements providing enhanced ESD energy discharge path capability enabling the elimination of a specific conventional Vss to I/O pad ESD protection device. This reduces the capacitance seen by the I/O circuit while still providing adequate ESD protection for the active circuit devices. | 2009-04-23 |
20090101938 | Electrostatic Discharge Protection Circuit - The present invention provides an electrostatic discharge (ESD) protection circuit with a silicon controlled rectifier (SCR) having a plurality of SCR fingers (SCRs) with the advantages to couple the different fingers or SCRs to decrease the multi-triggering problem and to increase the ESD-performance of the circuit. Additionally, a boost circuit can be introduced or additionally multiple SCRs can be coupled inherent through a common base. | 2009-04-23 |
20090101939 | Group III Nitride Field Effect Transistors (FETS) Capable of Withstanding High Temperature Reverse Bias Test Conditions - Group III Nitride based field effect transistor (FETs) are provided having a power degradation of less than about 3.0 dB when operated at a drain-to-source voltage (V | 2009-04-23 |
20090101940 | DUAL GATE FET STRUCTURES FOR FLEXIBLE GATE ARRAY DESIGN METHODOLOGIES - A gate array cell adapted for standard cell design methodology or programmable gate array that incorporates a dual gate FET device to offer a range of performance options within the same unit cell area. The conductivity and drive strength of the dual gate device may be selectively tuned through independent processing of manufacturing parameters to provide an asymmetric circuit response for the device or a symmetric response as dictated by the circuit application. | 2009-04-23 |
20090101941 | WRAPPED GATE JUNCTION FIELD EFFECT TRANSISTOR - A wrapped gate junction field effect transistor (JFET) with at least one semiconductor channel having a first conductivity type doping is provided. Both sidewalls of each of the at least one semiconductor channel laterally abuts a side gate region having a second conductivity type doping, which is the opposite of the first conductivity doping. Further, the at least one semiconductor channel vertically abuts a top gate region and at least one bottom gate region, both having the second conductivity type doping. The gate electrode, which comprises side gate region, the top gate region, and at least one bottom gate regions, wraps around each of the at least one semiconductor channel to provide tight control of the current, i.e., a low off-current, through the at least one semiconductor channel. By employing multiple channels, the JFET may provide a high on-current. | 2009-04-23 |
20090101942 | PLANAR FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD - Disclosed is a transistor that incorporates epitaxially deposited source/drain semiconductor films and a method for forming the transistor. A crystallographic etch is used to form recesses between a channel region and trench isolation regions in a silicon substrate. Each recess has a first side, having a first profile, adjacent to the channel region and a second side, having a second profile, adjacent to a trench isolation region. The crystallographic etch ensures that the second profile is angled so that all of the exposed recess surfaces comprise silicon. Thus, the recesses can be filled by epitaxial deposition without divot formation. Additional process steps can be used to ensure that the first side of the recess is formed with a different profile that enhances the desired stress in the channel region. | 2009-04-23 |
20090101943 | Reversely Tapered Contact Structure Compatible With Dual Stress Liner Process - A semiconductor device having a silicon layer, a transistor having an electrical connection region in the silicon layer; and a conductive plug formed on and in electrical contact with the electrical connection region, the plug having side walls that taper inward away from the silicon layer. | 2009-04-23 |
20090101944 | ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - It is made possible to form an interelectrode gap with high precision, without a decrease in the simplicity and convenience of the process to be carried out by an ink jet technique. A method for manufacturing an electronic device, includes: applying a water repellent agent onto a substrate by an ink jet technique to form a water repellent region on the substrate; dropping a solution containing a conductive ink material along edges of the water repellent region on the substrate by the ink jet technique to form a source electrode and a drain electrode; and forming a semiconductor layer to cover the water repellent region, the source electrode, and the drain electrode. | 2009-04-23 |
20090101945 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate; an N-type MOSFET formed in a surface of the semiconductor substrate; a tensile stress film provided on the semiconductor substrate at least around a directly overlying region of a channel region of the N-type MOSFET and having tensile stress therein; and a compressive stress film provided in the directly overlying region of the channel region and having compressive stress therein. | 2009-04-23 |
20090101946 | CMOS IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - A CIS and a method for manufacturing the same are provided. The CIS includes an interlayer insulation layer formed on a substrate having a photodiode and a transistor formed thereon; a plurality of color filters formed on the interlayer insulation layer and spaced a predetermined interval apart from each other; a metal sidewall formed to fill the predetermined interval between the plurality of the color filters; and a microlens formed on each of the plurality of color filters. | 2009-04-23 |
20090101947 | Image sensor device and fabrication method thereof - An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel array therein. A first transparent layer with a curved surface is disposed on the substrate. A micro lens array is conformally disposed on the curved surface of the first transparent layer and corresponds to the pixel array in the substrate. The invention also discloses an electronic assembly for an image sensor device and a fabrication method thereof. | 2009-04-23 |
20090101948 | CMOS image sensors having transparent transistors and methods of manufacturing the same - CMOS image sensors having transparent transistors and methods of manufacturing the same are provided. The CMOS image sensors include a photodiode and at least one transistor formed on the photodiode. The image sensor may include a plurality of transistors wherein at least one of the plurality of transistors is a transparent transistor. | 2009-04-23 |
20090101949 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - An image sensor having maximized photosensitivity includes a photodiode and a transistor formed over the semiconductor substrate. A first passivation layer is formed over the semiconductor substrate including the transistor and the photodiode, a pre-metal dielectric layer formed over the first passivation layer and insulating layers having metal wirings formed over the pre-metal dielectric layer. A trench is formed in the insulating layers and the pre-metal dielectric layer exposing a portion of the first passivation layer formed over the photodiode while a second passivation layer formed on sidewalls and a bottom of the trench and over the uppermost surface of the insulating layer such that the second passivation layer directly contacts the portion of the first passivation layer formed over the photodiode. A photosensitive material is then formed over the second passivation layer and buried in the trench. | 2009-04-23 |
20090101950 | CMOS IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME - A CMOS image sensor and a method for fabricating the same. In one example embodiment, a method for fabricating a CMOS image sensor includes various steps. First, an interlayer dielectric that includes a plurality of metal lines is formed on a semiconductor substrate that includes a photodiode. Next, a trench is formed in the interlayer dielectric. Then, a passivation layer is formed in the trench. Next, the trench is filled by vapor-depositing an additional dielectric layer on the passivation layer. Then, a color filter is formed on the additional dielectric layer. Next, a planarization layer is formed on the color filter. Finally, a micro lens is formed on the planarization layer. | 2009-04-23 |
20090101951 | CMOS Image Sensor and Fabricating Method Thereof - A CMOS image sensor and fabricating method thereof are disclosed. The method includes forming a plurality of photodiode regions on a semiconductor substrate, forming a plurality of color filters respectively corresponding to the photodiode regions, forming a planarization layer on the color filters, forming a protective layer on the planarization layer, and forming a microlens layer comprising a plurality of microlenses corresponding to the photodiode regions by depositing a low-temperature oxide layer on the protective layer and then patterning the low-temperature oxide layer. After the planarization layer is formed, the protective layer is formed by plasma processing. Thus, the planarization layer can be protected from chemical penetration via numerous pin holes in the microlens layer in the course of wet processing. Accordingly, the method prevents the microlens from lifting from the planarization layer. | 2009-04-23 |
20090101952 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - An image sensor and a method for manufacturing the same that includes photodiodes formed in a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, the first insulating layer including a seed pattern corresponding spatially to the positions of the photodiodes, lower microlenses composed of an organic material formed over the seed pattern, a second insulating layer formed over the lower microlenses, a third insulating layer formed over the second insulating layer, color filters formed over the third insulating layer, and upper micro lenses formed over the color filters. | 2009-04-23 |
20090101953 | PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE - A photoelectric conversion element is provided and includes a photoelectric conversion portion which includes: a pair of electrodes including an electron-collecting electrode and a hole-collecting electrode; and a photoelectric conversion layer between the pair of electrodes. At least part of the photoelectric conversion layer includes a mixture layer of a p-type organic semiconductor and a fullerene, and a volume ratio of the fullerene to the p-type organic semiconductor in the photoelectric conversion layer is such that the volume ratio on a side of the electron-collecting electrode is smaller than the volume ratio on a side of the hole-collecting electrode. | 2009-04-23 |
20090101954 | Capacitor and semiconductor device having a ferroelectric material - A capacitor includes a pair of electrodes and a ferroelectric film sandwiched between the electrodes. The electrodes are provided perpendicular to the direction of the polarization axis of the ferroelectric film. | 2009-04-23 |
20090101955 | MOLECULAR ELECTRONIC DEVICE AND METHOD OF FABRICATING THE SAME - A molecular electronic device, and a method of fabricating the same, includes a first electrode having a plurality of prominences and depressions on which a plurality of molecules are self-assembled. Capacitance of a molecular electronic device used as a capacitor is increased by forming prominences and depressions on the surface of the first electrode thereby enabling more molecules to be self-assembled on the surface of the lower electrode. | 2009-04-23 |
20090101956 | EMBEDDED TRENCH CAPACITOR HAVING A HIGH-K NODE DIELECTRIC AND A METALLIC INNER ELECTRODE - A deep trench is formed in a semiconductor substrate and a pad layer thereupon, and filled with a dummy node dielectric and a dummy trench fill. A shallow trench isolation structure is formed in the semiconductor substrate. A dummy gate structure is formed in a device region after removal of the pad layer. A first dielectric layer is formed over the dummy gate structure and a protruding portion of the dummy trench fill and then planarized. The dummy structures are removed. The deep trench and a cavity formed by removal of the dummy gate structure are filled with a high dielectric constant material layer and a metallic layer, which form a high-k node dielectric and a metallic inner electrode of a deep trench capacitor in the deep trench and a high-k gate dielectric and a metal gate in the device region. | 2009-04-23 |
20090101957 | SIMPLIFIED METHOD OF FABRICATING ISOLATED AND MERGED TRENCH CAPACITORS - Trench capacitors having small and large sizes can be formed simultaneously using a combined lithography process in which openings in a photomask have the same dimensions and spacings. Larger capacitors are formed when the openings in the photomask are aligned with one crystal plane of the semiconductor substrate causing the resulting trenches in the semiconductor substrate to merge. Smaller capacitors are formed when the openings in the photomask are aligned with another crystal plane of the semiconductor substrate in which case each trench remains separate from other trenches. | 2009-04-23 |
20090101958 | TRENCH SOI-DRAM CELL AND METHOD FOR MAKING THE SAME - The present invention relates to a trench silicon-on-insulator (SOI) dynamic random access memory (DRAM) cell and a method for making the same. A source and a drain are utilized to each connect to one of two semiconductor conductive units on an external side of a main body having a plurality of semiconductor conductive units, and the semiconductor conductive units are utilized to accumulate electric charges generated from the drain so as to decrease a threshold voltage. In addition, the DRAM cell only uses one field effect transistor (FET) device ( | 2009-04-23 |