16th week of 2011 patent applcation highlights part 8 |
Patent application number | Title | Published |
20110089949 | Parallel Imaging Apparatus and Method - A parallel MRI method and apparatus are provided. In some aspects the individual coils of the imaging array are designed to have optimized shapes and/or sizes to suit an imaging purpose. For example, varying coil sizes depending on an imaging effectiveness into a region or interest, including by combining more than one element of the array to form a virtual or combined element is used to reduce the computational requirements for parallel imaging. | 2011-04-21 |
20110089950 | Microresistivity Imaging at Multiple Depths of Investigation - A microresistivity logging tool includes a dual function electrode deployed between a guard electrode and a return electrode. A drive circuit enables the electrical potential of the dual function electrode to be independently controlled so as to control a depth of investigation of a microresistivity measurement. The depth of investigation tends to increase with increasing electrical potential of the dual function electrode. | 2011-04-21 |
20110089951 | Microresistivity Imaging in Conductive and Nonconductive Drilling Fluid - A microresistivity logging tool includes a shield electrode deployed between a guard electrode and a return electrode. A measuring electrode is deployed in and electrically isolated from the guard electrode and first and second potential electrodes are deployed in and electrically isolated from the shield electrode. The tool further includes at least one switch configured to switch the tool between distinct first and second microresistivity measurement modes. The first measurement mode is configured for making microresistivity measurements in conductive (water based) drilling fluid and the second measurement mode is configured for making microresistivity measurements in non-conductive (oil based) drilling fluid, thereby enabling the tool to be utilized in either type of drilling fluid. | 2011-04-21 |
20110089952 | PUSH-BUTTON TESTING SYSTEM - A system for testing a push-button switch is provided. The system for testing a push-button switch includes a switch test device. The switch test device has a flexible tab attached to a pushing member at an end of the flexible tab. A sensor is attached to the flexible tab. The sensor generates a signal that changes relative to a deformation of the flexible tab. A data collection system is connected to the switch test device and receives signals from the sensor. | 2011-04-21 |
20110089953 | SENSOR ARRANGEMENT AND METHOD OF USING THE SAME - A sensor arrangement and method that may be used with a variety of different energy storage devices, including battery packs found in hybrid vehicles, battery electric vehicles, and other types of vehicles. An exemplary sensor arrangement includes a number of sensor units, a controller, and several connections, wherein two or more sensor units are coupled to each node of the battery pack and are coupled to the controller over different connections. An exemplary method is divided into two aspects: an error detection aspect and an error resolution aspect. Because the sensor arrangement provides multiple sensor readings for each node being evaluated, the method can enable the sensor arrangement to continue operating accurately and with redundancy even if it experiences a loss of one or more sensor units. | 2011-04-21 |
20110089954 | STATION FOR DETECTING WINDING PRODUCTS AND METHOD FOR DETECTING INTER-TURN SHORT CIRCUIT - A detecting station of a winding product and a method for detecting an inter-turn short circuit are provided. The method includes following steps. First, a high voltage pulse is input to two ends of a winding of a winding product. Next, a voltage value of an electrifying process of the winding is extracted for generating an extracting data. Finally, a time-frequency converting operation is performed to the extracting data, and a time-frequency analysis information is generated for indicating whether or not the inter-turn short circuit is occurred in the winding. | 2011-04-21 |
20110089955 | Element Substrate, Inspecting Method, and Manufacturing Method of Semiconductor Device - A substrate including a semiconductor layer, where characteristics of an element can be evaluated with high reliability, and an evaluating method thereof are provided. A substrate including a semiconductor layer of the invention has a closed-loop circuit in which an antenna coil and a semiconductor element are connected in series, and a surface of an area over which the circuit is formed is covered with an insulating film. By using such a circuit, a contactless inspection can be carried out. Further, a ring oscillator can be substituted for the closed-loop circuit. | 2011-04-21 |
20110089956 | Fast Response Capacitive Gauging System Featuring Steep Slope Filter Discrimination Circuit - The high speed, high accuracy capacitive gauging system employs an oscillator fed through steep slope filter that is discriminates between very small changes in capacitance even in the presence of electrical noise. During intervals when the probe tip is retracted, the oscillator frequency is calibrated to match the sweet spot in the center of the linear operative region of the steep slope filter. This calibrates the system to overcome the effects of varying temperature and humidity in the manufacturing environment. | 2011-04-21 |
20110089957 | MULTI-CHANNEL POTENTIOSTAT FOR BIOSENSOR ARRAYS - Arrays of biosensors are provided along with methods for operating the arrays of biosensors. The array of biosensors may include a first reference electrode that is connected to an input of a first control amplifier; a first working electrode and a second working electrode in proximity with the first reference electrode; and a counter electrode that is connected to at least an output of the first control amplifier, where the first control amplifier is operative with the counter electrode to maintain a first specified voltage between the first working electrode and the first reference electrode, and between the second working electrode and the first reference electrode. The array of biosensors optionally may further include a second reference electrode that is connected to an input of a second control amplifier, where the second control amplifier is operative with the counter electrode to maintain a second specified voltage between the first working electrode and the second reference electrode, and between the second working electrode and the second reference electrode. | 2011-04-21 |
20110089958 | DAMAGE-SENSING COMPOSITE STRUCTURES - A composite includes a matrix material and a unidirectional array of carbon nanotube-infused fibers disposed in a portion of the matrix material. An article includes this composite and a network of electrodes disposed about the periphery of the composite. The electrodes send and receive an electrical charge. Such an article is included in a system, along with sensing circuitry and a source for supplying current to the network of electrodes. Such a system is used in a method that includes subjecting the article to a load that causes a condition in the composite including strain, fatigue, damage, or cracks, and monitoring the location of the condition. | 2011-04-21 |
20110089959 | METHOD AND DEVICE FOR DETERMINING IONIZING RADIATION - A method and device for determining ionizing radiation. The method for determining ionizing radiation comprises the steps of applying a constant voltage across an organic semiconducting material sensor prior to and after exposure of the sensor to the ionizing radiation; measuring and converting the current passing through the sensor proportional to the conductivity or resistivity of the sensor which in turn is proportional to the ionizing radiation in the sensor, into a proportional analog voltage value; and if desired converting the analog voltage value into digital value; and comparing the analog/digital values obtained prior to and after exposure of the sensor to the ionizing radiation and computing the ionizing radiation based on the change in the analog/digital values. The electronic device for determining ionizing radiation comprises an organic semiconductor resistor ( | 2011-04-21 |
20110089960 | MEASUREMENT SYSTEM - The invention discloses a contacting device for a thin film solar cell, comprising a positioning plane for positioning the solar cell thereon, a contact element for electrically contacting the solar cell and a suction element, wherein the solar cell is arrangeable on the top side of the positioning plane, the contact element is arranged slideably in a direction orthogonal to the positioning plane and arranged slideably through an opening of the positioning plane, and the suction element is arranged on the bottom side of the positioning plane for sucking air through the opening. The contacting device allows for obtaining improved measurement accuracy. | 2011-04-21 |
20110089961 | Interface test device and method - A monitored test block for use in medium and high voltage electrical monitoring circuits such as found in substation facilities that signals via a communication protocol the operational status of potential, current and signal secondary circuits when connected to protection and monitoring devices (or test devices) such as protective relays, fault recorders or any other monitoring and controlling device. The monitored test block includes various safety features to prevent damage to the equipment or harm to a technician. The monitoring circuits may be located in the front for ease of access. | 2011-04-21 |
20110089962 | TESTING OF ELECTRONIC DEVICES THROUGH CAPACITIVE INTERFACE - An embodiment of a test apparatus for executing a test of a set of electronic devices having a plurality of electrically conductive terminals, the test apparatus including a plurality of electrically conductive test probes for exchanging electrical signals with the terminals, and coupling means for mechanically coupling the test probes with the electronic devices. In an embodiment, the coupling means includes insulating means for keeping each one of at least part of the test probes electrically insulated from at least one corresponding terminal during the execution of the test. Each test probe and the corresponding terminal form a capacitor for electro-magnetically coupling the test probe with the terminal. | 2011-04-21 |
20110089963 | TEST CONTACT ARRANGEMENT - The invention relates to a test contact arrangement ( | 2011-04-21 |
20110089964 | METHOD FOR TESTING SEMICONDUCTOR MEMORY DEVICE USING PROBE AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME - Example embodiments relate to a semiconductor memory device including a first pad having a probe region and a sensing region, the first pad may be adapted to come in contact with a primary probe, a sensing unit adapted to sense a weak contact of the first pad and the primary probe, the sensing unit may generate an output current in response to a contact point of the primary probe, and a second pad may be adapted to come in contact with a secondary probe to input/output an electric signal. The output current of the sensing unit may be output through the second pad or the secondary probe. | 2011-04-21 |
20110089965 | PROBE CARD ANALYSIS SYSTEM AND METHOD - A system and method for evaluating wafer test probe cards under real-world wafer test cell condition integrates wafer test cell components into the probe card inspection and analysis process. Disclosed embodiments may utilize existing and/or modified wafer test cell components such as, a head plate, a test head, a signal delivery system, and a manipulator to emulate wafer test cell dynamics during the probe card inspection and analysis process. | 2011-04-21 |
20110089966 | APPARATUS AND SYSTEMS FOR PROCESSING SIGNALS BETWEEN A TESTER AND A PLURALITY OF DEVICES UNDER TEST - Apparatus is for processing signals between a tester and devices under test. In one embodiment, the apparatus includes at least one multichip module. Each multichip module has a plurality of micro-electromechanical switches between a set of connectors to the tester and a set of connectors to devices under test. At least one driver is provided to operate each of the micro-electromechanical switches. Other embodiments are also disclosed. | 2011-04-21 |
20110089967 | MEMS PROBE CARD AND MANUFACTURING METHOD THEREOF - Provided are a micro-electro-mechanical system (MEMS) probe card and a method for manufacturing the same. The method includes preparing first to nth low-temperature co-fired ceramic (LTCC) substrates each having a via hole, filling each via hole with a via filler conductor or a resistor, stacking the first to nth LTCC substrates and firing the stacked substrates at a temperature of 1,000° C. or less to prepare a LTCC multilayer substrate, forming an insulating layer on the surface of the LTCC multilayer substrate, and forming a thin film conductive line on the surfaces of the insulating layer and the via filler conductor. | 2011-04-21 |
20110089968 | ELECTRONIC DEVICE MOUNTING APPARATUS AND METHOD OF MOUNTING ELECTRONIC DEVICE - The electronic device mounting apparatus 1 comprises: a first camera 123 for imaging a flexible board 74 of a base member 70 of a test carrier 60 to generate a first image information; an image processing apparatus 40 for detecting a position of an alignment mark 79 of the flexible board 74 from the first image information and calculating a print start position 782 of the first interconnect patterns 78 on the flexible board 74 on the basis of the position of the alignment mark 79; a printing head 122 for forming a first interconnect pattern 78 on the flexible board 74 from the print start position 782; and a second conveyor arm 21 for mounting a die 90 on the flexible board 74 on which the first interconnect pattern 78 is formed. | 2011-04-21 |
20110089969 | IC WITH DESKEWING CIRCUITS - Some embodiments provide a configurable integrated circuit (IC) comprising multiple deskew circuits for delaying data passage. Each of the deskew circuits comprises a stepwise delay circuit with multiple outputs and an input selection circuit with multiple inputs. Multiple outputs connect to multiple inputs. | 2011-04-21 |
20110089970 | CONFIGURATION CONTEXT SWITCHER - Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data. | 2011-04-21 |
20110089971 | DOWNLOAD SEQUENCING TECHNIQUES FOR CIRCUIT CONFIGURATION DATA - Methods, systems, and devices are described for the implementation of a novel architecture to support download sequencing techniques for circuit configuration data. Sets of configuration data from nonvolatile memory may be sequentially transferred to volatile memory to support reconfigurable circuit elements, for example, for use in a clock generator. Different programmable circuit elements may use configuration data, but have different ramp-up times before stable operation. With early download sequence positioning of configuration data, and corresponding immediacy in initiation of operation, certain clock elements are able to commence initiation of operation while remaining clock elements are provided with configuration data from a latter portion of the download sequence. | 2011-04-21 |
20110089972 | SCALABLE NON-BLOCKING SWITCHING NETWORK FOR PROGRAMMABLE LOGIC - A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits. | 2011-04-21 |
20110089973 | Semiconductor device and information processing system including the same - A semiconductor device includes a plurality of core chips and an interface chip stacked together. Each of the core chips and the interface chip includes plural through silicon vias that penetrate a semiconductor substrate and a bidirectional buffer circuit that drives the through silicon vias. The interface chip also includes a logic-level holding circuit that holds a logic level of the through silicon vias. The bidirectional buffer circuit includes an input buffer and an output buffer. The driving capability of a first inverter of the logic-level holding circuit is smaller than the driving capability of the output buffer of the bidirectional buffer circuit. | 2011-04-21 |
20110089974 | ROBUST TIME BORROWING PULSE LATCHES - Configurable time-borrowing flip-flops may be based on configurable pulse generation circuitry and pulse latches. The circuitry may use a self-timed architecture that controls the width of clock pulses that are generated so that the pulse latches that are controlled by the clock pulses exhibit a reduced risk of race through conditions. Latch circuitry may be provided that is based on a pulse latch and an additional latch connected in series with the pulse latch. In situations in which there is a potential for race through conditions on an integrated circuit, the additional latch may be switched into use to convert the latch circuitry into an edge-triggered flip flop. Clock trees may be provide with configurable shorting structures that help to reduce clock skew. Low-contention clock drivers may drive signals onto the clock tree paths. | 2011-04-21 |
20110089975 | LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE - A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×10 | 2011-04-21 |
20110089976 | MOS INTEGRATED CIRCUIT AND ELECTRONIC EQUIPMENT INCLUDING THE SAME - A MOS integrated circuit includes: a voltage-to-current conversion circuit configured to convert first and second voltages to a first current having a current value corresponding to the first voltage and a second current having a current value corresponding to the second voltage; and a current comparison circuit configured to compare the respective current values of the first and second currents and to output a voltage showing the comparison result. Oxide films of MOS transistors of the current comparison circuit are thinner than oxide films of MOS transistors of the voltage-to-current conversion circuit. | 2011-04-21 |
20110089977 | Systems and Methods of Low Offset Switched Capacitor Comparators - The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator. | 2011-04-21 |
20110089978 | Sampling Device And Circuit Having A Single Voltage Supply - In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage. | 2011-04-21 |
20110089979 | SOURCE DRIVER WITH CHARGE SHARING - A source driver includes an output buffer for outputting a driving signal; a first current path coupled between the output buffer and a data line; and a second current path coupled in parallel to the first current path. During a first driving period, the output buffer utilizes both the first current path and the second current path to drive the data line. During a second driving period, the output buffer utilizes only the first current path to transmit the driving signal so as to improve the stability of the source driver. | 2011-04-21 |
20110089980 | CAPACITIVE LOAD DRIVER - A capacitive load driver includes a first switching element whose first end receives positive potential, an EL element arranged between a second end of the first switching element and the ground, a charge collecting capacitor whose first end is connected to a positive electrode terminal of the EL element, a voltage source connected between a second end of the charge collecting capacitor and the ground, and a controller. The controller charges a parasitic capacitance of the EL element and the charge collecting capacitor, and thereafter, applies negative potential from the voltage source to the second end of the charge collecting capacitor. Thereafter, the controller brings the output voltage of the voltage source to ground potential so that the charge collecting capacitor is discharged to charge the EL element. The capacitance of the charge collecting capacitor is set to be sufficiently greater than that of the parasitic capacitance. | 2011-04-21 |
20110089981 | SEMICONDUCTOR DEVICE AND COMMUNICATION METHOD - It is possible to provide a highly reliable semiconductor device and a communication method in which communication can be performed between circuits with a large degree of freedom of clock frequency which can be set in each of the circuits, a decisive operation, and a small communication latency. The semiconductor device according to the present invention includes a first circuit that performs processing based on a first clock signal, the first clock signal having a frequency M/N times as large as a frequency of a second clock signal (N is a positive integer, and M is a positive integer larger than N); a second circuit that performs processing based on the second clock signal; and a communication timing control circuit that generates a communication timing signal to control a timing at which the first circuit performs communication with the second circuit. The communication timing control circuit generates the communication timing signal determined by a frequency ratio information and a phase relation information, the frequency ratio information setting a frequency ratio of the first clock signal to the second clock signal, the phase relation information indicating a phase relation between the first clock signal and the second clock signal. | 2011-04-21 |
20110089982 | Fast Lock-In All-Digital Phase-Locked Loop with Extended Tracking Range - An apparatus and a method for achieving lock-in of a phase-locked loop (PLL) are disclosed. The PLL receives a reference clock and generates an output clock according to the reference clock. The method comprises: adjusting an oscillation frequency of a controlled oscillator of the PLL close to a desired frequency by counting the number of rising edges of a first clock in a number of a second clock cycles; aligning a rising edge of a third clock and a rising edge of a fourth clock by temporarily changing the oscillation frequency of the digitally controlled oscillator; and locking the phases of the third and fourth clocks by a phase detector of the PLL, wherein the first and the third clocks correspond to the output clock and the second and fourth clocks correspond to the reference clock. | 2011-04-21 |
20110089983 | LOOP TYPE CLOCK ADJUSTMENT CIRCUIT AND TEST DEVICE - A variable delay circuit applies a variable delay that corresponds to an analog signal to a reference clock so as to generate a delayed clock. A phase detection unit detects the phase difference between the delayed clock and the reference clock, and generates a phase difference signal having a level that corresponds to the phase difference. A counter performs a counting up operation or a counting down operation according to the level of the phase difference signal. A digital/analog converter converts the count value of the counter into an analog signal, and supplies the count value thus converted to the variable delay circuit. The counter comprises: a first counter configured to use a first thermometer code to count the lower group of digits of the count value according to the phase difference signal; a second counter configured to use a second thermometer code to count an upper group of digits of the count value according to the phase difference signal; and a control circuit configured to perform a control operation such that the Hamming distance is maintained at 1 even in a carry operation and a borrow operation of the first counter and the second counter. | 2011-04-21 |
20110089984 | Clock signal balancing circuit and method for balancing clock signal in IC layout - A method for balancing clock signals in an IC layout includes obtaining a data-flow information of the IC, selecting a first data-flow according to the dataflow information, and synchronizing a first clock signal from a first register and a second clock signal from a second register involved in the first data-flow. The data processed by the first register is directly transmitted to the second register or transmitted through a combinational logic circuit to the second register. The first data-flow is not related to other data-flows included in the data-flow information. | 2011-04-21 |
20110089985 | Delay Line Calibration Mechanism and Related Multi-Clock Signal Generator - A delay line calibration mechanism includes a first delay line, a second delay line, a phase detector, and a controller. The first delay line receives a first pulse and a first delay selection signal, and delays the first pulse for a first delay period according to the first delay selection signal to output a first delayed pulse. The second delay line receives a second pulse and a second delay selection signal, and delays the second pulse for a second delay period according to the second delay selection signal to output a second delayed pulse. The phase detector generates a phase difference signal indicating the phase difference between the first delayed pulse and the second delayed pulse by comparing the first delayed pulse and the second delayed pulse. The controller generates the second delay selection signal, and generates the first delay selection signal according to the phase difference signal. | 2011-04-21 |
20110089986 | METHOD AND APPARATUS FOR PULSE WIDTH MODULATION - An apparatus and method of providing a pulse width modulated signal that is responsive to a current are disclosed. A circuit according to aspects of the present invention includes a capacitor to convert a first current to a first voltage on the capacitor during a first time duration and to discharge a second current from the capacitor to change the first voltage to a second voltage during a second time duration. A comparator is also included and is coupled to an output of the capacitor to compare a voltage on the capacitor to a reference voltage during the second time duration to change a pulse width of a periodic output signal in response to an input current. | 2011-04-21 |
20110089987 | MULTI-PHASE SIGNALS GENERATOR - A multi-phase signals generator is disclosed. The multi-phase signals generator mentioned above includes a frequency divider and N delay circuits. The frequency divider receives a clock signal and divides a frequency of the clock signal to generate a divided frequency clock signal. The N delay circuits are connected in series. The delay circuit connected in a first stage receives the divided frequency clock signal. The delay circuit connected in an i | 2011-04-21 |
20110089988 | Self-Calibrating R-2R Ladder and Method Thereof - A method and apparatus are provided for calibrating a ladder circuit. The apparatus includes: a logic unit for receiving a first logical signal, a second logical signal, and N control bits and for outputting N alternative control bits and an additional control bit, where N is an integer greater than 1; a core circuit for receiving the N alternative control bits, the additional control bit, and a tuning word, and for outputting an output signal, wherein the core circuit comprises N−1 series elements, N shunt elements with a connectivity controlled by the N alternative control bits, respectively, and a termination element with a connectivity controlled by the additional control bit; and a calibration circuit for receiving the first logical signal, the second logical signal, and the output signal and for outputting the tuning word. When the first logical signal is 0, the apparatus operates in a normal mode and the output signal follows the N control bits; when the first logical signal is 1, the apparatus operates in a calibration mode and the output signal follows the second logical signal. When the apparatus operates in the calibration mode, the tuning word is adjusted in a closed loop manner so as to make the output signal substantially the same regardless of a value of the second logical signal. | 2011-04-21 |
20110089989 | LIMITER CIRCUIT - The limiter circuit of this invention is a limiter circuit which, by switching action of a pair of transistors, allows passage of only signal voltage components of an input signal voltage included in ranges of an upper limit signal voltage and a lower limit signal voltage. With this construction, the pair of transistors carry out comparisons between the input signal voltage and threshold signal voltages and line switching at the same time. Therefore, there is no influence of propagation delay speed, and no switching noise occurs at times of line switching. Since diodes are not used, a high-speed limiter circuit can be manufactured. | 2011-04-21 |
20110089990 | Control Loop for Amplification Stage - There is disclosed a method and apparatus for generating an output signal comprising a replica of an input signal, comprising the steps of: generating a replica signal representing the low frequency content of the input signal; generating an error signal representing an error in the replica signal; combining the replica signal with the error signal to generate an output signal; and wherein the step of generating the error signal further includes the steps of: generating a delay signal being a delayed version of the input signal; and determining a difference between the output signal and the delay signal which difference is the error signal. | 2011-04-21 |
20110089991 | RF BUFFER CIRCUIT WITH DYNAMIC BIASING - An RF buffer circuit for a voltage controlled oscillator (VCO) includes dynamic biasing circuitry to selectively flip the phase of the output voltage waveform. In a CMOS implementation, a PMOS/NMOS pair is employed in an output path. During a high (voltage) swing mode condition, the phase of the output is flipped such that the output waveform is in phase with the voltages appearing at the gates of the PMOS/NMOS pair. The technique thereby reduces peak gate-to-drain voltages and allows for improved reliability of the MOS devices in a configuration amenable to low phase noise and low power consumption. | 2011-04-21 |
20110089992 | Systems for Accurate Multiplexing - The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating. | 2011-04-21 |
20110089993 | ELECTRONIC DEVICE AND METHOD FOR DC-DC CONVERSION - An electronic device for driving a power switch coupled to receive a first supply voltage level at one side of its channel is provided. The electronic device includes a control switch coupled with a first side of a channel to receive a varying control voltage having a maximum level that is greater than a maximum voltage level of the first voltage supply and with another side of the channel to a control gate of the power switch for selectively applying the control voltage to the control gate of the power switch. The first side of the channel is coupled with the control gate of the control switch and a capacitor is provided and coupled with a first side to the control gate of the control switch and with a second side to a constant voltage supply. | 2011-04-21 |
20110089994 | Threshold Voltage Modification Via Bulk Voltage Generator - The present disclosure relates to threshold voltage modification via a voltage generator connected to bulk nodes of transistors. | 2011-04-21 |
20110089995 | Graphene device and method of manufacturing the same - Provided is a graphene device and a method of manufacturing the same. The graphene device may include an upper oxide layer on at least one embedded gate, and a graphene channel and a plurality of electrodes on the upper oxide layer. The at least one embedded gate may be formed on the substrate. The graphene channel may be formed on the plurality of electrodes, or the plurality of electrodes may be formed on the graphene channel. | 2011-04-21 |
20110089996 | Systems and Devices for Dynamically Scaled Charge Pumping - Systems and devices for dynamically scaled charge pumping are presented. Example embodiments of the disclosed systems of dynamically scaled charge pumping enable regulation of the output voltage at a particular ratio and to dynamically control the ratio based on the input voltage. A charge pumping circuit is enabled by an oscillator. The charge pump oscillator is enabled by the output of a comparator. The comparator compares an input voltage to a comparator voltage, which is a divided version of the output voltage. The output voltage is referenced to a regulated voltage and the comparison voltage is divided between the two voltages by a resistor divider. The regulated voltage remains flat until the input voltage equals the reference voltage. At that point, the regulated voltage will begin to rise and follow the input voltage. Before the reference voltage is reached, the output voltage equals the input voltage multiplied by the resistor divider ratio. Once the input voltage reaches the reference voltage, the difference between the output voltage and the input voltage becomes a constant. | 2011-04-21 |
20110089997 | POWER SUPPLY CIRCUIT - A power supply circuit in accordance with the invention includes a charge-pump circuit and a control circuit. The charge-pump circuit includes first and second capacitors. The control circuit controls the charging voltage of the first and second capacitors. In this way, the power supply circuit outputs a constant output voltage based on the charging voltages of the first and second capacitors. | 2011-04-21 |
20110089998 | Logic circuits, inverter devices and methods of operating the same - An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor. | 2011-04-21 |
20110089999 | DYNAMIC ENABLING PUMP FOR POWER CONTROL - A voltage generation system that can dynamically calibrate a time period for enabling the system includes: a voltage generation circuit, for providing an output voltage; an oscillator, coupled to the voltage generation circuit, for driving the voltage generation circuit to generate the output voltage at a specific frequency according to an enable signal; a limiter, coupled to the oscillator and the output voltage fed back from the voltage generation circuit, for generating the enable signal to the oscillator according to the output voltage; and an enable controller, coupled to the limiter, the oscillator, the voltage generation circuit and the enable signal generated by the limiter, for enabling the limiter, the oscillator and the voltage generation circuit according to an estimated time between enable signals, wherein the estimated time is dynamically calibrated. | 2011-04-21 |
20110090000 | SIGNAL TRANSMISSION CIRCUIT - To provide an inverter including first and second transistors connected in series between first and second power supply lines, a source transistor that is provided between the first power supply line and the first transistor and is conductive based on a control signal, and a load transistor that serves as a load circuit provided between the second power supply line and the second transistor. According to the present invention, because a difference between a load between the first power supply line and the first transistor and a load between the second power supply line and the second transistor is reduced, a difference between a signal propagation rate at which an input signal supplied to the inverter changes from a low level to a high level and a signal propagation rate at which the input signal changes from the high level to the low level is reduced. | 2011-04-21 |
20110090001 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased. | 2011-04-21 |
20110090002 | HIGH VOLTAGE TOLERANCE OF EXTERNAL PAD CONNECTED MOS IN POWER-OFF MODE - An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads. | 2011-04-21 |
20110090003 | Control Module for Controlling Electro-phoretic Display Integrated Circuit and Method thereof - By classifying an electro-phoretic display integrated circuit (EPD IC) into a digital routine module, a digital non-routine module, and an analog routine module, and by switching off the digital non-routine module and the analog routine module, power consumption of the EPD IC may be effectively reduced, and an available time of an integrated circuit card utilizing the EPD IC may also be lengthened. | 2011-04-21 |
20110090004 | RECONFIGURING THROUGH SILICON VIAS IN STACKED MULTI-DIE PACKAGES - Through silicon vias (TSVs) in a stacked multi-die integrated circuit package are controlled to assume different connection configurations as desired during field operation of the package in its normal mission mode. TSV connections may be reconfigured to connect an affected die in a manner different from, for example, a factory default connection of that die. TSV connections to the inputs and/or outputs of a die's native circuitry may be changed. A die may be disconnected altogether from an interface that interconnects dice in the stack, or a die that was originally disconnected from such an interface may be connected to the interface. | 2011-04-21 |
20110090005 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR ELEMENT, AND SUBSTRATE - A semiconductor device, a semiconductor element, and a substrate are provided, which allow the semiconductor element to be provided with a reduced size when combined. The semiconductor device has a rectangular semiconductor element mounted on a substrate formed with an external input terminal, an external output terminal, and a plurality of wiring patterns connected to each of the external input terminal and the external output terminal. The semiconductor element includes a grayscale voltage generating unit for generating a plurality of grayscale voltages by dividing a reference voltage, a plurality of electrodes for the reference voltage formed in the neighborhood of the grayscale voltage generating unit; and an internal wiring for connecting the grayscale voltage generating unit and the reference voltage electrodes. The substrate includes a wiring pattern for the reference voltage for connecting the external input terminal and the reference voltage electrodes. | 2011-04-21 |
20110090006 | ANALOG CIRCUIT AND SEMICONDUCTOR DEVICE - An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×10 | 2011-04-21 |
20110090007 | Multi-stage amplifier - There is disclosed a power supply stage, and a corresponding method, comprising: a plurality of amplifiers for amplifying an input signal, each amplifier receiving a power supply voltage; a common selection means for selecting one of a plurality of power supply voltages in dependence on a reference signal representing a desired power supply voltage; and a plurality of adjusting means, corresponding to the plurality of amplifiers, adapted to generate an adjusted selected power supply voltage for a respective amplifier tracking the reference signal in dependence on the one selected power supply voltage and the reference signal. | 2011-04-21 |
20110090008 | POWER AMPLIFICATION APPARATUS AND POWER AMPLIFICATION METHOD - Disclosed is a power amplifier apparatus including: an amplifier amplifying an input modulated signal; a control signal generator receiving an amplitude component of the input modulated signal and generating a control signal; and a power combiner performing ON/OFF control of a switching element based on the control signal to control conduction and non-conduction of a current supplied from a second power supply. In the power combiner, a power of a pulsed form when the current from the second power supply is conductive is transferred in a direction of a first power supply, using a transformer. A difference power obtained by subtracting a constant value from a first power supply voltage when the amplitude of the input modulated signal is smaller than that of a reference signal is supplied from the power combiner to the amplifier, as a power supply thereof (FIG. | 2011-04-21 |
20110090009 | CAPACITIVE SENSOR - A capacitive sensor amplifier circuit comprising: a capacitive sensor; a bias voltage supply connected across the capacitive sensor via a bias resistor; an operational amplifier having an input connected to the capacitive sensor; and a feedback capacitor connected between the input and an output of the amplifier, the input and output being of the same sign. | 2011-04-21 |
20110090010 | Variable gain amplification device - Provided is a variable gain amplification device that suppresses deterioration of a noise characteristic generated according to an amount of attenuation by fixing the amount of attenuation while a variable gain amplification unit is changing a gain. The variable gain amplification device includes a variable attenuation unit that attenuates an input signal. The variable gain amplification device further includes a variable gain amplification unit that changes and amplifies a gain of the attenuated input signal which is output by the variable attenuation unit. A control unit is further included that controls to fix the amount of attenuation of the variable attenuation unit while the variable gain amplification unit is changing the gain. | 2011-04-21 |
20110090011 | POWER AMPLIFIER - An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector. | 2011-04-21 |
20110090012 | CIRCUIT AND METHOD FOR RADIO FREQUENCY AMPLIFIER - A radio frequency amplifier circuit includes a substrate that is capable of receiving a substrate bias voltage. The source of a transistor is capable of receiving a source bias voltage. The drain of the transistor is capable of receiving a drain bias voltage. The gate of the transistor is located between the source and the drain. A radio frequency input signal is coupled to the gate. A substrate bias circuit provides the substrate bias voltage. The substrate bias voltage and the source bias voltage forward bias the first diode formed by the source and the substrate. The substrate bias voltage and the drain bias voltage reverse bias the second diode formed by the drain and the substrate. | 2011-04-21 |
20110090013 | FIELD-EFFECT TRANSISTOR AMPLIFIER - A field-effect transistor amplifier is provided, which can maintain excellent RF characteristics and, at the same time, can improve current variation. The field-effect transistor amplifier according to the present invention comprises a field-effect transistor which amplifies an input signal supplied to a gate terminal thereof and outputs the amplified signal from a drain terminal thereof, and a self-bias circuit coupled to a source terminal of the field-effect transistor. The self-bias circuit comprises a resistor, a capacitor, and an adjusting circuit which adjusts RF (high frequency) characteristics and DC (direct current) characteristics. The resistor, the capacitor, and the adjusting circuit are coupled in parallel with each other, and one end of each of them is coupled to the source terminal and the other end is coupled to a ground. | 2011-04-21 |
20110090014 | Switched active bias control and power-on sequencing circuit for an amplifier - An active bias control circuit for an amplifier includes a switch responsive to a supply voltage for providing an input current to the input of the amplifier, and a current sense circuit coupled to the switch for sensing a scaled down replica of the input current to the amplifier. A first amplifier control circuit is responsive to the current sense circuit for adjusting a first control voltage to the amplifier in response to the sensed, scaled down replica of the input current to regulate the input current to the amplifier. Circuitry for power up sequencing an amplifier for an active bias control circuit for the amplifier is also disclosed. | 2011-04-21 |
20110090015 | SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE - A semiconductor integrated circuit includes a first ring oscillator to which a stress voltage is applied; a second ring oscillator to which the stress voltage is not applied; and a phase comparator configured to receive an output of the first ring oscillator and an output of the second ring oscillator, and to compare phases of the outputs. The first ring oscillator includes a switch circuit configured to switch between a first connection state in which ring connection of the first ring oscillator is disconnected to connect a predetermined node of the second ring oscillator to a predetermined node of the first ring oscillator, and a second connection state in which connection between the first ring oscillator and the second ring oscillator is disconnected to connect the first ring oscillator in a ring. | 2011-04-21 |
20110090016 | OSCILLATOR CIRCUIT WITH A FAST TRANSIENT - An oscillator circuit for producing a frequency signal has a resonator element, an amplifier circuit and a coupling apparatus. The coupling apparatus connects the amplifier circuit to the resonator element for the duration of a switching-on process in the oscillator circuit. | 2011-04-21 |
20110090017 | Reduced Phase Noise Multi-Band VCO - Embodiments of a multi-band voltage controlled oscillator (VCO) are provided herein. The multi-band VCO is configured to adjust a frequency of an output signal based on an input signal. The multi-band VCO includes a tank module, an active module, and a control module. The tank module includes a parallel combination of a capacitor and an inductor. The active module includes a pair of cross-coupled transistors that are configured to provide a negative conductance that cancels out a positive conductance associated with the tank module. To improve the phase noise associated with the multi-band VCO, the control module is configured to adjust the body voltage of the cross-coupled transistors. | 2011-04-21 |
20110090018 | ARCHITECTURE FOR ADJUSTING NATURAL FREQUENCY IN RESONANT CLOCK DISTRIBUTION NETWORKS - An inductor architecture for resonant clock distribution networks is proposed. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture is primarily targeted at the design of integrated inductors and exhibits relatively low area overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels. | 2011-04-21 |
20110090019 | ARCHITECTURE FOR FREQUENCY-SCALED OPERATION IN RESONANT CLOCK DISTRIBUTION NETWORKS - An architecture for resonant clock distribution networks is proposed. This architecture allows for the energy-efficient operation of a resonant clock distribution network at multiple clock frequencies through the deployment of flip-flops that can be selectively enabled. The proposed architecture is primarily targeted at the design of resonant clock networks with integrated inductors and exhibits no inductor overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels. | 2011-04-21 |
20110090020 | Voltage Controlled SAW Oscillator with Phase Shifter - An oscillator which, in one embodiment, is a voltage controlled surface acoustic wave oscillator including at least a surface acoustic wave filter and a voltage controlled phase shifter. In one embodiment, the phase shifter includes at least one low pass circuit and two high pass circuits coupled in series to improve phase shift versus control voltage linearity. In one embodiment, the low pass circuit includes at least a pair of inductors in series and a variable resistor coupled in parallel therebetween and to ground and the high pass circuit includes at least a pair of variable resistors in series and an inductor coupled in parallel therebetween and to ground. | 2011-04-21 |
20110090021 | Circuit for Impedance Matching - A circuit provided for impedance matching includes an input, an output and four impedance elements arranged between them. In this case, two of the impedance elements are connected in series in a main path and form a T configuration with a third component. In addition, a fourth component is connected in parallel with the main path of the circuit. By way of example, the components arranged in the main path are variable capacitances and the further components are inductances. | 2011-04-21 |
20110090022 | RF SWITCH FOR AN RF SPLITTER - An RF switch for an RF splitter is disclosed, in which the bias voltage for the RF switching elements can be supplied, by means of an RF to DC translator, from the RF signal on the input side to the switch. By means of a native NMOS switch, routing of the RF signal is thus enabled without the necessity for an external power supply. | 2011-04-21 |
20110090023 | COMPOSITE RIGHT/LEFT (CRLH) COUPLERS - High-frequency couplers and coupling techniques are described utilizing artificial composite right/left-handed transmission line (CRLH-TL). Three specific forms of couplers are described; (1) a coupled-line backward coupler is described with arbitrary tight/loose coupling and broad bandwidth; (2) a compact enhanced-bandwidth hybrid ring coupler is described with increased bandwidth and decreased size; and (3) a dual-band branch-line coupler that is not limited to a harmonic relation between the bands. These variations are preferably implemented in a microstrip fabrication process and may use lumped-element components. The couplers and coupling techniques are directed at increasing the utility while decreasing the size of high-frequency couplers, and are suitable for use with separate coupler or couplers integrated within integrated devices. | 2011-04-21 |
20110090024 | Switched Capacitor Array Having Reduced Parasitics - A switched capacitor includes a capacitor and a switch. The capacitor is coupled between a p-node and an n-node and includes interleaved p-fingers and n-fingers. A number of the p-fingers is greater than a number of the n-fingers. The switch is coupled between the n-node and ground. | 2011-04-21 |
20110090025 | Electromagnetic wave transmission filters and electromagnetic cameras including the same - An electromagnetic wave transmission filter may include a substrate and one or more coils. The one or more coils may be at least partly disposed in an opening through the substrate. An electromagnetic camera may include an electromagnetic wave detector array, including a plurality of detector cells for detecting electromagnetic waves, and an electromagnetic wave transmission filter disposed in front of the electromagnetic wave detector array to provide each of the detector cells with an electromagnetic wave of a certain wavelength. The electromagnetic wave transmission filter may includes a substrate and a plurality of coils. At least one of the plurality of coils may be at least partly disposed in each of a plurality of openings through the substrate. | 2011-04-21 |
20110090026 | BAND REJECTION FILTER - An inexpensive compact band rejection filter realizes a high sharpness of a filter characteristic at ends of passbands and has a large attenuation. In the band rejection filter, at least one of a plurality of elastic wave resonators, which contributes to formation of a transition band, has a propagation angle larger than those of the other elastic wave resonators. Accordingly, the at least one of the plurality of elastic wave resonators which contributes to the formation of the transition band has an electromechanical coupling coefficient that is smaller than electromechanical coupling coefficients of the other elastic wave resonators. | 2011-04-21 |
20110090027 | STRIPLINE TERMINATION CIRCUIT HAVING RESONATORS - A technique of realizing a termination circuit using coupled resonators in stripline configuration of a circuit presented. The circuit absorbs RF energy incident on its input over a frequency band of interest, and dissipates it in to the dielectric substrate, thereby acting like an effective termination in the frequency band. The resonant elements may be constructed in edge-coupled or broad-side coupled stripline configuration. The technique may be extended to build microstrip line termination with edge-coupled resonators. The technique may further be extended to realize attenuators over a narrow band. | 2011-04-21 |
20110090028 | MICTOSTRIP TRANSMISSION LINE STRUCTURE WITH VERTICAL STUBS FOR REDUCING FAR-END CROSSTALK - Provided is a microstrip transmission line for reducing far-end crosstalk. In a conventional microstrip transmission line on a printed circuit board, a capacitive coupling between adjacent signal lines is smaller than an inductive coupling therebetween, so that far-end crosstalk occurs. According to the present invention, the capacitive coupling between the adjacent signal lines is increased to reduce the far-end crosstalk. A vertical-stub type microstrip transmission line is provided. | 2011-04-21 |
20110090029 | RADIO FREQUENCY MICROWAVE WAVEGUIDE STRUCTURE AND METHOD FOR FABRICATION THEREOF - A method for fabrication of an inaccessible RF microwave waveguide structure is provided. The method includes providing an RF microwave waveguide network including an array of waveguide components that have one or more apertures in a wall. The method also includes providing one or more dummy load elements made of a ceramic material having high-temperature stable properties. The dummy load elements are mounted in a predetermined place on the wall in the vicinity of the aperture. The method also includes providing a blocking assembly configured for covering RF microwave waveguide network. The blocking assembly is connected to the RF microwave waveguide network by using dip brazing. | 2011-04-21 |
20110090030 | SIGNAL TRASMISSION THROUGH LC RESONANT CIRCUITS - An embodiment of an electronic system includes a first electronic circuit and a second electronic circuit. The electronic system further includes a resonant LC circuit having a resonance frequency for coupling the first electronic circuit and the second electronic circuit; each electronic circuit includes functional means for providing a signal at the resonance frequency to be transmitted to the other electronic circuit through the LC circuit and/or for receiving the signal from the other electronic circuit. The LC circuit also include capacitor means having at least one first capacitor plate included in the first electronic circuit and at least one second capacitor plate included in the second electronic circuit. The LC circuit further includes first inductor means included in the first electronic circuit and/or second inductor means included in the second electronic circuit. The at least one capacitor plate of each electronic circuit is coupled with the corresponding functional means through the possible corresponding inductor means. | 2011-04-21 |
20110090031 | MOLDED CASE CIRCUIT BREAKER HAVING INSTANTANEOUS TRIP MECHANISM - Disclosed is a molded case circuit breaker having an instantaneous trip mechanism capable of instantaneously breaking a circuit upon occurrence of a fault current, the circuit breaker comprising: a main circuit unit present in a lower compartment of the molded case circuit breaker, and configured to open or close a circuit by having a stationary contactor and a movable contactor rotatable to contact with or separated from the stationary contactor; a switching mechanism present in an upper compartment of the molded case circuit breaker, and having an open position where the switching mechanism is connected to the main circuit unit to drive the main circuit unit to open a circuit, and a closing position where the switching mechanism drives the main circuit unit to close a circuit; an instantaneous trip mechanism present in the upper compartment, and operating by an electromagnetic attraction in response to generation of a fault current on a circuit so as to trigger the switching mechanism to the open position; and an intermediate insulation barrier installed between the upper compartment and the lower compartment for electrical insulation by partitioning the lower compartment having the main circuit unit and the upper compartment having the instantaneous trip mechanism and the switching mechanism. | 2011-04-21 |
20110090032 | RARE EARTH PERMANENT MAGNET AND ITS PREPARATION - A rare earth permanent magnet is prepared by disposing a powdered metal alloy containing at least 70 vol % of an intermetallic compound phase on a sintered body of R—Fe—B system, and heating the sintered body having the powder disposed on its surface below the sintering temperature of the sintered body in vacuum or in an inert gas for diffusion treatment. The advantages include efficient productivity, excellent magnetic performance, a minimal or zero amount of Tb or Dy used, an increased coercive force, and a minimized decline of remanence. | 2011-04-21 |
20110090033 | Magnetic arrays with increased magnetic flux - The embodiments of the invention generally relate to a novel magnet arrangement to further enhance the performance of the array. The new arrangement of magnets (for example, five configurations) can result in significantly much higher percentage gain in magnetic flux with respect to the largest magnetic flux of a component magnet, as compared to Halbach array configurations. | 2011-04-21 |
20110090034 | OIL IMMERSED ELECTRICAL APPARATUS - An oil immersed electrical apparatus such as an oil immersed transformer that can detect copper sulfide precipitated on coil insulating paper is provided. In the oil immersed transformer in which a coil with its surface covered by insulating paper is arranged in a container filled with insulating oil, a detection member is prepared by providing two electrodes on a surface of a plate-like pressboard formed of cellulose, which is a same material as that of the insulating paper, this detection member is arranged in contact with the insulating oil, and generation of copper sulfide is detected from reduction in a surface resistance between the electrodes. The temperature of the detection member is set higher than the temperature of the coil so that copper sulfide is generated thereon prior to generation of copper sulfide on a coil unit. | 2011-04-21 |
20110090035 | COIL - In the winding wire at the winding completion end side, two wires are piled up vertically and wound together from the inner circumferential side towards the outer circumferential side. The winding wire at the winding start end side that has remained on the inner circumferential side is drawn forth from the inner circumferential side to the outer circumferential side so as to form a curve along the flat surface of the coil. In the crossing portions of the winding wire at the winding completion end side and the winding wire at the winding start end side, the two wires of each winding wire are superimposed and caused to cross each other in a state in which the wires are laid down transversely. | 2011-04-21 |
20110090036 | INDUCTOR ELEMENT, INTEGRATED CIRCUIT DEVICE, AND THREE-DIMENSIONAL CIRCUIT DEVICE - The invention relates to an inductor element, an integrated circuit device and a three-dimensional circuit device where a wire passes through the opening of a coil so that the efficiency in the use of wires is high. | 2011-04-21 |
20110090037 | TRANSFORMER STRUCTURE - A transformer includes a bobbin, a primary winding coil, a secondary winding coil, a cover member and a magnetic core assembly. The bobbin includes a main body and a channel running through the main body. The main body includes a first winding section, a second winding section and a first coupling part. The primary winding coil is wound around the first winding section of the main body of the bobbin. The secondary winding coil is wound around the second winding section of the main body of the bobbin. The cover member is placed over the bobbin for partially sheltering the bobbin. The cover member has a second coupling part corresponding to the first coupling part. The magnetic core assembly is partially accommodated within the channel of the bobbin. | 2011-04-21 |
20110090038 | TRANSFORMER HAVING INTERLEAVED WINDINGS AND METHOD OF MANUFACTURE OF SAME - A transformer may include a first and a second continuous single piece multi-turn helical winding where at least some turns of the windings are interleaved. The turns of the windings are electrically insulated from one another and spaced sufficiently close together to permit inductive coupling therebetween. The single piece multi-turn helical windings may have a continuous or smooth radius of curvature, with no discontinuities or singularities between first and second end terminals. The transformer may be formed by wrapping first and second electrical conductors about a winding form to form the first and second continuous single piece multi-turn helical windings substantially concurrently. Alternatively, a second continuous single piece multi-turn helical winding may be advanced on a first continuous single piece multi-turn helical winding, for example by rotation with respect thereto. | 2011-04-21 |
20110090039 | TRANSFORMER WITH CONCENTRIC WINDINGS AND METHOD OF MANUFACTURE OF SAME - A transformer may include a first and a second continuous single piece multi-turn helical winding, one concentrically received by the other. The turns of the windings are electrically insulated from one another and spaced sufficiently close together to permit inductive coupling therebetween. The turns may be formed of a conductor having a rectangular cross-section, which may, or may not, include an electrically insulative sheath. The single piece multi-turn helical windings may have a continuous or smooth radius of curvature, with no discontinuities or singularities between first and second end terminals. The transformer may be formed by wrapping electrical conductor about a winding form. The transformer may be used in various electrical circuits, for example converter circuits. | 2011-04-21 |
20110090040 | SAFETY SYSTEM - A safety system for detecting the presence of an undesired object in a safety area may include a first pair of distance measuring sensors disposed on opposed sides of the conveying path, the pair of distance measuring sensors defining a sensor field between said pair of distance measuring sensors, and an electronic control device operatively coupled to the sensors. The electronic control device may be configured to initiate a machine-stopping sequence based at least in part on signals received from the distance measuring sensors. | 2011-04-21 |
20110090041 | Asset Management Device and Method Using Simplex Satellite Transmitter Augmented with Local Area Transceiver - A device, method, and computer program product for monitoring and transmitting a location and a local status of a remote device using a satellite transmitter is provided. The monitoring device includes a position location unit, a satellite transmitter, a power source, a controller, and a short-range radio transceiver. The position location unit is configured to determine a location of the remote device. The satellite transmitter is configured to transmit the location to one or more satellites in low earth orbit. The controller includes a power management unit configured to control a power state of the position location unit and the satellite transmitter, and to periodically enable and disable power from the power source to the position location unit and the satellite transmitter. The short-range radio transceiver is used to configure and remotely manage the monitoring device and is used by the monitoring device to monitor local sensors wirelessly. | 2011-04-21 |
20110090042 | WIRELESS DEMAND RESPONSE SYSTEM - A wireless demand response endpoint includes a power switch and a wireless receiver to control the power switch in response to a wireless demand signal. The wireless demand signal may be transmitted at the same premises as the endpoint. One or more wireless endpoints at the premises may be configured to respond to the wireless demand signal. The wireless demand signal may be transmitted automatically, manually, or in other modes. Power switching may be on/off, dimming, etc. | 2011-04-21 |
20110090043 | Mobile-Controlled Electric Entrance Device - A mobile-controlled electric entrance device includes an electrically powered entrance body and a control unit. The control unit includes a mobile phone number comparison unit, a storage unit, an oscillation timer, a delay and sequential logical decoding unit, a current driver and a relay switch. The mobile phone number comparison unit receives a call from the mobile phone with a phone number and demodulates the number to be compared with a plurality of predetermined phone numbers. If the phone number is not found in the predetermined phone numbers, the mobile phone number comparison unit is back to a stand-by state; if the phone number is found in the predetermined phone numbers, the mobile phone number comparison unit transmits a signal to trigger the oscillation timer to generate a sequential pulse for opening or closing the electrically powered entrance body. | 2011-04-21 |
20110090044 | Information processing apparatus, communication apparatus, and program - An information processing apparatus includes: a storage block configured to store a first region as part of a layer structure; an execution block which, in response to a designation command transmitted by a communication apparatus to designate the creation of a second region as a lower layer of the first region, performs a region creation process for creating the second region as the lower layer of the first region; and a transmission block which, if the region creation process is stopped, then transmits first information indicating whether or not the second region is already created to the communication apparatus, in response to a request from the communication apparatus. | 2011-04-21 |
20110090045 | LOCKABLE CONTAINER WITH TIME-CONTROLLED REMOTE CONTROL - Apparatus for limiting access to items only during pre-determined times, a lockable container system includes a lockable container assembly and a remote control unit. The remote control unit includes an input keypad, a display, a processor, and a transmitter. The lockable container assembly includes a receiver, a locking mechanism, and an indicator. The pre-determined time that the lockable container assembly is able to be unlocked is entered on the keypad. When the predetermined time arrives, the remote includes an operator that, when actuated, sends an unlock signal to the lockable container assembly. At other times, the lockable container assembly remains locked, thereby limiting access to its contents. In one embodiment, the container includes perforations that ensure the inside environment matches the environment outside the container. | 2011-04-21 |
20110090046 | CODED WIRELESS KEY CARD SENSOR UNIT - A coded wireless sensor unit has a slot sized to receive a key card. When a key card is inserted into the slot, the act of insertion generates a energy-harvested power pulse, which powers circuitry that reads electrical device control information coded on the key card and creates a first information packet signal that is transmitted by an on-board transmitter. The signal can be read by a receiver and relayed to a control unit which controls certain electrical devices which consume line power in response to received information packet signals. The control unit decodes received information packet signals and either turns on or activates the electrical devices in accordance with the decoded device control information. Removal of a key card can also be used to generate a power pulse, which creates a second information packet signal that is used to turn off or deactivate the electrical devices. | 2011-04-21 |
20110090047 | Biometric switch and indicating means - A biometric switch for reading fingerprints, giving tactile feedback when the fingerprint has been read, and opening a locking mechanism when depressed. The biometric mechanisms are encased into a small push button type switch with the finger print reader at the top surface. When the fingerprint is read and the processor has determined that the user is allowed access, the button is allowed to depress via an electromechanical mechanism. Thus the invention allows for the inherent force of the fingerprint pressed against the button to open a variety of devices. | 2011-04-21 |
20110090048 | Data Transmission Device with User Identification Capability - The present invention provides, in one embodiment, a medical test data acquisition device that acquires both a test subject's test results and one or more biometric indicators such as a fingerprint, and links the test results to the biometric indicators or the test subject's identity associated with the test subject, and transmits the linked information to a data repository accessible by a medical provider. Such a device provides an accurate, portable, and low cost solution for acquiring and transmitting a test subject's medical test results in conjunction with the subject's identity. | 2011-04-21 |