16th week of 2011 patent applcation highlights part 28 |
Patent application number | Title | Published |
20110091951 | NEW CLASS OF CHLOROFLEXI-LIKE THERMOPHILIC CELLULOSE DEGRADING BACTERIA - The present invention relates to a new class of Chloroflexi-like bacteria. The bacteria are thermophilic cellulose degrading bacteria. Compositions and methods for degrading cellulose using the Chloroflexi-like bacteria are also provided. | 2011-04-21 |
20110091952 | METHOD FOR ENZYMATIC PRODUCTION OF DECARBOXYLATED POLYKETIDES AND FATTY ACIDS - Disclosed herein are methods of preparing alkenes from beta-hydroxy or beta-sulfate carboxylic acid or carboxylic acid derivatives using thioesterase and optionally a sulfotransferase. | 2011-04-21 |
20110091953 | METHOD FOR CONVERTING ORGANIC MATERIAL INTO A RENEWABLE FUEL - Processes for converting organic material into renewable fuel products. A feedstock containing organic material is processed at an elevated pressure and temperature to lyse, decarboxylate, and carbonize cell structures. A portion of the processed slurry may be recirculated and mixed with cool, pressurized feedstock prior to reaching a mechanical mixing device to preheat and reduce the viscosity of the feedstock. The pressure and temperature are reduced, which may occur simultaneously to flash volatile materials, such as ammonia, out of the slurry, thereby reducing the presence of the materials in the final product and allowing recovery of the materials. The processed slurry may be treated with a halide to reduce mercury emissions in the final product. The treated slurry is mechanically and thermally dewatered resulting in a renewable fuel product in dried particulate or pelletized form that is a viable energy source having a positive heating value. | 2011-04-21 |
20110091954 | INTEGRATION OF ANAEROBIC DIGESTION IN AN ALGAE-BASED BIOFUEL SYSTEM - Systems and methods for the treatment of lipid-extracted algae biomass and recycling nutrients are provided. The lipid-extracted algae biomass is hydrolyzed prior to anaerobic digestion, and the products generated by anaerobic digestion are further processed to yield by-products that are of use either for external use or as process inputs to carry out specific steps within an integrated algal growth and anaerobic digestion process designed to minimize economic costs, required costly inputs while improving upon system capabilities. | 2011-04-21 |
20110091955 | METHODS AND SYSTEMS FOR TREATING INDUSTRIAL WASTE GASES - Systems and methods for lowering levels of carbon dioxide and other atmospheric pollutants are provided. Economically viable systems and methods capable of removing vast quantities of carbon dioxide and other atmospheric pollutants from gaseous waste streams and sequestering them in storage stable forms are also discussed. | 2011-04-21 |
20110091956 | BIOMOLECULE-IMMOBILIZED CARRIER AND METHOD FOR IMMOBILIZING BIOMOLECULE ON CARRIER - Provided are a biomolecule-immobilized carrier obtained by immobilizing a biomolecule having a membrane-binding peptide containing a C terminal polypeptide of fucosyltransferase derived from | 2011-04-21 |
20110091957 | PROTEIN-POLYMER CONJUGATES AND SYNTHESIS THEREOF - A method of synthesizing a protein-polymer conjugate includes the steps: covalently attaching at least one controlled radical polymerization initiator to a protein to form a protein-initiator composition; and mixing the protein-initiator composition with at least one monomer which undergoes controlled radical polymerization in the presence of the protein-initiator composition under conditions suitable to initiate the controlled radical polymerization. | 2011-04-21 |
20110091958 | Multiply-Substituted Protease Variants - Novel enzyme variants including protease variants derived from the DNA sequences of naturally-occurring or recombinant non-human proteases are disclosed. The variant proteases, in general, are obtained by in vitro modification of a precursor DNA sequence encoding the naturally-occurring or recombinant protease to generate the substitution of a plurality of amino acid residues in the amino acid sequence of a precursor protease. Such variant proteases have properties which are different from those of the precursor protease, such as altered wash performance. The substituted amino acid residue correspond to positions 27, 45, 170, 181, 251 and 271 of | 2011-04-21 |
20110091959 | Multiply-Substituted Protease Variants - Novel enzyme variants including protease variants derived from the DNA sequences of naturally-occurring or recombinant non-human proteases are disclosed. The variant proteases, in general, are obtained by in vitro modification of a precursor DNA sequence encoding the naturally-occurring or recombinant protease to generate the substitution of a plurality of amino acid residues in the amino acid sequence of a precursor protease. Such variant proteases have properties which are different from those of the precursor protease, such as altered wash performance. The substituted amino acid residue correspond to positions 27, 45, 170, 181, 251 and 271 of | 2011-04-21 |
20110091960 | Compositions and Methods for Detection of Antibody Binding to Cells - The invention includes Rh(D) binding proteins, including antibodies, and DNA encoding such proteins. Methods of generating such proteins and DNAs are also included. | 2011-04-21 |
20110091961 | Tissue Processor For Treating Tissue Samples - A tissue processor for treating tissue samples comprises a process chamber ( | 2011-04-21 |
20110091962 | Automated Stainer Having Stain Level Detection - An automated slide staining apparatus for staining slide samples is disclosed. The slide staining apparatus includes cuvette chambers that are flooded with solutions to cover a slide fitting within the cuvette chamber. Filling and emptying the chamber accomplishes a dipping function on the slide. The cuvette chamber includes a drainage flute and level detectors therein for proper fluid use and removal. The staining apparatus is useful to perform Gram stains, hematology cytology, dermatology cytology, fecal cytology and the like. Further, the method of using the slide stainer of the present invention along with the process of staining slides using the slide stainer of the present invention is disclosed. | 2011-04-21 |
20110091963 | High resolution flow cytometer - High resolution particle differentiation process and separation system that provides enhanced resolution of particles based upon selected particle characteristics. In particular, the system may include an enhanced resolution flow cytometer. In an embodiment, the invention can include at least one fluid source conduit ( | 2011-04-21 |
20110091964 | CELL MANIPULATION OBSERVATION APPARATUS - An introducing position arrangement unit arranges a position of a cell into which a substance is introduced, of the cells in a culture dish mounted on a stage, specified by a specification unit to a predetermined cell manipulation position in a viewing field of an observation unit by stage driving. A cell manipulation unit introduces an introduction substance mixed in a culture fluid in the culture dish into the cell by making a hole on a cell membrane of the cell moved to the predetermined cell manipulation position. A diagram display unit displays a diagram associated with an observation range which is a range of the culture dish observable by the observation unit and also displays a cell manipulation range which is a cell manipulation enabled range and a position currently observed by the observation unit to be superimposed on the diagram associated with the observation range. | 2011-04-21 |
20110091965 | CELL MANIPULATION OBSERVATION APPARATUS - An introducing position arrangement unit arranges a position of a cell into which a substance is introduced, of the cells in a culture dish mounted on a stage, specified by a specification unit to a predetermined cell manipulation position in a viewing field of an observation unit by driving the stage. A cell manipulation unit introduces an introduction substance mixed in a culture fluid in the culture dish into the cell by making a hole on a cell membrane of the cell moved to the predetermined cell manipulation position by the introducing position arrangement unit. A display unit displays introduced cell information including positional information of the cell indicative of the specified position and introduction substance information indicative of the introduction substance. | 2011-04-21 |
20110091966 | Antiviral Peptide Against Hepatitis C Virus - Disclosed herein is a small peptide, LaR2C, corresponding to the C terminus of RRM2 of the human La protein that binds to the IRES element of hepatitis C virus RNA and its derivatives. This invention demonstrates that human La protein interacts with the HCV IRES element both in vitro and in vivo and also shown that this interaction enhances the efficiency of viral RNA translation (Pudi et al, J of Biol Chem, 2003). La protein has three putative RNA recognition motifs (RRM1-3). It has been established that RRM2 binds with high affinity around the GCAC sequence near the initiator AUG and the binding induces a conformational change in the HCV IRES which is critical for the internal initiation of translation (Pudi et al, J of Biol Chem, 2004). | 2011-04-21 |
20110091967 | SSX-4 PEPTIDES PRESENTED BY HLA CLASS II MOLECULES - The invention describes HLA class II binding peptides encoded by the SSX-4 tumor associated gene, as well as nucleic acids encoding such peptides and antibodies relating thereto. The peptides stimulate the activity and proliferation of CD4 | 2011-04-21 |
20110091968 | MONOCLONAL ANTIBODY SPECIFIC TO BOTH HUMAN INTERFERON-ALPHA SUBTYPE ALPHA 8 AND ITS MUTANT PROTEINS - The present invention has the first object to provide a monoclonal antibody specific to interferon α subtype α8 (IFNα8) and its mutant proteins, the second object to provide a hybridoma capable of producing the monoclonal antibody, the third object to provide a method for detecting the IFNα8 and its mutant proteins by the monoclonal antibody, the fourth object to provide a method for purifying the IFNα8 and its mutant proteins by the monoclonal antibody, and the fifth object to provide a therapeutic agent for treating diseases whose onsets or exacerbation are related with IFNα8. The present invention solves the above objects by providing a monoclonal antibody specific to IFNα8 and its mutant proteins, a hybridoma capable of producing the monoclonal antibody, a method for detecting the IFNα8 and its mutant proteins by immunoreaction using the monoclonal antibody, a method for purifying the IFNα8 and its mutant proteins using the monoclonal antibody, and a therapeutic agent for treating diseases whose onsets or exacerbation are related with IFNα8, which contains the monoclonal antibody as an effective ingredient. | 2011-04-21 |
20110091969 | MUTATIONS IN THE NS5B PROTEIN OF THE HCV - An NS5B protein of the hepatitis C virus (HCV), with good replication performance, has a point mutation in at least one of the following positions:
| 2011-04-21 |
20110091970 | METHYLATION OF ESTROGEN RECEPTOR ALPHA AND USES THEREOF - Methods for diagnosis, prognosis, and treatment of cancer based on the methylation status of the ER-α gene promoter are disclosed. Methylation of the ER-α gene promoter is indicative of cancer and unfavorable prognosis. The cancer can be treated with a demethylation agent. | 2011-04-21 |
20110091971 | Differentiation of Pluripotent Stem Cells - The present invention is directed to methods to differentiate pluripotent stem cells. In particular, the present invention is directed to methods and compositions to differentiate pluripotent stem cells into cells expressing markers characteristic of the definitive endoderm lineage. The present invention also provides methods to generate and purify agents capable of differentiating pluripotent stem cells into cells expressing markers characteristic of the definitive endoderm lineage. | 2011-04-21 |
20110091972 | Fabricating Scaffolds and Other Cell-Growth Structures Using Microfluidics to Culture Biological Samples - Methods and apparatuses for using microfluidics to generate bubbles and using the generated bubbles to construct scaffolds and cell-holding structures for culturing biological samples or analytes. In one implementation, a scaffold for growing cells is provided to include a matrix of interconnected cavities formed from mixing a gas and a liquid containing a cross linkable material to produce a matrix of gas bubbles of substantially the same size and cross linking the cross linkable material to form a structure in which cells are grown. In another implementation, a scaffold apparatus for growing cells includes a ball of a cross linked material forming an exterior shell that encloses to form a hollow interior inside the ball and biological samples embedded in the external shell. | 2011-04-21 |
20110091973 | Modified and fusion enhanced erythrocytes, cells and uses thereof - Modified fusion enhanced erythrocytes (or other cell types and synthetic cells) including human viral receptor proteins, human viral coreceptor proteins and viral derived proteins capable of mediating entry of respective viruses into the modified erythrocytes, cells or pseudo-cells and the method of using the fusion enhanced modified erythrocytes, cells or pseudo-cells for the treatment or prevention of viral infections. The fusion enhanced modified erythrocytes comprises CD4 and at least one HIV coreceptor, such as CXCR4 or CCR5 and as well, at least one of cholesterol rafts, fusin, actin, a viral derived protein such as fusion peptide derived from HIV GP120 or HIV GP41 or a shorter protein derived from a long viral protein, such as a portion of HIV derived GP120, or HIV GP41 such as the 23 N-terminal peptide of the HIV-1 gp 41 protein (AVGIGALFLGFLGAAGSTMGARS) called FP23 (Fusion Peptide). These viral-fusion enhanced cells may also be electrostatic charge enhanced through further additions named in this invention. The modified erythrocytes, when administered to an HIV patient, bind to the plasma virus and induce the injection of the HIV ribonucleoprotein complex into the cells. The entrapped viral content is sequestered within said cell for at least the period of time that the cell maintains its outer membrane integrity. The virus is thereafter either degraded or deactivated within the erythrocytes, cells or pseudo-cells, or destroyed by erythrophagocytosis. | 2011-04-21 |
20110091974 | Conductive Substrate and Method for Introducing Nucleic Acid - A conductive substrate for introducing a nucleic acid into a cell, which comprises a carbon nanotube with a carboxyl group, and a nucleic acid, the carbon nanotube and the nucleic acid being loaded on an electrode substrate with a cationic surface. | 2011-04-21 |
20110091975 | DOWN-REGULATION OF GENE EXPRESSION USING ARTIFICIAL MICRORNAS - Isolated nucleic acid fragments comprising precursor miRNAs, and artificial miRNAs and their use in down-regulating gene expression are described. | 2011-04-21 |
20110091976 | Regulatory region preferentially expressing to seed embryo and method of using same | 2011-04-21 |
20110091977 | Homologous Recombination in an Algal Nuclear Genome - Exemplary transformation methods are provided for introducing deoxyribonucleic acid (DNA) into the nucleus of an algal cell. A transformation construct may be prepared, with the transformation construct having a first sequence of DNA similar to a corresponding first sequence of nuclear DNA, a second sequence of DNA similar to a corresponding second sequence of the nuclear DNA, and a sequence of DNA of interest inserted between the first and second sequences of DNA of the transformation construct. A target sequence of DNA inserted between the first and second corresponding sequences of the nuclear DNA may be transformed, resulting in replacement of the target sequence of DNA with the sequence of DNA of interest. Also provided are exemplary transformation constructs, with some transformation constructs having a first sequence of DNA similar to a corresponding first sequence of nuclear DNA of an algal cell, a second sequence of DNA similar to a corresponding second sequence of nuclear DNA of the algal cell, and a sequence of DNA of interest inserted between the first and second sequences of the transformation construct. | 2011-04-21 |
20110091978 | STABILIZATION OF SIGNAL GENERATION IN PARTICLES USED IN ASSAYS - Methods and reagents are disclosed for conducting assays. Embodiments of the present methods and reagents are concerned with a solid support such as, for example, a particle. The support comprises a chemiluminescent composition that comprises a metal chelate. The present inventors observed that, when such support such as, e.g., particles, were employed in assays for the determination of an analyte, stability of signal output by the chemiluminescent composition associated with the particle was unacceptably reduced as compared to particles comprising other chemiluminescent compositions. In accordance with embodiments of the present invention, the stability of signal output from such particles is enhanced by including in a medium comprising the particles a sufficient amount of one or more stabilizing agents, which may be a chelating agent and/or a metal chelate such as, for example, the metal chelate that is associated with the particle. | 2011-04-21 |
20110091979 | Tracing Coalbed Natural Gas - Coproduced Water Using Stable Isotopes of Carbon - Water collected in the area of coal beds has strongly positive δ | 2011-04-21 |
20110091980 | DIAGNOSTIC METHOD FOR BIOMARKERS OF ADVERSE CORONARY EVENTS - A diagnostic method using biomarkers to predict future adverse coronary events is provided. More particularly, the present invention is directed to diagnostic tests for characterizing an individual's risk of developing or having cardiovascular disease. In certain embodiments, the method of the present invention quantitates the presence of elevated levels of chlorinated lipids derived from myeloperoxidase as a prognostic indicator of future adverse coronary events. | 2011-04-21 |
20110091981 | Mass Spectrometry Quantitation of P450 Isoforms in Hepatocytes - A method for screening a drug for cytochrome P450 (CYP) induction is provided and can include incubating the drug with a microsome-containing biological sample and then quantitating at least one cytochrome P450 isoform. The isoforms can be selected from 2B6, 3A4, 1A2, and 3A5 isoforms. In some embodiments, the method uses liquid chromatography tandem mass spectrometry (LC-MSMS). A quantitated value can be compared to a threshold value and the drug can be determined to exhibit an acceptable CYP induction potential when the quantitated value does not exceed the threshold value. Isolated peptides are also provided. | 2011-04-21 |
20110091982 | Detection and Quantification of Anions - Provided herein are methods of detecting anions in solution. In particular, the methods can be used to detect trace anions in solution. For example, the anions can be present in an amount of between about 500 femtomoles to about 10 millimoles. | 2011-04-21 |
20110091983 | Thermal Conductivity Detection Method and Device for Gas Chromatography - Improved system for gas chromatography wherein use is made of a separation column and a TCD (Thermal Conductivity Detector), characterized in that the outflow from the separation column is ionized, and the ionization takes place upstream of the TCD. The ionization of the outflow from the separation column upstream of the TCD is surprisingly found in many cases to have a favourable effect on the response of the TCD. The sensitivity of the TCD is found in many cases to increase substantially. For ionization purposes use can be made of electromagnetic radiation, ionizing radiation or pyrolysis. The degree of ionization is preferably measured by means of measuring means provided for the purpose. The response of the TCD and the measurement data obtained with the measuring means are found together to give in many cases even more and better information relating to components present in the outflow from the separation column. | 2011-04-21 |
20110091984 | ANALYTICAL METHOD TO MONITOR VACCINE POTENCY AND STABILITY - The present invention is directed to methods of evaluating whether an antigen or vaccine has degraded over time using liquid chromatography. The methods described herein also relate to using liquid chromatography to evaluate the relative potency of a given antigen or vaccine. | 2011-04-21 |
20110091985 | METHOD AND APPARATUS FOR MEASURING pH OF LOW ALKALINITY SOLUTIONS - Systems and methods are described for measuring pH of low alkalinity samples. The present invention provides a sensor array comprising a plurality of pH indicators, each indicator having a different indicator concentration. A calibration function is generated by applying the sensor array to a sample solution having a known pH such that pH responses from each indicator are simultaneously recorded versus indicator concentration for each indicator. Once calibrated, the sensor array is applied to low alkalinity samples having unknown pH. Results from each pH indicator are then compared to the calibration function, and fitting functions are extrapolated to obtain the actual pH of the low alkalinity sample. | 2011-04-21 |
20110091986 | CHEMICAL ANALYSER, METHOD FOR SAMPLE-BASED ANALYSIS, DEVICE FOR HANDLING CUVETTES, AND LOADING METHOD - With the aid of the invention, a chemical analyser, a method for sample-based analysis, a device for handling cuvettes, and a loading method are provided. The chemical analyser ( | 2011-04-21 |
20110091987 | Miniaturized Magnetic Resonance Systems and Methods - The present application describes devices, systems, and techniques related to a chip-based, miniaturized NMR diagnostic platform for rapid, quantitative and multi-channeled detection of biological targets. | 2011-04-21 |
20110091988 | SAMPLE PROCESSING UNIT AND SAMPLE PROCESSING METHOD - An example of the invention is a sample processing unit having, a subdivision/dispensing section including a nozzle needle configured to be able to penetrate a stopper body fitted in a sample container in which a sample can be contained, and configured to subject the sample container or the sample to processing, a detection unit configured to detect a state of the sample or the sample container at the time of the processing, and a label removal unit configured to remove at least part of a label attached to a side part of the sample container prior to the detection. | 2011-04-21 |
20110091989 | Method of Reducing Liquid Volume Surrounding Beads - The invention provides droplet actuators and droplet actuator techniques. Among other things, the droplet actuators and methods are useful for manipulating beads on a droplet actuator, such as conducting droplet operations using bead-containing droplets on a droplet actuator. For example, beads may be manipulated on a droplet actuator in the context of executing a sample preparation protocol and/or an assay protocol. An output of the methods of the invention may be beads prepared for execution of an assay protocol. Another output of the methods of the invention may be results of an assay protocol executed using beads. Among the methods described herein are methods of concentrating beads in droplets, methods of washing beads, methods of suspending beads, methods of separating beads, methods of localizing beads within a droplet, methods of forming emulsions in which droplets include beads, methods of loading beads into a droplet operations gap of a droplet actuator, methods of organizing beads in a monolayer, and methods of capturing, trapping or restraining beads. | 2011-04-21 |
20110091990 | DEVICE AND METHODS FOR COLLECTION OF BIOLOGICAL FLUID SAMPLE AND TREATMENT OF SELECTED COMPONENTS - A collection device and a method for collecting a biological sample, particularly whole blood, includes a separating member to separate the whole blood into its components, and at least reagent positioned to selectively interact with a component of the separated sample. The reagent is able to selectively interact with the plasma/serum, and is prevented from contacting or interacting with the whole blood. | 2011-04-21 |
20110091991 | Protein Biomarkers for Alzheimer's Disease Detection - Protein biomarkers are selected for diagnosing Alzheimer's disease. Samples of Alzheimer's disease are used to find the biomarkers. It is done through methods including 2-dimentional differential in-gel electrophoresis (2D-DIGE), isotope-coded protein labeling (ICPL) and western blotting. Through examining density differences of the selected biomarkers, Alzheimer's disease can be early diagnosed or prevented. | 2011-04-21 |
20110091992 | CRYSTALS AND STRUCTURE OF HUMAN IgG Fc VARIANT - The present invention provides crystalline forms of a human IgG Fc variant comprising one or more amino acid residues that provides for enhanced effector function, methods of obtaining such crystals and high-resolution X-ray diffraction structures and atomic structure coordinates. The present invention also provides machine readable media embedded with the three-dimensional atomic structure coordinates of the human IgG Fc variant and methods of using them. The present invention also provides human IgG Gc variants with reduced binding to at least one FcγR. | 2011-04-21 |
20110091993 | METHOD FOR QUANTIFICATION OF SOLUBLE LR11 - Provided is a method for quantifying soluble LR11 in a biological sample such as serum by an immunological means conveniently and accurately without the need of carrying out any complicated separation manipulation. An immunological quantification method for soluble LR11 in a sample derived from a mammal, including a step of treating the sample with at least one surfactant selected from a group consisting of a polyoxyalkylene alkyl ether, a polyoxyalkylene alkyl phenyl ether, an alkyl glycoside, an alkylthio glycoside, an acyl-N-methylglucamide and a salt of cholic acid. | 2011-04-21 |
20110091994 | Methods for Screening Compounds for Treating and/or Preventing an Hepatitis C Virus Infection - The present invention relates to methods for screening compounds for treating and/or preventing an Hepatitis C Virus (HCV) infection. | 2011-04-21 |
20110091995 | Ehrlichia canis DIVA (Differentiate Infected from Vaccinated Animals) - antigens that can be used to differentiate | 2011-04-21 |
20110091996 | ORGANIC NON-SUGAR COMPOUNDS FOR PROTECTION OF BIOLOGICALLY ACTIVE MOLECULES AND CONJUGATE LABELS AND METHODS OF USE THEREOF - Provided are methods comprising the use of non-sugar organic compatible solutes for protection and preservation of the activity of biologically active molecules and conjugate labels. The methods are particularly adaptable for use in conjunction with immunoassays, such as for example, immunochromatographic test assays and may be incorporated into any test methodology wherein a dry test strip is used as a carrier for depositing, mobilizeable and/or immobilized biologically active molecules and/or conjugate labels. | 2011-04-21 |
20110091997 | IMMUNOSUPPRESSANT DRUG EXTRACTION REAGENT FOR IMMUNOASSAYS - An improved extractive reagent composition and method for extracting an immunosuppressant drug, such as sirolimus, tacrolimus or cyclosporine, from blood samples while yielding a test sample extract that has low vapor pressure and is compatible with immunoassay components. The inventive reagent composition comprises dimethyl sulfoxide (DMSO), at least one divalent metal salt and water. The sample extracts resulting from use of each of these combinations have low vapor pressure and are compatible with immunochemistry assays. | 2011-04-21 |
20110091998 | SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC CAPACITOR - A semiconductor device includes a ferroelectric capacitor formed above the lower interlevel insulating film covering a MOS transistor formed on a semiconductor substrate, including lamination of a lower electrode, an oxide ferroelectric film, a first upper electrode made of conductive oxide having a stoichiometric composition AO | 2011-04-21 |
20110091999 | Adapter board and method for manufacturing same, probe card, method for inspecting semiconductor wafer, and method for manufacturing semiconductor device - A method of manufacturing a semiconductor device includes preparing two package substrates, electrically coupling a semiconductor wafer to a measuring apparatus, inspecting the wafer, dicing the semiconductor wafer into semiconductor elements and packaging the semiconductor element over the prepared package substrates. | 2011-04-21 |
20110092000 | METHOD FOR MANUFACTURING AND TESTING AN INTEGRATED ELECTRONIC CIRCUIT - A method for manufacturing and for testing an integrated circuit, including the steps of forming, on the upper portion of the integrated circuit, a passivation layer including openings at the level of metal tracks of the last interconnect stack of the integrated circuit; forming, in the openings, first pads connected to second pads formed on the passivation layer by conductive track sections, the first pads being intended for the connection of the integrated circuit; testing the integrated circuit by bringing test tips in contact with the second pads; and eliminating at least a portion of at least one of the conductive track sections. | 2011-04-21 |
20110092001 | LIGHT EMITTING DIODE - A semiconductor device including a wafer-level LED includes a semiconductor structure coupled to first and second electrodes. The semiconductor includes a P-doped portion of a first layer to an N-doped portion of a second layer. The first layer includes a surface configured to emit light. The first electrode is electrically coupled to the P-doped portion of the first layer on a first side of the semiconductor structure. The first side is adjacent to the surface that is configured to emit the light. The second electrode is electrically coupled to the N-doped portion of the second layer on a second side of the semiconductor structure. The second side is also adjacent to the surface that configured to emit light. | 2011-04-21 |
20110092002 | METHOD FOR FABRICATING A LIGHT EMITTING DIODE PACKAGE STRUCTURE - The present invention discloses a method for fabricating a light emitting diode (LED) package structure. The method comprises the following steps: a carrier having a substrate and a first protrusion is provided, wherein the first protrusion is disposed on the substrate and has a recess. An adhesion layer and a LED chip are disposed on a bottom of the recess, wherein the adhesion layer is bonded between the carrier and the LED chip, and a ratio between a width of the recess and a width of the LED chip is larger than 1 and smaller than or equal to 1.5 such that a gap existing between a sidewall of the LED chip and an inner sidewall of the recess. | 2011-04-21 |
20110092003 | PHOSPHOR LAYER ARRANGEMENT FOR USE WITH LIGHT EMITTING DIODES - Phosphor layer arrangement for use with light emitting diodes. In an aspect, a light emitting diode apparatus is provided that includes a least one light emitting diode, an encapsulation covering the at least one light emitting diode, a lens having a phosphor layer formed upon a bottom surface, the lens positioned to cover at least part of the encapsulation, and an air gap between the phosphor layer and the encapsulation. In an aspect, a light emitting diode lamp is provided that includes a package, a least one light emitting diode, an encapsulation covering the at least one light emitting diode, a lens having a phosphor layer formed upon a bottom surface, wherein the lens is positioned to cover at least part of the encapsulation, and an air gap between the phosphor layer and the encapsulation. | 2011-04-21 |
20110092004 | MANUFACTURING METHOD OF FLAT PANEL DISPLAY - A manufacturing method of a flat panel display according to an exemplary embodiment of the present invention includes: coating a first adhering member on a first supporting plate; disposing a first substrate on the first adhering member; using ultrasonic waves to adhere the first supporting plate and the first substrate; and forming a gate line, a data line, a thin film transistor connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor on the first substrate. According to the manufacturing method of the flat panel display according to an exemplary embodiment of the present invention, the first adhering member made of the plurality of adhering particles is melted by using the ultrasonic waves without an additional adhering film to adhere the flexible first substrate and the first supporting plate, thereby reducing the overall manufacturing cost. | 2011-04-21 |
20110092005 | LIGHT-EMITTING-DIODE ARRAY AND METHOD FOR MANUFACTURING THE SAME - A method for forming a light-emitting-diode (LED) array is disclosed which comprises forming a LED structure on a substrate, dividing the LED structure into at least a first and a second LED device with a gap, depositing at least one polymer material over the LED structure substantially filling the gap, removing portions of the at least one polymer material to expose a first electrode of the first LED device and a second electrode of the second LED device, and forming an interconnect on top of the at least one polymer material electrically connecting the first and second electrode. | 2011-04-21 |
20110092006 | METHOD OF FABRICATING DISPLAY DEVICE USING PLASTIC SUBSTRATE - Disclosed is a method of fabricating a display device that includes: forming an adhesive layer of an inorganic material on a carrier substrate having a display area and a non-display area surrounding the display area; forming a plurality of adhesive patterns of a metallic material on the adhesive layer, each of the plurality of adhesive patterns having a width and a height; forming a plastic substrate on the adhesive layer and the plurality of adhesive patterns; forming a plurality of elements for displaying images on the plastic substrate; cutting the carrier substrate and the plastic substrate to divide the display area and the non-display area; and detaching the carrier substrate from the plastic substrate. | 2011-04-21 |
20110092007 | Method of Fabricating Antireflective Grating Pattern and Method of Fabricating Optical Device Integrated with Antireflective Grating Pattern - A method of fabricating an antireflective grating pattern and a method of fabricating an optical device integrated with an antireflective grating pattern are provided. The method of fabricating the antireflective grating pattern includes forming a photoresist (PR) pattern on a substrate using a hologram lithography process, forming a PR lens pattern having a predetermined radius of curvature by reflowing the PR pattern, and etching the entire surface of the substrate including the PR lens pattern to form a wedge-type or parabola-type antireflective subwavelength grating (SWG) pattern having a pointed tip on a top surface of the substrate. In this method, a fabrication process is simplified, the reflection of light caused by a difference in refractive index between the air and a semiconductor material can be minimized, and the antireflective grating pattern can be easily applied to optical devices. | 2011-04-21 |
20110092008 | LIQUID CRYSTAL DISPLAY FABRICATION METHOD - A method of fabricating an LCD includes providing first and second substrates. A gate electrode, a gate line, a connection electrode, a common electrode and a pixel electrode are formed on the first substrate through a first making process. A first insulation film is formed on the first substrate. A first insulation film pattern having multiple contact holes are formed through a second masking process. An active pattern is formed on the first substrate and source and drain electrodes are operationally connected with the active pattern through some of the contact holes. A gate electrode, a common electrode, and a pixel electrode may be formed substantially together through a slit exposure. An active pattern and source and drain electrodes may be formed substantially together. The number of masks needed to fabricate the display may be reduced to simplify a fabrication process and protect a channel region. | 2011-04-21 |
20110092009 | PACKAGE, IN PARTICULAR FOR MEMS DEVICES AND METHOD OF MAKING SAME - A package includes a substrate provided with a passing opening and a MEMS device. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated sensitive to the chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the passing opening. A protective package incorporates the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device exposed through the passing opening of the substrate. | 2011-04-21 |
20110092010 | HIGH-THROUGHPUT PRINTING OF NANOSTRUCTURED SEMICONDUCTOR PRECURSOR LAYER - Materials and devices are provided for high-throughput printing of nanostructured semiconductor precursor layer. In one embodiment, a material is provided that comprises of a plurality of microflakes having a material composition containing at least one element from Groups IB, IIIA, and/or VIA. The microflakes may be created by milling precursor particles characterized by a precursor composition that provides sufficient malleability to form a planar shape from a non-planar starting shape when milled, and wherein overall amounts of elements from Groups IB, IIIA and/or VIA contained in the precursor particles combined are at a desired stoichiometric ratio of the elements. It should also be understood that other flakes such as but not limited to nanoflakes may also be used to form the precursor material. | 2011-04-21 |
20110092011 | METHOD FOR ANTIREFLECTION TREATMENT OF A ZINC OXIDE FILM AND METHOD FOR MANUFACTURING SOLAR CELL USING THE SAME - Provided are a method for antireflection treatment of a zinc oxide film and a method for manufacturing a solar cell using the same. In the anti-reflection treatment, a substrate is prepared, then a polycrystalline zinc oxide film is formed on the substrate. A surface of the polycrystalline zinc oxide film is textured. Here, the roughening of the surface of the polycrystalline zinc oxide film comprises wet-etching the polycrystalline zinc oxide film on the substrate using an etching solution mixed with nitric acid and hydrogen peroxide. | 2011-04-21 |
20110092012 | PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE - A process for producing a photovoltaic device, wherein when providing an n-type amorphous silicon layer on an i-type amorphous silicon layer, a desired crystallization ratio can be achieved without reducing the deposition rate. The production process comprises a p-layer formation step of depositing a p-type amorphous silicon layer, an i-layer formation step of depositing an i-type amorphous silicon layer on the p-type amorphous silicon layer, and an n-layer formation step of depositing an n-type amorphous silicon layer on the i-type amorphous silicon layer, wherein the n-layer formation step comprises a first n-layer formation step of depositing a first n-layer on the i-type amorphous silicon layer, and a second n-layer formation step of depositing a second n-layer on the first n-layer, and the deposition conditions for the first n-layer formation step are conditions that yield a higher crystallization ratio than the deposition conditions for the second n-layer formation step, for deposition onto the same base material substrate. | 2011-04-21 |
20110092013 | Method Of Manufacturing Photoelectric Conversion Device - A fragile layer is formed in a region at a depth of less than 1000 nm from one surface of a single crystal semiconductor substrate, and a first impurity semiconductor layer and a first electrode are formed at the one surface side. After bonding the first electrode and a supporting substrate, the single crystal semiconductor substrate is separated using the fragile layer or the vicinity as a separation plane, thereby forming a first single crystal semiconductor layer over the supporting substrate. An amorphous semiconductor layer is formed on the first single crystal semiconductor layer, and a second single crystal semiconductor layer is formed by heat treatment for solid phase growth of the amorphous semiconductor layer. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer and a second electrode are formed over the second single crystal semiconductor layer. | 2011-04-21 |
20110092014 | SOLAR CELL INTERCONNECTION - Methods and devices for solar cell interconnection are provided. In one embodiment, the method includes physically alloying the ink metal to the underlying foil (hence excellent adhesion and conductivity with no pre-treatment), and by fusing the solid particles in the ink on the surface (eliminating any organic components) so that the surface is ideally suited for good conductivity and adhesion to an overlayer of finger ink, which is expected to be another adhesive. In some embodiments, contact resistance of conductive adhesives are known to be much lower on gold or silver than on any other metals. | 2011-04-21 |
20110092015 | Mixed Solvent Systems for Deposition of Organic Semiconductors - Compositions that contain an organic semiconductor dissolved in a solvent mixture are described. More specifically, the solvent mixture includes an alkane having 9 to 16 carbon atoms in an amount equal to 1 to 20 weight percent and an aromatic compound in an amount equal to 80 to 99 weight percent. The semiconductor material is dissolved in the solvent mixture in an amount equal to at least 0.1 weight percent based on a total weight of the composition. Methods of making a semiconductor device using the compositions to form a semiconductor layer are also described. | 2011-04-21 |
20110092016 | METHOD OF TREATING SEMICONDUCTOR ELEMENT - In a method of treating a semiconductor element which at least includes a semiconductor, a threshold voltage of the semiconductor element is changed by irradiating the semiconductor with light with a wavelength longer than an absorption edge wavelength of the semiconductor. The areal density of in-gap states in the semiconductor is 10 | 2011-04-21 |
20110092017 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THE SAME - An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode. | 2011-04-21 |
20110092018 | WAFER LEVEL PACKAGED MEMS DEVICE - An apparatus and method for sensor architecture based on bulk machining of silicon wafers and fusion bond joining which provides a nearly all-silicon, hermetically sealed, microelectromechanical system (MEMS) device. An example device includes a device sensor mechanism formed in an active semiconductor layer and separated from a handle layer by a dielectric layer, and a silicon cover plate having a handle layer with a dielectric layer being bonded to portions of the active layer. Pit are included in one of the handle layers and corresponding dielectric layers to access electrical leads on the active layer. Another example includes set backs from the active components formed by anisotropically etching the handle layer while the active layer has been protectively doped. | 2011-04-21 |
20110092019 | Method for Stacked Contact with Low Aspect Ratio - A method for an integrated circuit structure includes providing a semiconductor substrate; forming a metallization layer over the semiconductor substrate; forming a first dielectric layer between the semiconductor substrate and the metallization layer; forming a second dielectric layer between the semiconductor substrate and the metallization layer, wherein the second dielectric layer is over the first dielectric layer; and forming a contact plug with an upper portion substantially in the second dielectric layer and a lower portion substantially in the first dielectric layer. The contact plug is electrically connected to a metal line in the metallization layer. The contact plug is discontinuous at an interface between the upper portion and the lower portion. | 2011-04-21 |
20110092020 | METHOD FOR PRODUCING ELECTRONIC PART PACKAGE - A peeling off layer | 2011-04-21 |
20110092021 | METHOD FOR MANUFACTURING PACKAGE SYSTEM INCORPORATING FLIP-CHIP ASSEMBLY - A method for manufacturing a package system includes: providing a first semiconductor die; mounting a second semiconductor die on the first semiconductor die using an inter-die interconnect to form a flip-chip assembly; and attaching the flip-chip assembly on a package substrate with a contact pad, a test connection, a z-bond pad, and a die receptacle, with the first semiconductor die in the flip-chip assembly fitting inside the die receptacle. | 2011-04-21 |
20110092022 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device includes a semiconductor chip having a plurality of electrode pads, and a rewiring pattern having a plurality of interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes a plurality of columnar electrodes each of which has a main body section and a protrusion section, and a sealing section which has a top face having a height the same as the top faces of the protrusion sections. The semiconductor device also includes solder balls formed on the protrusion sections. The semiconductor device also has a plurality of trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed face defined by the trenches. Each solder ball is electrically connected to the top face and side faces of the protrusion section of each electrode. | 2011-04-21 |
20110092023 | PACKAGE STRUCTURE OF PHOTODIODE AND FORMING METHOD THEREOF - A package structure of photodiode and a forming method of the same are provided. The method includes providing a heat-dissipation plate; placing a circuit board on the heat-dissipation plate, the circuit board having an opening exposing a top surface of the heat-dissipation plate and a first contact pad located on a peripheral area of the opening; placing a carrier with a metal cladding surface into the opening, the carrier connecting the top surface of the heat-dissipation plate; placing a photodiode chip on the carrier wherein the bottom area of the photodiode chip is less than the metal cladding surface such that a portion of the metal cladding surface is exposed; and electrically connecting the exposed metal cladding surface to the first contact pad. | 2011-04-21 |
20110092024 | STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME - A stacked semiconductor package includes a semiconductor chip module including at least two semiconductor chips, each semiconductor chip having a first face, a second face opposite to the first face, and a circuit part. A through portion passes through the first and second faces of the semiconductor chip. A recess part is formed in a portion of the second face where the second face and the through portion meet. A through electrode is electrically connected to the circuit part and is disposed inside of the through portion. A connection member is disposed in the recess part to electrically connect the through electrodes of adjacent stacked semiconductor chips. And the semiconductor chip module is mounted to a substrate. The stacked semiconductor package prevents both gaps between semiconductor chips and misalignment of the through electrode. | 2011-04-21 |
20110092025 | IC CARD AND BOOKING-ACCOUNT SYSTEM USING THE IC CARD - It is an object of the present invention to provide a highly sophisticated functional IC card that can ensure security by preventing forgery such as changing a picture of a face, and display other images as well as the picture of a face. An IC card comprising a display device and a plurality of thin film integrated circuits; wherein driving of the display device is controlled by the plurality of thin film integrated circuits; a semiconductor element used for the plurality of thin film integrated circuits and the display device is formed by using a polycrystalline semiconductor film; the plurality of thin film integrated circuits are laminated; the display device and the plurality of thin film integrated circuits are equipped for the same printed wiring board; and the IC card has a thickness of from 0.05 mm to 1 mm. | 2011-04-21 |
20110092026 | FLUORINATION PRE-TREATMENT OF HEAT SPREADER ATTACHMENT INDIUM THERMAL INTERFACE MATERIAL - The formation of electronic assemblies including a heat spreader coupled to a die through a thermal interface material formed from an indium preform, is described. One embodiment relates to a method including providing a preform comprising indium, the preform including an indium oxide layer thereon. The method also includes exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride. The method may also include, after the exposing the preform to fluorine so that part of the indium oxide layer is transformed into an indium oxy-fluoride, positioning the preform between a die and a heat sink, and applying pressure to and heating the preform positioned between the die and the heat sink so that reflow occurs and a bond is formed between the die and the heat sink. | 2011-04-21 |
20110092027 | INTEGRATED CIRCUIT PACKAGE HAVING A CASTELLATED HEATSPREADER - In one aspect, an embodiment of an IC package includes an IC chip electrically connected to a substrate, a heatspreader disposed over the IC chip, wherein the heatspreader does not directly contact the IC chip, and an encapsulant material encapsulating at least a portion of the IC chip and a portion of the heatspreader such that a top portion of the heatspreader is exposed to the surroundings of the IC package. In another embodiment, the heatspreader comprises at least one castellation to improve adhesion to the encapsulation compound. A method of manufacturing such IC package is also disclosed. | 2011-04-21 |
20110092028 | Lead frame and method of manufacturing the same - A lead frame includes a base material having a front surface for mounting of a semiconductor chip and a back surface for connection with an external board, and an Ni layer having a thick section and thin section. The thick section is formed on the back surface of the base material, whereas the thin section is formed on all or a part of the front surface of the base material. It is preferable that the thick section has a thickness ranging from 2.5 to 5 μm, and the thin section is 0.5-2 μm thinner than the thick section. The lead frame can be manufactured with improved productivity by forming an Ni layer on both front and back surfaces of the base material, and then etching only the Ni layer formed on the front surface of the base material. | 2011-04-21 |
20110092029 | SRAM Cell with Different Crystal Orientation than Associated Logic - An integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in semiconductor material with one crystal orientation and the SRAM cells are formed in a second semiconductor layer with another crystal orientation. A process of forming an integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in a top semiconductor layer with one crystal orientation and the SRAM cells are formed in an epitaxial semiconductor layer with another crystal orientation. A process of forming an integrated circuit containing logic transistors and an array of SRAM cells in which the SRAM cells are formed in a top semiconductor layer with one crystal orientation and the logic transistors are formed in an epitaxial semiconductor layer with another crystal orientation. | 2011-04-21 |
20110092030 | SYSTEM COMPRISING A SEMICONDUCTOR DEVICE AND STRUCTURE - A semiconductor device includes a first mono-crystallized layer including first transistors, and a first metal layer forming at least a portion of connections between the first transistors; and a second layer including second transistors, the second transistors including mono-crystalline material, the second layer overlying the first metal layer, wherein the first metal layer includes aluminum or copper, and wherein the second layer is less than one micron in thickness and includes logic cells. | 2011-04-21 |
20110092031 | EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS - A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element. | 2011-04-21 |
20110092032 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - Provided is a manufacturing methods of a semiconductor device. The methods includes: forming an active layer on a first substrate; bonding a top surface of the active layer with a second substrate and separating the active layer from the first substrate; forming conductive impurity regions corresponding to source and drain regions of the active layer bonded on the second substrate; bonding a third substrate on a bottom surface of the active layer and removing the second substrate; and forming a gate electrode on a top between the conductive impurity regions of the active layer bonded on the third substrate and forming source and drain electrodes on the conductive impurity regions. | 2011-04-21 |
20110092033 | NONVOLATILE SEMICONDUCTOR MEMORY AND PROCESS OF PRODUCING THE SAME - A nonvolatile semiconductor memory of an aspect of the present invention comprises a semiconductor substrate, a pillar-shaped semiconductor layer extending in the vertical direction with respect to the surface of the semiconductor substrate, a plurality of memory cells arranged in the vertical direction on the side surface of the semiconductor layer and having a charge storage layer and a control gate electrode, a first select gate transistor arranged on the semiconductor layer at an end of the memory cells on the side of the semiconductor substrate, and a second select gate transistor arranged on the semiconductor layer on the other end of the memory cells opposite to the side of the semiconductor substrate, wherein the first select gate transistor includes a diffusion layer in the semiconductor substrate and is electrically connected to the pillar-shaped semiconductor layer by way of the diffusion layer that serves as the drain region. | 2011-04-21 |
20110092034 | ZERO CAPACITOR RAM WITH RELIABLE DRAIN VOLTAGE APPLICATION AND METHOD FOR MANUFACTURING THE SAME - The following discloses and describes a zero capacitor RAM as well as a method for manufacturing the same. The zero capacitor RAM includes an SOI substrate. This SOI substrate is composed of a stacked structure of a silicon substrate, an embedded insulation film and a silicon layer. This layer is patterned into line types to constitute active patterns. Moreover, a first insulation layer forms between the active patterns and gates form on the active patterns as well as the first insulation layer to extend perpendicularly to the active patterns. In addition, a source forms in the active pattern on one side of each gate, a drain forms in the active pattern on the other side of each gate which is achieved by filling a metal layer. Continuing, a contact plug forms between the gates on the source and an interlayer dielectric forms on the contact plug in addition to the gates Finally, a bit line forms on the interlayer dielectric to extend perpendicularly to the gates and come into contact with the drain. | 2011-04-21 |
20110092035 | Formation of high sheet resistance resistors and high capacitance capacitors by a single polysilicon process - A semiconductor device includes a transistor, a capacitor and a resistor wherein the capacitor includes a doped polysilicon layer to function as a bottom conductive layer with a salicide block (SAB) layer as a dielectric layer covered by a Ti/TiN layer as a top conductive layer thus constituting a single polysilicon layer metal-insulator-polysilicon (MIP) structure. While the high sheet rho resistor is also formed on the same single polysilicon layer with differential doping of the polysilicon layer. | 2011-04-21 |
20110092036 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - After forming a first capacitor hole, first mask material is filled in an upper portion of the first capacitor hole. A second capacitor hole is formed so that it is aligned with the first capacitor hole. After removing the first mask material, a lower electrode is formed in the first and second capacitor holes by one film formation step. After that, a capacitor dielectric film and an upper electrode are sequentially formed on the lower electrode. | 2011-04-21 |
20110092037 | SEMICONDUCTOR DEVICE - In order to block hydrogen ions produced when forming an interlayer insulating film by HDP-CVD or the like to thereby suppress an adverse effect of the hydrogen ions on a device, in a semiconductor device including a contact layer, a metal interconnection and an interlayer insulating film on a semiconductor substrate having a gate electrode formed thereon, the interlayer insulating film is formed on the metal interconnection by bias-applied plasma CVD using source gas containing hydrogen atoms, and a silicon oxynitride film is provided in the underlayer of the metal interconnection and the interlayer insulating film. | 2011-04-21 |
20110092038 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a three dimensional semiconductor memory device and a method of fabricating the same. The method includes forming a stepwise structure by using mask patterns and a sacrificial mask pattern formed on the mask patterns as a consumable etch mask. | 2011-04-21 |
20110092039 | Fin field effect transistor and method for forming the same - Example embodiments are directed to a method of forming a field effect transistor (FET) and a field effect transistor (FET) including a source/drain pair that is elevated with respect to the corresponding gate structure. | 2011-04-21 |
20110092040 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor. | 2011-04-21 |
20110092041 | Phase Change Memory with Diodes Embedded in Substrate - An integrated circuit structure includes a semiconductor substrate; a diode; and a phase change element over and electrically connected to the diode. The diode includes a first doped semiconductor region of a first conductivity type, wherein the first doped semiconductor region is embedded in the semiconductor substrate; and a second doped semiconductor region over and adjoining the first doped semiconductor region, wherein the second doped semiconductor region is of a second conductivity type opposite the first conductivity type. | 2011-04-21 |
20110092042 | MONITOR PATTERN OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to surround a formation region of the wirings and the diffused resistors. A space between the dummy pattern and the wirings is set in accordance with, for example, a minimum space between wirings in a chip formation portion. | 2011-04-21 |
20110092043 | DEEP TRENCH CAPACITOR IN A SOI SUBSTRATE HAVING A LATERALLY PROTRUDING BURIED STRAP - A deep trench is formed to a depth midway into a buried insulator layer of a semiconductor-on-insulator (SOI) substrate. A top semiconductor layer is laterally recessed by an isotropic etch that is selective to the buried insulator layer. The deep trench is then etched below a bottom surface of the buried insulator layer. Ion implantation is performed at an angle into the deep trench to dope the sidewalls of the deep trench beneath the buried insulator layer, while the laterally recessed sidewalls of the top semiconductor layer are not implanted with dopant ions. A node dielectric and trench fill materials are deposited into the deep trench. A buried strap has an upper buried strap sidewall that is offset from a lower buried strap sidewall and a deep trench sidewall. | 2011-04-21 |
20110092044 | METHOD FOR MANUFACTURING CAPACITOR LOWER ELECTRODES OF SEMICONDUCTOR MEMORY - A method for manufacturing capacitor lower electrodes includes a dielectric layer, a first silicon nitride layer and a hard mask layer; partially etching the hard mask layer, the first silicon nitride layer and the dielectric layer to form a plurality of concave portions; depositing a second silicon nitride layer onto the hard mask layer and into the concave portions; partially etching the second silicon nitride layer, the hard mask layer and the dielectric layer to form a plurality of trenches; forming a capacitor lower electrode within each trench and partially etching the first silicon nitride layer, the second silicon nitride layer, the dielectric layer and the capacitor lower electrodes to form an etching area; and etching and removing the dielectric layer from the etching area, thereby a periphery of each capacitor lower electrode is surrounded and attached to by the second silicon nitride layer. | 2011-04-21 |
20110092045 | BURIED DECOUPLING CAPACITORS, DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF FABRICATION - A buried decoupling capacitor apparatus and method are provided. According to various embodiments, a buried decoupling capacitor apparatus includes a semiconductor-on-insulator substrate having a buried insulator region and top semiconductor region on the buried insulator region. The apparatus embodiment also includes a first capacitor plate having a doped region in the top semiconductor region in the semiconductor-on-insulator substrate. The apparatus embodiment further includes a dielectric material on the first capacitor plate, and a second capacitor plate on the dielectric material. According to various embodiments, the first capacitor plate, the dielectric material and the second capacitor plate form a decoupling capacitor for use in an integrated circuit. | 2011-04-21 |
20110092046 | Method of forming semiconductor devices in wafer assembly - An apparatus and method for holding a semiconductor device in a wafer. A bar is connected to the wafer. A first sidewall comprises a first end and a second, and is connected to the bar at its first end. A first tab comprises a first end and a second end, and is connected to the second end of the first sidewall at its first end and connected to the first side of the semiconductor device at its second end. The thickness of the first tab is less than the thickness of the bar and the thickness of the first sidewall. | 2011-04-21 |
20110092047 | Strained Semiconductor Using Elastic Edge Relaxation, a Buried Stressor Layer and a Sacrificial Stressor Layer - The present invention relates to creating an active layer of strained semiconductor using a combination of buried and sacrificial stressors. That is, a process can strain an active semiconductor layer by transferring strain from a stressor layer buried below the active semiconductor layer and by transferring strain from a sacrificial stressor layer formed above the active semiconductor layer. As an example, the substrate may be silicon, the buried stressor layer may be silicon germanium, the active semiconductor layer may be silicon and the sacrificial stressor layer may be silicon germanium. Elastic edge relaxation is preferably used to efficiently transfer strain to the active layer. | 2011-04-21 |
20110092048 | METHOD OF FORMING ACTIVE REGION STRUCTURE - A method of forming an active region structure includes preparing a semiconductor substrate having a cell array region and a peripheral circuit region, forming upper cell mask patterns having a line shape in the cell array region, forming first and second peripheral mask patterns in the peripheral circuit region, the first and second peripheral mask patterns being stacked in sequence and covering the peripheral circuit region, and upper surfaces of the upper cell mask patterns forming a step difference with an upper surface of the second peripheral mask pattern, forming spacers on sidewalls of the upper cell mask patterns to expose lower portions of the upper cell mask patterns and the second peripheral mask pattern, and removing the lower portions of the upper cell mask patterns using the spacers and the first and second peripheral mask patterns as an etch mask. | 2011-04-21 |
20110092049 | METHOD AND APPARATUS FOR SUBSTRATE BONDING - Methods for bonding a first substrate to a second substrate are described. A surface of the first substrate is coated with an adhesive layer. The adhesive layer is cured to b-stage. The surface of the first substrate is positioned in contact with the second substrate. An edge of the first substrate is pressed to an edge of the second substrate to initiate Van der Waals bonding. The first and second substrates are allowed to come together by Van der Waals bonding. The bonded first and second substrates are subjected to a sufficient heat for a sufficient time period to cure completely the adhesive layer. | 2011-04-21 |
20110092050 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A first embrittlement layer is formed by doping a first single-crystal semiconductor substrate with a first ion; a second embrittlement layer is formed by doping a second single-crystal semiconductor substrate with a second ion; the first and second single-crystal semiconductor substrates are bonded to each other; the first single-crystal semiconductor film is formed over the second single-crystal semiconductor substrate by a first heat treatment; an insulating substrate is bonded over the first single-crystal semiconductor film; and the first and second single-crystal semiconductor films are formed over the insulating substrate by a second heat treatment. A dose of the first ion is higher than that of the second ion and a temperature of the first heat treatment is lower than that of the second heat treatment. | 2011-04-21 |