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11th week of 2013 patent applcation highlights part 13
Patent application numberTitlePublished
20130062562ALUMINATE-BASED FLUORESCENT POWDER COATED BY METAL NANOPARTICLE AND PRODUCTION METHOD THEREOF - An aluminate-based fluorescent powder coated by metal nanoparticles. The formula thereof is (Y2013-03-14
20130062563FLUORESCENT MATERIALS USED IN FIELD EMISSION AND PREPARATION METHODS THEREOF - Fluorescent materials used in field emission and preparation methods thereof are provided. The said fluorescent materials are a mixture consisting of Zn2013-03-14
20130062564Optical Element for Correcting Color Blindness - Described herein are devices, compositions, and methods for improving color discernment.2013-03-14
20130062565PREPARATION OF NANOPARTICLES WITH NARROW LUMINESCENCE - A population of light-emissive nitride nanoparticles has a photoluminescence quantum yield of at least 10% and an emission spectrum having a full width at half maximum intensity (FWHM) of less than 100 nm. One suitable method of producing light-emissive nitride nanoparticles comprises a first stage of heating a reaction mixture consisting essentially of nanoparticle precursors in a solvent, the nanoparticle precursors including at least one metal-containing precursor and at least one first nitrogen-containing precursor, and maintaining the reaction mixture at a temperature to seed nanoparticle growth. It further comprises a second stage of adding at least one second nitrogen-containing precursor to the reaction mixture thereby to promote nanoparticle growth.2013-03-14
20130062566Method of Recovering and Concentrating an Aqueous N-methylmorpholine-N-Oxide (NMMO) Solution - This disclosure relates to a method of recovering and concentrating an aqueous N-methylmorpholine-N-oxide (NMMO) solution.2013-03-14
20130062567Staged Membrane Oxidation Reactor System - Ion transport membrane oxidation system comprising (a) two or more membrane oxidation stages, each stage comprising a reactant zone, an oxidant zone, one or more ion transport membranes separating the reactant zone from the oxidant zone, a reactant gas inlet region, a reactant gas outlet region, an oxidant gas inlet region, and an oxidant gas outlet region; (b) an interstage reactant gas flow path disposed between each pair of membrane oxidation stages and adapted to place the reactant gas outlet region of a first stage of the pair in flow communication with the reactant gas inlet region of a second stage of the pair; and (c) one or more reactant interstage feed gas lines, each line being in flow communication with any interstage reactant gas flow path or with the reactant zone of any membrane oxidation stage receiving interstage reactant gas.2013-03-14
20130062568ACID CLEANING AND CORROSION INHIBITING COMPOSITIONS COMPRISING GLUCONIC ACID - A biodegradable acid cleaning composition for cleaning stainless steel, and other surfaces is disclosed. The composition comprises urea sulfate in combination with gluconic acid which serves as a corrosion inhibitor. The composition retains the cleaning and corrosion prevention properties of similar phosphoric acid solutions but is safe for the environment and is less expensive to produce. Applicants have surprisingly found that the traditionally alkaline corrosion inhibitor, gluconic acid, can work effectively in an acidic cleaning composition.2013-03-14
20130062569PROTEIN-FREE SOLUTION FOR NON-PROGRAMMED CELL CRYOPRESERVATION - The invention provides a protein-free solution for cell cryopreservation, which comprises 1-23 w/v % of cell membrane protectant, 1.0-16 w/v % of permeable intracellular protectant, 3.0-28 w/v % of cell sedimentation stabilizer, and the balance of pH buffer solution. The cell cryopreservation solution of the invention consists of chemical substances only, without any protein content. The components are stable and controllable. The cell cryopreservation solution has long shelf life, high stability between different batches and good protection of cells, and has no effect on the characteristics, normal growth and differentiation of cells; besides, the recovery rate of the cells cryopreserved by the cell cryopreservation solution is high. The cell cryopreservation solution of the invention can be used directly without additional preparation or dilution steps, thus the cryopreservation process is simple, just needing to add cells in the cell cryopreservation solution and putting the solution in an environment of −80 DEG C directly.2013-03-14
20130062570MATRIX ADDITIVE FOR MASS SPECTROMETRY - The present invention provides a novel compound that makes it possible to improve ionization efficiency of hydrophobic peptide. 5-alkoxy-2- or -3-hydroxybenzoic acid represented by the following formula (I):2013-03-14
20130062571METHOD FOR PREPARING ELECTRODE ACTIVE MATERIAL SLURRY AND ELECTROCHEMICAL CAPACITOR COMPRISING ELECTRODE USING ELECTRODE ACTIVE MATERIAL SLURRY PREPARED BY THE METHOD - A method for preparing electrode active material slurry including: mixing a conductive agent and a first thickener with a low molecular weight to primarily disperse the mixture; and mixing an active material and a second thickener with a higher molecular weight than the first thickener in the primary dispersion to secondarily disperse the mixture, and an electrochemical capacitor comprising an electrode using electrode active material slurry prepared by the method. It is possible to prepare a low resistance and high capacity electrochemical capacitor by selectively using at least two thickeners with different degrees of polymerization and molecular weights to remarkably improve dispersibility of an active material and a conductive agent. Particularly, it is possible to reduce resistance based on an electrochemical capacitor with the same capacity.2013-03-14
20130062572COPPER-CARBON COMPOSITION - A copper-carbon composition including copper chemically bonded to carbon, wherein the copper and the carbon form a single phase material formed by mixing carbon into molten copper. The single phase material characterized in that it is meltable and that the carbon does not phase separate from the copper when the single phase material is heated to a temperature that melts the copper-carbon composition.2013-03-14
20130062573NANOSTRUCTURED HIGH VOLTAGE CATHODE MATERIALS - Objects of the present invention include creating cathode materials that have high energy density and are cost-effective, environmentally benign, and are able to be charged and discharged at high rates for a large number of cycles over a period of years. One embodiment is a battery material comprised of a doped nanocomposite. The doped nanocomposite may be comprised of Li—Co—PO4; C; and at least one X, where said X is a metal for substituting or doping into LiCoPO4. In certain embodiments, the doped nanocomposite may be LiCoMnPO4/C. Another embodiment of the present invention is a method of creating a battery material comprising the steps of high energy ball milling particles to create complex particles, and sintering said complex particles to create a nanocomposite. The high energy ball milling may dope and composite the particles to create the complex particles.2013-03-14
20130062574CARBON NANOTUBE POWDERS AND METHODS FOR MANUFACTURING THE SAME AND COMPOSITE MATERIALS - Disclosed is a carbon nanotube powder, including a carbon nanotube averagely mixed with a dispersant, wherein the carbon nanotube and the dispersant have a weight ratio of 30:70 to 90:10. The carbon nanotube has a diameter of 10 nm to 100 nm, and a length/diameter ratio of 100:1 to 5000:1. The dispersant is an alternative copolymer, a block copolymer, or a random copolymer polymerized of a solvation segment (A) and a carbon affinity group (B). The carbon nanotube powder can be blended with a thermoplastic material to form a composite, wherein the carbon nanotube and the composite have a weight ratio of 0.5:100 to 50:100.2013-03-14
20130062575METAL IMIDE COMPOUNDS AS ANODE MATERIALS FOR LITHIUM BATTERIES AND GALVANIC ELEMENTS WITH A HIGH STORAGE CAPACITY - Metal imide compounds as anode materials for lithium batteries and galvanic elements with a high storage capacity. Metal imide compounds as highly capacitive anode materials for lithium batteries. The invention relates to a galvanic element, an anode material for use in a galvanic element and method for producing an active electrode material. The galvanic element contains the metal imide compounds of the general formula (I): M2013-03-14
20130062576882 Compatibilized Biopolyamide-Poly (Arylene ether) Thermoplastic Resin - Disclosed herein are compatibilized polyamide-poly(arylene ether) thermoplastic resin compositions, comprising: 2013-03-14
20130062577CARBON NANOTUBE SUSPENSION AND SUPERHYDROPHOBIC FILM PREPARED THEREFROM - A carbon nanotube suspension includes a plurality of carbon nanotubes and a block copolymer dispersant which are evenly distributed in a solvent, wherein the block copolymer includes a hydrophobic block and a functional group block, such that the carbon nanotubes react with the functional group block to form covalent bonds directly without undergoing chemical modification. The carbon nanotube suspension is effective in preparing a superhydrophobic film without undergoing chemical modification or the presence of a fluorine-containing compound. The superhydrophobic film thus prepared is of a tough stable structure and remains superhydrophobic when subjected to lengthy immersion treatment, exposure to a strong acid-base environment, or physical abrasion and polishing.2013-03-14
20130062578DIELECTRIC COMPOSITION, METHOD OF FABRICATING THE SAME, AND MULTILAYER CERAMIC ELECTRONIC COMPONENT USING THE SAME - There are provided a dielectric composition, a method of fabricating the same, and a multilayer ceramic electronic component using the same. The dielectric composition includes a perovskite powder particle having a surface on which a doping layer is formed, the doping layer being doped with at least one material selected from a group consisting of alkaline earth elements and boron group elements, and rare earth elements.2013-03-14
20130062579APPARATUSES AND SYSTEMS FOR DENSITY GAUGE CALIBRATION and REFERENCE EMULATION - Apparatuses and systems for emulating electrical characteristics of a material having a known dielectric constant or property are disclosed for standardizing and calibrating of electromagnetic devices. The emulator apparatus can include an electrically non-conductive layer having a dielectric constant less than the material dielectric constant and an electrically conductive layer adjacent the non-conductive layer. Artificial dielectrics for emulating the dielectric constant of a material are also disclosed including a substrate matrix having a dielectric constant less than the material dielectric constant and an additive combined with the substrate, the additive having a dielectric constant higher than the material dielectric constant. Artificial dielectrics may simulate the frequency response of a material relating to a specific property.2013-03-14
20130062580Additive for Nickel-Zinc Battery - A composition that contains nickel oxyhydroxide, nickel metal, ruthenium oxide (Ru02) and a binder is prepared as the cathode for a nickel-zinc battery. Metal oxide or hydroxide with a rare earth oxide may be included in the cathode to improve the electrode capacity and shelf life. Optionally, zinc oxide is added to the cathode to facilitate charger transfer and improve the characteristics of high rate discharging. The cathode significantly increases the charging efficiency, promotes the overpotential of oxygen evolution, and intensifies the depth of discharging, thereby increasing the overall efficiency and lifespan of the battery.2013-03-14
20130062581COMPOSITION FOR THE PREPARATION OF ORGANIC ELECTRONIC (OE) DEVICES - The present invention relates to novel formulations comprising an organic semiconductor (OSC) and one or more organic solvents. The formulation comprises a dimethyl anisole solvent. Furthermore, the present invention describes the use of these formulations as inks for the preparation of organic electronic (OE) devices, especially organic photovoltaic (OPV) cells and OLED devices, to methods for preparing OE devices using the novel formulations, and to OE devices, OLED devices and OPV cells prepared from such methods and formulations.2013-03-14
20130062582LAYERED OXIDE CATHODE MATERIALS FOR LITHIUM ION BATTERIES - A mixed metal oxide having the formula xLi2013-03-14
20130062583PIPE FLANGE SPREADING TOOL - A pipe flange spreading tool is disclosed. The pipe flange spreading tool includes a pair of wedges and a retainer strap. Each of the wedges has a tapered end, and the tapered end is configured to be forced between two pipe flanges of a pipeline to separate the pipe flanges of the pipeline. The retainer strap connects the pair of wedges. The retainer strap is configured to be looped around the pipeline to retain the pair of wedges with respect to the pipeline during operation.2013-03-14
20130062584ACTIVE SECURITY SYSTEM - An active security system with a rotating spoke and hub apparatus with razor wire, barbed wire or other types of sharp objects affixed to the spokes that is free standing or on top of an existing fence or wall and mounted to stationary columns. A motor and linkage provide for the active rotation of the rotating spoke and hub structure. The motor is activated by sensors that detect a presence of an intruder.2013-03-14
20130062585PORTABLE SAFETY RAIL SYSTEM - A portable safety rail system includes one or more railings inserted into one or more stackable rail bases. Each rail base can include a plurality of apertures for receiving end rail posts of railings through a raised hub defining an open region between the bottom of the hub and the surface on which the rail base rests. Each end rail post can have a stop flange that engages an upper surface of hub when inserted therein and an aperture through the end portion that extends into the open region beneath the hub for receiving a pin to lock the post while allowing rotation of the post. System can also include toe boards that are attached to railings with a mount having an aperture through which railings are extended, allowing the toe boards to also be rotated to be aligned with railings.2013-03-14
20130062586Semiconductor Device and Manufacturing Method Thereof - This invention discloses a semiconductor device and its manufacturing method. According to the method, a stop layer is deposited on a step-shaped bottom electrode, and then a first insulating layer is deposited through a high aspect ratio process. A first chemical mechanical polishing is performed until the stop layer. A second chemical mechanical polishing is then performed to remove the upper horizontal portion of the bottom electrode. Then, a phase-change material can be formed on the vertical portion of the bottom electrode to form a phase-change element. Through arranging a stop layer, the chemical mechanical polishing process is divided into two stages. Thus, during the second chemical mechanical polishing process preformed on the bottom electrode, polishing process can be precisely controlled to avoid the unnecessary loss of the bottom electrode.2013-03-14
20130062587Resistive Switching Devices Having Alloyed Electrodes And Methods of Formation Thereof - In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.2013-03-14
20130062588NONVOLATILE SEMICOCDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A nonvolatile semiconductor memory device has a first wire, a second wire, and a memory cell electrically coupled to the first wire at one end and to the second wire at the other end. The memory cell has a resistance change layer to store information by changing a resistance value and a first electrode and a second electrode coupled to both ends of the resistance change layer and not containing a precious metal. The first electrode includes an outside electrode and an interface electrode formed between the outside electrode and the resistance change layer. The thickness of the interface electrode is less than the thickness of the outside electrode. The resistivity of the interface electrode is higher than the resistivity of the outside electrode. The resistance value of the first electrode is lower than the resistance value of the resistance change layer in a low resistance state.2013-03-14
20130062589RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectification connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a value of voltage which is applied to the memory element to change a resistance of the memory element reversibly between first and second values. The rectification includes a p-type semiconductor layer, an n-type semiconductor layer and an intrinsic semiconductor layer therebetween. The rectification has a first diffusion prevention area in the intrinsic semiconductor layer.2013-03-14
20130062590METHOD FOR MANUFACTURING NONVOLATILE STORAGE DEVICE AND NONVOLATILE STORAGE DEVICE - According to one embodiment, a method for manufacturing a nonvolatile storage device. The device includes a plurality of first conductive layers each extending in a first direction, a plurality of second conductive layers each extending in a second direction and spaced from the first layers, and memory cells each provided between the first layers and the second layers and including a rectifying element including a semiconductor layer, and a variable resistance element stacked with the rectifying element. The method includes a film formation step, a heating step and a patterning step. The film formation step is configured to form a rectifying element material film including an amorphous semiconductor film. The heating step is configured to heat the rectifying element material film. The patterning step is configured to form the rectifying element including the semiconductor layer by patterning the rectifying element material film after the heating step.2013-03-14
20130062591CASE INCLUDING SEMICONDUCTOR NANOCRYSTALS, AND OPTOELECTRONIC DEVICE INCLUDING THE SAME - A case including a case main body, a matrix including a semiconductor nanocrystal, the matrix disposed in the case main body, and a sealant disposed on the case main body, wherein the sealant has a gas permeability of about 1 cubic centimeter at standard temperature and pressure per centimeter per meter squared per day per atmosphere or less and a tensile strength of about 5 megaPascals or more, and wherein the semiconductor nanocrystal is a Group II-VI compound, a Group III-V compound, a Group IV-VI compound, a Group IV element, a Group IV element, a Group IV compound, or a combination thereof.2013-03-14
20130062592LIGHT EMITTING DIODE (LED) DICE HAVING WAVELENGTH CONVERSION LAYERS AND METHODS OF FABRICATION - A light emitting diode (LED) die includes a wavelength conversion layer having a base material, and a plurality of particles embedded in the base material including wavelength conversion particles, and reflective particles. A method for fabricating light emitting diode (LED) dice includes the steps of mixing the wavelength conversion particles in the base material to a first weight percentage, mixing the reflective particles in the base material to a second weight percentage, curing the base material to form a wavelength conversion layer having a selected thickness, and attaching the wavelength conversion layer to a die.2013-03-14
20130062593FRONTSIDE-ILLUMINATED BARRIER INFRARED PHOTODETECTOR DEVICE AND METHODS OF FABRICATING THE SAME - Frontside-illuminated barrier infrared photodetector devices and methods of fabrication are disclosed. In one embodiment, a frontside-illuminated barrier infrared photodetector includes a transparent carrier substrate, and a plurality of pixels. Each pixel of the plurality of pixels includes an absorber layer, a barrier layer on the absorber layer, a collector layer on the barrier layer, and a backside electrical contact coupled to the absorber layer. Each pixel has a frontside and a backside. The absorber layer and the barrier layer are non-continuous across the plurality of pixels, and the barrier layer of each pixel is closer to a scene than the absorber layer of each pixel. A plurality of frontside common electrical contacts is coupled to the frontside of the plurality of pixels, wherein the frontside of the plurality of pixels and the plurality of frontside common electrical contacts are bonded to the transparent carrier substrate.2013-03-14
20130062594METHOD OF ISOLATING NANOWIRES FROM A SUBSTRATE - A method is provided. The method includes forming a plurality of nanowires on a top surface of a substrate and forming an oxide layer adjacent to a bottom surface of each of the plurality of nanowires, wherein the oxide layer is to isolate each of the plurality of nanowires from the substrate.2013-03-14
20130062595PHOTODIODE - A photodiode according to example embodiments includes an anode, a cathode, and an intrinsic layer between the anode and the cathode. The intrinsic layer includes a P-type semiconductor and an N-type semiconductor, and composition ratios of the P-type semiconductor and the N-type semiconductor vary within the intrinsic layer depending on a distance of the intrinsic layer from one of the anode and the cathode.2013-03-14
20130062596DISPLAY, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC UNIT - A display includes: a first light-emitting device disposed in a first region on a substrate and including a transfer organic layer; a second light-emitting device disposed in a second region adjacent to the first region on the substrate and not including a transfer organic layer; and a level difference provided between the first region and the second region, and being large enough to inhibit transfer of the transfer organic layer to the second region when the transfer organic layer is formed in the first region.2013-03-14
20130062597NITROGEN-CONTAINING HETEROAROMATIC RING COMPOUND - A nitrogen-containing heteroaromatic compound is represented by the following formula (A).2013-03-14
20130062598Compounds Having Semiconducting Properties and Related Compositions and Devices - Disclosed are new compounds having semiconducting properties. Such compounds can be processed in solution-phase at a temperature of less than about 50° C. into thin film semiconductors that exhibit high carrier mobility and/or good current modulation characteristics.2013-03-14
20130062599ORGANIC LIGHT EMITTING DEVICES HAVING GRADED EMISSION REGIONS - Organic light-emitting devices having an emissive region comprising a hole transport material and an electron transport material in varying material concentration across the devices. Variation of the concentration of the hole transport material and electron transport material is provided continuously or in a graded manner, as opposed to using multiple layers arranged to form a step-like gradient.2013-03-14
20130062600SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.2013-03-14
20130062601OXIDE SEMICONDUCTOR LAYER AND SEMICONDUCTOR DEVICE - An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2013-03-14
20130062602Oxide Semiconductor Transistors And Methods Of Manufacturing The Same - Transistors and methods of manufacturing the same. A transistor may be an oxide thin film transistor (TFT) with a self-aligned top gate structure. The transistor may include a gate insulating layer between a channel region and a gate electrode that extends from two sides of the gate electrode. The gate insulating layer may cover at least a portion of source and drain regions.2013-03-14
20130062603TEST STRUCTURE AND CALIBRATION METHOD - A test structure for measuring a Micro-Electro-Mechanical System (MEMS) cavity height structure and calibration method. The method includes forming a sacrificial cavity material over a plurality of electrodes and forming an opening into the sacrificial cavity material. The method further includes forming a transparent or substantially transparent material in the opening to form a transparent or substantially transparent window. The method further includes tuning a thickness of the sacrificial cavity material based on measurements obtained through the transparent or substantially transparent window.2013-03-14
20130062604Photodetector with Controllable Spectral Response - A photodetector includes a semiconductor substrate having an irradiation zone configured to generate charge carriers having opposite charge carrier types in response to an irradiation of the semiconductor substrate. The photodetector further includes an inversion zone generator configured to operate in at least two operating states to generate different inversion zones within the substrate, wherein a first inversion zone generated in a first operating state differs from a second inversion zone generated in a second operating state, and wherein the first inversion zone and the second inversion zone have different extensions in the semiconductor substrate. A corresponding method for manufacturing a photodetector and a method for determining a spectral characteristic of an irradiation are also described.2013-03-14
20130062605SEMICONDUCTOR CHIP - In a case where a semiconductor chip is mounted over a first package, 80 pads are coupled to 80 terminals of the package, and in a case where the semiconductor chip is mounted over a second package, 100 pads are coupled to 100 terminals of the second package. An internal circuit of the semiconductor chip operates as a microcomputer with 80 terminals in a case where electrodes are insulated from each other and operates as a microcomputer with 100 terminals in a case where the electrodes are shorted therebetween by an end part of a bonding wire. Therefore, a dedicated pad for setting the number of terminals of the packages is no longer required.2013-03-14
20130062606THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A thin film transistor includes a substrate with a recess formed therein, a channel region received in the recess, a gate insulating layer formed on the channel region, a gate electrode formed on the gate insulating layer, and a source region and a drain region connecting the channel region, respectively. The gate insulating layer and the gate electrode are positioned between the source region and the drain region. The channel region is made of a nitride compound semiconductor. A method of manufacturing the thin film transistor is also provided.2013-03-14
20130062607SEMICONDUCTOR DEVICE - A protection circuit for efficiently reducing the influence of ESD and a semiconductor device in which the influence of ESD is efficiently reduced are provided. The protection circuit includes at least two protection diodes. Each protection diode is a transistor including two gates facing each other with a semiconductor layer in which a channel is formed sandwiched between the gates. A fixed potential is applied to one of the gates of the transistor.2013-03-14
20130062608THIN-FILM TRANSISTOR AND ELECTRONIC UNIT - A thin-film transistor includes: a gate electrode; a semiconductor layer separated from the gate electrode with a separation insulating layer in between; and a source electrode and a drain electrode that are connected with the semiconductor layer and are separated from each other. Between the source electrode and the drain electrode, a thickness of the separation insulating layer at a first region where the gate electrode does not overlap both the source electrode and the drain electrode is smaller than a thickness of the separation insulating layer at a second region where the gate electrode overlaps one or both of the source electrode and the drain electrode.2013-03-14
20130062609III-N FET ON SILICON USING FIELD SUPPRESSING REO - A III-N on silicon substrate with enhanced breakdown voltage including a rare earth oxide structure deposited on the silicon substrate and a layer of single crystal III-N semiconductor material deposited on the rare earth oxide structure. The rare earth oxide has a dielectric constant greater (approximately twice) than the III-N semiconductor material. The rare earth oxide structure is selected to cooperate with the layer of single crystal III-N semiconductor material to reduce the thickness of the layer of single crystal III-N semiconductor material required for a selected breakdown voltage to a value less than a thickness of the layer of single crystal III-N semiconductor material for the selected breakdown voltage without the cooperating single crystal rare earth oxide.2013-03-14
20130062610LATTICE MATCHED CRYSTALLINE REFLECTOR - A virtual substrate structure with a lattice matched crystalline reflector for a light emitting device including a single crystal rare earth oxide layer deposited on a silicon substrate and substantially crystal lattice matched to the silicon substrate. A reflective layer of single crystal electrically conductive material is deposited on the layer of single crystal rare earth oxide and a layer of single crystal semiconductor material is positioned in overlying relationship to the reflective layer and substantially crystal lattice matched to the reflective layer. A single crystal rare earth oxide layer is optionally deposited between the reflective layer and the layer of semiconductor material.2013-03-14
20130062611SEMICONDUCTOR DEVICE - A semiconductor device of an embodiment includes: a first semiconductor layer made of Al2013-03-14
20130062612NITRIDE SEMICONDUCTOR DEVICE, NITRIDE SEMICONDUCTOR WAFER, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR LAYER - According to one embodiment, a nitride semiconductor device includes a foundation layer, a first stacked intermediate layer, and a functional layer. The foundation layer includes an AlN buffer layer formed on a substrate. The first stacked intermediate layer is provided on the foundation layer. The first stacked intermediate layer includes a first AlN intermediate layer provided on the foundation layer, a first AlGaN intermediate layer provided on the first AlN intermediate layer, and a first GaN intermediate layer provided on the first AlGaN intermediate layer. The functional layer is provided on the first stacked intermediate layer. The first AlGaN intermediate layer includes a first step layer in contact with the first AlN intermediate layer. An Al composition ratio in the first step layer decreases stepwise in a stacking direction from the first AlN intermediate layer toward the first step layer.2013-03-14
20130062613LIGHT EMITTING DEVICE - According to one embodiment, a light emitting device includes a first lead, a light emitting element, a second lead and a molded body. The light emitting element is fixed on the first lead. The second lead is provided away from the first lead and electrically connected to the light emitting element via a metal wire. The, molded body made of a sealing resin covers the light emitting element, end portions of the first lead and the second lead, the light emitting element being fixed on the end portion of the first read, and the metal wire being bonded on the end portion of the second lead. The first groove is provided between first and second portions in a front surface of the second lead, the first portion being in contact with an outer edge of the molded body and the metal wire being bonded on the second portion.2013-03-14
20130062614GROUP III-V ENHANCEMENT MODE TRANSISTOR WITH THYRISTOR GATE - An apparatus includes an enhancement mode transistor having multiple Group III-V layers above a substrate and a gate above the Group III-V layers. The gate includes multiple layers of material that form at least a portion of a thyristor. The multiple layers of material may include a first p-type layer of material, an n-type layer of material on the first p-type layer, and a second p-type layer of material on the n-type layer. The multiple layers of material may also include a p-type layer of material, an n-type layer of material on the p-type layer, and a Schottky metal layer on the n-type layer. The enhancement mode transistor may represent a high electron mobility transistor (HEMT) or a heterostructure field effect transistor (HFET).2013-03-14
20130062615SOLID STATE LIGHTING DEVICES WITH SELECTED THERMAL EXPANSION AND/OR SURFACE CHARACTERISTICS, AND ASSOCIATED METHODS - Solid state lighting (SSL) devices and methods are disclosed. A particular method includes forming an SSL formation structure having a CTE, selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material based at least in part on the second material having a CTE less than the first material CTE. The intelayer structure is formed over the SSL formation structure e.g., with a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material. The CTE difference between the first and second materials can counteract a force placed on the formation structure by the first material. Particular formation structures can have an off-cut angle with a non-zero value of up to about 4.5 degrees.2013-03-14
20130062616GaN-BASED FIELD EFFECT TRANSISTOR - A GaN-based field effect transistor (MOSFET) is comprised of a channel layer comprised of p-type GaN, an electron supply layer, a surface layer having band gap energy smaller than that of said electron supply layer, sequentially laminated on a substrate, and recess section is formed by removing a part of the drift layer, the electron supply layer, and the surface layer down to a depth that reaches to the channel layer. A source electrode and a drain electrode are formed so that the recess section positions between them, a gate insulation film is formed on the surface layer and on inner-surface of the recess section including the channel layer, and a gate electrode is formed on the gate insulating film in the recess section.2013-03-14
20130062617LIGHT EMITTING DIODE STRUCTURE WITH TRANSPARENT CONDUCTIVE HEAT DISSIPATION FILM - An LED structure includes a sapphire substrate, an epitaxy light emitting structure, a transparent conductive heat dissipation film, a first metal contact layer and a second metal contact layer. The transparent conductive heat dissipation film is electrically conductive and thermally radiative, and has a surface microscopic crystalline structure. The heat generated by the epitaxy light emitting structure is propagated by thermal radiation in a direction from the upper surface to the lower surface of the transparent conductive heat dissipation film. The transparent conductive heat dissipation film successfully replaces the transparent ITO (indium tin oxide) film to provide similar optical and electrical feature and performs fast heat dissipation by directive thermal radiation. The heat dissipation and efficiency of light emitting are greatly improved so as to prolong the lifetime of LED and final LED products.2013-03-14
20130062618LIGHT EMITTING DIODE WITH THERMORADIATION HEAT-DISSIPATION LAYERS - A light emitting diode (LED) includes a sapphire substrate, a first thermoradiation heat-dissipation layer, a second thermoradiation heat-dissipation layer, an epitaxy light emitting structure, a first metal contact layer and a second metal contact layer. The first and second thermoradiation heat-dissipation layers are fabricated from a mixture of metal and nonmetal, and are fabricated on the upper and lower surfaces of the sapphire substrate, respectively. The heat generated by the epitaxy light emitting structure propagates through the first and second thermoradiation heat-dissipation layers by directive thermal radiation. The efficiency of heat dissipation is improved to increase the efficiency of light emitting and prolong the lifespan of LED and LED products.2013-03-14
20130062619EDGE TERMINATION STRUCTURE EMPLOYING RECESSES FOR EDGE TERMINATION ELEMENTS - Elements of an edge termination structure, such as multiple concentric guard rings, are effectively doped regions in a drift layer. To increase the depth of these doped regions, individual recesses may be formed in a surface of the drift layer where the elements of the edge termination structure are to be formed. Once the recesses are formed in the drift layer, these areas about and at the bottom of the recesses are doped to form the respective edge termination elements.2013-03-14
20130062620SCHOTTKY DIODE EMPLOYING RECESSES FOR ELEMENTS OF JUNCTION BARRIER ARRAY - The present disclosure generally relates to a Schottky diode that has a substrate, a drift layer provided over the substrate, and a Schottky layer provided over an active region of the substrate. A junction barrier array is provided in the drift layer just below the Schottky layer. The elements of the junction barrier array are generally doped regions in the drift layer. To increase the depth of these doped regions, individual recesses may be formed in the surface of the drift layer where the elements of the junction barrier array are to be formed. Once the recesses are formed in the drift layer, areas about and at the bottom of the recesses are doped to form the respective elements of the junction barrier array.2013-03-14
20130062621III-N DEVICE STRUCTURES HAVING A NON-INSULATING SUBSTRATE - Embodiments of the present disclosure includes a III-N device having a substrate layer, a first III-N material layer on one side of the substrate layer, a second III-N material layer on the first III-N material layer, and a barrier layer disposed on another side of the substrate layer, the barrier layer being less electrically conductive than the substrate layer.2013-03-14
20130062622SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device according to the present embodiment includes a semiconductor substrate having a first n-type silicon carbide layer and a second n-type silicon carbide layer, a first p-type impurity region formed in the n-type silicon carbide layer, a first n-type impurity region of 4H—SiC structure formed in the n-type silicon carbide layer, a second n-type impurity region of 3C—SiC structure formed in the n-type silicon carbide layer having a depth shallower than the first n-type impurity region, a gate insulating film, a gate electrode formed on the gate insulating film, and a metallic silicide layer formed above the first n-type impurity region and having a bottom portion and a side surface portion such that the second n-type impurity region is sandwiched between the first n-type impurity region and at least the side surface portion.2013-03-14
20130062623SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed is a semiconductor device including: a first electrode formed of a conductive material; a p-type first silicon carbide (SiC) semiconductor section and an n-type second SiC semiconductor section 2013-03-14
20130062624SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device according to an embodiment includes a silicon carbide, a metal silicide formed on the silicon carbide and including a first layer and a second layer having a carbon ratio lower than that of the first layer, and a metallic electrode formed on the metal silicide, wherein the second layer is formed on the first layer, and the second layer is in contact with the metallic electrode, and an average grain diameter of a metal silicide in the second layer is larger than an average grain diameter of a metal silicide in the first layer.2013-03-14
20130062625SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device including: a semiconductor substrate; a field effect transistor formed on the semiconductor substrate; and a diode forming area adjacent to a forming area of the field effect transistor, wherein the diode forming area is insulated from the forming area of the field effect transistor on the semiconductor substrate, the diode forming area includes an anode electrode and a cathode electrode arranged side by side in a multi-finger shape, and the anode electrode and the cathode electrode are formed in a direction different from directions of a gate electrode, a source electrode, and a drain electrode of the field effect transistor arranged side by side in a multi-finger shape.2013-03-14
20130062626POWER SEMICONDUCTOR MODULE - Disclosed is a power semiconductor module which includes a unipolar type switching device using a wide bandgap semiconductor (wide bandgap semiconductor switching device) and an insulated gate bipolar transistor using a silicon semiconductor (Si-IGBT) connected in parallel, in which a chip area of the wide bandgap semiconductor switching device is smaller than that of the Si-IGBT.2013-03-14
20130062627STRESS REGULATED SEMICONDUCTOR DEVICES AND ASSOCIATED METHODS - Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.2013-03-14
20130062628METHODS FOR THE EPITAXIAL GROWTH OF SILICON CARBIDE - A method for the epitaxial growth of SiC is described which includes contacting a surface of a substrate with hydrogen and HCl, subsequently increasing the temperature of the substrate to at least 1550° C. and epitaxially growing SiC on the surface of the substrate. A method for the epitaxial growth of SiC is also described which includes heating a substrate to a temperature of at least 1550° C., contacting a surface of the substrate with a C containing gas and a Si containing gas at a C/Si ratio of 0.5-0.8 to form a SiC buffer layer and subsequently contacting the surface with a C containing gas and a Si containing gas at a C/Si ratio >0.8 to form a SiC epitaxial layer on the SiC buffer layer. The method results in silicon carbide epitaxial layers with improved surface morphology.2013-03-14
20130062629SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A substrate is provided with a main surface having an off angle of 5° or smaller relative to a reference plane. The reference plane is a {000-1} plane in the case of hexagonal system and is a {111} plane in the case of cubic system. A silicon carbide layer is epitaxially formed on the main surface of the substrate. The silicon carbide layer is provided with a trench having first and second side walls opposite to each other. Each of the first and second side walls includes a channel region. Further, each of the first and second side walls substantially includes one of a {0-33-8} plane and a {01-1-4} plane in the case of the hexagonal system and substantially includes a {100} plane in the case of the cubic system.2013-03-14
20130062630OVERLAY CIRCUIT STRUCTURE FOR INTERCONNECTING LIGHT EMITTING SEMICONDUCTORS - A system and method for packaging light emitting semiconductors (LESs) is disclosed. An LES device is provided that includes a heatsink and an array of LES chips mounted on the heatsink and electrically connected thereto, with each LES chip comprising connection pads and a light emitting area configured to emit light therefrom responsive to a received electrical power. The LES device also includes a flexible interconnect structure positioned on and electrically connected to each LES chip to provide for controlLES operation of the array of LES chips, with the flexible interconnect structure further including a flexible dielectric film configured to conform to a shape of the heatsink and a metal interconnect structure formed on the flexible dielectric film and that extends through vias formed in the flexible dielectric film so as to be electrically connected to the connection pads of the LES chips.2013-03-14
20130062631LIGHT EMITTING STRUCTURE, LIGHT EMITTING MODULE, AND LIGHT EMITTING DEVICE - A light emitting module includes a carrier unit, a substrate unit, and a light emitting unit. The carrier unit includes at least one carrier body, and the carrier body has a mounting portion. The substrate unit includes at least one bendable substrate. The bendable substrate includes a plurality of substrate portions and a plurality of bending portions, the substrate portions are disposed on the mounting portion of the carrier body, and each bending portion is disposed between every two corresponding substrate portions. The light emitting unit includes a plurality of light emitting groups respectively disposed on the substrate portions, and each light emitting group includes at least one light emitting element electrically connected to each corresponding substrate portion. Because the substrate portions can be disposed on different planes after bending the substrate portions, thus light sources respectively generated by the light emitting elements can be projected toward different directions.2013-03-14
20130062632LIGHT EMITTING DEVICE PACKAGE AND LIGHTING SYSTEM INCLUDING THE SAME - Disclosed are a light emitting device package and a lighting system in which the light emitting device package includes a first cavity in a first region of the body, a second cavity in a second region of the body, first and second lead frames spaced apart from each other in the first cavity, a third lead frame spaced apart from the second lead frame in the second cavity, a first light emitting device on the first and second lead frames in the first cavity, a second light emitting device on the second and third lead frames in the second cavity, and a molding member in the first and second cavities.2013-03-14
20130062633LED Array Having Embedded LED and Method Therefor - A light emitting array comprises a submount having a top surface and a bottom surface, and at least one LED at least partially embedded within the submount. The top surface of the submount is in contact with at least a side surface of the at least one LED. The submount may include one or more parallel layers. An optical layer may be covering the at least one LED in such a way that light emitted from the at least one LED passes through the optical layer.2013-03-14
20130062634SOLID STATE LIGHT SOURCE MODULE AND ARRAY THEREOF - A solid state light source array including a transparent substrate and N rows of solid state light emitting element series is provided. Each row of the solid state light emitting element series includes M solid state light emitting elements connected in series, wherein N, M are integrals and N≧1, M≧2. Each of the solid state emitting elements includes a first type electrode pad and a second type electrode pad. The first and the M2013-03-14
20130062635DISPLAY AND ELECTRONIC UNIT - A display includes: a first region including first pixels configured of a single color; a second region including second pixels configured of a plurality of colors different from the single color, the second pixels having an organic layer including a common light emitting layer; and a dividing wall separating the first region from the second region.2013-03-14
20130062636LED DEVICE HAVING TWO LED DIES SEPARATED BY A DAM - An LED device comprises a substrate, a circuit, two LED dies, a dam and a reflector. The dam divides the substrate into a first area and a second area, wherein one of the two LED dies is disposed on the first area and the other is disposed on the second area. The dam insulates radiant lights emitted from the two LED dies, whereby interference between the radiant lights can be prevented. Four separate electrodes are provided on the substrate, wherein one LED die is connected to two electrodes and the other LED die is electrically connected to the other two electrodes.2013-03-14
20130062637APPARATUS, METHOD TO ENHANCE COLOR CONTRAST IN PHOSPHOR-BASED SOLID STATE LIGHTS - The efficiency and color contrast of a lighting device may be improved by using wavelength shifting material, such as a phosphor, to absorb less desired wavelengths and transmit more desired wavelengths. A double-notch reflective filter may pass desired wavelengths such as red and green, while returning or reflecting less desired wavelengths (blue and yellow) away from an optical exit back toward wavelength shifting material and re-emitted as light of more desirable wavelengths.2013-03-14
20130062638SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device has a semiconductor laminate including first and second conductivity type semiconductor layers respectively providing first and second main surfaces and an active layer. The semiconductor laminate is divided into first and second regions. At least one contact hole is formed to pass through the active layer from the second main surface of the first region. A first electrode is formed on the second main surface to be connected to the first conductivity type semiconductor layer of the first region and the second conductivity type semiconductor layer of the second region. A second electrode is formed on the second main surface of the first region to be connected to the second conductivity type semiconductor layer of the first region and the first conductivity type semiconductor layer of the second region.2013-03-14
20130062639METHOD FOR FABRICATING LIGHT EMITTING DIODE (LED) DEVICES HAVING OUTPUT WITH SELECTED CHARACTERISTICS - A method for fabricating a light emitting diode (LED) device includes the steps of forming (or providing) a plurality of LED dice, forming a plurality of wavelength conversions layers, and then evaluating at least one electromagnetic radiation emission characteristic of each LED die and at least one color characteristic of each wavelength conversion layer. The method also includes the steps of comparing the evaluated characteristic of each LED die and the evaluated characteristic of each wavelength conversion layer to a database, selecting a selected LED die and a selected wavelength conversion layer based on the evaluating and comparing steps, and then attaching the selected wavelength conversion layer to the selected LED die.2013-03-14
20130062640LIGHT EMITTING DIODE (LED) PACKAGE HAVING WAVELENGTH CONVERSION MEMBER AND WAFER LEVEL FABRICATION METHOD - A light emitting diode (LED) package includes a substrate and a light emitting diode (LED) die on the substrate configured to emit electromagnetic radiation in a first spectral region. The (LED) package also includes a dielectric layer on the (LED) die and a wavelength conversion member on the dielectric layer configured to convert the electromagnetic radiation in the first spectral region to electromagnetic radiation in a second spectral region. The (LED) package also includes an interconnect comprising a conductive trace on the wavelength conversion member and on the dielectric layer in electrical contact with a die contact on the (LED) die and with a conductor on the substrate, and a transparent dome configured as a lens encapsulating the (LED) die.2013-03-14
20130062641LED LAMP - A LED lamp is disclosed which has a plurality of light unit, each of the light unit has at least one flat metal lead for heat dissipation and the lower part of the metal lead is mounted on a heat sink for a further heat dissipation.2013-03-14
20130062642LED PACKAGE DEVICE - An LED package device comprises a substrate, a first electrode, a second electrode, a reflector, an encapsulation layer and an LED die. The substrate includes a top surface and a bottom surface opposite to the top surface, wherein the first and the second electrodes are located on the top surface of the substrate. A sum of the areas of the first and the second electrodes on the top surface is smaller than ¼-⅔ the area of the top surface. Therefore, an increased contacting area between the reflector and the substrate is formed to enhance the tightness of the LED package device.2013-03-14
20130062643LIGHT EMITTING DEVICE - According to one embodiment, a light emitting device includes: a first lead, a recess being provided in the first lead; a light emitting element fixed to a bottom surface of the recess via a conductive paste at a back surface on an opposite side to a light emitting surface of the light emitting element; and a second lead disposed away from the first lead and electrically connected to the light emitting element via a metal wire. An area of the bottom surface is larger than an area of the light emitting surface. The paste is put in with a thickness sufficient to cover at least part of a side surface in contact with the light emitting surface and the back surface of the light emitting element and at least part of a wall surface of the recess in the recess.2013-03-14
20130062644SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a method for manufacturing a semiconductor light emitting device includes: preparing a metal plate including first and second frames, the first frames being disposed alternately with the second frames to be apart from the second frames, a light emitting element being affixed to each of the first frames and connected via a metal wire to an adjacent second frame; forming a first resin on a first major surface of the metal plate to cover the first and second frames, and the light emitting elements; making a trench from a second major surface side; and filling a second resin into an interior of the trench from the first major surface side. The method further includes forming the resin packages by dividing the second resin along the trench, an outer edge of the first resin being covered with the second resin.2013-03-14
20130062645LIGHT EMITTING DEVICE - Embodiments provide a light emitting device comprising a support member, a light emitting structure disposed on the support member, the light emitting structure comprising a first semiconductor layer comprises a first and second regions, a second semiconductor layer disposed on the second region, and an active layer between the first and second semiconductor layers, a first electrode disposed on the first semiconductor layer and a second electrode disposed on the second semiconductor layer, wherein the support member includes metal ions to convert light of a first wavelength emitted from the active layer into light of a second wavelength different from the first wavelength.2013-03-14
20130062646SYSTEM AND METHOD FOR FABRICATING LIGHT EMITTING DIODE (LED) DICE WITH WAVELENTH CONVERSION LAYERS - A system for fabricating light emitting diode (LED) dice includes a wavelength conversion layer contained on a substrate on an adhesive layer configured to have reduced adhesiveness upon exposure to a physical energy, such as electromagnetic radiation or heat. The system also includes a curing apparatus configured to reduce the adhesiveness of the adhesive layer to facilitate removal of the wavelength conversion layer from the substrate, and an attachment apparatus configured to remove the wavelength conversion layer from the substrate and to attach the wavelength conversion layer to a light emitting diode (LED) die. A method for fabricating light emitting diode (LED) dice includes the steps of exposing the adhesive layer on the substrate to the physical energy to reduce the adhesiveness of the adhesive layer, removing the wavelength conversion layer from the substrate, and attaching the wavelength conversion layer to the light emitting diode (LED) die.2013-03-14
20130062647LIGHT EMITTING DEVICES INCLUDING WAVELENGTH CONVERTING MATERIAL - Light-emitting devices and associated methods are provided. The light emitting devices can have a wavelength converting material-coated emission surface.2013-03-14
20130062648LIGHT-EMITTING DEVICE AND LIGHT-EMITTING DEVICE MANUFACTURING METHOD - A light-emitting device includes: a light-emitting element that generates ultraviolet light; a first wavelength conversion layer placed on the light-emitting element, the first wavelength conversion layer including a plurality of types of phosphor particles dispersed in a transparent resin, each of the plurality of types of phosphor particles converting the ultraviolet light into light having a longer wavelength; and a second wavelength conversion layer placed on at least a part of the first wavelength conversion layer, the second wavelength conversion layer including at least any of the plurality types of phosphor particles dispersed in a transparent resin.2013-03-14
20130062649LIGHT-EMITTING DEVICE - Disclosed is a light-emitting device having a wide luminous-intensity distribution characteristic with a simple structure. The light-emitting device includes a resin package in which an LED chip, a first inner portion of a first lead terminal, and a second inner portion of a second lead terminal are accommodated and which has a second recess portion formed so that a portion including a first recess portion of the first inner portion of the first lead terminal as well as a portion of the second inner portion of the second lead terminal are exposed to a bottom portion of the second recess portion, and a resin portion containing phosphors and filled in the first recess portion of the first lead terminal and in the second recess portion of the resin package. A photoreflective filler is contained in a region opposed to the LED chip of the resin portion including the phosphors.2013-03-14
20130062650LED PACKAGE AND MOLD OF MANUFACTURING THE SAME - The present disclosure provides a light emitting diode (LED) package, which includes a first substrate with electrodes disposed on a top thereof and a second substrate with an LED chip disposed on a top thereof. The LED chip is connected with the electrodes via wires. A first package layer is disposed on the top of the first substrate to cover the wires and electrodes. A fluorescent layer is disposed on the top of the second substrate to cover the LED chip. The present disclosure also provides a mold and a method of manufacturing the LED package.2013-03-14
20130062651CARRIER FOR A LIGHT EMITTING DEVICE - A semiconductor light emitting device is mounted on a support substrate. The support substrate is disposed in an opening in a carrier. In some embodiments, the support substrate is a ceramic tile and the carrier is a low cost material with a lateral extent large enough to support a lens molded over or attached to the carrier.2013-03-14
20130062652LED DEVICES HAVING LENSES AND METHODS OF MAKING SAME - Disclosed herein are LED devices having lenses and methods of making the devices. The LED devices are made using an optical layer comprising a plurality of lens features. The optical layer is disposed relative to the LED die such that at least one LED die is optically coupled to at least one lens feature. A lens can then be made from the lens feature and excess optical layer removed to provide the device.2013-03-14
20130062653METHODS FOR PACKAGING LIGHT EMITTING DEVICES AND RELATED MICROELECTRONIC DEVICES - A method for forming a light emitting device includes providing a light emitting diode (LED) configured to emit light of a first color and providing a plurality of semi-spherical lenses made of a silicone material that contains no phosphor material. Each of the lenses has a layer of phosphor material attached thereto. The method also includes testing the plurality of lenses to select a subset of lenses that converts light of the first color to light of a second color. The method further includes forming the light emitting device using the LED, one of the selected subset of lenses, and a heat conductive substrate. In an embodiment, after the testing of the plurality of lenses, one of the selected subset of lenses is disposed overlying the LED. In another embodiment, the testing of the plurality of lenses is conducted with a light source other than the LED.2013-03-14
20130062654LIGHT EXTRACTION SHEET, ORGANIC ELECTROLUMINESCENCE ELEMENT AND ILLUMINATION DEVICE - Disclosed is a novel light extraction sheet which not only improves light extraction efficiency but suppresses color change with the angle of observation, an organic EL dement employing this light extraction sheet, and art illumination device employing the element. The light extraction sheet is featured in that it comprises a transparent resin film and provided thereon, a light scatter layer containing a binder resin and light scattering particles with an average particle size of front 0.2 to 1.0 μm dispersed in the binder resin and a concavo-convex layer containing a binder resin and spherical particles with an. average particle size of from 3 to 10 μm.2013-03-14
20130062655HIGH THERMAL CONDUCTIVITY AND LOW DEGRADATION DIE ATTACH WITH DUAL ADHESIVE - A package for a light source, a semiconductor device, and methods of manufacturing the same are disclosed. In particular, a Light Emitting Diode (LED) dice is attached to a bonding pad of the light source package by two discrete types of different adhesives. One of the adhesives may be curable under exposure to Ultraviolet (UV) light and the other adhesive may be cured under thermal radiation, but is stable when exposed to UV light.2013-03-14
20130062656THERMALLY ENHANCED OPTICAL PACKAGE - A thermally enhanced optical package includes a heat conducting module configured to dissipate the heat generated from an optical device, a plurality of insulating pads disposed on a heat conducting substrate, and at least one electrical conducting pad disposed on the insulating pads. The heat conducting module includes a heat conducting substrate and a plurality of heat conducting pillars, and the optical device is a light emitting diode chip or a light emitting diode die in the present embodiments. The thermally enhanced optical package is further characterized in a simple manufacturing procedure, including substantially an electrical or electroless plating process, a metal foil laminating process, a thick film printing process, and a patterning and etching process.2013-03-14
20130062657LIGHT EMITTING DIODE STRUCTURE AND MANUFACTURING METHOD THEREOF - A light-emitting diode structure is disclosed. A substrate has a first semiconductor layer, a light-emitting layer and a second semiconductor layer formed thereon. The first and second semiconductor layers are of opposite conductivity types. A first contact electrode is disposed between the first semiconductor layer and the substrate, and has a protruding portion extending into the second semiconductor layer. A barrier layer is conformally formed on the first contact electrode and exposes a top surface of the protruding portion. A current blocking member is disposed on the barrier layer and around at least a sidewall of the protruding portion. A second contact electrode is disposed between the first semiconductor layer and the first contact electrode, and in direct contact with the first semiconductor layer, wherein the second contact electrode is electrically insulated from the first contact electrode by the barrier layer.2013-03-14
20130062658LIGHT-EMITTING DEVICE AND MANUFACTURING METHOD - A light-emitting device comprises a substrate, a light-emitting layer, a wire formed on the substrate and supplying electric power to the light-emitting layer; a transition metal oxide layer formed on the substrate and over the wire; a bank formed on the transition metal oxide layer defining an opening over the wire; an interception layer formed on a portion of the transition metal oxide layer that is exposed through the opening and intercepting migrating fluorine; an organic layer formed on the interception layer and doped with an alkali metal; and an electrode formed on the organic layer, electrically connected to the wire via the organic layer, the interception layer, and the transition metal oxide layer, and providing the electric power supplied by the wire to the organic layer.2013-03-14
20130062659Organic Light Emitting Diode Display - An organic light emitting diode display includes: a base film made of plastic; a thin film transistor and an organic light emitting diode formed on the base film; and a carbon nanotube thin film disposed among the base film, the thin film transistor, and the organic light emitting diode.2013-03-14
20130062660GROUP 13 NITRIDE CRYSTAL AND SUBSTRATE THEREOF - A group 13 nitride crystal has a hexagonal crystal structure and at least contains nitrogen atom and at least a kind of metal atoms selected from a group consisting of B, Al, Ga, In, and Tl. The group 13 nitride crystal includes a first region located at an inner side of a cross section intersecting a c-axis, and a second region surrounding at least a part of an outer periphery of the first region, having a thickness larger than a maximum diameter of the first region, and having a carrier density higher than that of the first region.2013-03-14
20130062661INTEGRATED CIRCUIT DEVICE - An integrated circuit device includes a semiconductor substrate and a first transistor and a second transistor constructed in the semiconductor substrate. The first transistor has a first operating voltage higher than a second operating voltage of a second transistor. The first transistor includes a first drain structure, a first source structure, an isolation structure and a first gate structure. The first source structure includes a high voltage first-polarity well region, a first-polarity body region, a heavily doped first-polarity region, a second-polarity grade region and a heavily doped second-polarity region. The heavily doped second-polarity region is surrounded by the second-polarity grade region. The second-polarity grade region is surrounded by the first-polarity body region. The second transistor includes a second drain structure, a second source structure, a second gate structure and a first-polarity drift region. The first-polarity drift region and the first-polarity body region have the same dopant concentration.2013-03-14