10th week of 2010 patent applcation highlights part 19 |
Patent application number | Title | Published |
20100060312 | Testing Circuit Split Between Tiers of Through Silicon Stacking Chips - A method of testing a die having a non-testable circuit, where the non-testable circuit is logically incomplete and forms part of a logically complete multiple tier circuit. The method includes reconfiguring a tier-to-tier input point or tier-to-tier output point associated with a primary path of the non-testable circuit to create a logically complete secondary path for the tier-to-tier point such that the non-testable circuit can be tested. Testable dies and methods of preparing such dies are also provided. | 2010-03-11 |
20100060313 | Semiconductor integrated circuit device and test terminal arrangement method - A semiconductor integrated circuit device includes a column of first logic circuit cells arranged along a first side of a chip and a column of second logic circuit cells arranged along a second side orthogonal to the first side. At a corner part where the first side crosses the second side, a first test logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the first logic circuit cells and a second logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the second logic circuit cells. The first and the second test logic circuit cells are arranged so a that planar shapes thereof are symmetrical (mirror symmetrical) to each other with respect to a virtual line intermediate between the oblique sides arranged opposite to each other. | 2010-03-11 |
20100060314 | TERMINATION RESISTOR SCHEME - An example embodiment of the present invention relates to a method and corresponding apparatus that terminates circuit connectivity in a bus by determining location of an instrument on the bus, and based on coupling a terminating resistance to the instrument. The example embodiment may couple a terminating resistance with the instrument placed at the end of a bus by employing at least one male-to-male connector arranged to establish a connection between the female receptacles of the terminating resistance and the bus. In order to determine a state of termination of circuit connectivity in a bus, an example embodiment of the present invention may connect a transceiver to a terminating resistance and determine a state of termination of circuit connectivity in the bus as a function of sensing receive activity in the transceiver. | 2010-03-11 |
20100060315 | HIGH CAPACITIVE LOAD AND NOISE TOLERANT SYSTEM AND METHOD FOR CONTROLLING THE DRIVE STRENGTH OF OUTPUT DRIVERS IN INTEGRATED CIRCUIT DEVICES - An output driver calibration circuit includes a programmable drive strength output pullup driver including a strongest transistor and a number of other transistors, a programmable drive strength output pulldown driver including a strongest transistor and a number of other transistors, and a calibration circuit for generating a number of control signals for controlling the transistors in the output pullup driver and the transistors in the output pulldown driver, wherein the control signals are generated simultaneously, except for two the strongest driver transistors. | 2010-03-11 |
20100060316 | CALIBRATION CIRCUIT, ON DIE TERMINATION DEVICE AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME - A calibration circuit includes a gain control device configured to adjust a reference voltage to a predetermined level according to a variable gain; and a calibration device configured to update a calibration code by comparing a voltage generated by resistors and the reference voltage adjusted to the predetermined level by the gain control device, wherein the resistors are individually controlled to be turned on by the calibration code. | 2010-03-11 |
20100060317 | DATA OUTPUT DEVICE AND SEMICONDUCTOR MEMORY APPARATUS INCLUDING THE SAME - A data output device includes a pre-driver unit configured to control a driving force according to an impedance control signal and to drive output data using the driving force. The data output device includes a main-driver unit configured to control an impedance according to pull-up and pull-down resistance control codes having values that correspond to the impedance control signal provided to the pre-driver unit and to drive an output of the pre-driver unit by utilizing the controlled impedance. | 2010-03-11 |
20100060318 | Printed circuit board having a termination of a T-shaped signal line - Printed circuit board having a termination of a T-shaped signal line having at least two line ends, one line end being terminated using a terminating resistor against a supply voltage, and the other line end being terminated against the reference potential of the supply voltage. | 2010-03-11 |
20100060319 | LOW LEAKAGE AND DATA RETENTION CIRCUITRY - An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry. | 2010-03-11 |
20100060320 | SIGNAL DRIVER CIRCUIT HAVING AN ADJUSTABLE OUTPUT VOLTAGE - Processor-based systems, memories, signal driver circuits, and methods of generating an output signal are disclosed. One such signal driver circuit includes a signal driver configured to generate an output signal at an output node in response to an input signal and a transistor coupled to the signal driver that is configured to couple and decouple the output node and the voltage supply according to a control signal. A voltage comparator circuit coupled to the output node and the transistor is configured to generate the control signal to control coupling and decoupling of the output node and the voltage supply through the transistor based on a voltage of the output signal relative to the reference voltage. | 2010-03-11 |
20100060321 | Clock control of state storage circuitry - State storage circuitry is described comprising a master-slave latch having tristate inverter circuitry | 2010-03-11 |
20100060322 | ADIABATIC CMOS DESIGN - An integrated circuit comprising a plurality of CMOS modules ( | 2010-03-11 |
20100060323 | TEST CIRCUIT AND TEST METHOD - A test circuit with which the cost for checking the duty ratio of a clock signal is restrained. A sampling timing generating circuit, to which the measurement-target clock signal MCK is input, outputs first and second sampling trigger signals to A sample-and-hold circuit | 2010-03-11 |
20100060324 | VOLTAGE/CURRENT CONVERSION CIRCUIT - Provided is voltage/current conversion circuit including: first and second capacitors; first and second resistors each connected to input terminal; first and second current sources; third and fourth resistors connected to current sources; differential amplifier for controlling the current sources; control unit for performing control, in first state, the input terminal is connected to the first and second capacitors; one input of the differential amplifier is connected to the first resistor and output of the first current source; the other input of the differential amplifier is connected to the second resistor and output of the second current source, and in second state, the second capacitor is connected between the output of the first current source and the one input of the differential amplifier, the first capacitor is connected between the output of the second current source and the other input of the differential amplifier. | 2010-03-11 |
20100060325 | Driver circuit - A driver circuit includes a main driver which receives an input signal and outputs a first signal corresponding to the input signal, a sub driver which receives the input signal and outputs a non-inverted signal and an inverted signal corresponding to the input signal, a differentiating circuit including resistors and a variable capacity condenser, which outputs signals by differentiating the non-inverted signal and the inverted signal, respectively, and an addition unit which outputs a high frequency emphasized signal given by adding the output signal of the main driver and the signal given by differentiating the non-inverted signal, or a low frequency emphasized signal given by adding the output signal of the main driver and the signal given by differentiating the inverted signal. | 2010-03-11 |
20100060326 | CONTROL OF POWER SEMICONDUCTOR DEVICES - This invention relates to a control method and a circuit for MOS-gated power semiconductor switching devices such as IGBTs or MOSFETs, which allows control and optimisition of the current and voltage commutation of a power semiconductor switching device and freewheel diode pair in the basic half-bridge circuit found in a wide range of equipment. The method comprises the stages of: applying, upon receipt of a switch-on command signal, a voltage function to the control terminal or the gate of the power semiconductor switching device that allows a regulated current rise in the device whilst maintaining the voltage across the device falling at a predetermined rate; and at the instant when the voltage across the diode begins to change from the on-state towards the off-state level, applying a voltage function to the control terminal or the gate of the power semiconductor switching device to enable the voltage falling across the power semiconductor switching device to track the voltage falling across the diode in order to ensure a fast and controlled completion of the switching operation without diode reverse voltage overshoot. The gate drive automatically modifies the voltage function according to the working condition thereby accounting for the actual operating conditions. | 2010-03-11 |
20100060327 | HIGH VOLTAGE HIGH SIDE TRANSISTOR DRIVER - A transistor driver includes a sender module configured to generate a power input signal. A converter module includes a transformer including a first side and a second side. The first side of the transformer is configured to receive the power input signal. A rectifier is connected to the second side of the transformer. The converter module is configured to generate an output signal at an output of the rectifier. A first receiver module is connected to each of the second side of the transformer and the output of the rectifier. The first receiver module is configured to transition a first transistor between an ON state and an OFF state based on a first signal received from the second side of the transformer. | 2010-03-11 |
20100060328 | REDUCTION OF SEMICONDUCTOR STRESSES - A method of reducing thermal stresses of a semiconductor component in a frequency converter, an arrangement in a frequency converter, and a frequency converter, wherein the semiconductor component is attached to a cooling element for cooling the semiconductor component and one or more resistive elements are attached to the cooling element. In the method, the cooling element is heated by the one or more resistive elements attached thereto by supplying current from the frequency converter through the one or more resistive elements for obtaining an elevated lowest temperature for the semiconductor component and thereby reducing the amount of temperature change between the highest and the lowest temperatures in the semiconductor component during use of the frequency converter. | 2010-03-11 |
20100060329 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a clock input unit configured to receive a system clock and a data clock externally; a phase dividing unit configured to generate a plurality of multi-system clocks in response to the system clock, wherein each of the multi-system clocks has an individual phase difference; a phase detecting unit configured to detect phase differences between the plurality of multi-system clock and the data clock and to generating generate a training information signal in response to the detection result; and a signal transmitting unit configured to transmit the training information signal. | 2010-03-11 |
20100060330 | POWER ON RESET GENERATING CIRCUIT AND METHOD THEREOF - The invention mainly relates to a power on reset signal generating circuit and method thereof wherein said reset signal remains as a constant being independent of rising or descending power or repeated switching. The power on reset signal circuit can be implemented by a conventional RC power on reset circuit together with a coupled N-type transistor switch to charge or discharge the capacitor inside the conventional RC power on reset circuit. | 2010-03-11 |
20100060331 | POWER-ON-RESET CIRCUITRY - Power-on-reset circuitry is provided for integrated circuits such as programmable logic device integrated circuits. The power-on-reset circuitry may use comparator-based trip point voltage detectors to monitor power supply voltages. The trip point detectors may use circuitry to produce trip point voltages from a bandgap reference voltage. Controller logic may process signals from the trip point detectors to produce a corresponding power-on-reset signal. The power-on-reset circuitry may contain a noise filter that suppresses noise from power supply voltage spikes. Normal operation of the power-on-reset circuitry may be blocked during testing. The power-on-reset circuitry may be disabled when the bandgap reference voltage has not reached a desired level. The power-on-reset circuitry may be sensitive or insensitive to the power-up sequence used by the power supply signals. Brownout detection blocking circuitry may be provided to prevent the output from one of the trip point detectors from influencing the power-on-reset circuitry. | 2010-03-11 |
20100060332 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit comprises a PLL (Phase Locked Loop (PLL) circuit configured to generate a control voltage in response to a frequency of a reference clock signal, and to generate a PLL clock signal having a frequency that corresponds to a level of the control voltage, and a voltage controlled oscillator configured to oscillate an output clock signal in response to the PLL clock signal, and to allow the PLL clock signal to have a frequency that corresponds to a level of the control voltage. | 2010-03-11 |
20100060333 | DIGITAL CHARGE PUMP PLL ARCHITECTURE - A digital phase lock loop (PLL) circuit having a digital charge pump circuit for providing digital signals corresponding to a difference in phase between an internal clock corresponding to a voltage controlled oscillator, and a reference clock. These digital signals are processed by a digital processing circuit for providing digital control signals. Some of the digital control signals are converted into an analog control signal to provide fine control of the voltage controlled oscillator, while the remaining digital control signals provide coarse control of the voltage controlled oscillator. | 2010-03-11 |
20100060334 | DLL CIRCUIT AND CONTROL METHOD THEREFOR - A DLL includes a first variable delay circuit that variably delays a first transition of an external signal, a second variable delay circuit that variably delays a second transition of the external signal, a synthesis circuit that synthesizes output signals of the first variable delay circuit and the second variable delay circuit, a duty change detection circuit that changes and detects the duty of an output signal of the synthesis circuit, and delay control circuits that vary the delay of the first variable delay circuit or the second variable delay circuit in accordance with the result of duty detection by the duty change detection circuit. | 2010-03-11 |
20100060335 | Seamless Coarse and Fine Delay Structure for High Performance DLL - A clock synchronization system and method avoids output clock jitter at high frequencies and also achieves a smooth phase transition at the boundary of the coarse and fine delays. The system may use a single coarse delay line configured to generate two intermediate clocks from the input reference clock and having a fixed phase difference therebetween. The coarse delay line may have a hierarchical or a non-hierarchical structure. A phase mixer receives these two intermediate clocks and generates the final output clock having a phase between the phases of the intermediate clocks. The coarse shifting in the delay line at high clock frequencies does not affect the phase relationship between the intermediate clocks fed into the phase mixer. The output clock from the phase mixer is time synchronized with the input reference clock and does not exhibit any jitter or noise even at high clock frequency inputs. Because of the rules governing abstracts, this abstract should not be used to construe the claims. | 2010-03-11 |
20100060336 | SEMICONDUCTOR CIRCUIT - A first signal processor performs predetermined signal processing on an input signal to provide a change to at least one of the characteristic values thereof. A second signal processor is provided in the subsequent stage of the first signal processor and performs predetermined signal processing on an output signal from the first signal processor to provide a change to a characteristic value thereof. An amount of change provided to the characteristic value of the signal by the second signal processor is dependent on a power supply voltage. An amount of change provided to the characteristic value of the signal by the first signal processor is configured to be adjustable. A control circuit monitors a power supply voltage supplied to the second signal processor and adjusts in accordance with the power supply voltage the amount of change provided to the characteristic value of the signal by the first signal processor. | 2010-03-11 |
20100060337 | POWER SUPPLY INSENSITIVE VOLTAGE LEVEL TRANSLATOR - A circuit is described that when the power supply to circuits that control a pass transistor is at zero volts, the pass transistor configured as a voltage level translator remains off regardless of the voltages and changes in voltages at the ports connected to the pass transistor. Cross coupled transistors provide a mechanism where the higher of the port voltages is available to power circuitry that maintains the control input of the pass transistor in the off condition. The voltages at the ports may rise and fall relative to each other, but the control input of the pass transistor will keep the pass transistor off. | 2010-03-11 |
20100060338 | LEVEL SHIFTER WITH REDUCED LEAKAGE - The present invention relates generally to the level shifter circuits and more specifically to improved level shifter circuits providing for reduced leakage current and reduced power consumption. In one or more implementations, a method, apparatus and computer program product for level shifting input voltages by minimizing current leakage of a circuit coupled with an improved level shifting circuit is provided for. In one implementation the method includes providing a low voltage domain of the circuit, and providing for turning off the transistor if the low voltage domain of the circuit is not stable, and turning on the transistor if the low voltage domain of the circuit is stable. | 2010-03-11 |
20100060339 | VOLTAGE LEVEL SHIFTER WITH VOLTAGE BOOST MECHANISM - A voltage level shifter with voltage boost mechanism is disclosed for interfacing two circuit units having different operating voltage swings. The voltage level shifter includes a first inverter, a second inverter, a first capacitor, a second capacitor and a plurality of transistors. The input and power ends of the first inverter function to receive an input voltage and a first voltage respectively. The output end of the second inverter functions to provide an output voltage. When the input voltage is a ground voltage, the output voltage is also a ground voltage; meanwhile, the switches are controlled for charging the first and second capacitors to a second voltage and a third voltage respectively. When the input voltage is the first voltage, a sum voltage of the first, second, and third voltages is furnished to the power end of the second inverter for providing the sum voltage as the output voltage. | 2010-03-11 |
20100060340 | Switching System with Reduced EMI - Various apparatuses, methods and systems for switched mode electronic circuits with reduced EMI are disclosed herein. For example, some embodiments of the present invention provide apparatuses including a power supply, an output, and a composite switch connected between the power supply and the output. The composite switch includes a plurality of transistors connected in parallel, a switch closing delay line having a plurality of switch closing outputs each connected to a control input of one of the plurality of transistors, and a switch opening delay line having a plurality of switch opening outputs each connected to one of the plurality of switch closing outputs. The switch closing delay line and switch opening delay line are connected in an order that opens the plurality of transistors in a staggered order in time and closes the plurality of transistors in a reverse staggered order in time. | 2010-03-11 |
20100060341 | Ultra Low Current Consumption Comparator for Thermal Shutdown - An embodiment of the invention relates to a temperature-sensing device and a related method. In an embodiment, the device senses a temperature with a first sensing circuit configured to assert a signal when temperature is above a first temperature threshold level, and a second sensing circuit configured to substantially disable a bias current that powers the first sensing circuit when a sensed level of temperature is below a second, lower temperature threshold level. Accordingly, the device is able to draw substantially reduced current from a power source when the sensed temperature level is less than the second threshold level. Other physical parameters such as strain or pressure may also be sensed using the same technique. | 2010-03-11 |
20100060342 | METHOD FOR POWER REDUCTION AND A DEVICE HAVING POWER REDUCTION CAPABILITIES - A device that includes: (i) an evaluated circuit; (ii) a leakage current dependent oscillator configured to generate an oscillating signal that has an oscillating frequency that represents a leakage current of the evaluated circuit; (iii) a switching current dependent oscillator configured to generate an oscillating signal that has an oscillating frequency that represents a switching induced current of the evaluated circuit; (iv) a power reduction module that is configured to: (a) compare between an oscillation frequency of the leakage current dependent oscillator and an oscillation frequency of the switching current dependent oscillator, to provide a current comparison result; (b) select a power reduction technique out of a dynamic voltage and frequency scaling technique and a power gating technique in view of the current comparison result; and (c) apply the selected power reduction technique. | 2010-03-11 |
20100060343 | CONTROL CIRCUIT AND CONTROL METHOD FOR CHARGE PUMP CIRCUIT - A charge pump circuit is provided. A voltage/current conversion circuit compares a feedback voltage that corresponds to the output voltage of the charge pump circuit with a predetermined reference voltage, and generates a bias current that corresponds to the difference therebetween. An oscillator oscillates at a frequency that corresponds to the bias current. A buffer is biased by the bias current, and supplies a gate clock to the charge pump circuit based upon a clock signal output from the oscillator, thereby driving the charge pump circuit. | 2010-03-11 |
20100060344 | TRANSITIONING DIGITAL INTEGRATED CIRCUIT FROM STANDBY MODE TO ACTIVE MODE VIA BACKGATE CHARGE TRANSFER - Circuits and methods are provided for facilitating transitioning of a digital circuit from backgate biased standby mode to active mode. The digital circuit includes a semiconductor substrate, multiple n-channel transistors disposed at least partially in one or more p-type wells in the semiconductor substrate, multiple p-channel transistors disposed at least partially in one or more n-type wells in the semiconductor substrate, and a backgate control circuit. The backgate control circuit is electrically coupled to the p-type well(s) and to the n-type well(s) to facilitate transitioning of the multiple n-channel transistors and the multiple p-channel transistors from backgate biased standby mode to active mode by automatically shunting charge from the n-type well(s) to the p-type well(s) until a well voltage threshold is reached indicative of a completed transition of the transistors from backgate biased standby mode to active mode. | 2010-03-11 |
20100060345 | REFERENCE CIRCUIT FOR PROVIDING PRECISION VOLTAGE AND PRECISION CURRENT - A reference circuit for providing a precision voltage and a precision current includes a bandgap voltage reference circuit, a positive temperature coefficient calibrating circuit, a threshold voltage superposing circuit and precision current generator interconnected in cascade. From the bandgap voltage reference circuit, a bandgap voltage is outputted as the precision voltage, and a PTAT current is outputted to the positive temperature coefficient calibrating circuit along with the bandgap voltage for generating a PTAT voltage. In response to the PTAT voltage from the positive temperature coefficient calibrating circuit, the threshold voltage superposing circuit generates a first voltage which is equal to the PTAT voltage plus a threshold voltage. Then the precision current generator outputs a reference current as the precision current in response to the first voltage. | 2010-03-11 |
20100060346 | REFERENCE VOLTAGE GENERATION CIRCUIT - According to an aspect of the present invention, there is provided a reference voltage generation circuit including: a first transistor having a first gate, a first source and a first drain; a second transistor having a second gate connected to the first gate, a second source connected to the first source and a second drain; a first diode connected between a ground and a V− node; a first resistor connected between the V− node and the first drain; a second diode and a second resistor connected between the ground and a V+ node; a third resistor connected between the V+ node and the first drain; an operational amplifier including input ports connected to the V+ node and the V− node and an output port connected to the first gate and the second gate; and a fourth resistor connected between the ground and the second drain. | 2010-03-11 |
20100060347 | BIAS GENERATOR PROVIDING FOR LOW POWER, SELF-BIASED DELAY ELEMENT AND DELAY LINE - An improved bias generator incorporates a reference voltage and/or a reference current into the generation of bias voltages. In some cases, the output of a biased delay element has a constant voltage swing. A delay line of such constant output voltage swing delay elements may be shown to provide reduced power consumption compared to some known self-biased delay lines. Furthermore, in other cases, providing the reference current to a novel bias generator allows a delay line of delay elements biased by such a novel bias generator to show reduced sensitivity to operating conditions, reduced sensitivity to variation in process parameters and improved signal quality, thereby providing more robust operation. | 2010-03-11 |
20100060348 | BANDWIDTH-ADJUSTABLE FILTER - A bandwidth-adjustable filter includes an operational amplifier, a first resistor, a first capacitor and a first resistor ladder circuit. The operational amplifier has a negative input terminal and a positive input terminal The first resistor is coupled to one of the input terminals of the operational amplifier. The first capacitor is coupled to the first resistor. The first resistor ladder circuit is coupled in parallel to the first resistor for changing the resistance of the first resistor so as to adjust the bandwidth of the filter. | 2010-03-11 |
20100060349 | METHOD OF FORMING AN INTEGRATED SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR - In one embodiment, a plurality of ESD devices are used to form an integrated semiconductor filter circuit. Additional diodes are formed in parallel with the ESD structures in order to increase the input capacitance. | 2010-03-11 |
20100060350 | Adaptive Filtering System for Patient Signal Monitoring - A system provides a high quality, and intuitive multi-band filter that adapts when noise frequencies or noise amplitudes change. A system for adaptively filtering patient monitoring signals, comprises a filter controller for adaptively determining the number of, and individual filter bandwidth of, multiple adaptive signal filters to be used in filtering multiple bandwidths within an encompassing signal filtering bandwidth. The filter controller does this in response to, (a) noise data indicating noise source frequencies and (b) configuration data determining medical signal or noise source characteristics, to provide programming data for programming a plurality of adaptive signal filters. The system includes multiple adaptive signal filters individually having a filtering bandwidth and filtering characteristic programmable in response to received programming data. A noise detector automatically identifies a noise component in a received patient monitoring signal and generates the noise data. | 2010-03-11 |
20100060351 | Chip Card Having an Adjustable Demodulation Unit - The present invention shows a contactless chip card comprising a controllable demodulation unit for demodulating an amplitude-modulated carrier signal, a measuring unit for determining a degree of modulation of the modulated carrier signal, and a control unit for controlling the demodulation unit on the basis of the determined degree of modulation of the carrier signal. | 2010-03-11 |
20100060352 | Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier - A chopper-stabilized amplifier includes a main signal path having first and second chopping circuits at the inputs and outputs of a transconductance amplifier, and an auto-correction feedback loop. The feedback loop includes a transconductance amplifier connected to amplify the chopped output from the main signal path, a third chopping circuit which chops the amplified output, a filter which filters the chopped output to substantially reduce any offset voltage-induced AC component present in the signal being filtered, and a transconductance amplifier which receives the filtered output and produces an output which is coupled back into the main signal path. When properly arranged, the auto-correction feedback loop operates to suppress transconductance amplifier-related offset voltages and offset voltage-induced ripple that might otherwise be present in the amplifier's output. | 2010-03-11 |
20100060353 | Power amplifier linearization using RF feedback - The power amplifier mainly includes a main amplifier, two splitters, one combiner, one subtracter, two phase shifters, one attenuator and one error amplifier. The splitters, subtracter and combiner are designed in the form of 90-degree or quadrature hybrid couplers. A quadrature hybrid can be implemented with any lumped or transmission-line elements and has an important advantage compared to the in-phase splitter that at equal values of reflection coefficients from loads connected to the in phase and 90° phase shift terminals, the reflection wave is lacking at the main input terminal and, consequently, the input voltage standing wave ratio of a quadrature hybrid does not depend on the equal load mismatch level. | 2010-03-11 |
20100060354 | AMPLIFICATION CIRCUIT - The present invention is aimed at realizing an amplifying circuit whose chip size is prevented from being significantly increased even if the number of compatible frequencies increases, and which has a wide dynamic range when it operates under a low voltage. The amplifying circuit includes a plurality of impedance converting circuits connected to each other by a switching circuit of a first type having a signal cutting-off function, a switching circuit of a second type connected to a path branched from an input side of the switching circuit of the first type, the switching circuit of the second type having a signal cutting-off function, amplifiers connected respectively to an output side of one of the impedance converting circuits in a final stage and to an output side of the switching circuit of the second type, and a control signal generating circuit for controlling connection/disconnection between said switching circuit of the first type and said switching circuit of the second type; wherein either one of the paths is selected to input a signal to one of the amplifiers. | 2010-03-11 |
20100060355 | APPARATUS AND METHOD OF COMPENSATING DISTORTION - A distortion compensating apparatus includes a processing circuit that calculates each of a plurality of series operation coefficient pairs based on a transmission signal and a feedback signal of an output from an amplifying circuit performing power amplification of the transmission signal, executes a series operation process with respect to the transmission signal based on the plurality of the series operation coefficient pairs as a distortion compensation of the transmission signal, and inputs a result of the series operation process to the amplifying circuit performing the power amplification, and a selecting unit that, on the basis of power of the transmission signal, selects the series operation process to be executed corresponding to one of the plurality of series operation coefficient pairs, or selects one of the plurality of series operation coefficient pairs to be used in the series operation process to be executed. | 2010-03-11 |
20100060356 | POWER SERIES PREDISTORTER AND CONTROL METHOD THEREOF - A power series predistorter of the present invention includes a delay path for delaying a signal, a distortion generation path having an N-th order distortion generator and a vector adjuster, a divider for dividing an input signal between the delay path and the distortion generation path, a combiner for combining the output signal of the delay path and the output signal of the distortion generation path, and a controller for controlling the vector adjuster. The controller includes a setting unit, a distortion component measurement unit, a minimum condition calculation unit, and a recording unit. The setting unit specifies the phase or amplitude value of the vector adjuster. The distortion component measurement unit measures the distortion component of a power amplifier. The minimum condition calculation unit obtains a phase or amplitude value that minimizes the distortion component by function approximation, using the magnitude of the distortion components corresponding to three or more phase or amplitude values specified for sampling by the setting unit. | 2010-03-11 |
20100060357 | RF POWER AMPLIFIER SYSTEM WITH IMPEDANCE MODULATION - A power amplifier controller circuit controls an adjustable impedance matching network at the output of a power amplifier to vary its load line to improve the efficiency of the RF PA. The PA controller circuit comprises an amplitude control loop that determines an amplitude correction signal. The amplitude loop is configured to control or correct for distortion from the adjustable matching network based upon the amplitude correction signal. | 2010-03-11 |
20100060358 | Compensating for variations in the response of a power supply - Apparatus includes an equalizer having a signal input, a control input and an output; a controllable power supply having a control input and an output, the input of the controllable power supply being coupled to the output of the equalizer; a power amplifier having a main signal input, a power supply input, and an output, the power supply input being coupled to the output of the controllable power supply; and a controller having first and second inputs and an output, the first input being coupled directly or indirectly to the output of the controllable power supply, the second input being coupled to a node upstream of the equalizer, and the output being coupled to the control input of the equalizer; the equalizer being configured to apply equalisation to an envelope signal received at its input and to provide a resulting equalized envelope signal at its output, the controllable power supply being configured to provide a power signal at its output based on the equalized envelope signal received at its input, the power amplifier being configured to utilize power received at its power supply input to provide on its output a modulated transmission signal representative of a signal received at the main signal input, and the controller being configured to compare input signals received at its first input to signals received at its second input, and to utilize the results of the comparison to configure the equalizer to correct for variations in the response of the controllable power supply at different frequencies. | 2010-03-11 |
20100060359 | Low Headroom X-Bridge Transconductor - A transconductance cell includes a positive rail for providing a positive power supply voltage and a negative rail for providing a negative power supply voltage. A pair of voltage inputs, one inverting and one non-inverting, develop a differential voltage input signal having a common mode voltage range from one of the rail voltages to within a volt or less of the other rail voltage. And a pair of cross-coupled transconductor circuits each have: (i.) a source voltage follower responsive to one of the voltage inputs for sourcing relatively unbounded output current at unity voltage gain, (ii.) a sink voltage follower responsive to the other voltage input for sinking unbounded output current to a current output terminal, and (iii) a transconductance resistor connected between the source voltage follower and the sink voltage follower for developing a differential output current proportional to the differential voltage input signal. Transconductance of the cell is substantially constant over the range of the differential voltage input signal without limiting the differential output current. | 2010-03-11 |
20100060360 | SWITCH-LESS BIDIRECTIONAL AMPLIFIER - A bi-directional amplifier, transceiver, integrated circuit, mobile unit, telecommunication infrastructure for amplification of signals received or signals to be transmitted in a communication circuit and a method for bi-directional amplification comprising amplifying signals in a bi-directional amplifier and directing a signal between two or more different paths comprising at least one first biased semiconductor amplification element coupled to a at least one first impedance matching network, at least one second biased semiconductor amplification element coupled to a second impedance matching network, a first device for biasing the at least one first biased semiconductor amplification element and a second device for biasing the at least one second biased semiconductor amplification element where the direction of signal amplification in said bi-directional amplifier is controlled by the first or second device for biasing the at least one first or second biased semiconductor amplification element. | 2010-03-11 |
20100060361 | BIAS BALANCING CIRCUIT - The invention discloses a bias balancing circuit. The bias balancing circuit is used for balancing an output voltage outputted by an amplifier module. The amplifier module has a variable gain. The bias balancing circuit comprises a comparator and a voltage selector. The comparator is used for comparing the output voltage and a reference voltage, to generate a comparison signal. The voltage selector is used for generating a selected voltage according to the comparison signal. When the variable gain is changed to result in an offset from the output voltage to the reference voltage, the bias balancing circuit is capable of balancing the output voltage toward the reference voltage by the selected voltage. | 2010-03-11 |
20100060362 | CASCODE CIRCUIT - A cascode circuit for a high-gain or high-output millimeter-wave device that operates with stability. The cascode circuit including two cascode-connected transistors includes: a first high electron mobility transistor (HEMT) including a source that is grounded; a second HEMT including a source connected to a drain of the first HEMT; a reflection gain restricting resistance connected to the gate of the second HEMT, for restricting reflection gain; and an open stub connected to a side of the reflection gain restricting resistance which is opposite the side connected to the second HEMT, for short-circuiting high-frequency signals at a predetermined frequency and nearby frequencies. | 2010-03-11 |
20100060363 | WIDEBAND LOW-NOISE AMPLIFIER - A wideband low-noise amplifier includes a source-degenerated common-source amplifier, a common-gate amplifier, and a matching frequency band determiner. The source-degenerated common-source amplifier is configured to amplify an input signal to output a first signal that is opposite in phase to the input signal. The common-gate amplifier is connected in parallel to the source-degenerated common-source amplifier to amplify the input signal to output a second signal that has the same phase as the input signal. The matching frequency band determiner is configured to isolate an input terminal of the source-degenerated common-source amplifier and an input terminal of the common-gate amplifier and determine a matching frequency band. | 2010-03-11 |
20100060364 | PROGRAMMABLE VOLTAGE-CONTROLLED OSCILLATOR - The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component. | 2010-03-11 |
20100060365 | Oscillation frequency control circuit - To provide a highly stable oscillation frequency control circuit wherein the frequency thereof is corrected, an adequate range of the input levels of external reference signals is determined in accordance with temperature characteristics in detecting the external reference signal, and the control voltage to a VCO is controlled within and outside the adequate range. An oscillation frequency control circuit includes a selection switch that connects the phase comparator to the loop filter in an external reference synchronization mode and that connects the fixed voltage supplying circuit to the loop filter in a fixed voltage mode, and a CPU that switches the selection switch to the external reference synchronization mode or to the fixed voltage mode based on whether the detected voltage of an external reference signal level is within or outside of the adequate range. | 2010-03-11 |
20100060366 | TWO-STEP VCO CALIBRATION METHOD - The present invention discloses a two-step VCO calibration method. The two-step VCO calibration method, comprising power-on calibration, used to provide a coarse VCO tuning; real-time calibration, real-time calibration, used to provide a fine VCO tuning according to the loaded result of said power-on calibration. The two-step VCO calibration method according to the present invention can cover all the variation of process and temperature and gain the advantages of shorter calibration time, smaller gain of VCO, pretty smaller size of passive loop filter and less operating power consumption. | 2010-03-11 |
20100060367 | CRYSTAL OSCILLATOR FOR SURFACE MOUNTING - The crystal oscillator for surface mounting includes: a container body having first and second recesses on both principal surfaces thereof; a crystal blank hermetically encapsulated within the first recess; and an IC chip in which an oscillation circuit using the crystal blank is integrated, the IC chip being accommodated within the second recess. The IC chip is provided with a plurality of IC terminals including a pair of crystal terminals used for electrical connection with the crystal blank. A plurality of mounting electrodes to which the IC terminals are connected through flip-chip bonding are formed on a bottom surface of the second recess in correspondence with the IC terminals. A pair of mounting electrodes corresponding to the pair of crystal terminals are electrically connected to the crystal blank and also formed as a pair of dual-purpose electrodes having greater areas than the other mounting electrodes. | 2010-03-11 |
20100060368 | ACTIVE YIG OSCILLATOR DRIVING DEVICE AND DRIVING METHOD THEREOF - An active YIG oscillator driving device is comprised of: an YIG oscillator including a main coil, an FM coil, a frequency generator operating to generate an output frequency in response to a magnetic field generated from the FM coil; a phase locker setting the output frequency to a target frequency by controlling an amount of current provided into the FM coil and adjusting the output frequency; and a main coil controller regulating the amount of current provided into the main coil, if the output frequency varies out of a controllable range by the FM coil, and adjusting the output frequency. A time for setting the output frequency of the YIG oscillator is shortened to improve the stability of the output frequency thereof against environmental conditions. | 2010-03-11 |
20100060369 | OSCILLATION CIRCUIT BASED ON METAL-INSULATOR TRANSITION DEVICE AND METHOD OF DRIVING THE OSCILLATION CIRCUIT - Provided are an oscillatory circuit based on a metal-insulator transition (MIT) device that can generate a simple and very high oscillating frequency using the MIT device, and a method of driving the oscillatory circuit. The oscillatory circuit includes the MIT device that comprises an MIT thin film and an electrode thin film connected to the MIT thin film and in which an abrupt MIT is generated due to an MIT generating voltage, a resistor that is serially connected to the MIT device, an electric al power source limiting the maximum amount of an applied current and applying a direct current constant voltage to the MIT device, and a light source irradiating electromagnetic waves on the MIT device, wherein the oscillating properties are generated by irradiating the electromagnetic waves using the light source. | 2010-03-11 |
20100060370 | VOLTAGE-CONTROLLED OSCILLATOR - A voltage-controlled oscillator comprises a variable inductor, a negative impedance circuit, an operating voltage source and a ground point. The variable inductor comprises a transformer and a transistor switch, the transformer comprising a primary side coil and a secondary side coil, the primary side coil comprising a first coil and a second coil, and the secondary side coil comprising a third coil and a fourth coil. The transistor switch is connected in parallel with the primary side coil to adjust an inductance value of the variable inductor based on a gate voltage. The negative impedance circuit is connected in parallel with the secondary side coil to compensate the power consumption of the voltage-controlled oscillator during oscillation. The operating voltage source is electrically connected between the third coil and the fourth coil, and the ground point is electrically connected between the first coil and the second coil. | 2010-03-11 |
20100060371 | Voltage/current regulator system using constant loop gain - A system for providing voltage and current regulator sources based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator oscillate. The oscillator's ability to oscillate is controlled by the one or more variable impedance or gain devices. Negative feedback of the voltage or current output level is used to control the loop gain of the oscillator circuit. | 2010-03-11 |
20100060372 | ACOUSTIC WAVE DUPLEXER - An acoustic wave duplexer has a satisfactory isolation characteristic between a reception acoustic wave filter chip and a transmission acoustic wave filter chip, and includes a reception surface acoustic wave filter chip and a transmission surface acoustic wave filter chip mounted on a substrate. The substrate includes first and second balanced terminals and a common terminal. At least one of the transmission surface acoustic wave filter chip and the reception surface acoustic wave filter chip is a balanced filter unit that includes, as an input terminal or an output terminal, a first balanced signal terminal and a second balanced signal terminal. The acoustic wave duplexer further includes a first interconnection arranged to connect the balanced filter unit and the first balanced terminal and a second interconnection arranged to connect the balanced filter unit and the second balanced terminal. The first and second interconnections intersect with each other while being insulated from each other. | 2010-03-11 |
20100060373 | HIGH FREQUENCY PACKAGE AND MANUFACTURING METHOD THEREOF - A high frequency package in which the resonance frequency of a metal seal ring is high, a reflection loss and a insertion loss of an input terminal and an output terminal are reduced in working frequency, and which has an excellent RF (radio frequency) characteristic in such as a millimeter wave, and a manufacturing method for the same are provided. The high frequency package has a minimum of an conductor base plate, a ceramic frame, the metal seal ring arranged on the ceramic frame, a solder metal layer arranged on the metal seal ring, a resonance frequency adjustment conductor formed of a conductor having an opening arranged on the solder metal layer, and a ceramic cap arranged on the resonance frequency adjustment conductor. The resonance frequency adjustment conductor is arranged so that an opening may correspond to a high portion of a loop of bonding wire. | 2010-03-11 |
20100060374 | NON-RECIPROCAL CIRCUIT DEVICE AND ITS CENTRAL CONDUCTOR ASSEMBLY - A central conductor assembly for a non-reciprocal circuit device, at least a first central conductor constituting a first inductance element and a second central conductor constituting a second inductance element being integrally formed in a laminate comprising pluralities of magnetic layers, the first central conductor being formed by series-connecting first and second lines formed on a first main surface of the laminate to third lines formed in the laminate through via-holes, and the second central conductor being formed on the first main surface of the laminate such that it extends between the first and second lines and crosses the third lines via a magnetic layer. | 2010-03-11 |
20100060375 | BALUN CIRCUIT MANUFACTURED BY INTEGRATE PASSIVE DEVICE PROCESS - A Balun circuit manufactured by integrate passive device (IPD) process. The Balun circuit includes a substrate, a first coplanar spiral structure, and a second coplanar spiral structure. One end of the innermost first left coil of the first coplanar spiral structure is electrically connected to the innermost first right coil through a first bridge. Two ends of the first coplanar spiral structure are electrically connected to the outermost first left coil and the outermost right coil respectively. One end of the innermost second left coil of the second coplanar spiral structure is electrically connected to the innermost second right coil through a second bridge. Two ends of the second coplanar spiral structure are electrically connected to the outermost second left coil and the outermost second right coil respectively. The first left coils and the second left coils are interlaced. The first right coils and the second right coils are interlaced. | 2010-03-11 |
20100060376 | BALUN DEVICE - A balun device including a first to a third inductance elements and a first to a third capacitance elements is provided. The first inductance element has a first end for receiving an input signal and a second end. The second inductance element has a third end and a fourth end, wherein the third and the forth ends are for outputting a first and a second output signals corresponding to the input signal, respectively. The first output signal and the second output signal substantially have the same amplitude and opposite phases. The first and the second inductance elements generate mutual inductance. The first capacitance element is coupled to the first end. The second capacitance element is coupled to the third end. The third capacitance element is coupled to the fourth end. The third inductance element is seriesly connected to one of the first to the third capacitance elements. | 2010-03-11 |
20100060377 | SWITCH CIRCUIT AND SEMICONDUCTOR DEVICE - A switch circuit for passing or blocking a high-frequency signal includes a correction circuit for correcting an impedance component that exists in the switch circuit and that changes asymmetrically with the direct-current potential as a reference such that impedance as seen from either high-frequency terminal changes symmetrically with the direct-current potential as a reference in response to positive and negative changes that take the direct-current potential of the high-frequency signal as a reference. | 2010-03-11 |
20100060378 | FILTER CIRCUIT AND RADIO COMMUNICATION DEVICE - The present invention provides a filter circuit that can achieve both sharp bandpass characteristics and high power handling capability. The filter circuit includes: an input terminal that has a signal input; a four-port device that divides input signals; a band stop filter that has the center frequency of the input signals within the stopband, and causes the out-of-stopband signals among the input signals to pass; two bandstop resonators circuits that cause the signals passing through the band stop filters to pass, and reflect the signals; open ends that are connected in parallel to the two bandstop resonators circuits; and an output terminal that outputs the signals reflected by the band stop filters and the bandstop resonators circuits and combined at the four-port device. | 2010-03-11 |
20100060379 | DELAY LINE FOR PRINTED CIRCUIT BROAD - A delay line for a printed circuit board (PCB) is disclosed. The delay line includes a first straight line, a second straight line and a third straight line. The second and third straight lines are respectively disposed at two sides of the first straight line. The first, second and third straight lines are parallel to each other and form a delay path. The current direction of the second straight line is opposite to that of the third straight line. | 2010-03-11 |
20100060380 | LOW-LOSS TUNABLE RADIO FREQUENCY FILETER - A tunable RF filter comprises a signal transmission path having an input and output, a plurality of resonant elements disposed along the signal transmission path between the input and output, and a set of non-resonant elements coupling the resonant elements together to form a stop band having a plurality of transmission zeroes corresponding to respective frequencies of the resonant elements, and at least one sub-band between the transmission zeroes. The set of non-resonant elements comprises a first plurality of non-resonant elements respectively coupled in parallel with the resonant elements, and a second plurality of non-resonant elements respectively coupled in series with the resonant elements. The first plurality of non-resonant elements comprises at least one variable non-resonant element for selectively introducing at least one reflection zero within the stop band to create a pass band in one of the one sub-band(s) without varying any of the second plurality of non-resonant elements. | 2010-03-11 |
20100060381 | Mulit-layer embedded capacitance and resistance substrate core - A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser. | 2010-03-11 |
20100060382 | METHOD AND DEVICE FOR OPTIMISING THE ADJUSTMENT TIME OF AN ADJUSTABLE FILTER - A device associated with the control of a tractable filter, including: an induction coil having an inductance Ls, and a resistance Rs; a series resistance r | 2010-03-11 |
20100060383 | Carbon Nanotube Resonators - Under one aspect, a resonator | 2010-03-11 |
20100060384 | FILTER, DUPLEXER AND COMMUNICATION APPARATUS - A filter has a plurality of piezoelectric thin film resonators formed by sandwiching a piezoelectric film with a lower electrode disposed on a substrate and an upper electrode. Each of the piezoelectric thin film resonators has an electrode region formed with the upper electrode and the lower electrode overlapping each other, whose outline includes a curve. Among the plural piezoelectric thin film resonators, the piezoelectric thin film resonators in the opposing electrode regions of the adjacent piezoelectric thin film resonators are shaped to have outlines complementary to each other. With the filter, influences caused by transverse mode undesired wave of the piezoelectric thin film resonators can be suppressed. Therefore, miniaturization can be achieved without sacrificing the mechanical strength of electrodes having hollow structures. | 2010-03-11 |
20100060385 | PIEZOELECTRIC THIN FILM RESONATOR, FILTER, AND COMMUNICATION APPARATUS - A piezoelectric thin film resonator includes a substrate, a lower electrode formed on the substrate, a piezoelectric film formed on the substrate and the lower electrode, and an upper electrode formed on the piezoelectric film and opposing the lower electrode, an upper electrode formed on the piezoelectric film. The upper electrode has a main portion and an extended portion connected to the main portion, the main portion opposing the lower electrode and an opening disposed between the substrate and the lower electrode, the extended portion having a portion which opposes the opening and the substrate. | 2010-03-11 |
20100060386 | BULK ACOUSTIC WAVE RESONATOR WITH ADJUSTABLE RESONANCE FREQUENCY AND USE OF SUCH A RESONATOR IN THE FIELD OF TELEPHONY - A bulk acoustic wave resonator has an adjustable resonance frequency. A piezoelectric element is provided having first and second electrodes. A switching element is provided in the form of a MEMS structure which is deformable between a first and second position. The switching element forms an additional electrode that is selectively disposed on top of, and in contact with, one of the first and second electrodes. This causes a total thickness of the electrode of the resonator to be changed resulting in a modification of the resonance frequency of the resonator. | 2010-03-11 |
20100060387 | Resonator system for an RF power amplifier output circuit - A resonator system is presented that has first and second cavity resonators for use in an RF amplifying system employing an RF amplifier device having an output circuit and an RF signal broadcasting antenna coupled to the output circuit. The resonators are interposed between the amplifying device output terminal and the antenna. The first resonator is comprised of a transmission line being a length of two coaxial conductors and tuned to the 3 | 2010-03-11 |
20100060388 | TRANSMISSION LINE MICROWAVE APPARATUS INCLUDING AT LEAST ONE NON-RECIPROCAL TRANSMISSION LINE PART BETWEEN TWO PARTS - A transmission line microwave apparatus includes at least one nonreciprocal transmission line part, which includes a series branch circuit equivalently including a capacitive element and a shunt branch circuit equivalently including an inductive element. The nonreciprocal transmission line part has gyrotropic characteristic by being magnetized in a magnetization direction different from the propagation direction of a microwave, and has an asymmetric structure to a plane formed by the propagation direction and the magnetization direction. The nonreciprocal transmission line part has a propagation constant and an operating frequency set in a dispersion curve that represents a relation between the propagation constant and the operating frequency so that the propagation constant in the forward direction and the propagation constant in the backward direction have nonreciprocal phase characteristics different from each other. A microwave transmission line is constituted by cascade-connecting at least one non-reciprocal transmission line part between first and second ports. | 2010-03-11 |
20100060389 | Acoustic Waveguide Array With Nonsolid Cores - An acoustic (sound or ultrasound) wave transmitter having a plurality of waveguides is described, and a method of making such a transmitter is described. Each waveguide can have a cladded core. The core can be a liquid such as water, alcohol or mineral oil. Alternatively, the core can be a colloidal gel, such as gelatin dissolved in at least one of water, vinyl plastisol or silicone gel. The cladded core is capable of transmitting acoustic wave energy from a first end surface to a second end surface of the cladded core. The waveguides can be substantially fixed relative to each other by a binder. The binder can be formed by fusing the claddings together, potting a material between the waveguides and/or mechanically holding the waveguides. | 2010-03-11 |
20100060390 | TRANSMISSION LINE SUBSTRATE - A transmission line substrate comprises: a dielectric substrate; a signal line formed on the upper surface of the dielectric substrate; first and second ground conductors formed on the upper surface of the dielectric substrate, field-coupled to the signal line, having potentials different from each other; a dielectric film formed between a part of the overlapping first ground conductor and a part of the second ground conductor to constitute a MIM capacitor; a capacitor connected between the first ground conductor and the second ground conductor in parallel with the dielectric film; and a resistor connected between the first ground conductor and the second ground conductor in series with the capacitor. | 2010-03-11 |
20100060391 | WAVEGUIDE ELEMENT - The invention relates to a microwave waveguide element for matching a standard waveguide input port ( | 2010-03-11 |
20100060392 | RELAY - A relay comprises: a solenoid; a hermetically sealed chamber mounted at a lower end thereof with a cylinder into which a center portion of the spool is inserted, mounted at an upper end thereof with a pair of stationary terminals each provided at a stationary contact point and filled therein with insulating gas to be coupled at an upper portion of the spool; an insulation member insulating the chamber and the stationary terminals; a movable unit including a shaft, a conductive movable terminal, and a pair of movable contact points; a restoring spring to pull the shaft toward the lower surface of the cylinder; and an insulated sliding guide to guide the movable unit that is moved by the solenoid and the restoring spring. | 2010-03-11 |
20100060393 | ELECTROMAGNETIC LINEAR ACTUATOR - An electromagnetic linear actuator is disclosed that is capable of providing a large driving force adequately used for a high-voltage circuit breaker due to simplified structure and reduced manufacturing cost, the actuator comprising: stators each facing the other about an axle; a mover disposed with a moving core and a moving coil wrapping the moving core to magnetize the moving core during conduction, and capable of linearly and axially moving an interior of the stator; and permanent magnets, one facing the other, and fixedly mounted on both inner walls of the stator for providing a Lorentz force and reluctance force to the moving coil for movement when a current flows in the moving coil of the mover, and for providing a holding force to the mover for holding a position when the electric conduction to the moving coil of the mover is interrupted. | 2010-03-11 |
20100060394 | Electromagnetic relay - An electromagnetic relay includes a case, a base, a magnet coil, a movable member driven by electromagnetic force of the coil, a moving contact, a fixed contact engaged with or disengaged from the moving contact, a fixed contact holding member fixed to the base with the holding member passing therethrough and having a load circuit terminal, and a magnet applying Lorentz force to arc generated between the fixed contact and the moving contact. The case includes a guide part on its region with which arc extended in a Lorentz force application direction collides. The guide part guides arc after the collision to extend arc in a different direction from the application direction. The case includes a case partition wall between the guide part and the base. The holding member has a guide part opposing portion opposed to the guide part. The opposing portion is covered with the case partition wall. | 2010-03-11 |
20100060395 | Free Air Magnetic Circuit and Speaker - Disclosed is a free air magnetic circuit and speaker in which no pole piece is used. A magnet layer is located between a top plate and a back plate with a gap defined essentially in the center thereof. Into the gap, a wire coil attached to a diaphragm may be inserted. A magnet flux passes between the top and back plates. In some embodiments, the interior edge of each of the metal plates tapers toward the gap, and the magnet layer extends past the peripheral edge of each of the metal plates so as to discourage magnetic flux between the metal layers at the peripheral edge. | 2010-03-11 |
20100060396 | Coil Former and Coil Body For An Electromagnetic Relay - A coil former for an electromagnetic relay is configured to receive a core and a coil winding. The coil former includes a first coil flange, a second coil flange, and a cylindrical winding area for fixing a coil winding arranged between the first and second coil flange, wherein at least one of the coil flanges is shaped such that at least a portion of one coil flange sits flush with the winding area of the coil former in a region of a periphery of the coil former. Also, a coil body for an electromagnetic relay includes a base integrally connected to the coil former. The coil former or the coil body is formed such that, in the production thereof, it has no more than three demolding directions for a master mould. | 2010-03-11 |
20100060397 | INDUCTOR ARRAY WITH SHARED FLUX RETURN PATH FOR A FUEL CELL BOOST CONVERTER - An inductor array that includes a plurality of inductors where adjacent inductors share a core piece and thus a flux path to reduce the size and weight of the array. In one embodiment, the shared core pieces are formed as back-to-back U-shaped members defining an indented region at the center of the core piece. In another embodiment, a plurality of small block-shaped center core pieces in each inductor defines a plurality of gaps therebetween. | 2010-03-11 |
20100060398 | Method to Fabricate a Molding Inductor Structure and a Molding Inductor Structure - A method to fabricate a molding inductor structure and a molding inductor structure are provided. The method comprises the steps of: performing a high pressure process on a first magnetic material to form a baseboard, wherein a central area of the baseboard comprises a pillar; providing a metal coil, wherein the metal coil comprises an open coil center; connecting the metal coil and the baseboard such that the pillar lodges in the open coil center; placing the connected metal coil and the baseboard into a mold; and forming a covering structure by stuffing a second magnetic material with a high pressure process to cover the connected metal coil and the baseboard to form the molding inductor structure. | 2010-03-11 |
20100060399 | TRANSFORMER - A transformer includes primary and secondary windings coupled electromagnetically to each other and wounded respectively around primary and secondary winding portions of a bobbin unit, and a core unit mounted to the bobbin unit and including first and second core parts that form a magnetic circuit path. The first core part includes insertion and extension segments extending from a connecting segment. The second core part includes insertion and extension segments, and an adjusting segment extending from a connecting segment toward the first core part. The extension segments of the first and second core parts contact each other. The insertion segments of the first and second core parts extend respectively through the primary and secondary winding portions to contact each other. | 2010-03-11 |
20100060400 | Transformer and spiral flat winding thereof - A transformer includes a bobbin, an iron core and two spiral flat windings. The bobbin has a primary side portion, a secondary side portion and a separating plate. The separating plate is provided between the primary side portion and the secondary side portion. The first, second and third through holes are in communication with each other. The iron core penetrates the first, second and third through holes. The spiral flat winding is formed from a plurality of flat loops. The two spiral flat windings are provided on both sides of the separating plate and surround the primary side portion and the secondary side portion. Via the above arrangement, the spiral flat winding can be disposed around the bobbin, so that the assembling process can be performed simply and quickly. Thus, the working hours for assembling and the cost can be reduced. | 2010-03-11 |
20100060401 | INDUCTOR AND INDUCTOR COIL - An inductor includes a ferromagnetic core, an inductor coil, and a holder. The inductor coil is coiled to form one or more loops around a center. The inductor coil defines a through hole surrounded by an innermost loop to fit about the ferromagnetic core. The holder is configured for holding the ferromagnetic core with the inductor coil. Two ends of the inductor coil protrude out of the holder. | 2010-03-11 |
20100060402 | BALUN CIRCUIT MANUFACTURED BY INTEGRATE PASSIVE DEVICE PROCESS - A Balun circuit manufactured by integrate passive device (IPD) process is provided. The Balun circuit includes a substrate, a first coplanar spiral structure, and a second coplanar spiral structure. At least two first left half coils of the first coplanar spiral structure are electrically connected to the corresponding two first right half coils through a first intersecting structure. At least two second left half coils of the second coplanar spiral structure are electrically connected to the corresponding two second right half coils through a second intersecting structure. The two ends of the second coplanar spiral structure are electrically connected to the innermost second left half coil and the second right half coil respectively. The first left half coils and the second left half coils are interlaced, and so are the first right half coils and the second right half coils interlaced. | 2010-03-11 |
20100060403 | DUAL INDUCTANCE STRUCTURE - A dual inductance structure including a substrate, a first inductance element, a second inductance element and a grounding element is provided. The substrate has a layout layer and a grounding layer. The first inductance element has a first and a second conductor. The second inductance element has a third and a fourth conductor. The grounding element has a first and a second grounding portion. The first grounding portion is on the grounding layer and located at an area between the first conductor and the third conductor. At least a part of the second grounding portion is on the grounding layer and located at an area between the first conductor and the second conductor. At least another part of the second grounding portion is on the grounding layer and located at an area between the third conductor and the fourth conductor. | 2010-03-11 |
20100060404 | DC-DC CONVERTER FOR FUEL CELL APPLICATION USING HYBRID INDUCTOR CORE MATERIAL - An inductor that includes end core pieces and a plurality of center block core pieces between the end core pieces that define a plurality of gaps. The end core pieces are made of an amorphous alloy to provide good magnetic field properties and the center core pieces are stamped magnetic sheets forming a laminate structure to provide ease of manufacturability. In one non-limiting embodiment, the end core pieces are an amorphous iron alloy and the center core pieces are stamped silicon-iron. | 2010-03-11 |
20100060405 | FUSE DEVICE WITH INTEGRATED SWITCH - A fuse is provided that includes a housing and a first lead and a second lead. The fuse further includes a fuse element having a current capacity. The fuse element forms a part of an electrical pathway between the first lead and the second lead. The fuse also includes a switch unit in communication with the housing and in series with the fuse element. The switch unit has an open state and a closed state. When the switch unit is in the closed state, the electrical pathway is connected to form a closed pathway between the first lead and the second lead, and when the switch unit is in the open state, the electrical pathway is disconnected to provide an open circuit between the first lead and the second lead. | 2010-03-11 |
20100060406 | SMALL-SIZED SURFACE-MOUNTED FUSE AND METHOD OF MANUFACTURING THE SAME - A small-sized surface-mounted fuse and a method of manufacturing the same. A fusing element, separated from a winding member, is connected to lead wires by arc welding instead of soldering. Consequently, the present invention has the effect of improving fusing characteristics and productivity while reducing the defective rate and manufacturing costs. To this end, the manufacturing method according to the present invention comprises winding a fusing element predetermined winding turns on a winding member having a predetermined length, cutting both ends of the fusing element wound the predetermined winding turns on the winding member, separating the fusing element having the cut ends from the winding member, pressing the upper ends of lead wires | 2010-03-11 |
20100060407 | COMPLEX TYPE FUSIBLE LINK, FUSE BOX, AND MANUFACTURING METHOD THEREOF - The present invention provides a complex type fusible link which includes an insulative block base including a plurality of cavities; a conductive connecting plate which is integrally embedded in the insulative block base, a part of the conductive connecting plate being exposed to at least one of the cavities; a plurality of fusible elements each of which is accommodated in corresponding one of the cavities and includes a first end which is connected to the part of the conductive connecting plate and a second end; and a plurality of terminals each of which is integrally embedded in the insulative block base and includes a first end which is connected to the second end of corresponding one of the fusible elements and a second end which is exposed from the insulative block base. | 2010-03-11 |
20100060408 | FUSE MODULE WITH INDICATING CAPABILITY - A fuse module with an indicating capability allows a plug having pins to be inserted therein. The fuse module includes a casing, an electrical conductive terminal, an insulator and a light-emitting unit. The bottom of the casing is provided with through holes. The electrical conductive terminal is received in the casing. The electrical conductive terminal includes conductive pieces for allowing the pins to be inserted therein and a connecting arm for connecting the conductive pieces. The conductive pieces are arranged to correspond to the through holes. The insulator is fixed to the connecting arm. The light-emitting unit is provided between the insulator and the casing and is electrically connected with the conductive pieces. When the current is overloaded, the connecting arm will be melted to break, so that the light-emitting unit will be lighted up to generate an indicating effect. Since the electrical conductive terminal and the light-emitting unit are replaceable, the cost can be reduced and the requirement for the environmental protection can be satisfied. | 2010-03-11 |
20100060409 | RESISTOR AND METHOD FOR MAKING SAME - A metal strip resistor is provided. The metal strip resistor includes a metal strip forming a resistive element and providing support for the metal strip resistor without use of a separate substrate. There are first and second opposite terminations overlaying the metal strip. There is plating on each of the first and second opposite terminations. There is also an insulating material overlaying the metal strip between the first and second opposite terminations. A method for forming a metal strip resistor wherein a metal strip provides support for the metal strip resistor without use of a separate substrate is provided. The method includes coating an insulative material to the metal strip, applying a lithographic process to form a conductive pattern overlaying the resistive material wherein the conductive pattern includes first and second opposite terminations, electroplating the conductive pattern, and adjusting resistance of the metal strip. | 2010-03-11 |
20100060410 | LOCK FOR A PORTABLE DEVICE - The present invention relates to an antitheft device for a wireless portable device designed to be in contact with a docking device including a lockable attachment apparatus for attaching the portable device to the docking device. The antitheft device according to the invention comprises an electromechanical system commanding the unlocking of the lockable attachment apparatus based on an electric signal. The electric signal is disabled by a command supplied by a user interface unit. The invention is notably used as an antitheft device for a wireless, portable X-ray sensor associated with a docking station. | 2010-03-11 |
20100060411 | Biometric authentication apparatus and biometric authentication control method - A biometric authentication apparatus includes a part to retain first biometric data items extracted from living body parts of a user in correlation with the collation order of the first biometric data items; a part to acquire a second biometric data item from the user, to compare and collate the acquired second biometric data item with the first biometric data items in descending order of their collation priorities based on the collation order, and to determine that the user has been successfully authenticated in response to detecting one of the first biometric data items whose match rate with the second biometric data item exceeds a predetermined value; and a part to change the collation order in response to detecting, from the state of usage of the one of the first biometric data items, that the user has steadied at a change of her/his living body part to use for authentication. | 2010-03-11 |