06th week of 2009 patent applcation highlights part 62 |
Patent application number | Title | Published |
20090037575 | RESEARCH DATA GATHERING WITH A PORTABLE MONITOR AND A STATIONARY DEVICE - Methods of gathering data concerning a location of an audience member proximate to a content presentation are provided. A stationary device is proximate to the content presentation. A portable monitor is carried by or with the person of an audience member. Location data is obtained by communicating data from the portable monitor to the stationary device, or from the stationary device to the portable monitor, or by comparing data gathered by both the stationary device and the portable monitor. | 2009-02-05 |
20090037576 | DATA ANALYZING SYSTEM AND DATA ANALYZING METHOD - A data analyzing system includes an input-output device, a plurality of local analyzing devices, a center analyzing device and a connecting device which connects between the input-output device, the local analyzing devices, and the center analyzing device. The connecting device may receive and execute a forwarding setting command from the input-output device to select and set one or more devices, to which the command from the input-output device should be forwarded, from the local analyzing devices and the center analyzing device and forward a command different from the forwarding setting command transmitted from the input-output device to the devices, in which forwarding is set, and forward data or command transmitted from the local analyzing devices and the center analyzing device, in accordance with destinations described in the data or the command. | 2009-02-05 |
20090037577 | DATA LISTENERS FOR TYPE DEPENDENCY PROCESSING - A method and apparatus for data listeners for type dependency processing. An embodiment of a method for dependency processing of computer files includes receiving a data stream input at a scanner component, where the data stream input represents program elements of one or more computer files. A data stream of type definitions and type usages is generated, and the data type definitions and data type usages are provided as an input to a listening component. The listening component performs a listening function of filtering the type definition and type usage data, aggregating the type usage data, or echoing the data stream output, and an output is generated from the listening component. | 2009-02-05 |
20090037578 | DATA PROCESSING APPARATUS AND NETWORK SYSTEM THAT OUTPUTS QUALITY OF SERVICE INFORMATION TO A USER - In each of the information processing apparatuses connected to each other via a network, there is arranged a quality of service (QOS) table to which functions and performance thereof are registered. When an information processing apparatus is additionally linked with the network, a QOS table thereof is automatically registered to a local directory of the network such that an agent converts the contents of the QOS table into service information to be supplied via a user interface to the user. Thanks to the operation, information of functions and performance of each information processing apparatus connected to the network is converted into service information for the user. Consequently, the user can much more directly receive necessary services. | 2009-02-05 |
20090037579 | Page Grouping For Site Traffic Analysis Reports - Website administrators can specify page groups and/or single pages as checkpoint nodes for site analysis reporting purposes, and can configure the system of the invention to provide information as to a particular visitation path through the checkpoints. Any group of pages can be designed as a single checkpoint node for website traffic analysis and reporting purposes. Page groups can be used in place of or in addition to individual web pages in any context where site traffic analysis is being presented or performed. | 2009-02-05 |
20090037580 | Method to Identify Transactions and Manage the Capacity to Support the Transaction - A monitoring program contains a method for detecting a load imbalance in a group of servers and providing notification so that corrections can be made. An embodiment of the invention reads from the address resolution protocol (ARP) cache to determine which server addresses are present, then clears the ARP cache. The address resolution protocol will repopulate the cache from traffic it snoops and from new requests. By performing this query and clear operation periodically, the tracking program can form a picture of the activity levels of the servers. When a significant imbalance exists, the program notifies a control console for human intervention to solve the problem. The tracking program will periodically write its results to a log file, allowing reports for various time periods to be produced as needed. By this mechanism, not only can an imbalance be quickly detected, but underutilization can be picked up by comparing known capability of a resource to its actual usage. | 2009-02-05 |
20090037581 | REMOTE COMMUNICATION SYSTEM AND METHOD IMPLEMENTING A SESSION SERVER AND ONE OR MORE OBJECT SERVERS - A remote communication system and method are disclosed. An environment is identified defining a plurality of parameters communicated between a first and a second computer as part of a remote session (i.e., the first computer remotely controlling the second computer via the remote session), with each parameter defining an action associated with the remote session. A first application, via a unidirectional communication with the environment, modifies at least one parameter associated with the environment (e.g., modifying keyboard scan codes, cursor position, mouse position, clipboard data, screen resolution, or channel administration), wherein the modified parameter is extracted by an interceptor associated with the second computer and, the interceptor, based on a look-up, executes a pre-defined action affecting the remote session, wherein the pre-defined action being different than the modified parameter's associated action. | 2009-02-05 |
20090037582 | Method And System For Managing Access To A Resource Over A Network Using Status Information Of A Principal - Methods and systems are described for managing access to a resource over a network using status information of a principal. One method includes receiving status information for a principal that is allowed to access a resource available via a network communication session with a network service and determining whether the received status information is inconsistent with allowing access to the resource. When the received status information of the principal is inconsistent with allowing access to the resource, the method includes preventing an initiation of a network communication session with the network service for accessing the resource. | 2009-02-05 |
20090037583 | DETECTION AND CONTROL OF PEER-TO-PEER COMMUNICATION - A method and apparatus are provided for detecting peer-to-peer communication on a data communication network, between an internal client machine within an internal address space and an external client machine. The method includes routing all messages addressed to internal client machines to an analysis device. The analysis device identifies messages pertaining to peer-to-peer communication and identifies the internal client machine to which the messages of a specified nature were addressed. The analysis device terminates the connection with the external client machine if the establishing of the peer-to-peer communication is in violation of a pre-determined internal network rule. | 2009-02-05 |
20090037584 | METHODS OF CREATING A VOTING STOP POINT ON A DISTRIBUTED NETWORK - A highly efficient and effective method for deciding, in the context of a distributed computer network, how many computers will participate in an initial vote if multiple computers are started in the same general time frame. | 2009-02-05 |
20090037585 | Apparatus, method and system for aggregrating computing resources - A system for executing applications designed to run on a single SMP computer on an easily scalable network of computers, while providing each application with computing resources, including processing power, memory and others that exceed the resources available on any single computer. A server agent program, a grid switch apparatus and a grid controller apparatus are included. Methods for creating processes and resources, and for accessing resources transparently across multiple servers are also provided. | 2009-02-05 |
20090037586 | Campaign for downloading data into portable communicating objects - The downloading of data from a server into one (Cn) of the portable communicating objects (C | 2009-02-05 |
20090037587 | COMMUNICATION SYSTEM, COMMUNICATION APPARATUS, COMMUNICATION METHOD, AND PROGRAM - Out of data being transmitted from a client application A | 2009-02-05 |
20090037588 | Method And System For Providing Status Information Of At Least Two Related Principals - Methods and systems are described for providing status information of at least two related principals. One method includes establishing an association between a first tuple including a first status for a first principal and a second tuple including a second status for a second principal, where the association includes a relationship indicator indicating a relationship between the first principal and the second principal. A first subscription to the first tuple for receiving the first status for the first principal is provided for a first watcher entity. In response to providing the first subscription, the method includes generating a first notification message including status information comprising at least one of a composite status based on the first status for the first principal, the second status for the second principal and the relationship indicator; and the first status, the second status and the relationship indicator. | 2009-02-05 |
20090037589 | INTERFACE APPARATUS, EXCHANGE APPARATUS WITH THE APPARATUS, AND CONTROL METHOD FOR USE IN THE APPARATUS - According to one embodiment, an interface apparatus includes a connector which establishes connection with a plurality of Session Initiation Protocol (SIP) terminals which each include communication functions defined by SIP and with an SIP network to one port, a first processor which executes exchange processing for the plurality of SIP terminals, a second processor which executes exchange processing for the SIP network, and a sorting unit which sorts a control signal into the first processor or the second processor based on transmission destination identification information or transmission origin identification information in the control signal regarding exchange received by the connector. | 2009-02-05 |
20090037590 | System and Method for Multiple Address of Record Registration Using a Single Implicit SIP Request - One embodiment of the present invention is a method for registering multiple addresses of record. The method comprises receiving a session initiation protocol register request, the session initiation protocol register request comprising a unique identifier of a session initiation protocol endpoint and a contact address for the session initiation protocol endpoint. The method proceeds by retrieving one or more addresses of record associated with the unique identifier of the session initiation protocol endpoint. The method further comprises associating each of the one or more addresses of record with the contact address for the session initiation protocol endpoint. | 2009-02-05 |
20090037591 | COMMUNICATION APPARATUS AND COMMUNICATION PARAMETER SETTING METHOD - A communication apparatus determines an opposing communication apparatus with which to perform an automatic setting process of automatically setting a communication parameter required for connecting to a network, and acquires the communication parameter from the opposing communication apparatus. The opposing communication apparatus is determined based on at least one of information on an authentication method and information on an encryption protocol of respective communication apparatuses, included in a signal transmitted from each of a plurality of communication apparatuses. | 2009-02-05 |
20090037592 | NETWORK OVERLOAD DETECTION AND MITIGATION SYSTEM AND METHOD - Systems and methods are provided for detecting and mitigating overload conditions affecting one or more computers attached to a network, such as overloads resulting from distributed denial of service (DDoS) attacks, for example. According to some described embodiments, an attempted overload condition is detected, e.g., by a system, through following a method, or both, within a data cleaning center. Detection may be achieved, e.g., by analyzing data packets traveling over the network to identify packets that bear characteristics that may be associated with DDoS attacks, and this analysis may include examination of the packets' data payloads. Mitigation, in turn, may include discarding some data packets, redirecting network traffic, or some combination thereof. | 2009-02-05 |
20090037593 | SERVER FOR AUTHENTICATING CLIENTS USING FILE SYSTEM PERMISSIONS - A computer system comprises a server that serves a plurality of clients and performs client authentication and authorization during client login to the server enabled by file system permissions of User Domain Sockets (UDS). | 2009-02-05 |
20090037594 | METHOD AND SYSTEM FOR IMPROVING COMPUTER NETWORK SECURITY - Computers connected to a private network are monitored and controlled through the use of a client agent that operates in association with the computer and a server client that establishing security parameters, privileges and authorizations for the computer. The invention can prevent access to certain devices according to an active security policy. Any activity of the computer, such as a request to transfer data to an external device, access a particular file, etc. is monitored and controlled by the client agent. No operations or procedures are allowed by the computer inconsistent with the active security policy. The security policy may be set by the administrator of the private network according to the user rights and position in the organization | 2009-02-05 |
20090037595 | SELECTING AND APPLYING A COMMUNICATION VERSION - A method and system are provided to select a communication version. An embodiment of the method includes obtaining destination host address associated with a destination host attribute, such a domain name. Thereafter, an address version for each destination host address is identified. Upon identifying address versions for each destination host address, it is determined if the destination host address is associated with a preferred address version. In such an instance where the destination host address is associated with a preferred address version, such as Internet Protocol version 6, a corresponding communication version is selected. | 2009-02-05 |
20090037596 | MEDIA PERSISTENT RTSP STREAMING - In one example embodiment, a method includes receiving at a server during a first media file streaming session to a user over a network a request from the user to pause streaming the media file at a selected time stamp point in the file. The server receives a request from the user to suspend the session. The server stores information in a memory information corresponding to the suspended streaming of the media file based on the request to suspend. The server may also resume streaming the media file to the user in a second media file streaming session from the specified streaming suspension point. | 2009-02-05 |
20090037597 | JOINT SYMBOL, AMPLITUDE, AND RATE ESTIMATOR - The system in one embodiment relates to tightly integrating parameter estimation, symbol hypothesis testing, decoding, and rate identification. The present invention provides Turbo-decoding for joint signal demodulation based on an iterative decoding solution that exploits error correction codes. The system iteratively couples an initial amplitude estimator, a symbol estimator, a bank of decoders, and a joint amplitude estimator to produce the symbol estimates. | 2009-02-05 |
20090037598 | Providing Nearest Neighbor Point-to-Point Communications Among Compute Nodes of an Operational Group in a Global Combining Network of a Parallel Computer - Methods, apparatus, and products are disclosed for providing nearest neighbor point-to-point communications among compute nodes of an operational group in a global combining network of a parallel computer, each compute node connected to each adjacent compute node in the global combining network through a link, that include: identifying each link in the global combining network for each compute node of the operational group; designating one of a plurality of point-to-point class routing identifiers for each link such that no compute node in the operational group is connected to two adjacent compute nodes in the operational group with links designated for the same class routing identifiers; and configuring each compute node of the operational group for point-to-point communications with each adjacent compute node in the global combining network through the link between that compute node and that adjacent compute node using that link's designated class routing identifier. | 2009-02-05 |
20090037599 | Automatic Relaxing and Revising of Target Server Specifications for Enhanced Requests Servicing - A method, system and computer program product for dynamically modifying target server specifications to improve the success rate of client requests in a data network. A client's initial request is transmitted by a client router to a dynamically updating target server, based on information in a client's routing table. A Dynamic Server Specifications (DSS) utility automatically revises one or more target specifications of a client's request that is not initially fulfilled. The DSS utility then initiates the transmission of the modified request to an alternate server. If the request to the alternate server is also not fulfilled, the DSS utility may further modify the request to target an arbitrary server in order to download a current routing table. When the client receives a current routing table, the initial request is revised based on the current routing information, with full constraints re-established, and forwarded to the relevant target server. | 2009-02-05 |
20090037600 | LOAD BALANCING TECHNIQUES FOR INTER-DOMAIN TRAFFIC ENGINEERING - A method for balancing traffic across paths connecting a network to the Internet using a fractional allocation strategy for distributing the traffic from a congested selected path. The strategy includes: (a) associating the paths j with a counter i; (b) calculating the total initial selected path overload; (c) calculating the selected path load, wherein the load is equal to the initial selected path overload less the sum of the low capacity boundary for i path(s); (d) calculating the portion of the traffic on the selected path to be distributed using a bi-sectional search strategy; (e) distributing a portion of the traffic on the selected path to the other paths; and (f) stopping if there are no more paths (i=j), otherwise increasing the numerical value of the counter by one (1) and go to step (c). | 2009-02-05 |
20090037601 | System and Method for Updating State Information in a Router - Systems and methods consistent with the present invention enable routing table updates are performed by optimally utilizing the resources of a node without exceeding the resources of the node. Using feedback on the amount of resources available to the nodes, such as in terms of available memory, the node may make new connections before breaking old one where those updates will not exceed available resources. This is referred to as make-before-break. When not enough resources are available, the node will break old connections before making new ones. This is referred to as break-before-make. Unlike the strict make-before-break and break-before-make models, this “loose” make-before-break method considers the amount of available resources in view of the resources required to perform the routing table updates without a node failure. Routes may also be tagged to prioritize the addition of more important routes and the deletion of less significant routes. Methods and systems consistent with the present invention, therefore, provide a routing table update method with which routing table updates are achieved without crashing and at the same time minimizing black hole intervals. | 2009-02-05 |
20090037602 | System and Method for Merging Internet Protocol Address to Location Data from Multiple Sources - Systems and methods for associating a geographic location with an Internet protocol (IP address) are disclosed. Generally, an IP address to location module determines whether a geographic location is associated with a common IP address in a majority of IP address to location data sets. The IP address to location module then stores an association between a geographic location and the IP address in a master IP address to location data set based on whether a geographic location is associated with a common IP address in a majority of IP address to location data sets. | 2009-02-05 |
20090037603 | MANAGEMENT OF SETS OF ADDRESSES - A method is provided of dynamically allocating an IP address, via a DHCP relay, to a client terminal within a communication network. The DHCP relay is able to choose the IP address within at least one first set of IP addresses that is administered by an entity for managing sets of IP addresses. The method implements: a first step of transmitting, to the entity for managing sets of IP addresses, a request to allocate an IP address to the client terminal; a second step in which the entity for managing sets of IP addresses selects a set of IP addresses within which to choose the IP address to be allocated from among: either the at least one first set of IP addresses; or at least one second set of IP addresses that is newly created as a function of at least one predetermined parameter; and a third step of allocating in respect of the client terminal at least one IP address chosen by the DHCP relay in the selected set of IP addresses. | 2009-02-05 |
20090037604 | MANAGEMENT SYSTEM FOR CONVERTING COMMANDS IN TERMINAL TYPES AND METHOD THEREOF - A management system for converting commands in the terminal types and method thereof are disclosed. The management system couples a computing device, having a first terminal type, to a terminal. The management system includes a detecting unit, a conversion table, and a converting unit. The detecting unit of the management system detects whether the terminal has a second terminal type. The conversion table constitutes a conversion relationship between a first set of commands in the first terminal type and a second set of commands in the second terminal type correspondingly. The converting unit, in response to the detecting unit, converts the first set of commands in the first terminal type from the computing device into the second set of commands in the second terminal type according to the conversion table if the first set of commands in the first terminal type is unreadable for the terminal. Thus, the computing device controls the terminal to display correctly. | 2009-02-05 |
20090037605 | User Interface for a Portable, Image-Processing Transmitter - This disclosure details the implementation of a user interface for a portable, image-processing transmitter. The Transmitter's user interface comprises a compact and efficient forum for managing, manipulating, storing, and transmitting digital images of various formats across a wide array of transmission means and protocols. Embodiments of the Transmitter may be employed by photographers, photojournalists, and/or the like to rapidly process, edit, and send high-quality photographs or video to multiple news agencies, newspapers, magazines, television studios, websites, and/or the like while maintaining control over their photographs by allowing them to send reduced quality and watermarked proofs. The Transmitter may be configured via the user interface to allow users seeking to transmit large, high-resolution images to first generate and transmit low-resolution preview images, thereby saving on transmission time and resources. Full resolution versions of the images may then be transmitted as approvals of the preview versions are received. | 2009-02-05 |
20090037606 | SYSTEM AND METHOD FOR ADJUSTING A LEVEL OF COMPRESSION FOR COMPUTING CLIENTS - A system and method for adjusting a level of compression for thin and chubby computing clients. End devices in a network can stream audio/video traffic over a network. Such a connection between the end devices can be reserved with guarantees of bandwidth and latency being obtained. Bandwidth guarantees across multiple intermediary switches can be used to define a compression level for the end devices. In one embodiment, the lowest compression level that will produce audio/video traffic that will fit in the guaranteed connection bandwidth is chosen to produce the highest quality audio/video stream. | 2009-02-05 |
20090037607 | Overlay transport virtualization - In one embodiment, an apparatus includes one or more internal interfaces in communication with one or more network devices in a first network site through a Layer 2 link, an overlay interface in communication through a Layer 3 link with a core network connected to one or more other network sites, and a table mapping addresses for network devices in the other network sites to addresses of edge devices in the same network site as the network device. The apparatus further includes a processor operable to encapsulate a packet received at one of the internal interfaces and destined for one of the network devices in the other network sites, with an IP header including a destination address of the edge device mapped to the destination network device, and forward the encapsulated packet to the core network. | 2009-02-05 |
20090037608 | PROCESSOR PARTNERING IN A STORAGE SYSTEM - An apparatus and associated method are provided for performing a storage transaction associated with a network I/O command by employing an ASIC having an interconnect selectively coupling a plurality of dedicated purpose function controllers in the ASIC to a policy processor via a list manager in the ASIC communicating on a peripheral device bus to which the policy processor is connected. | 2009-02-05 |
20090037609 | MIDDLE MANAGEMENT OF INPUT/OUTPUT IN SERVER SYSTEMS - A middle manager and methods are provided to enable a plurality of host devices to share one or more input/output devices. The middle manager initializes each shared input/output device and binds one or more functions of each input/output device to a specific host node in the system, such that hosts may only access functions to which they are bound. The middle manager may also utilize a configuration register map to translate values from the actual configuration register into a unique modified value for each of the plurality of host devices such that each host device may access and use the shared input/output device regardless of the firmware or operating system operating thereon. | 2009-02-05 |
20090037610 | Electronic device interface control system - An electronic device interface control method comprising identifying at least one peripheral device coupled to an electronic device and determining whether to disable an interface corresponding to the at least one peripheral device based on the identity of the at least one peripheral device. | 2009-02-05 |
20090037611 | SYSTEM AND METHOD FOR TRANSFERRING, IN PARTICULAR AUTHORIZATION-RELEVANT DATA - The invention relates to a system, the individual components thereof, and to a method for executing an electronic data transfer, particularly of authorization-relevant or otherwise privileged or sensitive data. The aim of the invention is to provide solutions with which it is possible, while resorting to, in particular, established or conventional mobile telephone mobile storage devices, to effect or coordinate, in a particularly advantageous manner, a provision of data or recording of data. According to a first aspect of the invention, this aim is achieved by a mobile data provision system with a storage unit and with an interface unit. The interface unit has a standard interface for executing a data transfer over a standard interface system and, in addition to this standard interface, an additional interface is provided for executing a data transfer based on a modulated electrical field. | 2009-02-05 |
20090037612 | TRANSFERABLE COMPONENT THAT EFFECTUATES PLUG-AND-PLAY - A plug-and-play system comprises an agent component that includes instructions for enabling a first device and a mobile device to be compatible upon detecting a connection between the first device and the second device. A transfer component pushes the agent component from the mobile device to the first device, the agent component executes upon reaching the first device. For example, the mobile device can be a mobile phone, a PDA, a personal organizer, and the like, and the first device can be a personal computer, a laptop computer, or a mobile device. | 2009-02-05 |
20090037613 | Change notification in USB devices - A method of notifying clients of a change in a USB including a first client requesting notification of a first change in the USB, detecting the first change in the USB, and notifying the first client requesting notification that the first change in the USB occurred. | 2009-02-05 |
20090037614 | Offloading input/output (I/O) virtualization operations to a processor - In one embodiment, the present invention includes a method for receiving a request for a direct memory access (DMA) operation in an input/output (I/O) hub, where the request includes a device virtual address (DVA) associated with the DMA operation, determining in the I/O hub whether to perform an address translation to translate the DVA into a physical address (PA), and sending the request with the DVA from the I/O hub to a processor coupled to the I/O hub if the I/O hub determines not to perform the address translation. Other embodiments are described and claimed. | 2009-02-05 |
20090037615 | DATA TRANSFER DEVICE, REQUEST ISSUING UNIT, AND REQUEST ISSUE METHOD - A request issuing unit for issuing a request signal for requesting data transfer by direct memory access. The request issuing unit including a data presence determination section configured to determine whether or not transfer data, as an object of the data transfer, is present, and a signal outputting section configured to output a request signal for data transfer of a predetermined amount of data to be transferred at one time when the data presence determination section determines that the transfer data is present. The request issuing unit further including a determination timing control section configured to wait for a predetermined waiting period of time, required for completing the data transfer of at least the amount of data to be transferred at one time, after the signal outputting section outputs the request signal, and then makes the data presence determination section determine again whether or not transfer data is present. | 2009-02-05 |
20090037616 | TRANSACTION FLOW CONTROL IN PCI EXPRESS FABRIC - A computer-executed method for controlling transaction flow in a network comprises communicating transaction packets among a plurality of devices in a network fabric and subdividing a memory into a plurality of memory segments for storing received transaction cycles according to transaction packet type comprising posted, non-posted, and completion cycles. A plurality of transaction cycles are received in the memory segment plurality at a target device and transaction cycle priority is allocated according to transaction packet type wherein posted cycles have highest priority. Cycles are retrieved from the memory segment plurality in an order determined by priority. | 2009-02-05 |
20090037617 | MIDDLE MANAGEMENT OF INPUT/OUTPUT IN SERVER SYSTEMS - A middle manager and methods are provided to enable a plurality of host devices to share one or more input/output devices. The middle manager initializes each shared input/output device and binds one or more functions of each input/output device to a specific host node in the system, such that hosts may only access functions to which they are bound. The middle manager may also utilize a configuration register map to translate values from the actual configuration register into a unique modified value for each of the plurality of host devices such that each host device may access and use the shared input/output device regardless of the firmware or operating system operating thereon. | 2009-02-05 |
20090037618 | Channel communicaton Array Queues in Hardware System Area - A bi-directional and full duplex facility for permitting both the IO processor and the Channel to write CCA messages on their respective queues at the same time. IOP messages to the channel are stored on the TO_CHN queue and Channel messages to the IOP on the TO_IOP queue. CCA Queues replace hardware CCAs due to increasing transmission capabilities of current IO processors and Channel processors. Even though the mechanism is similar, the present invention provides some benefits in the use of signaling. The IOP does not have to signal the Channel each time it puts something on its outbound queue. Each queue contains multiple slots. This allows the IOP and Channel to write multiple messages on the targeted queue without encountering a CCA busy signal. The actual queues are now structured in hardware system memory. | 2009-02-05 |
20090037619 | DATA FLUSH METHODS - A bridge capable of preventing data inconsistency is provided, in which a first master device outputs a flush request, a buffering unit buffers data or instructions, and a flush request control circuit records a buffer write pointer of the buffer according to the flush request and outputs a flush acknowledgement signal to the first master device in response of that a buffer read pointer of the buffering unit is identical to the recorded buffer write pointer. | 2009-02-05 |
20090037620 | Apparatus and Method for Efficient Communication of Producer/Consumer Buffer Status - An apparatus and method for efficient communication of producer/consumer buffer status are provided. With the apparatus and method, devices in a data processing system notify each other of updates to head and tail pointers of a shared buffer region when the devices perform operations on the shared buffer region using signal notification channels of the devices. Thus, when a producer device that produces data to the shared buffer region writes data to the shared buffer region, an update to the head pointer is written to a signal notification channel of a consumer device. When a consumer device reads data from the shared buffer region, the consumer device writes a tail pointer update to a signal notification channel of the producer device. In addition, channels may operate in a blocking mode so that the corresponding device is kept in a low power state until an update is received over the channel. | 2009-02-05 |
20090037621 | METHODOLOGY AND CIRCUIT FOR INTERLEAVING AND SERIALIZING/DESERIALIZING LCD, CAMERA, KEYPAD AND GPIO DATA ACROSS A SERIAL STREAM - A serializing/deserializing interface is discussed for reducing the number of connections and signals being carried over a flex cable as would be found in a hand held mobile device. In particular the interface interleaves data, multiplexes data and multiplexes control for a number of I/O devices. For example those I/O devices might include an LCD display, a camera, a keypad and a GPIO (general purpose I/O) device. | 2009-02-05 |
20090037622 | Method and system for changing operation modes of an interface device - There is provided a system for use in a Universal Serial Bus (“USB”) device to enable switching of a mode of operation of the USB device while maintaining a physical USB connection to a host device. According to one embodiment, the system includes a port coupled to the host device via a physical USB connection. The system further includes a USB module coupled to the port via a number of USB bus lines. One of the number of USB bus lines may be coupled to the port through a tristate device. The tristate device is configured to electrically disconnect the one of the number of USB bus lines from the host device and to electrically reconnect the one of the number of USB bus lines to the host device. | 2009-02-05 |
20090037623 | INTEGRATED KEYPAD SYSTEM - A data entry system using a number of different input signals provided by interacting with input means such as keys wherein to at least some of the different input signals a number of symbols including substantially all of the letters of the alphabet of one language are distributively assigned such that at least two of the letters are ambiguously assigned to at least one of the some input signals. The data entry system includes a database of words and uses a word predictive system such that in order to enter a word of the database the user provides a first input information consisting of providing the input signals corresponding to the characters, generally the letters, of the word, and an additional input information corresponding to at least one of the characters of the word and its corresponding input signal provided through the first input information, and wherein the system precisely recognizes the character among the ambiguous characters assigned to the input signal and provides a word of the dictionary that corresponds to the first and the additional input information. | 2009-02-05 |
20090037624 | Cache coherent switch device - In one embodiment, the present invention includes a switch device to be coupled between a first semiconductor component and a processor node by interconnects of a communication protocol that provides for cache coherent transactions and non-cache coherent transactions. The switch device includes logic to handle cache coherent transactions from the first semiconductor component to the processor node, while the first semiconductor component does not include such logic. Other embodiments are described and claimed. | 2009-02-05 |
20090037625 | Hard disk adaptor - A hard disk adaptor includes a substrate and an interface structure. The substrate has a connecting side and a communicating side opposite to the connecting side. The thickness of the substrate corresponds to the Mini-Serial Attached SCSI standard. The interface structure is disposed on the middle of the connecting side, and the interface structure corresponds to the Mini-Serial Attached SCSI standard. The interface structure is a concaving and protruding structure. The interface structure has a protruding portion and two concaving portions formed on the two opposite sides of the protruding portion. The protruding portion has a conductive portion. The hard disks having different interfaces are respectively connected to the unitary standard interfaces of a middle board by the interface structure. Therefore, the cost of the hard disk adaptor is reduced, the structure of the hard disk adaptor and the assembly of the hard disk and the middle board is simpler. | 2009-02-05 |
20090037626 | Multi-drop bus system - A multi-drop bus system and a method for operating such a system. The system includes a multi-drop bus having at least one bus line, each bus line being made up of a multiple of line segments. Each of the line segments terminates at a drop point and each drop point is coupled to a load impedance. The characteristic impedance of a line segment is matched to the equivalent impedance presented by the load impedance in combination with the characteristic impedance of a following segment, or is matched to the load impedance if there is no following segment. | 2009-02-05 |
20090037627 | Flash memory with millimeter wave host interface and method for use therewith - A host interface module includes a millimeter wave transceiver that is coupled to wirelessly communicate read commands, write commands, read data and write data between a flash memory device and a host device over a millimeter wave communication path in accordance with a host interface protocol. A protocol conversion module is coupled to convert the read commands, the write commands and the write data from the host interface protocol and to convert the read data to the host interface protocol. A host module is coupled to decode the read commands and the write commands from the host device, to process the read commands to retrieve the read data from the flash memory and to process the write commands to write the write data to the flash memory. | 2009-02-05 |
20090037628 | Processing system with millimeter wave host interface and method for use therewith - A processing system includes a plurality of first circuit modules and a wired data bus, connected to the plurality of first circuit modules. A plurality of second circuit modules are coupled to an RF data bus via a millimeter wave communication path. A millimeter wave modem receives first data from at least one of the plurality of first circuit modules via the wired data bus, and transmits the first data over the RF data bus to at least one of the plurality of second circuit modules. | 2009-02-05 |
20090037629 | MASTER SLAVE CORE ARCHITECTURE WITH DIRECT BUSES - A radio frequency (RF) integrated circuit (IC) operable to support wireless communications is provided. This RF IC includes a number of master components, a number of slave components, and a direct master slave bus. The master components may include a number of processing modules where each processing module is operable to support one or more functions of the RF IC. The direct master slave bus may couple at least one master component to at least one slave component based on mode of operation of the RF IC. | 2009-02-05 |
20090037630 | INFORMATION PROCESSING APPARATUS AND SMI PROCESSING METHOD THEREOF - An information processing apparatus includes: a CPU; a controller including a signal transmission unit configured to supply an SMI (system management interrupt) signal to the CPU; a multifunctional device having a plurality of functions each potentially causing an SMI; and a plurality of signal lines provided between the controller and the multifunctional device. Each of the signal lines corresponds to one of the plurality of functions and is configured to send a notification of occurrence of an SMI event from the multifunctional device to the controller. | 2009-02-05 |
20090037631 | Input Output Access Controller - A device for high-assurance processing is disclosed. A processing circuit uses an access controller to assure that the processing circuit operates properly. The processing circuit runs software programs and is programmable. The access controller is programmable, but not programmable by the processing circuit. Peripherals or segments of the address space of the processing circuit is regulated. In a particular state, the peripherals that are available are regulated by the access controller. In some embodiments, the transition from state-to-state can also be regulated by the access controller. | 2009-02-05 |
20090037632 | RECHARGEABLE WIRELESS PORTABLE DEVICE - A portable device comprises a wireless transceiver adapted to wirelessly communicate with a computing device. The portable device comprises a battery that provides power to the wireless transceiver. The portable device also comprises a first connector adapted to mate with a corresponding second connector on the computing device. The battery receives charging current from the portable computing device via the first connector. | 2009-02-05 |
20090037633 | GRAPHICS PROCESSOR IN A DOCKING STATION - A system that includes a docking station comprising a graphics processor and a transceiver. The system also includes a computer comprising a display. The computer is in communication with the docking station. The graphics processor receives input signals from the computer and, as a result, provides output signals to the computer. The computer uses the output signals to display images on the display. | 2009-02-05 |
20090037634 | METHOD AND APPARATUS FOR EXTERNAL DATA TRANSFER IN A PERSONAL STORAGE DEVICE - A micro-watt class sensing device uses host-computer Input/Output (I/O) capabilities when transferring data to/from the host-computer directly from/to memory in the sensing device. This capability allows data to be directly transferred (downloaded/uploaded) to/from the host system at a higher rate when a host system is present. | 2009-02-05 |
20090037635 | BUS ARBITRATION DEVICE - A bus arbitration device includes a top arbiter, and the hierarchical bus arbitration device also includes a first arbiter. The said first arbiter arbitrates the first kind of requests, wherein the first kind of requests relates to the first kind of master units. The said second arbiter arbitrates the second kind of requests different from the first kind of requests, wherein the second kind of requests relates to the second kind of master units different from the first kind of master units. Wherein the said first arbiter and the said second arbiter are downward respectively from the top arbiter to form the hierarchical bus arbitration structure. Bus arbitration efficiency increases by this bus arbitration device. | 2009-02-05 |
20090037636 | DATA FLUSH METHODS - A bridge capable of preventing data inconsistency without degrading system performance is provided, in which a buffering unit comprises a plurality of buffers, a first master device outputs a flush request to flush the buffering unit, and a flush request control circuit records the flushed buffer(s) in the buffering unit when receiving the flush request and outputs a flush acknowledge signal to indicate to the first master device that the buffering unit has been flushed when all the plurality of buffers have been flushed once after the flush request has been received. | 2009-02-05 |
20090037637 | MULTIUSER-MULTITASKING COMPUTER ARCHITECTURE - The present invention provides a multiuser-multitasking computer architecture, comprising a computing system comprising a chip set; an interface station connected to said computing system through a connection wire to transport data, wherein said interface station comprises a interface circuit; a monitor connected to said interface station; and an input device connected to said interface station. | 2009-02-05 |
20090037638 | Backend-connected storage system - A switch device is interposed between a controller and a storage device in a storage system. One or more physical ports among the plurality of physical ports that the switch device has are physical ports that are physically connected, without passing through a host, to one or more physical ports among the plurality of physical ports that another switch device in another storage system has. | 2009-02-05 |
20090037639 | JTAGCHAIN Bus Switching and Configuring Device - A JTAG bus cross point switching device that is commanded by the same bus which it configures. In a preferred embodiment a JTAG chain includes a cross point switching device that is capable of adding, omitting, or rearranging devices on a JTAG bus. The switching device itself is controlled by commands on the JTAG bus which it configures. | 2009-02-05 |
20090037640 | SYSTEMS AND METHODS FOR STORING TEST DATA AND ACCESSING TEST DATA - A system and a method for storing test data are provided. The system includes a memory device and a computer operably communicating with the memory device. The computer is configured to receive test data comprising various data types. The computer is further configured to convert the various data types into 8-bit characters that are stored in a character array. The character array can be stored in a memory device utilizing a single write command. | 2009-02-05 |
20090037641 | Memory controller with multi-protocol interface - A multi-protocol memory controller includes one or more memory channel controllers. Each of the memory channel controllers coupled to a single channel of DIMM, where the DIMM in each single channel operate according to a specific protocol. A protocol engine is coupled to the memory channel controllers. The protocol engine is configurable to accommodate one or more of the specific protocols. Finally, a system interface is coupled to the protocol engine and is configurable to provide electrical power and signaling appropriate for the specific protocols. | 2009-02-05 |
20090037642 | METHOD OF MANAGING AND RESTORING IDENTIFIER OF STORAGE DEVICE AND APPARATUS THEREFOR - A method of managing and restoring an identifier of a storage device and an apparatus therefor are provided. The method includes the operations of generating a storage device identifier; recording the storage device identifier in a non-volatile memory of a host; generating an identifier file including the storage device identifier and a host identifier; and recording the identifier file in the storage device. By doing so, the method and apparatus can efficiently and securely manage the storage device. | 2009-02-05 |
20090037643 | Semiconductor memory device including control means and memory system - A semiconductor memory device includes a first nonvolatile memory which has a first external interface and is capable of recording 1-bit data in one memory cell, a second nonvolatile memory which has a test terminal interface and is capable of recording a plurality of data in one memory cell, and a control unit which has a second external interface and is configured to control a physical state of an inside of the second nonvolatile memory. | 2009-02-05 |
20090037644 | System and Method of Storing Reliability Data - Systems and methods of storing error correction data are provided. A method may include storing data at a first memory having a first non-volatile memory type. The method may also include determining error correction data related to the stored data. The method may further include storing the error correction data at a second memory having a second non-volatile memory type. The first non-volatile memory may have a slower random access capability than the second non-volatile memory. | 2009-02-05 |
20090037645 | NON-VOLATILE MEMORY DEVICE AND DATA ACCESS CIRCUIT AND DATA ACCESS METHOD - A non-volatile memory device, a data access circuit and a data access method are provided. The non-volatile memory device includes a main controller, a plurality of sub-controllers and a plurality of memory blocks. The sub-controllers are coupled to the main controller and are used to execute the tasks assigned by the main controller. The memory blocks are respectively coupled to the corresponding sub-controllers. The main controller is used to divide a received main data into a plurality of sub-data, and the sub-data are respectively saved in the memory blocks through corresponding sub-controllers. Therefore, the data access speed of the non-volatile memory device is substantially speeded-up. | 2009-02-05 |
20090037646 | Method of using a flash memory for a circular buffer - A method of using a FLASH memory for a circular buffer, and the FLASH memory for same, the method including one or more of the following steps in various exemplary embodiments: providing a circular buffer having a plurality of sectors; designating a byte of each of the plurality of sectors of the circular buffer as a binary state indicator; saving data sequentially in the circular buffer; and cycling through a plurality of sectors of the binary state indicators, such as empty or erase, last, middle and first, as the data is sequentially saved in the circular buffer. | 2009-02-05 |
20090037647 | SEMICONDUCTOR MEMORY CARD, METHOD FOR CONTROLLING THE SAME, AND SEMICONDUCTOR MEMORY SYSTEM - A semiconductor memory card which can be attached to a host apparatus and can be removed from the host apparatus includes a plurality of data transfer terminals, and an internal circuit transmitting a first signal to at least one first data transfer terminal comprising at least one of the data transfer terminals and transmitting a second signal to at least one second data transfer terminal comprising at least one of the data transfer terminals different from the first data transfer terminals. The second signal is generated by executing a logical operation on the first signal. | 2009-02-05 |
20090037648 | INPUT/OUTPUT CONTROL METHOD AND APPARATUS OPTIMIZED FOR FLASH MEMORY - An input/output control method and apparatus optimized for a flash memory, which can improve the performance of the flash memory. The input/output control method optimized for a flash memory includes determining whether a random write operation of data occurs in a flash memory, and successively writing randomly input data in a predetermined surplus region of the flash memory if it is judged that the random write operation occurs. | 2009-02-05 |
20090037649 | Methods and Systems for Running Multiple Operating Systems in a Single Mobile Device - Methods and systems for running multiple operating systems in a single embedded or mobile device (include PDA, cellular phone and other devices) are disclosed. The invention allows a mobile device that normally can only run a single operating system to run another operating system while preserving the state and data of the original operating system. Guest OS is packaged into special format recognizable by the host OS that still can be executed in place by the system. The Methods include: Change the memory protection bits for the original OS; Fake a reduced physical memory space for guest OS; Use special memory device driver to claim memories of host OS; Backup whole image of the current OS and data to external memory card. | 2009-02-05 |
20090037650 | Function updatable device and an options card therefor - A device such as for example a electronic medical device has a memory that has prestored therein a number of programs or routines for performing various functions. Some of those functions are optional functions that were not enabled when the equipment was put into service. If the user of the equipment desires thereafter to activate any one of those optional functions, an options card that has a number of memory blocks each specifically configured to enable one of the prestored optional functions is sent to the user. The user can then insert the options card into a receptacle integrated into the device and, upon power up of the device, elect a menu for enabling the desired optional function(s) prestored in the device. The options card may be configured to have a count number that indicates the number of devices the card may be used for enabling a particular optional function. The options card may further be configured to include data that may be used to enable or disable multiple optional functions prestored in the device. When returned to the manufacturer, given that the serial numbers of the machines to which the options card was inserted are recorded therein, the manufacturer can easily keep tab of the status of those machines in the field that had had optional functions enabled/disabled. | 2009-02-05 |
20090037651 | Non-Volatile Memory and Method with Phased Program Failure Handling - In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block. | 2009-02-05 |
20090037652 | Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules - A flash module has raw-NAND flash memory chips accessed over a physical-block address (PBA) bus by a NVM controller. The NVM controller is on the flash module or on a system board for a solid-state disk (SSD). The NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Data striping and interleaving among multiple channels of the flash modules is controlled at a high level by a smart storage transaction manager, while further interleaving and remapping within a channel may be performed by the NVM controllers. A SDRAM buffer is used by a smart storage switch to cache host data before writing to flash memory. A Q-R pointer table stores quotients and remainders of division of the host address. The remainder points to a location of the host data in the SDRAM. A command queue stores Q, R for host commands. | 2009-02-05 |
20090037653 | METHODS AND ARRANGEMENTS FOR MULTI-BUFFERING DATA - Embodiments may logic such as hardware and/or code within heterogeneous multi-core processor or the like to coordinate reading from and writing to buffers substantially simultaneously. Many embodiments include multi-buffering logic for implementing a procedure for a processing unit of a specialized processing element. The multi-buffering logic may instruct a direct memory access controller of the specialized processing element to read data from some memory location and store the data in a first buffer. The specialized processing element can then process data in the second buffer and, thereafter, the multi-buffering logic can block read access to the first buffer until the direct memory access controller indicates that the read from the memory location is complete. In such embodiments, the multi-buffering logic may then instruct the direct memory access controller to write the processed data to other memory. | 2009-02-05 |
20090037654 | System, method, and computer program product for detecting access to a memory device - Discrete events that take place with respect to a hard disk drive or other I/O device or port are indicated to logic that implements Self-Monitoring Analysis and Reporting Technology (SMART) or similar technology. These events are communicated to SMART as event data. Examples of such discrete events include power on, power off, spindle start, and spindle stop, positioning of the actuator, and the time at which such events occur. SMART then compiles event data to create compiled activity data. Compiled activity data represents summary statistical information that is created by considering some or all of the event data. Examples of compiled activity data include the Time Powered On and Power Cycle Count. Collection logic then writes the compiled activity data to a memory medium. An analyst can then read data from log file(s). | 2009-02-05 |
20090037655 | System and Method for Data Storage and Backup - Systems and methods for data storage and backup are disclosed. A system for data storage and backup may include a storage array comprising one or more storage resources and an agent running on a host device, the agent communicatively coupled to the storage array. The agent may be operable to automatically allocate one or more storage resources for the storage of data associated with a backup job of the hose device and communicate the data associated with the backup job to the allocated storage resources. | 2009-02-05 |
20090037656 | STORAGE SYSTEM HAVING RAID LEVEL CHANGING FUNCTION - A plurality of storage devices, provided in a storage system, comprise not less than two member storage devices, which are storage devices provided as members of a RAID group, and a spare storage device, which is not a member of the RAID group. A controller, provided in the storage system, uses the spare storage device to carry out the changing of the RAID level of the RAID group from a first RAID level to a second RAID level. | 2009-02-05 |
20090037657 | Memory expansion blade for multiple architectures - A memory expansion blade for a multi-protocol architecture, includes dual inline memory modules (DIMMs) and a multi-protocol memory controller coupled to the DIMMs and operable to control operations of the DIMMs. The multi-protocol memory controller includes one or more memory channel controllers, with each of the memory channel controllers coupled to a single channel of DIMM, and where the DIMM in each single channel operate according to a specific protocol. The controller further includes a protocol engine coupled to the memory channel controllers, where the protocol engine is configurable to accommodate one or more of the specific protocols, and a system interface coupled to the protocol engine and configurable to provide electrical power and signaling appropriate for the specific protocols. | 2009-02-05 |
20090037658 | Providing an inclusive shared cache among multiple core-cache clusters - In one embodiment, the present invention includes a method for receiving requested data from a system interconnect interface in a first scalability agent of a multi-core processor including a plurality of core-cache clusters, storing the requested data in a line of a local cache of a first core-cache cluster including a requester core, and updating a cluster field and a core field in a vector of a tag array for the line. Other embodiments are described and claimed. | 2009-02-05 |
20090037659 | Cache coloring method and apparatus based on function strength information - A method of performing cache coloring includes the steps of generating a dynamic function flow representing a temporal sequence in which a plurality of functions are called at a time of executing a program comprised of the plurality of functions by executing the program by a computer, generating function strength information in response to the dynamic function flow by use of the computer, the function strength information including information about runtime relationships between any given one of the plurality of functions and all the other ones of the plurality of functions in terms of a way the plurality of functions are called and further including information about degree of certainty of cache miss occurrence, and allocating the plurality of functions to memory space by use of the computer in response to the function strength information such as to reduce instruction cache conflict. | 2009-02-05 |
20090037660 | Time-based cache control - A time-based system and method are provided for controlling the management of cache memory. The method accepts a segment of data, and assigns a cache lock-time with a time duration to the segment. If a cache line is available, the segment is stored (in cache). The method protects the segment stored in the cache line from replacement until the expiration of the lock-time. Upon the expiration of the lock-time, the cache line is automatically made available for replacement. An available cache line is located by determining that the cache line is empty, or by determining that the cache line is available for a replacement segment. In one aspect, the cache lock-time is assigned to the segment by accessing a list with a plurality of lock-times having a corresponding plurality of time duration, and selecting from the list. In another aspect, the lock-time durations are configurable by the user. | 2009-02-05 |
20090037661 | Cache mechanism for managing transient data - A system and method are provided for managing transient data in cache memory. The method accepts a segment of data and stores the segment in a cache line. In response to accepting a read-invalidate command for the cache line, the segment is both read from the cache line and the cache line made invalid. If, prior to accepting the read-invalidate command, the segment in the cache line is modified, the modified segment is not stored in a backup storage memory as a result of subsequently accepting the read-invalidate command. In one aspect, the segment is initially identified as transient data, and the read-invalidate command is used in response to identifying the segment as transient data. | 2009-02-05 |
20090037662 | Method for Selectively Enabling and Disabling Read Caching in a Storage Subsystem - A mechanism for selectively disabling and enabling read caching based on past performance of the cache and current read/write requests. The system improves overall performance by using an autonomic algorithm to disable read caching for regions of backend disk storage (i.e., the backstore) that have had historically low cache hit ratios. The result is that more cache becomes available for workloads with larger hit ratios, and less time and machine cycles are spent searching the cache for data that is unlikely to be there. | 2009-02-05 |
20090037663 | PROCESSOR EQUIPPED WITH A PRE-FETCH FUNCTION AND PRE-FETCH CONTROL METHOD - A processor equipped with a pre-fetch function comprises: first layer cache memory having a first line size; second layer cache memory that is on the under layer of the first layer cache memory and that has a second line size different from the first line size; and a pre-fetch control unit for issuing a pre-fetch request from the first layer cache memory to the second layer cache memory so as to pre-fetch a block equivalent to the first line size for each second line size. | 2009-02-05 |
20090037664 | SYSTEM AND METHOD FOR DYNAMICALLY SELECTING THE FETCH PATH OF DATA FOR IMPROVING PROCESSOR PERFORMANCE - A system and method for dynamically selecting the data fetch path for improving the performance of the system improves data access latency by dynamically adjusting data fetch paths based on application data fetch characteristics. The application data fetch characteristics are determined through the use of a hit/miss tracker. It reduces data access latency for applications that have a low data reuse rate (streaming audio, video, multimedia, games, etc.) which will improve overall application performance. It is dynamic in a sense that at any point in time when the cache hit rate becomes reasonable (defined parameter), the normal cache lookup operations will resume. The system utilizes a hit/miss tracker which tracks the hits/misses against a cache and, if the miss rate surpasses a prespecified rate or matches an application profile, the hit/miss tracker causes the cache to be bypassed and the data is pulled from main memory or another cache thereby improving overall application performance. | 2009-02-05 |
20090037665 | HIDING CONFLICT, COHERENCE COMPLETION AND TRANSACTION ID ELEMENTS OF A COHERENCE PROTOCOL - According to one embodiment of the invention, an apparatus having one or more cache agents and a protocol agent is disclosed. The protocol agent is coupled to the one or more cache agents to receive events corresponding to cache operations from the one or more cache agents to maintain ordering with respect to the cache operation events. The protocol agent includes a structure to handle conflict resolution. | 2009-02-05 |
20090037666 | CACHE LOCKING DEVICE AND METHODS THEREOF - A method and device for locking a cache line of a cache is disclosed. The method includes automatically changing a state of a cache line from a valid locked state to an invalid locked state in response to receiving an indication that a memory location external to the cache and corresponding to the cache line is associated with an access request by a processor or other data access module. Thus, the locked state of a cache line is maintained even after data in the locked cache line is invalidated. By maintaining the invalid locked state, the cache line is not available for reallocation by the cache. This allows locked cache lines that become invalidated to remain locked without additional software overhead to periodically determine whether the lock has been lost due to invalidation of the cache line. | 2009-02-05 |
20090037667 | Electronic device data access system and method - An electronic device data access method comprising sharing, by an operating system and a pre-boot environment module, data stored in a hard disk drive in the electronic device and accessing the data using a block location list identifying a storage location for each portion of the stored data. | 2009-02-05 |
20090037668 | PROTECTED PORTION OF PARTITION MEMORY FOR COMPUTER CODE - A system comprises a plurality of computing nodes and a plurality of separate memory devices. A separate memory device is associated with each computing node. The separate memory devices are configured as partition memory in which memory accesses are interleaved across multiple of such memory devices. A protected portion of the partition memory is reserved for use by complex management (CM) code that coordinates partitions implemented on the system. The protected portion of partition memory is restricted from access by operating systems running in the partitions. | 2009-02-05 |
20090037669 | Detachable direct memory access arrangement - A new and useful DMA-like arrangement provides fast inter-system transfers of large data volumes. A preferred embodiment of the invention includes a data-transfer-out system and further includes a data-transfer-in system. At least one of the systems has a dual ported memory structure configured in a way so that data can move out of a memory module of the structure from one port while other data can independently move into the memory module through the other port. The systems are detachable with respect to each other, and the memory modules of both systems are correspondingly paired with compatible specifications such as module sizes. Furthermore, these memory modules are physically configured in a way so that inter-system data transfer occurs in a parallel (i.e., module to module) manner without the aid of the CPU of the system that has the dual ported memory structure. | 2009-02-05 |
20090037670 | DISK CONTROLLER WITH MILLIMETER WAVE HOST INTERFACE AND METHOD FOR USE THEREWITH - A host interface module couples a disk controller of a disk drive to a host device. The host interface module includes a millimeter wave transceiver that is coupled to wirelessly communicate read commands, write commands, the read data and the write data between the disk controller and the host device over a millimeter wave communication path in accordance with a host interface protocol. A protocol conversion module is coupled to convert the read commands, the write commands and the write data from the host interface protocol and to convert the read data to the host interface protocol. A host module is coupled to decode the read commands and the write commands from the host device, to process the read commands to retrieve the read data from the disk drive via a read/write channel and to process the write commands to write the write data to the disk drive via the read/write channel. | 2009-02-05 |
20090037671 | HARDWARE DEVICE DATA BUFFER - One embodiment includes a system comprising a processor configured to read and write data packets via a data bus to and from at least one additional hardware device. The system also comprises a data buffer configured to store a plurality of consecutive related flits associated with at least one of the data packets in one of a plurality of addressable locations of the data buffer. The system further comprises a pointer memory configured to store a respective pointer associated with each of the plurality of addressable locations of the data buffer. | 2009-02-05 |
20090037672 | Method and System for Tracking Data Correspondences - One embodiment is a method for tracking data correspondences in a computer system including a host hardware platform, virtualization software running on the host hardware platform, and a virtual machine running on the virtualization software, the method including: (a) monitoring one or more data movement operations of the computer system; and (b) storing information regarding the one or more data movement operations in a data correspondence structure, which information provides a correspondence between data before one of the one or more data movement operations and data after the one of the one or more data movement operations. | 2009-02-05 |
20090037673 | External Memory Controller Node - A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network. | 2009-02-05 |
20090037674 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of operating units, a controller that controls the plurality of operating units according to predetermined state transition, a first storage that stores data to be processed, a second storage that stores circuit information specifying an operation process performed in the plurality of operating units, a third storage that stores data access information for the first storage and a pointer for the second storage in association with a state of the controller. The controller reads an address and the pointer stored in the third storage according to the state, and transmits the circuit information stored in a region of the second storage specified by the read pointer to the plurality of operating units. | 2009-02-05 |