04th week of 2012 patent applcation highlights part 20 |
Patent application number | Title | Published |
20120019246 | METHOD FOR MAGNETIC RESONANCE IMAGING BASED ON PARTIALLY PARALLEL ACQUISITION (PPA) - In a method and system for magnetic resonance imaging of an examination subject on the basis of partially parallel acquisition (PPA) with multiple component coils, a calibration measurement is implemented in a first time period and an actual measurement for the imaging is implemented in a subsequent second time period. In the calibration measurement, calibration data for predetermined calibration points in spatial frequency space are acquired with the multiple component coils. In the actual measurement, incomplete data sets are respectively acquired in spatial frequency space with each of the multiple component coils. Complete data sets are reconstructed from the incomplete data sets and the calibration data. The first time period and the second time period are different, and the measurements are implemented when triggered in the two time periods. An essentially identical state of the examination subject or of the measurement system is used as a trigger. | 2012-01-26 |
20120019247 | SAR REDUCTION IN PARALLEL TRANSMISSION BY K-SPACE DEPENDENT RF PULSE SELECTION - When generating an MR image using a multi-channel transmit coil arrangement, SAR is reduced by employing a number of different RF pulses in a single scan. Each RF pulse exhibits a different performance and/or accuracy, resulting in different RF pulse-specific SAR values. As a result, the RF pulses differ slightly in actual excitation pattern, B1 waveform and/or k-space trajectory, etc. The average SAR over a single scan is thus reduced compared to a fixed RF pulse, without compromising image quality. | 2012-01-26 |
20120019248 | MAGNETIC RESONANCE IMAGING APPARATUS AND METHOD - When imaging for sensitivity distribution measurement is performed, a whole-body coil for both transmission and reception and a specified coil used for the present imaging are used as a reception coil, while being switched. | 2012-01-26 |
20120019249 | MASS DAMPED BORE TUBE FOR IMAGING APPARATUS - A bore tube for use in an imaging apparatus has a first tube and a second tube. The first tube is a complete cylinder of electrically conductive material; and the second tube is segmented into separate elements, each separately attached to the first tube. | 2012-01-26 |
20120019250 | NOISE MATCHING IN COUPLET ANTENNA ARRAYS - The invention relates to a system comprising an array of two or more receiving antennas ( | 2012-01-26 |
20120019251 | MAGNETIC RESONANCE IMAGING METHOD, MAGNETIC RESONANCE IMAGING APPARATUS, AND CONTROL DEVICE OF MAGNETIC RESONANCE IMAGING APPARATUS - According to one embodiment, an MRI apparatus includes a signal acquisition unit, an image generating unit, a position acquiring unit, and a correction unit. The signal acquisition unit acquires a magnetic resonance signal produced from an object by applying a gradient magnetic field and an RF pulse in an imaging space where the object is placed. The image generating unit reconstructs image data on the object based on the magnetic resonance signal. The position acquiring unit acquires an imaging region as positional information in the imaging space. The correction unit brings a distribution of the gradient magnetic field close to a target distribution by transforming a waveform of the gradient magnetic field based on “the positional information and a time constant of an eddy-current magnetic field” to cancel the eddy-current magnetic field. | 2012-01-26 |
20120019252 | THROUGH-STACK COMMUNICATION METHOD FOR FUEL CELL MONITORING CIRCUITS - A system and method for monitoring fuel cells in a fuel cell group. The system includes a sensor circuit, such as a voltage sensor circuit, that monitors a condition of the fuel cells. If the sensor circuit detects a low performing cell, then it sends a signal to a tone generator that generates a frequency signal that switches a load into and out of the cell group. A voltage sensor detects the voltage of the cell group including the frequency signal, and sends the detected voltage signal to a tone decoder that decodes the frequency signal to determine that the fuel cells are low performing. | 2012-01-26 |
20120019253 | METHOD FOR DETERMINING AN AGING CONDITION OF A BATTERY CELL BY MEANS OF IMPEDANCE SPECTROSCOPY - The invention relates to a method for determining an aging condition of a battery cell. The method has the following steps of a) providing a battery cell, b) recording an impedance spectrum of the battery cell, c) determining an evaluation quantity based on the measured impedance spectrum, and d) determining an aging condition of the battery cell based on a comparison of the evaluation quantity to a reference value. | 2012-01-26 |
20120019254 | METHOD TO PREDICT MIN CELL VOLTAGE FROM DISCRETE MIN CELL VOLTAGE OUTPUT OF STACK HEALTH MONITOR - A system for estimating parameters of a fuel cell stack. The system includes a stack health monitor for monitoring minimum cell voltage, stack voltage and current density of the fuel cell stack. The stack health monitor also indicates when a predetermined minimum cell voltage threshold level has been achieved. The system further includes a controller configured to control the fuel cell stack, where the controller determines and records the average fuel cell voltage. The controller generates and stores artificial data points proximate to the one or more predetermined minimum cell voltage threshold levels each time the minimum cell voltage drops below the one or more predetermined minimum cell voltage threshold levels so as to provide an estimation of the fuel cell stack parameters including a minimum cell voltage trend and a minimum cell voltage polarization curve. | 2012-01-26 |
20120019255 | STACK-POWERED FUEL CELL MONITORING DEVICE WITH PRIORITIZED ARBITRATION - A system that monitors fuel cells in a fuel cell group. The system includes a plurality of voltage sensors coupled to the fuel cells in the fuel cell group, where each sensor monitors a different voltage of the fuel cells and where lower priority voltage sensors monitor higher voltages and higher priority sensors monitor lower voltages. The system also includes a plurality of oscillators where a separate oscillator is coupled to each of the sensors. Each oscillator operates at a different frequency where higher frequency oscillators are coupled to lower priority sensors and lower frequency oscillators are coupled to higher priority sensors. A light source that receives frequency signals from the oscillators and switches on and off in response to the frequency signals. A light pipe receives the switched light signals from the light source and provides light signals at a certain frequency at an end of the light pipe. | 2012-01-26 |
20120019256 | METHOD AND APPARATUS FOR CHECKING INSULATION OF POUCH ELECTRIC CELL AND PROBE FOR THE SAME - To check insulation of a pouch electric cell, probes are contacted to an electrode of a pouch electric cell and an aluminum layer of a pouch of the pouch electric cell, respectively, and then an electric characteristic value between the probes is measured. The probe contacted with the aluminum layer has a contact portion made of conductive elastic material. Also, insulation of the pouch electric cell is determined by comparing the measured electric characteristic value with a reference value. Thus, physical characteristics of an outer periphery of a flexible pouch may be sufficiently exhibited in measuring or checking insulation of a pouch electric cell such as insulation resistance, thereby improving reliability of electric contact and minimizing physical damage or deformation of the pouch electric cell. | 2012-01-26 |
20120019257 | APPARATUS AND METHOD FOR MEASURING ION BEAM CURRENT - Techniques for ion beam current measurement, especially for measuring low energy ion beam current, are disclosed. In one exemplary embodiment, the techniques may be realized as an ion beam current measurement apparatus has at least a planar Faraday cup and a magnet device. The planar Faraday cup is close to an inner surface of a chamber wall, and may be non-parallel to or parallel to the inner surface. The magnet device is located close to the planar Faraday cup. Therefore, by properly adjusting the magnetic field, secondary electrons, incoming electrons and low energy ions may be adequately suppressed. Further, the planar Faraday cup may surround an opening of an additional Faraday cup being any conventional Faraday cup. Therefore, the whole ion beam may be received and measured well by the larger cross-section area of at least the planar Faraday cup on the ion beam path. | 2012-01-26 |
20120019258 | ELECTROCHEMICAL SENSOR AND METHOD FOR THE PRODUCTION THEREOF - An electrochemical sensor allows even extremely small quantities or concentrations of a target chemical substance to be detected or quantified with a high precision in a particularly reliable manner. The novel sensor has a detector zone formed by nanoparticles which are embedded in a matrix and have a higher electric conductivity than the matrix material. The electric conductivity of the zone is determined by electron tunneling, ionization or hopping processes among the nanoparticles and by the electrochemical interaction thereof with a target substance to be detected. | 2012-01-26 |
20120019259 | Continuity testing device - A continuity testing device is provided which can reliably detect incomplete-fitting of the retainer of the connector. The continuity testing device includes a connector guide block into which the connector is inserted in a transverse direction and which is fixed above an opening formed on a cover plate of a case of the continuity testing device, a detection plate provided to the connector guide block and arranged above the connector so as to contact with the incompletely-fitted retainer of the connector when moved downward, a detection pin arranged at the detection plate, a continuity testing part arranged to move in the vertical direction toward the connector, a drive mechanism that operates the detection plate to move in the vertical direction in conjunction with the continuity testing part, and a switch that is activated by the detection pin when the detection pin is completely moved down to the switch. | 2012-01-26 |
20120019260 | MULTIPOLAR LEAD EVALUATION DEVICE - A multipolar lead evaluation device may be configured to easily permit electrical contact to be made between a pacing system analyzer and the terminal pin and each of the terminal contacts of an implantable lead without damaging the implantable lead. Alligator clips may be used to secure electrical conductors from the pacing system analyzer to spring contact clips disposed within the lead evaluation device. | 2012-01-26 |
20120019261 | CALIBRATION OF CONDUCTIVITY MEASUREMENT SYSTEM - A system and method for calibrating a digital conductivity and temperature measuring system. A connector is interposed between a sensor and transmitter of the digital conductivity and temperature measuring system. A calibrator, which may have selectable resistors with known values, is also attached to the connector. The sensor measures a raw resistance for a selected resistor. The digital conductivity and temperature measuring system then compares the raw resistance to the known value of the resistor to calculate a calibration factor. | 2012-01-26 |
20120019262 | TIME DIFFERENCE MEASUREMENT APPARATUS - A time difference measurement apparatus for measuring a time difference between transmission delay times of signals transmitted on two signal lines, includes: a selector for outputting one of the signals transmitted on the signal lines in accordance with a selection signal; a switch for outputting the selection signal in accordance with an output signal of the selector, the output signal being delayed for a predetermined time; a feedback loop for connecting the output of the selector to the input ends of the two signal lines; and a controller for calculating a time difference between transmission delay times of the signals transmitted on the two signal lines on the basis of self-oscillation cycles of signals transmitted through the feedback loop, the self-oscillation cycles changing in accordance with a logical value of the selection signal. | 2012-01-26 |
20120019263 | Precision Measurement of Capacitor Mismatch - Circuitry and methods for measuring capacitive mismatch with improved precision. The capacitors under measurement are connected in series in a voltage divider, with the node common to both capacitors connected to the gate of a source follower transistor. In one disclosed embodiment of the invention, a ramped voltage is applied to the drain of the source follower transistor simultaneously with the ramped voltage applied to the voltage divider; the slope of the ramped drain voltage is at the nominal slope of the voltage at the common node of the voltage divider. In another embodiment, a second transistor in saturation has its gate coupled to the source of the source follower device, and its source connected to the drain of the source follower device in series with a constant voltage drop. The drain-to-source voltage of the source follower device is thus held constant in each embodiment, improving precision of the measurement. | 2012-01-26 |
20120019264 | MULTI PURPOSE CAPACITIVE SENSOR - A multi purpose capacitive sensor which is suitable for indicating close proximity of a person to a surface along a large-size truck as well as along a medium-size painting. A voltage measuring device is provided with a signal ground connected to a first pole of an oscillating voltage source that has a second pole connected to earth and that is connected to an input of the voltage measuring device via a voltage divider with a capacitive series link arranged between the input and earth and a shunt link arranged between the input and the signal ground. The signal ground is connected to electrically conductive means extended along the surface and the oscillating voltage source is connected to earth via a second voltage divider in which a capacitive series link is arranged between the earth and the second pole. | 2012-01-26 |
20120019265 | CAPACITIVE TOUCH PANEL - Changes of the stray capacitances of a large number of sensing electrodes can be detected simultaneously. Further, even if a stray capacitance changes slightly, an input operation to a sensing electrode can be detected based on elapsed time until the electric potential of the sensing electrode becomes the same as a threshold potential. The stray capacitance of a sensing electrode and a resistor of the sensing electrode form a CR time constant circuit. Charge or discharge of the stray capacitance of the sensing electrode is controlled while a rest time in a predetermined time ratio is set. A stray capacitance that slightly increases in response to an input operation made near a sensing electrode can be detected by detecting the stray capacitance in extended elapsed time until the electric potential of the sensing electrode becomes the same as the threshold potential. | 2012-01-26 |
20120019266 | CAPACITIVE TOUCH PANEL - A capacitive touch panel can select a way of voltage control with a high degree of detection accuracy according to operating environment. In response to approach of an input unit, the stray capacitance of the sensing electrode the input unit approached increases. Accordingly, charge and discharge of the stray capacitances of a plurality of sensing electrodes are controlled, and a sensing electrode the potential change of which is made slow by the increase in stray capacitance and resultant increase in time constant is detected as a sensing electrode the input unit approached. The stray capacitance of a sensing electrode can selectively be controlled either by the charge control or by the discharge control, and optimum one of the controls is selected according to operating environment. | 2012-01-26 |
20120019267 | HIGH FREQUENCY DETECTION DEVICE AND COAXIAL CABLE INCLUDING THE SAME - The present invention provides a high frequency detection device that detects a high frequency voltage signal according to a high frequency voltage generated in a power transmission body. The high frequency detection device includes a substrate and a capacitance conductor fixed to the substrate. The capacitance conductor includes a penetration portion and a capacitor electrode. In the penetration portion, the power transmission body is disposed so as to extend along the penetration portion in a state in which the axial direction of the power transmission body and the substrate are substantially orthogonal. The capacitor electrode is provided to be opposed to the power transmission body. | 2012-01-26 |
20120019268 | CAPACITANCE SENSOR LAYOUT SCHEME FOR LINEARITY IMPROVEMENT - A capacitive touchpad includes a plurality of parallel traces configured in a capacitance sensor layout scheme such that the maximum sensor gap is smaller than the sensor pitch to improve the sensor response linearity of the capacitive touchpad. | 2012-01-26 |
20120019269 | MOTION SENSING DEVICE AND ELECTRONIC DEVICE USING THE SAME - A motion sensing device includes a housing defining a chamber that includes a number of sidewalls. A number of movable members are connected to the sidewalls and able to move toward the sidewalls. Each movable member includes a number of conductive grooves opposing the sidewalls and having a resistance layer. A number of conductive spring members are respectively fixed to the sidewalls and each include a free end movably received in one conductive groove. An inertial weight is movably received in a space defined by the movable members. When the motion sensing device is jerked, the inertial weight moves and is able to apply a pushing force to one of the movable members, causing one of the movable members to move and causing two of the free ends in the same conductive groove to move toward each other. | 2012-01-26 |
20120019270 | Microfabricated pipette and method of manufacture - A pipette suitable for carrying out patch clamp techniques for characterizing the physiology of living cells is constructed using microfabrication techniques applied to silicon wafers. The pipette includes a body portion configured for mounting in a micromanipulator and a patch tip having a patch aperture. An internal passage through the pipette permits controlled dialysis of the cell contents. A solid conductive electrode near the patch tip can be connected to suitable electronics, permitting electrical activity of the cell to be monitored with very low access resistance and lowering the capacitance of the pipette. Other microfluidic devices such as pumps and valves are integrated into the device so that the dialysis can be rapidly controlled by electronic means. The pipette can also be configured so that multiple cells can be patched simultaneously, or multiple patches can be made on a single cell simultaneously. The design includes a method for separately fabricating the tip and body of the pipette, reducing the expense of fabrication. | 2012-01-26 |
20120019271 | DEVICE FOR DETECTING PHYSICAL STATE VARIABLES OF A MEDIUM - In the case of a device for detecting physical state variables of a medium, such as pressure or temperature, for example, of a liquid, comprising at least one measuring sensor, which is connected to at least one electrical conductor so as to transmit signals, wherein at least one section of the conductor, which encompasses the sensor, is embedded in a casting compound, the casting compound is embodied, according to the invention, from at least one casting core and a casting jacket, which encloses the casting core, and provision is made in the casting compound for at least one recess for a media-conducting access to a contact surface of the sensor. | 2012-01-26 |
20120019272 | PIN CARD AND TEST APPARATUS USING THE SAME - A DUT is connected to an I/O terminal. An AC test unit performs an AC test operation for the DUT. A DC test unit performs a DC test operation for the DUT. An optical semiconductor switch is arranged such that a first terminal thereof is connected to the AC test unit and a second terminal thereof is connected to the I/O terminal. The optical semiconductor switch | 2012-01-26 |
20120019273 | NO PIN TEST MODE - This application provides apparatus and methods for initiating tests in an interface circuit without using inputs of the interface circuit dedicated to initiating the tests. In an example, a test mode interface circuit can include a voltage comparator configured compare a first voltage to a second voltage, a ripple counter configured to count pulses from a processor when the voltage comparator indicates that the first voltage is greater than the second voltage, and wherein the test mode interface circuit is configured to provide a test mode enable signal and an indication of the a desired test mode an interface circuit that includes the test mode interface circuit. | 2012-01-26 |
20120019274 | ELECTRONIC APPARATUS HAVING IC TEMPERATURE CONTROL - The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles without the use of environmental ovens. Testing IC devices at elevated temperatures may be useful for ‘burn-in’, for ‘hot sort’ performance testing that may be used in electronic devices such as DRAM memory, logic, communication devices, and microprocessors. The power sink function may be implemented as an additional isolated area of active devices, or as a section of the circuit that is not involved in the testing procedure. Alternately, the power dissipation circuit may consist of a resistive path between two external pins that are not used for IC operation, where the resistor may be on the IC or on the package. This allows for control of the temperature level and profile by simple adjustment of the voltage between the two external pins. | 2012-01-26 |
20120019275 | Contact -Connection Unit for a Test Apparatus for Testing Printed Circuit Boards - The invention relates to a contacting unit for a test apparatus for testing printed circuit boards. The contacting unit comprises a full grid cassette and an adapter. The full grid cassette is provided with a plurality of spring contact pins arranged in the grid of contact points of a basic grid of a test apparatus. The adapter is provided with test needles for electrically connecting each of the spring contact pins of the full grid cassette to a circuit board test point of a printed circuit board to be tested, the spring contact pins being secured in the full grid cassette against falling out on the side remote from the adapter and the test needles being secured in the adapter on the side remote from the full grid cassette. The adapter and the full grid cassette are releasably joined to each other. In this way, both the spring contact pins and the test needles are secured against falling out of the contacting unit in the assembled state of the adapter and the full grid cassette. | 2012-01-26 |
20120019276 | Operation control structure for a continuity test device - There is provided an operation control structure for a continuity test device for performing lock of a connector and actuation of a continuity test part timely, low cost, easily, and surely including a connector attachment part | 2012-01-26 |
20120019277 | SPRING WIRE ROD, CONTACT PROBE, AND PROBE UNIT - A spring wire rod includes a wire core that is made of a conductive material having an electrical resistivity of equal to or lower than 5.00×10 | 2012-01-26 |
20120019278 | TESTING CARD AND TESTING SYSTEM FOR USB PORT - A testing card for a USB port includes first USB contacting pins, a second USB contacting pin, a transmitting circuits, a voltage converting circuit, and a testing portion. The first USB contacting pins are connected to the USB port to receive a number of USB signals. The second USB contacting pin is connected to the USB port to receive a voltage signal from the USB port. The transmitting circuit is electrically connected to the first USB contacting pins to transmit the USB signals therefrom. The voltage converting circuit is electrically connected to the second USB contacting pin to convert the voltage signal to a predetermined level. The testing portion is electrically connected to the outputs of the transmitting circuit and the voltage converting circuit to receive the USB signals and the converted voltage signal. | 2012-01-26 |
20120019279 | METHOD AND PATTERN CARRIER FOR OPTIMIZING INSPECTION RECIPE OF DEFECT INSPECTION TOOL - A method for optimizing an inspection recipe of a defect inspection tool is described. A substrate having thereon intentional defects and locating patterns beside the intentional defects is provided. The defect inspection tool is used to detect the intentional defects with an inspection recipe and obtain the distribution of undetected or partially detected intentional defects. The locating patterns are utilized to locate the undetected or partially detected intentional defects and thereby determine the type(s) of the undetected or partially detected intentional defects. The inspection recipe is modified according to the type(s) of the undetected or partially detected intentional defects in a manner such that there is a minimal number of undetected or partially detected intentional defects under the inspection of the defect inspection tool. | 2012-01-26 |
20120019280 | INTEGRATED CIRCUIT HAVING ELECTRICALLY ISOLATABLE TEST CIRCUITRY - Special test circuitry in an IC for wafer level testing selectively connects the specialized test circuitry to the functional circuitry during wafer test. Following wafer test the special test circuitry is electrically isolated from the functional circuitry and power supplies such that it does not load functional circuit signals nor consume power. | 2012-01-26 |
20120019281 | System, apparatuses, methods, and computer program products for electric motor testing and analysis - Systems, apparatuses, methods, and computer program products (i.e., software) for electric motor testing and analysis. Electric motor winding resistance and motor temperature are measured. The resistance measurement is normalized to a common temperature and electronically displayed in a resistance versus time graph including one or more previously normalized resistance values from previous resistance and temperature measurements. Based on information from the graph, a prediction or estimation can be made as to the remaining acceptable or satisfactory operating time of the electric motor. Such prediction or estimation may be used as an indicator for replacing or refurbishing the electric motor, or as an indicator for performing preventative maintenance on the electric motor. | 2012-01-26 |
20120019282 | DYNAMIC IMPEDANCE CONTROL FOR INPUT/OUTPUT BUFFERS - A system and method of performing off chip drive (OCD) and on-die termination (ODT) are provided. A common pull-up network composed of transistors and a common pull-down network composed of transistors are employed to implement both of these functions. In drive mode, the pull-up network is configured to produce a calibrated drive impedance when an “on” output is to be generated, and the pull-up network is configured to produce a calibrated drive impedance when an “off” output is to be generated. In termination mode, the pull-up network and the pull-down network are configured to produce a calibrated pull-up resistance and pull-down resistance respectively such that together, they form a split termination. | 2012-01-26 |
20120019283 | SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT - A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween. | 2012-01-26 |
20120019284 | Normally-Off Field Effect Transistor, a Manufacturing Method Therefor and a Method for Programming a Power Field Effect Transistor - A normally-off power field-effect transistor semiconductor structure is provided. The structure includes a channel, a source electrode, a gate electrode and trapped charges which arranged between the gate electrode and the channel such that the channel is in an off-state when the source electrode and the gate electrode are on the same electric potential. Further, a method for forming a semiconductor device and a method for programming a power field effect transistor are provided. | 2012-01-26 |
20120019285 | METHOD AND APPARATUS FOR FAST WAKE-UP OF ANALOG BIASES - Described herein is a method and apparatus to wake-up analog bias signals with minimum delay. The apparatus comprises a first logic unit operable to adjust a signal level of a gated bias signal via a first predetermined signal in response to a power-down event; a comparator operable to compare the gated bias signal with an un-gated bias signal, and operable to generate an output signal indicating the comparison result; and a self-timed logic unit coupled to the comparator and operable to generate a wake-up signal in response to an end of the power-down event and the output signal. | 2012-01-26 |
20120019286 | Integrated Circuit Signal Generation Device - An electronic integrated-circuit device is described in which mode control commands are stored. Mode parameters are also stored in the device. One or more inputs are used according to a predetermined process as determined by the stored parameters according to the stored commands and current mode. One or more output signals are produced. In various applications an output signal may be input to a sound amplifier, a lamp, a motor, a servo, etc. One application is a variety of sensor fusion. Procedural programming is avoided. The device operates with more speed and flexibility than other available configurations. Higher level supervisory management and control is useful for setup and initialization and is optional during operation. Selected platforms include microcontrollers; field programmable gate arrays (FPGAs) and application specific integrated circuits (ASICs). | 2012-01-26 |
20120019287 | GATE CONTROL CIRCUIT - An integrated circuit for switching a transistor is disclosed. In some embodiments, an operational amplifier is configured to drive a transistor, and slew rate control circuitry is configured to control the slew rate of the transistor source voltage during turn on. The transistor source voltage is employed as feedback to the operational amplifier to facilitate closed loop control of the transistor source voltage during switching of the transistor. | 2012-01-26 |
20120019288 | FREQUENCY DIVIDER CIRCUIT - Fractional frequency division is performed by sequentially selecting phase signals for division, where transitioning from a previous phase signal to a next phase signal for division occurs in response to not only the frequency-divided previous phase signal but also a second one of the phase signals. A phase transition that is triggered at least in part in response to a second phase signal having a phase that is greater (with respect to the phase signal sequence) than the phase of the next phase signal can aid minimization of signal glitches. The first frequency-divided signal can be further divided to produce a second frequency-divided signal having a 50-percent duty cycle. | 2012-01-26 |
20120019289 | INJECTION-LOCKED FREQUENCY DIVIDER - An injection-locked frequency divider is provided and which includes an injection transistor, an oscillator, a current source and a transformer. The injection transistor is used to receive an injection signal. The oscillator is used to divide the injection signal to generate a divided frequency signal. The current source is coupled to the oscillator to provide a current to the oscillator. The transformer is coupled between the injection transistor and the oscillator to increase the equivalent transconductance of the injection transistor, and thus increasing the locking range of the injection-locked frequency divider. | 2012-01-26 |
20120019290 | INPUT CIRCUIT - An input terminal receives an external input signal. An input transistor is arranged such that the control terminal thereof is connected to the input terminal, and configured to change its state according to the input signal. An initializing transistor is arranged between the input terminal and the ground terminal. When the power supply for the input terminal is turned on, the control circuit turns on the initializing transistor, following which the control circuit turns off the initializing transistor. | 2012-01-26 |
20120019291 | RESET CIRCUIT AND CONTROL APPARATUS INCLUDING THE RESET CIRCUIT - A reset circuit for resetting and terminating the resetting of a reset target includes an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET), a gate drive circuit configured to switch a drain voltage of the n-channel MOSFET from a low level to a high level when a power supply voltage exceeds a predetermined threshold, a sink circuit configured to maintain the drain voltage at the low level by sinking a current flowing from a drain side of the n-channel MOSFET to the sink circuit, and a block circuit configured to block the current sinking to the sink circuit when the power supply voltage exceeds the predetermined threshold. The low level indicates a state where the reset target is in a reset state and the high level indicates a state where the reset state of the reset target is terminated. | 2012-01-26 |
20120019292 | CONFIGURATION OF A MULTI-DIE INTEGRATED CIRCUIT - An embodiment of an integrated circuit (IC) is described. This embodiment of the IC includes an interposer; a first die on an interposer, where the first die generates a global signal propagated through the interposer; and a second die on the surface of the interposer and coupled to the global signal. The first die and the second die each is configured to implement a same operating state concurrently in response to the global signal. | 2012-01-26 |
20120019293 | DELAY LOCK LOOP PHASE GLITCH ERROR FILTER - A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output signal based upon a phase difference between a reference signal and a feedback signal. The delay lock loop comprises a filter unit to provide filtering of noise on a phase control signal to substantially reduce a false delay lock loop state. | 2012-01-26 |
20120019294 | DUAL-LOOP PHASE LOCK LOOP - A dual-loop phase lock loop includes a phase frequency detector, a first charge pump, a second charge pump, a first capacitor, a filter, a first adder, a voltage controlled delay line, and a frequency divider. The phase frequency detector is used for outputting a switch signal according to a reference clock and a divided feedback clock. The first charge pump and the first capacitor are used for generating a coarse control voltage according to the switch signal. The second charge pump, the filter, and the first adder are used for generating a fine control voltage according to the switch signal and the coarse control voltage. The voltage controlled delay line is used for outputting a feedback clock according to the coarse control voltage and the fine control voltage. The frequency divider is used for dividing the feedback clock to output the divided feedback clock. | 2012-01-26 |
20120019295 | CLOCK DISTRIBUTION APPARATUS, SYSTEMS, AND METHODS - Apparatus, systems, and methods are disclosed that operate to adjust power received by a clock distribution network at least partially based on operating conditions of an integrated circuit. Additional apparatus, systems, and methods are disclosed. | 2012-01-26 |
20120019296 | Circuit With a Time to Digital Converter and Phase Measuring Method - Calibration data for calibrating time to digital conversion is obtained by switching a feed circuit ( | 2012-01-26 |
20120019297 | Systems And Methods For Electricity Metering - In one aspect, the invention comprises a system comprising: a master data clock source; one or more transponders; and a plurality of remote power line transceivers; wherein all of said plurality of transceivers are connected to a common alternating current power distribution grid; and wherein each of said plurality of transceivers has a location is operable to monitor a voltage waveform of a power line prevailing at said location. In another aspect, the invention comprises a system comprising: transponders and remote power line transceivers each connected to a common alternating current power distribution grid each operable to monitor the voltage waveform of the power line prevailing at its own location, and generate selectable frequencies from said local power line waveform of a frequency of p/q times the frequency of said power line where p and q are positive integers greater than or equal to 1. | 2012-01-26 |
20120019298 | SIGNAL GENERATOR AND SIGNAL STRENGTH DETECTING CIRCUIT HAVING THE SIGNAL GENERATOR INSTALLED THEREIN - A signal generator includes: an adjusting circuit arranged to adjust a first amplitude of an oscillating signal to generate an adjusted oscillating signal; and a resistor ladder circuit arranged to receive the adjusted oscillating signal to generate a plurality of candidate output oscillating signals having a plurality of different amplitudes respectively and output an output oscillating signal selected from the candidate output oscillating signals. | 2012-01-26 |
20120019299 | Clock Signal Correction - In one embodiment, a method includes generating two or more clock signals, sequentially selecting each one of the clock signals, and adjusting the respective clock duty cycle of the selected one of the clock signals until it substantially matches a predetermined clock duty cycle. The adjustment of the respective clock duty cycle includes generating a control signal based on the respective clock duty cycle, generating a duty-cycle-distortion (DCD) correction signal based on the control signal, adjusting the respective clock duty cycle of the selected one of the clock signals based on the DCD correction signal, and adjusting the control and DCD correction signals and re-adjusting the respective clock duty cycle of the selected one of the clock signals until the respective clock duty cycle of the selected one of the clock signals substantially matches the predetermined clock duty cycle. | 2012-01-26 |
20120019300 | SHIFT REGISTER AND SEMICONDUCTOR DISPLAY DEVICE - The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first transistor and a second transistor which are connected in series, a first compensation circuit including a third transistor and a fourth transistor which are connected in series, and a second compensation circuit including a fifth transistor and a transmission gate. According to the first compensation circuit, a timing at which a signal outputted from the flip-flop circuit rises or falls can be controlled in synchronization with an output of two stages before. The second compensation circuit can control a clock signal input can be controlled. | 2012-01-26 |
20120019301 | FREQUENCY DETECTION MECHANISM FOR A CLOCK GENERATION CIRCUIT - A frequency detection mechanism for a clock generation unit on an integrated circuit includes a clock generation unit and a detection unit. The clock generation unit may generate an output clock signal at a predetermined frequency that corresponds to a frequency multiple of a reference clock signal provided as an input to the clock generation unit. The detection unit may determine whether the output clock signal is at the predetermined frequency. As such, the detection unit includes a first counter that may generate a first count value based upon the reference clock signal and a second counter that may generate a second count value based upon the output clock signal. The detection unit also includes comparison logic that may perform a plurality of multiplication operations on the first and second count values and generate a final result that indicates whether the output clock signal is at the predetermined frequency. | 2012-01-26 |
20120019302 | LOW MINIMUM POWER SUPPLY VOLTAGE LEVEL SHIFTER - A level shifter includes one PMOS and two NMOS transistors. A source of the first NMOS transistor is coupled to a low power supply voltage. An input signal is coupled to a gate of the first NMOS transistor and a source of the second NMOS transistor. The input signal has a voltage level up to a first power supply voltage. A source of the PMOS transistor is coupled to a second power supply voltage, higher than the first power supply voltage. An output signal is coupled between the PMOS and the first NMOS transistors. The first NMOS transistor is arranged to pull down the output signal when the input signal is a logical 1, and the second NMOS transistor is arranged to enable the PMOS transistor to pull up the output signal to a logical 1 at the second power supply voltage when the input signal is a logical 0. | 2012-01-26 |
20120019303 | DC - DC CONVERTER - The invention relates to a DC-DC converter adapted to supply a MEMS device comprising an input for receiving a DC voltage (Vs), an output for transmitting a supplied voltage (V | 2012-01-26 |
20120019304 | Mixer for Canceling Second-Order Inter-Modulation Distortion and Associated Transconductor Circuit - A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor. | 2012-01-26 |
20120019305 | HARMONIC REJECTION OF SIGNAL CONVERTING DEVICE AND METHOD THEREOF - A signal converting device includes: a reference signal-mixing circuit arranged to generate a reference mixing output signal according to an input signal, a reference gain, and a reference local oscillating signal; a plurality of auxiliary signal-mixing circuits, each arranged to generate an auxiliary mixing output signal according to the input signal, an auxiliary gain, and an auxiliary local oscillating signal; and a combining circuit arranged to combine the reference mixing output signal and a plurality of the auxiliary mixing output signals to generate an output signal, and at least one of the auxiliary signal-mixing circuits is configured by the corresponding auxiliary gain to compensate phase imbalances between the reference mixing output signal and each of the auxiliary mixing output signals to reduce a power of a harmonic component in the output signal. | 2012-01-26 |
20120019306 | AUDIO JACK RESET - This document provides apparatus and methods for providing low-power operation of an interface circuit during an interval when a port of the interface circuit is in an uncoupled state. | 2012-01-26 |
20120019307 | ADVANCED SYNTHESIZED HYSTERESIS FOR SIGNAL PROCESSING, CONTROLLERS, MUSIC, AND COMPUTER SIMULATIONS IN PHYSICS, ENGINEERING, AND ECONOMICS - A method for synthesis of a hysteresis function of a plurality of inputs is described. The method includes receiving and processing of a plurality of input signals with at least a parameterized multivariable nonlinearity, the parameterized multivariable nonlinearity serving as a parameterized hysteron, to produce at least one output signal. The plurality of input signals is also processed by at least a controller function, the controller function comprising memory and producing at least one control signal responsive to at least one of the plurality of input signals, the at least once control signal for controlling the parameterized hysteron. The at least one control signal is used to control the parameterized hysteron so as to create a hysteretic response to at least one of the plurality of input signals. | 2012-01-26 |
20120019308 | PRESSURE SWITCH WITH TEMPERATURE ENABLE FUNCTION - The present invention describes systems and methods of providing a pressure switch with temperature enable function. An exemplary embodiment of the present invention includes a pressure sensor for providing a pressure signal having a first voltage level that is proportional to a pressure applied to the pressure sensor; a temperature sensor for providing a temperature signal having a second voltage level where the second voltage level is proportional to a temperature measured by the pressure sensor; and a control circuit for receiving the pressure signal from the pressure sensor and the temperature signal from the temperature sensor and activating a load when the first voltage level exceeds a threshold voltage level. | 2012-01-26 |
20120019309 | AUDIO JACK DETECTION AND CONFIGURATION - This document discusses, among other things, an audio jack detection circuit configured to be coupled to an audio jack receptacle of an external device. The audio jack detection circuit configured to receive to receive audio jack receptacle information, to disable an oscillator when the audio jack receptacle information indicates that the audio jack receptacle is empty, and to enable the oscillator when the audio jack receptacle information indicates that the audio jack receptacle includes an audio jack. | 2012-01-26 |
20120019310 | TRIMMER CIRCUIT AND METHOD - A trimmer circuit is so configured that an electronic device will break down to produce a high current to trim a fuse. The electronic device is selectively configured to have a breakdown voltage lower than an applied voltage, for the trigger of its breakdown to be controllable. In an embodiment, the electronic device is switched between two states having two breakdown voltages respectively, and the applied voltage is higher than one of the breakdown voltages and lower than the other one. | 2012-01-26 |
20120019311 | ELECTRONIC DEVICES AND METHODS - The present invention relates to an electronic device, which comprises: a first module, comprising an I/O pad for being an interface between the electronic device and an external device, and receiving a first bias source; a second module, coupled to the first module, comprising a register, and receiving a second bias source; and a signal converter, coupled between the first module and the second module. Wherein when one of the first and second bias sources is stable and the other is unstable, the signal converter outputs a first predetermined bias value to the first or second modules receiving the unstable bias source. | 2012-01-26 |
20120019312 | RECYCLING CHARGES - A circuit includes a first node; a second node; a first PMOS transistor having a source coupled to the first node, a drain coupled to a first control transistor, and a gate driven by a first voltage; and a first NMOS transistor having a source coupled to the second node, a drain coupled to the first control transistor, and a gate driven by a second voltage. The first PMOS transistor is configured to automatically turn off based on the first voltage and a first node voltage at the first node. The first NMOS transistor is configured to automatically turn off based on the second voltage and a second node voltage at the second node. When the first PMOS transistor, the control transistor, and the first NMOS transistor are on, the first node voltage is lowered while the second voltage is raised. | 2012-01-26 |
20120019313 | MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE - A semiconductor switching device includes a field effect transistor and an inductor structure that provides a frequency dependent inductance in a parallel connection. During the off-state of the semiconductor switching device, the frequency dependent impedance component due to the off-state parasitic capacitance of the switching device is cancelled by the frequency dependent inductance component of the inductor structure, which provides a non-linear impedance as a function of frequency. The inductor structure provides less inductance at a higher operating frequency than at a lower operating frequency to provide more effective cancellation of two impedance components of the parasitic capacitance and the inductance. Thus, the semiconductor switching device can provide low parasitic coupling at multiple operating frequencies. The operating frequencies of the semiconductor switching device can be at gigahertz ranges for millimeter wave applications. | 2012-01-26 |
20120019314 | CURRENT-MODE ANALOG BASEBAND APPARATUS - A current-mode analog baseband apparatus is provided. The apparatus includes a current-mode low-order filter, a current-mode programmable gain amplifier (PGA) unit and a high-order filter. The input impedance is smaller than the output impedance in the current-mode low-order filter. An input terminal of the current-mode PGA unit is connected to an output terminal of the current-mode low-order filter. An input terminal of the high-order filter is connected to an output terminal of the current-mode PGA unit. | 2012-01-26 |
20120019315 | BIO MATERIAL RECEIVING DEVICE AND METHODS OF MANUFACTURING AND OPERATING THE SAME - A bio material receiving device includes a thin film transistor (“TFT”) including a drain electrode, and a nano well accommodating a bio material. The drain electrode includes the nano well. The TFT may be a bottom gate TFT or a top gate TFT. A nano well array may include a plurality of bio material receiving devices. In a method of operating the bio material receiving device, each of the bio material receiving devices may be individually selected in the nano well array. When the bio material is accommodated in the selected bio material receiving device, a voltage is applied so that another bio material is not accommodated. | 2012-01-26 |
20120019316 | APPARATUS FOR DRIVING A RESONANT CIRCUIT - An apparatus for driving a resonant circuit is disclosed. The apparatus comprises: a first drive circuit, the first drive circuit arranged to provide a drive current to said resonant circuit; and a controller coupled to said first drive circuit, the first drive circuit further comprising: a first input adapted to receive a current from a power supply; a switch; a second input adapted to receive from said controller a signal to control said switch; an output coupled to said resonant circuit; a first inductor, which acts to set the drive current through said resonant circuit when the switch is closed; and a first diode coupled across said first inductor, said first diode arranged to enable current to continue to flow in the first inductor when the switch is open, wherein the controller is adapted to receive from a sensor a signal derived from the current flowing in said resonant circuit, wherein said sensor is coupled to said controller, and said controller is configured to close said switch to enable the drive current to flow through said resonant circuit when said signal derived from said sensor satisfies a first condition and said controller is further configured to open said switch to cause the drive current to stop flowing through the resonant circuit when said signal derived from said sensor satisfies a second condition. In a preferred embodiment, the apparatus also comprises a forward diode in series with the switch, so as to allow the resonance to be driven to a greater amplitude than otherwise possible. | 2012-01-26 |
20120019317 | Self-Oscillating Driver Circuit - A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range. | 2012-01-26 |
20120019318 | VARIABLE RESISTER HAVING RESISTANCE VARYING GEOMETRICALLY RATIO AND CONTROL METHOD THEREOF - Provided is an analog amplifier for amplifying an analog signal and an analog filter, and in particular, an apparatus and method for controlling gain and cutoff frequency of the variable gain amplifier and the variable cutoff frequency filter that is capable of changing the gain and cutoff frequency. The variable resister includes a plurality of resister segments in the variable resister and, when a plurality of resistance candidates for the variable resister are arranged in order of size, the resistance candidates form a geometric series. | 2012-01-26 |
20120019319 | Amplitude Error De-Glitching Circuit and Method of Operating - A power amplifier controller circuit controls a power amplifier based upon an amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The power amplifier controller circuit comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal. The RF power amplifier system may reduce the corrective action of the amplitude loop during periods of relatively rapid changes in amplitude, and thus distortion can be further reduced. | 2012-01-26 |
20120019320 | Signal alignment for envelope tracking system - There is disclosed a method for determining the timing misalignment between a power supply and an output in an envelope tracking amplification stage, the method including the steps of: estimating a distortion parameter in the amplification stage; and determining a timing error in dependence on the estimated distortion parameter. | 2012-01-26 |
20120019321 | LOW PHASE NOISE BUFFER FOR CRYSTAL OSCILLATOR - A buffer for converting sinusoidal waves to square waves with reduced phase noise is described herein. The buffer shunts current from the outputs of a differential amplifier during sinusoidal state transition periods at the differential amplifier inputs to increase the finite slope of square wave transition periods of the output square wave. More particularly, a sinusoidal wave having alternating peaks and valleys connected by sinusoidal state transition periods is applied to differential inputs of a differential amplifier to generate a square wave at the differential outputs, where the output square wave comprises alternating high and low states connected by square wave state transition periods having a finite slope. The output square wave is shaped to increase the finite slope of the square wave transition periods by providing additional paths between the differential outputs and ground that shunt current from the differential amplifier during the sinusoidal state transition periods. | 2012-01-26 |
20120019322 | LOW DROPOUT CURRENT SOURCE - Disclosed is a low dropout current source that includes a first field effect transistor (FET), a second FET having a drain that is an output for an output voltage and an output current, and a third FET, wherein a gate of the first FET is coupled to both a gate of the second FET and a drain of the third FET, and wherein a drain of the first FET is coupled to a source of the third FET. A differential amplifier has an inverting input coupled to the drain of the first FET, a non-inverting input coupled to the drain of the second FET and an amplifier output coupled to the gate of the third FET. A current reference is coupled between the drain of the third FET and a fixed voltage node. The current reference provides a reference current that is multiplied and output from the third FET. | 2012-01-26 |
20120019323 | CURRENT-MODE AMPLIFIER - A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier. | 2012-01-26 |
20120019324 | Amplifier With Improved Input Resistance and Controlled Common Mode - An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair having a gate coupled to a second input terminal; a first capacitor coupled to the second output terminal and to the gate of a first transistor of the first pair; a second capacitor coupled to the second output terminal and to the gate of a second transistor of the first pair; a third capacitor coupled to the first output terminal and to the gate of a third transistor of the second pair; and a fourth capacitor coupled to the first output terminal and to the gate of a fourth transistor of the second pair. | 2012-01-26 |
20120019325 | CURRENT-MODE AMPLIFIER - A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current. The feedback circuit is connected to the input stage. The feedback circuit generates the corresponding feedback current in accordance with the inner current of the input stage. An input terminal of the output stage is connected to an output terminal of the input stage. An output terminal of the output stage serves as an output terminal of the current-mode amplifier. | 2012-01-26 |
20120019326 | DOHERTY AMPLIFIER AND SEMICONDUCTOR DEVICE - A Doherty amplifier includes a carrier amplifier including a first FET, the first FET having a plurality of gate electrodes, and a peaking amplifier including a second FET, the second FET having a plurality of gate electrodes, a gate-to-gate interval of the gate electrodes of the second FET being shorter than a gate-to-gate interval of the first FET. | 2012-01-26 |
20120019327 | METHOD AND APPARATUS FOR DRIFT COMPENSATION IN PLL - Aspects of the disclosure provide a phase-locked loop (PLL). The PLL includes a voltage-controlled oscillator (VCO), a detector module, and a ramp module. The VCO has a first capacitor unit and a second capacitor unit. The VCO is configured to generate an oscillating signal having a frequency based on a first capacitance of the first capacitor unit and a second capacitance of the second capacitor unit. The detector module is configured to generate a voltage signal as a function of the oscillating signal and a reference signal. The voltage signal is used to control the first capacitor unit to stabilize the frequency of the oscillating signal. The ramp module is configured to generate a ramp signal based on the voltage signal. The ramp signal is used to control the second capacitor unit to ramp the second capacitance from a first value to a second value. | 2012-01-26 |
20120019328 | HIGH FREQUENCY SIGNAL PROCESSING DEVICE - A high frequency signal processing device is capable of carrying out high-accuracy modulation by a PLL circuit. A digital loop is configured in addition to an analog loop having, for example, a phase frequency detector, a charge pump circuit, and a loop filter. A digital calibration circuit is provided which searches for the optimal code set to a capacitor bank upon frequency modulation. Upon the search for the optimal code, a calibration controller first sets a division ratio based on a center frequency to a divider and determines the value of a voltage control signal using the analog loop. Then, the loop filter holds the value of the voltage control signal therein, and a division ratio corresponding to a “center frequency+modulated portion” is set to the divider, thereby operating the digital loop. The optimal code is obtained by a convergent value of the digital loop. | 2012-01-26 |
20120019329 | Frequency-jittering apparatuses, frequency-jittering methods and power management devices - A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator. | 2012-01-26 |
20120019330 | MULTI-SCREW CHAOTIC OSCILLATOR CIRCUIT - There is provided a multi-screw chaotic oscillator circuit with simple configuration, that can use various multi-hysteresis VCCS characteristics and generate a variety of multi-screw attractors. The multi-screw chaotic oscillator circuit comprises: a linear two-port VCCS circuit | 2012-01-26 |
20120019331 | PRINTED CIRCUIT BOARD - A printed circuit board includes signal transmitting units that transmit signals, signal receiving units that receive signals, and a plurality of signal lines that connect the signal transmitting units and the signal receiving units. A resistor having a value Rp [Ω] of resistance with a first tolerance is provided between two signal lines that are adjacent to each other. In addition, a capacitor element that is connected in series to the resistor and that has a value Cp [F] of capacitance with a second tolerance is also connected between the two signal lines. In relation to the rise time tr [s] of the signals output from the signal transmitting units, the value Rp of resistance of the resistor and the value Cp of capacitance of the capacitor element are set such that an expression (Cp×Rp)×0.9 tr/3≦(Cp×Rp)×1.1 is satisfied. | 2012-01-26 |
20120019332 | NONRECIPROCAL CIRCUIT ELEMENT - A nonreciprocal circuit element includes first and second center electrodes. On a ferrite to which a direct-current magnetic field is applied from a permanent magnet, the first and second center electrodes are insulated and intersect. First and second ends of the first center electrode are connected to an input port and an output port, respectively. First and second ends of the second center electrode are connected to the output port and a ground port, respectively. A first matching capacitor and a resistor are connected between the input port and the output port. A second matching capacitor is connected between the output port and the ground port. A parallel resonant circuit is connected in parallel to the resistor. A coupling element is connected between the parallel resonant circuit and another parallel resonant circuit including the first center electrode and the first matching capacitor so as to the parallel resonant circuits. | 2012-01-26 |
20120019333 | BROADBAND BALUN - In some embodiments, the technology includes a balun. The balun includes an un-balanced line, a balanced line, a double-y transition section, a first connection section, and a second connection section. The un-balanced line includes a ground trace and a signal trace. The balanced line includes a first and second signal trace. The double-y transition section includes a first slot trace and a second slot trace. The first slot trace couples the ground trace of the un-balanced line to the first signal trace of the balanced line. The second slot trace couples the signal trace of the un-balanced line to the second signal trace of the balanced line. The first connection section couples the first slot trace to the first signal trace of the balanced line. The second connection section couples the second slot trace to the second signal trace of the balanced line. | 2012-01-26 |
20120019334 | IMPEDANCE MATCHING DEVICE - The present invention intends to provide a small-sized impedance matching device with a small variation in quality and large-current tolerance. The above described intention of the present invention is achieved by an impedance matching device, which comprises a wiring portion comprising a conductor pattern for wiring, embedded inside or formed on the surface of first dielectric material, and either one or both of an inductor portion comprising a conductor pattern for inductor, embedded inside or formed on the surface of the first dielectric material, or a capacitor portion comprising at least one pair of conductor patterns for capacitor and second dielectric material with a dielectric constant larger than that of the first dielectric material, existing between the pair of conductor patterns for capacitor wherein the thicknesses of the conductor pattern for wiring and the conductor pattern for inductor are 20 μm or more. | 2012-01-26 |
20120019335 | SELF COMPENSATED DIRECTIONAL COUPLER - A self-compensated strip-coupled directional coupler. In one example, the self-compensated directional coupler includes a main arm formed in a single first layer of a multi-layer substrate, and a coupled arm formed in a single second layer of the multi-layer substrate. One of the coupled arm and the main arm includes a zigzag structure to compensate for misalignment between the first and second layers that can occur during manufacturing. | 2012-01-26 |
20120019336 | Low loss RF transceiver combiner - A Radio Frequency (RF) splitter/combiner technique for splitting and combining RF signals using a combination of microstrip traces and coaxial cable for an N-port network is disclosed. | 2012-01-26 |
20120019337 | CAVITY FILTER - An cavity filter includes a housing, a plurality of resonators received in the housing, a cover covering the opening, a sliding plate, and a plurality of tuning posts. The housing defines an opening and comprises at least one pair of positioning portions. The plurality of tuning posts is fixed in the cover corresponding to the plurality of resonators. The sliding plate is disposed between the cover and the plurality of resonators, and is slidably positioned at the at least one pair of positioning portions. The sliding plate comprises a plurality of tuning cells and at least one elastic arm. The plurality of tuning cells is coated with a metallic layer and corresponds to the plurality of resonators. The at least one elastic arm extends from the sliding plate and elastically resists the cover. | 2012-01-26 |
20120019338 | COUPLING STRUCTURES FOR MICROWAVE FILTERS - A coupling structure for a microwave filter including at least one coupling rod located adjacent a transformer. | 2012-01-26 |
20120019339 | Filter utilizing combination of TE and modified HE mode dielectric resonators - A dielectric resonator filter comprising a metal wall ( | 2012-01-26 |
20120019340 | SOLENOID SWITCH - The invention relates to a solenoid switch for starting devices for starting internal combustion engines, comprising a joint ( | 2012-01-26 |
20120019341 | COMPOSITE PERMANENT MAGNETS MADE FROM NANOFLAKES AND POWDERS - Composite RE-TM permanent magnets fabricated by using powders and nanoflakes produced by surfactant-assisted, wet, high energy, ball milling, with or without prior dry, high energy, ball milling; where RE represents rare earth elements and TM represents transition metals and where the powders include Fe nanoparticles, Fe—Co nanoparticles, B | 2012-01-26 |
20120019342 | Magnets made from nanoflake precursors - RE-TM based permanent magnets (single phase, hybrid, laminated or polymer bonded magnets) fabricated by using nanoflakes produced by surfactant assisted, wet, high energy ball-milling, with or without prior dry high energy ball-milling, where RE represents rare earth elements and TM represents transition metals. | 2012-01-26 |
20120019343 | COIL DEVICE - A coil device includes a first coil pattern, a second coil pattern, an insulating layer, a magnetic covering element and a number of conductive pillars. The second coil pattern is disposed above the first coil pattern, and is spaced apart from the first coil pattern. The insulating layer covers the first coil pattern and the second coil pattern and defines an opening surrounded by the first coil pattern and the second coil pattern. The magnetic covering element covers the insulating layer and extends into the opening. The conductive pillars are disposed within the magnetic covering element and are exposed from a bottom side of the magnetic covering element. A portion of the conductive pillars are electrically connected to the first coil pattern, and another portion of the conductive pillars are connected to the second coil pattern. The coil device can be easily manufactured. | 2012-01-26 |
20120019344 | CONFIGURABLE FUSE BLOCK ASSEMBLY AND METHODS - Modular fuse block assemblies configurable to accommodate overcurrent protection fuses of different physical sizes. Single and multi-pole blocks may be easily assembled from a reduced number of modular parts than would otherwise be required, with enhanced safety features and improved capability to meet spacing requirements in a multi-pole fuse block. | 2012-01-26 |
20120019345 | COMPACT MODULAR FUSE BLOCK WITH INTEGRATED FUSE CLEARANCE - A fuse block assembly includes a nonconductive base formed with pedestal surfaces attachable to terminals from a location above the base, while providing a clearance between the body of a fuse and the middle portion of the base when a fuse is installed. | 2012-01-26 |