03rd week of 2010 patent applcation highlights part 21 |
Patent application number | Title | Published |
20100013482 | MAGNETIC RESONANCE PHANTOM SYSTEMS AND METHODS - According to one aspect, a magnetic resonance (NMR or MRI) phantom includes a spherical or quasi-spherical casing enclosing an internal chamber, and an internal phantom structure situated within the internal chamber. The casing includes alignment features allowing the sequential alignment/orientation of the phantom along three orthogonal axes. In some embodiments, the casing is shaped as a quasi-spherical intercyl having an outer surface defined by the intersection of three orthogonal cylinders. In some embodiments, the casing may be shaped as a sphere having orthogonal registration holes or channels sized to accommodate a corresponding protrusion or ridge in a phantom holder; the casing may also include protrusions or ridges sized to fit into a matching hole or channel defined in a holder. One or more internal phantom plates may include air bubble transfer apertures allowing air bubbles to flow between opposite sides of a plate as a liquid-filled phantom is rotated. | 2010-01-21 |
20100013483 | Tunable Radio-Frequency Coil - A radio frequency (RF) coil comprising a plurality of electrically uninterrupted conductive legs, each leg having a first end and a second end, and at least one continuous conductor electrically connected to the first ends of the legs. Frequency tuning of the coil is achieved by translating, along the legs, an electrically continuous tuning band that includes a capacitor closed about the axis of the coil in proximity to the conductive legs. Maintaining electrical symmetry of the coil results in tuning ranges of at least 30 percent of the nominal value of the resonant frequency. | 2010-01-21 |
20100013484 | TRANSMISSION LINE FOR USE IN MAGNETIC RESONANCE SYSTEM - An electrically conductive transmission cable for supplying a DC signal safely to an electrical device in the presence of radio-frequency (RF) fields in a magnetic resonance (MR) is disclosed herein. The transmission cable comprises a transmission line (STL) comprising at least a first segment (S | 2010-01-21 |
20100013485 | SURVEYING USING VERTICAL ELECTROMAGNETIC SOURCES THAT ARE TOWED ALONG WITH SURVEY RECEIVERS - A system to perform a marine subterranean survey includes at least one vertical electromagnetic (EM) source and at least one EM receiver to measure a response of a subterranean structure that is responsive to EM signals produced by the vertical EM source. At least one tow cable is used to tow the EM source and EM receiver through a body of water. | 2010-01-21 |
20100013486 | Method for attenuating air wave response in marine electromagnetic surveying - A method for measuring the electromagnetic response of formations below the bottom of a body of water includes positioning at least one electromagnetic transmitter and at least one electromagnetic receiver in the body of water each at a selected depth below the water surface. A transient electric current is passed through the at least one transmitter. An electromagnetic signal is detected at the at least one electromagnetic receiver. The depths are selected so that substantially all electromagnetic response to the current passed through the transmitter from the air above the body of water in the detected electromagnetic signal occurs before the beginning of a response originating in the formations below the water bottom. | 2010-01-21 |
20100013487 | TOOL FOR ELECTRICAL INVESTIGATION OF A BOREHOLE | 2010-01-21 |
20100013488 | MEASURING HEAD AND MEASURING METHOD - A measuring head for use in electrical measurements conducted in holes drilled in the ground comprises an elongated body, adaptable in the hole and comprising an electrode, electrically connecting the measuring head with its surroundings, for transmitting an electrical signal between the measuring head and its surroundings. In accordance with the invention, the measuring head comprises insulating means, placed on the body on both sides of the electrode along the length of the hole in order to form a measuring area, electrically insulated from other parts of the hole, around the electrode placed in the hole. | 2010-01-21 |
20100013489 | ELECTRONIC BATTERY TESTER - An electronic battery tester for testing a storage battery includes test circuitry configured to provide an output based upon a selected test criteria. | 2010-01-21 |
20100013490 | FUEL CELL SYSTEM - When the operation point of a DC/DC converter, which steps up/down the output voltage of a fuel cell stack, is in a range of reduction in response capability and further there is issued a request of determining an AC impedance, a controller switches numbers of the drive phases of the DC/DC converter to determine an AC impedance of the fuel cell stack. If the operation point of the DC/DC converter is in the range of reduction in response capability and further the precision of determining the AC impedance is reduced, then the determination of AC impedance in the range of reduction in response capability is inhibited and the switching of the phases of the DC/DC converter is implemented, thereby causing the operation point of the DC/DC converter to be out of the range of reduction in response capability, with the result that the precision of determining the AC impedance can be raised. | 2010-01-21 |
20100013491 | Device, System and Method For Automatic Self-Test For A Ground Fault Interrupter - A self-test circuit is provided that includes a signal circuit adapted to periodically output a circuit inhibitor signal to inhibit a breaking signal from a ground fault detector. The signal circuit is also adapted to periodically output a test signal simulating a ground fault. The self-test circuit also includes an alarm circuit adapted to receive an output signal from the ground fault detector in response to detecting the ground fault, and adapted to output an alarm when the ground fault detector is not operative. The signal circuit may be further adapted to periodically output a second test signal simulating a grounded neutral condition. A ground fault circuit interrupter system and a method are also provided. | 2010-01-21 |
20100013492 | STORAGE BATTERY INSPECTING SYSTEM - A storage battery inspecting system includes a power supply unit and an inspecting unit. The inspecting unit includes two inspecting terminals to be connected to a battery soldering spot so as to detect response of the soldering spot to application of a test power signal by the power supply unit, and a control module for determining if a detected response of the soldering spot falls within a predetermined range configured in the control module, generating an indication signal if the detected response falls outside the predetermined range, and generating an inspection result corresponding to the detected response. The inspecting unit further includes an indication interface for outputting the indication signal, a transmission interface permitting supply of the inspection result to a processing device, and a control interface permitting supply of a control signal generated by the control module to a peripheral device for controlling operation of the peripheral device based on the detected response. | 2010-01-21 |
20100013493 | TEST PREPARED INTEGRATED CIRCUIT WITH AN INTERNAL POWER SUPPLY DOMAIN - The integrated circuit ( | 2010-01-21 |
20100013494 | ELECTRICAL PARTIAL DISCHARGE PULSE MARKET DISCRIMINATION - A marker pulse discriminator monitor that enables filtering of partial discharge pulses for monitoring the condition of a generator in a power plant system. The monitor detects partial discharge pulses emanating from the generator and includes a plurality of first modules connected to respective isophase buses adjacent to the generator. Each of the first modules generate a marker pulse in response to a partial discharge pulse. The monitor also includes an analyzer unit connected to the isophase buses adjacent to a step-up transformer. The analyzer unit receives each partial discharge pulse and each marker pulse and determines a differential value corresponding to a difference between a time of arrival of a partial discharge pulse and a time of arrival of a corresponding marker pulse to identify partial discharge pulses originating at the generator and to identify the isophase bus associated with the corresponding partial discharge pulse. | 2010-01-21 |
20100013495 | TESTING CARD FOR PERIPHERAL COMPONENT INTERCONNECT INTERFACES - A testing card for peripheral component interconnection (PCI) interface includes a body, a plurality of PCI pins, a PCI interface chip, and a plurality of PCI testing pins. The PCI pins are mounted to the body. The PCI interface chip is mounted to the body and connected to the PCI pins. The PCI testing pins are mounted to the body and electrically connected to the pins of the PCI interface chip. When the PCI pins are connected to a PCI slot of a motherboard, the PCI interface chip is configured to communicate with the motherboard. | 2010-01-21 |
20100013496 | Branch circuit black box - A branch circuit black box for use in a building electrical system having service entrance, current protection switches (circuit breakers or fuses), and a power distribution system includes a plurality of sensors positioned adjacent to the distribution wires, wherein the sensor data is collected, analyzed and stored by a robust non volatile memory for the purpose of recovering state and operational characteristics of branch circuits after the incident has occurred in a building. | 2010-01-21 |
20100013497 | REMOTE SENSOR SYSTEM FOR MONITORING THE CONDITION OF EARTHEN STRUCTURE AND METHOD OF ITS USE - A system and associated method permit remote monitoring of subsurface structure for purposes of early detection and location of hidden anomalies, e.g., water seepage in levees. Anomalies may be due to sand boils or displacement of underlying soil. Representative systems provide continuous monitoring via two complementary means: parallel pairs of ported (leaky) coaxial cables and a fiber optic cable, each pair of coaxial cables associated with a fiber optic cable. A fiber optic system, with associated light source, processor and display, together with an RF system, provides data to a remote location via telemetry or cellular phone, or both. The fiber optic cable(s) allow monitoring of displacement and vibrations within the structure. The ported coaxial cables, with associated RF source, using the same processor, display and telemetry used with the fiber optic sub-system, provide data for monitoring moisture change correlated to changes in the dielectric constant of surrounding material. | 2010-01-21 |
20100013498 | System And Method To Determine The Impedance Of A Disconnected Electrical Facility - A signal injection unit injects a test signal at a main frequency between a reference point of an electric circuit and ground, where the electric circuit is connected with the facility and injects another test signal at a second main frequency between a reference point of the electric circuit and ground. A signal conversion unit measures first and second response voltages and first and second response currents in the electric circuit, where the response voltages and the response currents result from the test signals. A processing device determines impedances to ground of the facility from the response voltages and the response currents, analyses impedances to ground of the facility, where this analysing includes comparing each determined impedance to ground with a predetermined value, and determines a safety state of the disconnected electrical facility based on the analysed impedances to ground. | 2010-01-21 |
20100013499 | IN-MOLDED CAPACITIVE SENSORS - In a method for forming an in-molded capacitive sensing device a plastic film is provided, the plastic film comprising a first side and a second side. A capacitive sensor pattern is disposed on at least a portion of the second side, the capacitive sensor pattern including a region for facilitating electrical contact. A resin layer is printed over a portion of the capacitive sensor pattern such that access to the region for facilitating electrical contact is maintained. A plastic layer is injection molded onto a portion of the resin layer such that the capacitive sensor pattern becomes in-molded between the plastic film and the plastic layer while access to the region for facilitating electrical contact is maintained. | 2010-01-21 |
20100013500 | PRODUCTION LINE DETECTION APPARATUS AND METHOD - The present invention relates to the field of detection apparatus and/or methods. One aspect relates to an apparatus and/or detection methods for sensing material and/or detection of a predetermined characteristic within a detection zone. Another aspect relates to a method for improving the accuracy of an inspection device by capturing the human interpretation of its classification decision. Still another aspect relates to detection of relatively hard to detect items, for example items inside sealed packages. In a further aspect, the invention relates to a method of monitoring and/or improving the operation of a detection apparatus in which a detection result is obtained, and an adjustment (if necessary) is made in accordance with a comparison. | 2010-01-21 |
20100013501 | CAPACITIVE MEMS SENSOR DEVICE - The present invention relates to a capacitive MEMS sensor device for sensing a mechanical quantity. To provide such a capacitive MEMS sensor device which enables fast recovery from (near) sticking after a mechanical overload situation it is proposed that the sensor device comprises:—a first bias voltage unit (V | 2010-01-21 |
20100013502 | EVALUATION CIRCUIT FOR CAPACITANCE AND METHOD THEREOF - In an evaluation method, voltages at ends of a to-be-measured capacitor and a capacitance-adjustable circuit are switched in response to a first set of clock signals so as to adjust an integrated voltage to be a sum of the integrated voltage and a first difference voltage. Next, whether a first control event is received is judged. If not, the previous step is performed. If yes, an integration operation is performed to switch a voltage of an end of a known capacitor in order to adjust the integrated voltage to be a sum of the integrated voltage and a second difference voltage. Next, whether an integrating period ends is judged. If not, the first step is repeated. If yes, a capacitance of the to-be-measured capacitor is obtained according to the number of times that the integration operation is performed in the integrating period and a capacitance of the known capacitor. | 2010-01-21 |
20100013503 | DC TEST RESOURCE SHARING FOR ELECTRONIC DEVICE TESTING - A test system can include contact elements for making electrical connections with test points of a DUT. The test system can also include a DC test resource and a signal router, which can be configured to switch a DC channel from the DC test resource between individual contact elements in a group of contact elements. | 2010-01-21 |
20100013504 | PROBE APPARATUS, A PROCESS OF FORMING A PROBE HEAD, AND A PROCESS OF FORMING AN ELECTRONIC DEVICE - A probing apparatus includes a set of conductors configured to contact a surface of a workpiece simultaneously. A processor activates subsets of the conductors to determine a four-point-probe parameter, wherein the subset is less than the set of conductors. Another subset determines another four-point-probe parameter. The set of conductors remain in contact with the surface of the workpiece during and between activating each subset. A process of forming a probe head includes a probe substrate and associated conductive leads. An insulating layer is formed over the probe substrate and patterned to expose the leads. Conductors, connected to the leads, are formed over the insulating layer and define a probing area of at least 250 cm | 2010-01-21 |
20100013505 | PROBE CARD FOR INSPECTING SOLID STATE IMAGING DEVICE - The present invention is provided to quickly and efficiently inspect a plurality of CCD sensors. In the present invention, a plurality of openings is formed in a circuit board of a probe card. A plurality of vertical-type probe pins is connected to a lower surface of the circuit board. A guide board is installed at the lower surface of the circuit board, and respective probe pins are inserted into respective guide holes of the guide board. The guide board is made of a transparent glass board. During an inspection, inspection light emitted from a test head passes through the openings of the circuit board and the guide board, so that it is irradiated onto the plurality of CCD sensors on the substrate. Since the plurality of probe pins can be arranged at a narrow pitch without blocking the inspection light, adjacent CCD sensors on the substrate can be inspected simultaneously. | 2010-01-21 |
20100013506 | PROBE PAD, SUBSTRATE HAVING A SEMICONDUCTOR DEVICE, METHOD OF TESTING A SEMICONDUCTOR DEVICE AND TESTER FOR TESTING A SEMICONDUCTOR DEVICE - In an embodiment, a semiconductor device is tested using a probe pad that includes a probing region with which a probe needle makes contact, and a sensing region bordering an edge of the probing region. Electrical signals are applied, and measured results indicate the probe needle's location relative to a test position on the semiconductor device. | 2010-01-21 |
20100013507 | Panel Circuit Structure - A panel circuit structure for transmitting electrical signals to an active area is provided. The panel circuit structure includes a first transmission pad, a first test pad, a second transmission pad, a second test pad, and a third transmission pad, which are connected to a driving element. The first transmission pad, the first test pad, the second transmission pad, and the second test pad transmit electrical signals to the active area via the first transmission lines and second transmission lines. The first transmission pads and the second transmission pads are disposed at a first end of the driving element while the third transmission pad is disposed at a second end of the driving element. The first and second test pads are disposed outside the coverage area of the driving element. | 2010-01-21 |
20100013508 | PROBE CARD CASSETTE AND PROBE CARD - A holding section ( | 2010-01-21 |
20100013509 | PROBER AND SEMICONDUCTOR WAFER TESTING METHOD USING THE SAME - A prober for a semiconductor wafer test includes a stage, a probe card, and an adjuster The stage has a first region and a second region other than the first region The first region is covered by a wafer on which a plurality of electrode pads is provided. The probe card includes a plurality of probe pins to be in contact with the plurality of electrode pads. The adjuster is included in the stage and adjusts a temperature of the wafer and the second region. | 2010-01-21 |
20100013510 | SYSTEMS AND METHODS FOR DEFECT TESTING OF EXTERNALLY ACCESSIBLE INTEGRATED CIRCUIT INTERCONNECTS - Apparatus and methods provide built-in testing enhancements in integrated circuits. These testing enhancements permit, for example, continuity testing to pads and/or leakage current testing for more than one pad. The disclosed techniques may permit more thorough testing of integrated circuits at the die level, thereby reducing the number of defective devices that are further processed, saving both time and money. In one embodiment, a test signal is routed in real time through a built-in path that includes an input buffer for a pad under test. This permits testing of continuity between the pad and the input buffer. An output buffer can also be tested as applicable. In another embodiment, two or more pads of a die are electronically coupled together such that leakage current testing applied by a probe connected to one pad can be used to test another pad. | 2010-01-21 |
20100013511 | Intelligent Multi-meter with Automatic function selection - Intelligent Multi-meter with Automatic function selection A measuring device with the function of automatically determining the type of device under test (DUT) and selecting measuring function, comprising: a controller for sequentially providing a plurality of checking phases; a protection circuit connecting to input end and protecting the measuring device; a switch composed of a plurality of test circuits, being connected to the controller and sequentially connecting the plurality of test circuits with the output end of the protection circuit; a plurality of DUT type detectors, connecting to the switch and comparing the voltage of input end sequentially through a plurality of comparison circuits, transmitting the result of comparison to the controller for determining the type of DUT; and a measurement unit connecting to the controller, measuring the DUT according to the result of determination of the controller and displaying the result of measurement on a display. | 2010-01-21 |
20100013512 | APPARATUS AND METHODS FOR THROUGH SUBSTRATE VIA TEST - A stack of vertically-connected, horizontally-oriented integrated circuits (ICs) may have electrical connections from the front side of one IC to the back side of another IC. Electrical signals may be transferred from the back side of one IC to the front side of the same IC by means of through substrate vias (TSVs), which may include through silicon vias. Electronic apparatus, systems, and methods may operate to test and/or replace defective TSVs. Additional apparatus, systems and methods are disclosed. | 2010-01-21 |
20100013513 | Test device and semiconductor integrated circuit device - Test devices and integrated circuits with improved productivity are provided. In accordance with example embodiments, a test device may include a first test region with a first test element and a second test region with a second test element defined on a semiconductor substrate. The first test element may include a pair of first secondary test regions in the semiconductor substrate and a pair of first test gate lines. One of the first test gate lines may overlap one of the first secondary test regions and the other first test gate line may overlap the other first secondary test region. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions and the pair of first test gate lines. | 2010-01-21 |
20100013514 | Test device and semiconductor integrated circuit device - A test device and a semiconductor integrated circuit are provided. The test device may include a first test region and a second test region defined on a semiconductor substrate. The first test region may include a first test element and the second region may include a second test element. The first test element may include a pair of first secondary test regions in the semiconductor substrate extending in a first direction. The second test element may include structures corresponding to the first test element except the second test element does not include structures corresponding to the pair of first secondary test regions. | 2010-01-21 |
20100013515 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE, METHOD OF MANUFACTURING THE SAME, METHOD OF TESTING THE SAME - An electrostatic discharge protection device, a method of manufacturing the same, and a method of testing the same. The electrostatic protection device includes a plurality of device isolation regions formed in a semiconductor substrate at a predetermined width and a predetermined depth that each sequentially increase from a circuit device formation region of the semiconductor substrate to a ground region of the semiconductor substrate, a plurality of gate electrodes formed over the semiconductor substrate in spaces between adjacent ones of the device isolation regions, and a plurality of source regions and drain regions formed in the semiconductor substrate at both lateral sides of the gate electrode. | 2010-01-21 |
20100013516 | DEVICES AND METHODS FOR CONTROLLING ACTIVE TERMINATION RESISTORS IN A MEMORY SYSTEM - A termination resistor is mounted on a memory circuit and provides a termination resistance for the memory circuit. The termination resistor includes a node, a plurality of first termination resistors responsive to a corresponding control signal and connected between a power voltage and the node, and a plurality of second termination resistors responsive to a corresponding control signal and connected between a ground voltage and the node. | 2010-01-21 |
20100013517 | RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR CONFIGURING RECONFIGURABLE LOGIC FABRICS - In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics (302, 304) for integrated circuits and methods for designing asynchronous circuits to be implemented in the asynchronous reconfigurable logic fabrics. | 2010-01-21 |
20100013518 | CONFIGURATION BACKUP DEVICE FOR THE TERMINALS OF AN INTEGRATED CIRCUIT AND METHOD OF ENABLING THE DEVICE - The integrated circuit device ( | 2010-01-21 |
20100013519 | INVERTER CIRCUIT - An inverter circuit for generating an output signal at an output node obtained by inverting an input signal level at an input node includes a common-source MOS transistor having a gate node connected to the input node, a source connected to a predetermined voltage-and a substrate gate, a load resistor connected in series with the MOS transistor, and a resistor connected between the gate node and the substrate gate of the MOS transistor. | 2010-01-21 |
20100013520 | CIRCUIT FOR CLOCK EXTRACTION FROM A BINARY DATA SEQUENCE - The invention relates to an electronic circuit making it possible to extract a clock signal from an incident binary data sequence arriving at a constant rate. The electronic circuit comprises an oscillator (VCO) with voltage-controlled frequency providing a sinusoidal signal, a circuit (R, Cp, RD, I | 2010-01-21 |
20100013521 | SYNTHESIZER FOR DOHERTY AMPLIFIER - A synthesizer is constructed by constituting a first λ/4 line of a first strip line and by constituting a second λ/4 line of a second strip line, so that it is formed into a chip shape (or a chip part) in a dielectric substrate. A first shield electrode is formed on the upper face of the dielectric substrate, and a second shield electrode is formed on the lower face of the dielectric substrate, so that the first λ/4 line and the second λ/4 line are formed between the first shield electrode and the second shield electrode. | 2010-01-21 |
20100013522 | Serial Bus Interface Circuit - An interface circuit for a serial bus is disclosed and includes a receiving terminal, an output terminal, a first switching circuit, a voltage source, and a second switching circuit. The receiving and output terminals are used for receiving an input signal and outputting a first voltage signal respectively. The first switching circuit is used for determining a coupling relationship between the output terminal and the grounded terminal according to difference between the input signal and a grounding voltage provided by the grounded terminal. The voltage source is used for producing a voltage drop based on a driving voltage driving the serial bus interface circuit to provide a first voltage. The second switching circuit is used for determining a coupling relationship between the first switching circuit and the voltage source according to difference between the input signal and the first voltage. | 2010-01-21 |
20100013523 | CURRENT DRIVER CIRCUIT - In a case where potential of the first input terminal is lower than that of the second input terminal by an amount of the offset voltage, in a normal operation mode, the control circuit controls the polarity switching circuit so as to input the first contact voltage of the first contact to the first input terminal and input the control voltage to the second input terminal. On the other hand, in a case where the potential of the first input terminal is higher than that of the second input terminal by an amount of the offset voltage, in the normal operation mode, the control circuit controls the polarity switching circuit so as to input the first contact voltage at the first contact to the second input terminal, input the control voltage to the first input terminal, and invert the polarity of the amplified signal. | 2010-01-21 |
20100013524 | Load Driving Circuit - A load driving circuit comprising: a bias current circuit configured to generate a bias current having a current value corresponding to a level of a control signal; a control circuit configured to control the level of the control signal so that the bias current is increased and thereafter decreased, when an input signal reaches one logic level; and a driving circuit configured to raise an output voltage for driving a load to a higher logic level in a time corresponding to the current value of the bias current, when the input signal reaches the one logic level, and lower the output voltage to a lower logic level, when the input signal reaches the other logic level. | 2010-01-21 |
20100013525 | Output driving device in semiconductor device - An output driving device prevents an inflow of external current through an output terminal even when there is no power supply. The output driving device includes an output circuit that maintains an output terminal at a low impedance state by receiving a supply of power in an output drive operation and maintains the output terminal at a high impedance state by receiving the supply of power in a non-output drive operation and a leakage prevention unit coupled to the output terminal of the output circuit, the leakage prevention unit preventing a current inflow to the output circuit through the output terminal when the supply of power is not supplied to the output circuit. | 2010-01-21 |
20100013526 | Current driving circuit - In current driving circuit a desired value of a driving current is promptly written in a load of each pixel despite load variations that may occur in each pixel. A constant current source circuit delivers a driving current Idata to a load. An output voltage difference amplifier circuit detects a voltage change produced at a load driving end within a preset time period, and delivers a current or a voltage corresponding to the voltage change during a time period different from the preset time period. The output voltage difference amplifier circuit temporally repeats detection of the voltage change and delivery of the current or the voltage to the load. | 2010-01-21 |
20100013527 | APPARATUS, SYSTEM, AND METHOD FOR INTEGRATED PHASE SHIFTING AND AMPLITUDE CONTROL OF PHASED ARRAY SIGNALS - An apparatus, system, and method are disclosed for phase shifting and amplitude control. A two-phase local oscillator generates an in-phase sinusoidal signal of a fixed frequency and a quadrature sinusoidal signal of the fixed frequency having a ninety degree phase shift from the in-phase sinusoidal signal. A signal generator receives the in-phase sinusoidal signal and the quadrature sinusoidal signal and generates a controllable sinusoidal signal of the fixed frequency. The controllable sinusoidal signal has a variable amplitude and a shiftable phase. A mixer varies the amplitude and shifts the phase of an input signal by mixing the input signal with the controllable sinusoidal signal to generate an output signal. The input signal and the output signal carry phase and amplitude information required for phased array signal processing. Either a receiver or a transmitter may be implemented using the present invention. | 2010-01-21 |
20100013528 | SEMICONDUCTOR DEVICE AND INFORMATION PROCESSING SYSTEM - A semiconductor device or an information processing system comprises a plurality of circuit units, and a control unit for controlling a start timing of large-current operations executed by the respective circuit units within a predetermined period, where the large-current operation involves a relatively large current which flows in a power supply system, as compared with other operations. The control unit controls the start timing of the large-current operation from one circuit unit to another such that the waveform of a current flowing from the power supply system is shaped into the waveform of a half cycle of a sinusoidal wave when the circuit units execute large-current operations within the predetermined period. | 2010-01-21 |
20100013529 | Reset signal generating circuit - A reset signal generating circuit outputs a reset signal having a sufficient pulse width even when the power supply voltage is fluctuated. A node B reaches a high level during a power-on reset and is at a low level during operation. When a power supply (Vcc) fluctuates during operation and as soon as a node C reaches a high level, a switch element MN | 2010-01-21 |
20100013530 | DLL-Based Multiplase Clock Generator - The present invention relates to a delay-locked loop-based multiphase clock generator that generates a plurality of multiphase clocks from an input clock signal using a voltage controlled delay line including a plurality of dummy cells. The delay-locked loop-based multiphase clock generator includes an anti-harmonic lock circuit that receives an input clock and a reference clock of multiple clocks, determines whether a pulse signal derived from the input clock is within a normal locking range of the reference clock, and outputs a compulsory control signal to compulsorily control an output signal of a phase detector if it is determined that the pulse signal is not within the normal locking range. | 2010-01-21 |
20100013531 | PHASE-LOCKED LOOP CIRCUITS AND METHODS IMPLEMENTING PULSEWIDTH MODULATION FOR FINE TUNING CONTROL OF DIGITALLY CONTROLLED OSCILLATORS - PLL (phase locked loop) circuits and methods are provided in which PWM (pulse width modulation) techniques are to achieve continuous fine tuning control of DCO (digitally controlled oscillator) circuits. In general, pulse width modulation techniques are applied to further modulate dithered control signals that are used to enhance the frequency tuning resolution of the DCO such that the dithered control signals are applied to the fractional tracking control port of the DCO for a selected fraction of a full clock signal based pulse width modulation applied. | 2010-01-21 |
20100013532 | PHASE-LOCKED LOOP CIRCUITS AND METHODS IMPLEMENTING MULTIPLEXER CIRCUIT FOR FINE TUNING CONTROL OF DIGITALLY CONTROLLED OSCILLATORS - Circuits and methods are provided in which fine tuning control of a DCO (digitally controlled oscillator) circuit in a digital PLL circuit is realized by dither controlling a multiplexer circuit under digital control to selectively output one of a plurality of analog control voltages with varied voltage levels that are input to a fractional frequency control port of the DCO to drive tuning elements of the DCO at fractional frequency resolution and achieve continuous fine tuning of the DCO under analog control. | 2010-01-21 |
20100013533 | DIGITAL DELAY LINE AND APPLICATION THEREOF - A digital delay line includes a plurality of hysteresis-based delay cells electrically connected in series. These hystersis delay units in the hysteresis-based delay cells may be similar or different. All of the hysteresis delay units respectively have an inverter mode and a hesteresis mode. The delay and resolution of the hysteresis delay unit may be derived from the time difference in the inverter mode and hysteresis mode. Such a digital delay line applied to a digital phase locked loop may reduce consumption of area and power. | 2010-01-21 |
20100013534 | CONTROLLED POWER CONVERTER - A pulse modulated converter comprising an input stage ( | 2010-01-21 |
20100013535 | LATCH CIRCUIT - A latch circuit includes a data input/output unit configured to form a current path through a first node in response to an input data to output an output data, a holding unit configured to form a current path through a second node in response to the output data to store the output data, and a clock input unit coupled to the first and second nodes in parallel in response to a clock. | 2010-01-21 |
20100013536 | Absolute time delay generating device - An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals. | 2010-01-21 |
20100013537 | LOW-VOLTAGE DIFFERENTIAL SIGNALING RECEIVER WITH COMMON MODE NOISE SUPPRESSION - The disclosure relates to a method and apparatus for noise suppression in an LVDS receiver by providing improved common mode noise immunity through a bypass circuit. In one embodiment, the disclosure relates to an apparatus for providing Low Voltage Differential signaling (LVDS). The apparatus includes a preamplifier circuit for receiving a DC component of a first signal and providing a first processed DC signal; a first bypass circuit for receiving an AC component of the first signal, the first bypass circuit providing a first AC output signal; a first node for combining the processed DC signal with the first AC output signal to form a first combined output signal; and an amplifier circuit for amplifying the first combined output signal and a second signal to provide a first amplified signal and a second amplified signal, wherein the first bypass circuit is in parallel with the preamplifier circuit. | 2010-01-21 |
20100013538 | SEMICONDUCTOR DEVICE - There is provided a current amount adjusting section adjusting a current amount flowing through a power supply line supplying power to an internal circuit which includes a circuit operating based on a clock signal and a ratio of consumed charge amounts by the current flowing at a rising edge of the clock signal and by the current flowing at a falling edge of the clock signal so that noise generated in the power supply line may be restrained. | 2010-01-21 |
20100013539 | COMMUNICATION CIRCUIT WITH SELECTABLE SIGNAL VOLTAGE - The disclosed embodiments relate to a communication circuit. An exemplary embodiment of the communication circuit comprises a first branch adapted to operate at a first signal voltage level, a first source voltage contact adapted to deliver a voltage corresponding to the first signal voltage level to the first branch, a second branch adapted to operate at a second signal voltage level that is higher than the first signal voltage level, a second source voltage contact adapted to receive a voltage corresponding to the second signal voltage level via an external connector and to deliver the voltage corresponding to the second signal voltage level to the second branch, and a voltage selection circuit coupled to the first source voltage contact and the second source voltage contact, the voltage selection circuit configured to provide the first signal voltage level to the first branch and the second signal voltage level to the second branch. | 2010-01-21 |
20100013540 | REFERENCE VOLTAGE GENERATING CIRCUIT - There is provided a reference voltage generating circuit including: a first PN junction element (PN | 2010-01-21 |
20100013541 | METHOD AND APPARATUS FOR A DYNAMICALLY SELF-BOOTSTRAPPED SWITCH - A dynamically self-bootstrapping circuit for a switch features a resistor in series with the control node of the switch. A bypass switch connects a control node to ground. When the switch is in an off-state, the bypass switch is enabled. | 2010-01-21 |
20100013542 | Driving transistor control circuit - A control circuit controls a driving transistor connected in series with an electrical load between a power supply voltage and a ground. The control circuit includes a pull-up resistor connected at one end to a power supply voltage side of the driving transistor, a current detection resistor for detecting an electric current flowing from the driving transistor to the ground, a current mirror circuit including a starting transistor connected between the pull-up transistor and the current detection resistor. The current mirror circuit supplies a mirror current of the electric current. The control circuit further includes a current source circuit for supplying a driving current to a control terminal of the driving transistor in accordance with the mirror current to turn ON the driving transistor in response to an external control signal. | 2010-01-21 |
20100013543 | Temperature sensing device and electric device including the same - A temperature sensing device includes a current generator to generate a variable current that varies based on temperature, a charge circuit to accumulate charges based on the variable current, and a count logic circuit to generate a count value synchronized to a clock, and to output the count value as temperature data based on a charged voltage of the charge circuit and a reference voltage. | 2010-01-21 |
20100013544 | Temperature-Dependent Signal Provision - An arrangement and a method for providing a temperature-dependent signal. Several current sources ( | 2010-01-21 |
20100013545 | Temperature Compensation For RF Detectors - Compensation for an RF detector includes components having different order temperature functions. The components are combined and may be adjusted by various numbers of user-accessible terminals to provide individual adjustment for factors such as operating frequency. In some embodiments, first and second-order temperature functions are generated independently and combined to provide a polynomial function of temperature with coefficients that may be adjusted. In other embodiments, the outputs of the function generators may be more complex functions of temperature with various adjustable parameters. | 2010-01-21 |
20100013546 | SYSTEMS AND METHODS FOR FILTER TUNING USING BINARY SEARCH ALGORITHM - A filter tuning system for quickly compensating a time constant using a binary search algorithm is disclosed. The filter tuning system includes a time constant detector, a comparator and a calibration unit. The time constant detector detects a time constant of a filter based on an integral value of a reference input signal using an integrator when the time constant of the filter changes according to a variation of a manufacturing process or a temperature. The integrator includes a capacitor changing according to a variation of the time constant of the filter. The comparator compares the detected time constant with a reference value. The calibration unit compensates the time constant of the filter using the binary search algorithm based on the comparison result until an error between the time constant and the reference value is reduced within an acceptable range. | 2010-01-21 |
20100013547 | VOLTAGE SWITCHING CIRCUIT - Provided is a voltage switching circuit which outputs a voltage with low power consumption without lowering a plurality of voltages due to a threshold voltage of a transistor. The voltage switching circuit according to the present invention selects a voltage from among a plurality of input voltages in response to a selection signal and outputs the selected voltage from an output terminal. The voltage switching circuit includes: a first PMOS transistor for outputting a power supply voltage for operating a logic circuit of a semiconductor device to the output terminal; a second PMOS transistor for outputting a first voltage higher than the power supply voltage to the output terminal; a third PMOS transistor for outputting a second voltage lower than the power supply voltage to the output terminal; and a well potential control section for controlling well voltages of the first and third transistors to be the power supply voltage in a case of outputting the power supply voltage and the second voltage to the output terminal, and controlling the well voltages of the first and third transistors to be the first voltage in a case of outputting the first voltage to the output terminal. | 2010-01-21 |
20100013548 | POWER EFFICIENT CHARGE PUMP WITH CONTROLLED PEAK CURRENTS - A charge pump which uses a current limit resistor to limit in-rush current and peak currents. An additional advantage of such a charge pump is that, when being coupled to a boost converter or other switching converter utilizing an inductive energy storage element, it may avoid unnecessary power dissipation caused by the current limit resistor. | 2010-01-21 |
20100013549 | VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR MEMORY USING THE SAME - The voltage generation circuit that have a standard voltage generation circuit that generates a reference voltage; a minimum voltage setting circuit that sets a minimum voltage; a voltage setting circuit that has a plurality of resistive elements and a plurality of gate transistors connected to a plurality of the resistive elements, and gradually sets voltage by switching a plurality of the gate transistors to switch a combination of a plurality of the resistive elements; a differential amplifier that has two input terminals and one output node, one input terminal is connected to the reference voltage that is generated by the standard voltage generation circuit, another input terminal is connected to the minimum voltage setting circuit and the voltage setting circuit that has a plurality of resistive elements and a plurality of gate transistors connected to a plurality of the resistive elements, and the output node shows the result of the difference voltage of these two inputs; a pump control circuit that outputs a control signal controlling a charge-pump motion, based on the differential voltage; and a charge pump circuit that sets up and outputs the voltage by the control signal. | 2010-01-21 |
20100013550 | SEMICONDUCTOR DEVICE AND BIAS GENERATION CIRCUIT - A first power supply voltage input section can input a first power supply voltage, a second power supply voltage input section can input a second power supply voltage, a regulator circuit generates a back bias voltage on the basis of the second power supply voltage, and an output section can output the back bias voltage generated by the regulator circuit as an output voltage. A substrate bias can be generated with low power consumption, and the circuit scale can be reduced. | 2010-01-21 |
20100013551 | Systems and Methods for Controlling Power Consumption in Electronic Devices - A method of controlling power consumption in an electronic device may include selecting between an on mode of the electronic device in which first circuitry of the electronic device is configured to perform a first operation, an off/standby mode in which second circuitry of the electronic device is configured to perform a second operation, and a sleep/vacation mode in which the second circuitry is controlled to at least one of reduce a frequency of and suspend performance of the second operation. An electronic device may include: first circuitry configured to perform a first operation when the electronic device is in an on mode; second circuitry configured to perform a second operation when in an off/standby mode; and a circuitry controller configured to control the second circuitry to at least one of reduce a frequency of and suspend performance of the second operation when in a sleep/vacation mode. | 2010-01-21 |
20100013552 | MOSFET Switch with Embedded Electrostatic Charge - A vertical device structure includes a volume of semiconductor material, laterally adjoining a trench having insulating material on sidewalls thereof. A gate electrode within the trench is capacitively coupled through the insulating material to a first portion of the semiconducting material. Some portions of the insulating material contain fixed electrostatic charge in a density high enough to invert a second portion of the semiconductor material when no voltage is applied. The inverted portions can be used as induced source or drain extensions, to assure that parasitic are reduced without increasing on-resistance. | 2010-01-21 |
20100013553 | DEMODULATOR, DIVERSITY RECEIVER, AND DEMODULATION METHOD - A diversity receiver includes: a plurality of demodulating means for demodulating inputted OFDM signals, to output their demodulated signals; noise component calculating means provided for each demodulating means, for calculating noise components included in the demodulated signals outputted from corresponding demodulating means; channel profile calculating means provided for each demodulating means, for calculating channel profiles based upon the demodulated signals outputted from corresponding demodulating means; transmission channel decision means for determining transmission channel based upon the channel profiles; reliability information generating means for generating reliability information indicating reliability of the demodulated signals outputted from each demodulating means, based upon the noise components and the results of the determinations by the transmission channel decision means; a weighting factor calculating means for calculating, depending on the reliability information, weighting factors used in combining the demodulated signals outputted from each demodulating means; and a combining means for combining, depending on the weighting factors, the demodulated signals outputted from each demodulating means. | 2010-01-21 |
20100013554 | SWITCHING POWER AMPLIFIER AND METHOD OF CONTROLLING THE SAME - A switching power amplifier having a pulse width modulation (PWM) signal generation unit that converts an input audio signal into a PWM signal with a predetermined carrier frequency, a correction unit that corrects the difference between an audio signal included in the PWM signal and a negative feedback output audio signal to generate a corrected PWM signal, a low pass filter that removes a high-frequency component from the corrected PWM signal, a frequency modulation unit that modulates the corrected PWM signal so that the corrected PWM signal has a switching frequency different from the carrier frequency of the input PWM signal to generate a modulated PWM signal, and a power amplification unit that amplifies a power of the modulated PWM signal. | 2010-01-21 |
20100013555 | POWER AMPLIFIER - A driver (Highside Driver, Lowside Driver) adapted to drive each of final transistors (M | 2010-01-21 |
20100013556 | TRANSCONDUCTANCE AMPLIFIER - Provided is a transconductance amplifier capable of suppressing variation in the range of a linear relationship between an input voltage and an output current depending on the magnitude of a tuning voltage Vctrl, thereby adjusting transconductance over a wider range of operating input voltages. The transconductance amplifier is configured by a differential pair formed of MOS transistors ( | 2010-01-21 |
20100013557 | Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading - Current-controlled CMOS (C3MOS) fully differential integrated wideband amplifier/equalizer with adjustable gain and frequency response without additional power or loading. A novel approach is presented by which adjustable amplification and equalizer may be achieved using a C3MOS wideband data stage. This may be referred to as a C3MOS wideband data amplifier/equalizer circuit. This employs a wideband differential transistor pair that is fed using two separate transistor current sources. A switchable RC network is communicatively coupled between the sources of the individual transistors of the wideband differential transistor pair. There are a variety of means by which the switchable RC network may be implemented, including using a plurality of components (e.g., capacitors and resistors connected in parallel). In such an embodiment, each component may have an individual switch to govern its connectivity in the switchable RC network thereby allowing a broad range of amplification and equalization to be performed. | 2010-01-21 |
20100013558 | Driving Circuit Capable of Enhancing Response Speed and Related Method - A driving circuit of enhancing response speed is disclosed. The driving circuit includes an operational amplifier and a slew rate enhancement unit. The operational amplifier is utilized for generating a driving voltage according to an input voltage. The slew rate enhancement unit is coupled to the operational amplifier, and is utilized for generating a compensation current to the operational amplifier to enlarge a bias current of the operational amplifier according to voltage difference between the input voltage and the driving voltage when variation of the input voltage occurs. | 2010-01-21 |
20100013559 | High frequency amplifying device - An amplifying device includes a base plate and an integrated circuit (IC) package mounted on the base plate. The IC package includes a radio frequency (RF) output terminal and a power switching metal-oxide-semiconductor field-effect transistor (MOSFET) die mounted on the RF output terminal. The amplifying device also includes impedance matching circuitry coupled to the power switching MOSFET and the RF output terminal and an insulator substrate mounted on the base plate having thermal conductivity to provide electrical isolation and thermal transfer from the RF output terminal. | 2010-01-21 |
20100013560 | SYSTEM AND METHOD FOR REDUCING FLICKER NOISE FROM CMOS AMPLIFIERS - A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers. | 2010-01-21 |
20100013561 | ANTI-POP CIRCUITS AND METHODS FOR AUDIO AMPLIFIERS USING VARIABLE RESISTORS - Anti-pop circuits are provided for an audio amplifier that uses a power supply voltage and a ground voltage to drive a load with an audio signal that is centered about a virtual analog ground. These anti-pop circuits include a variable resistor and a capacitor that are connected to the audio amplifier to provide a low pass filter. The variable resistor has resistance that varies in response to a voltage level of the virtual analog ground, such as a difference between a voltage level of the power supply voltage and the voltage level of the virtual analog ground. The variable resistor may be a field effect transistor having a gate that is responsive to the differences between the voltage level of the power supply voltage and the voltage level of the virtual analog ground. The capacitor may be a field effect transistor, as well. Related methods are also described. | 2010-01-21 |
20100013562 | CIRCUIT WITH SINGLE-ENDED INPUT AND DIFFERENTIAL OUTPUT - An inverting stage is coupled between a single-ended in-put node and a first differential output node, and a non-inverting stage is coupled between the single-ended input node and a second differential output node. The inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the first differential output node and the control terminal being coupled to a single-ended input node. The non-inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the second differential output node, and the second terminal being coupled to the single-ended input node. A bias current of the inverting stage is larger than a bias current of the non-inverting stage. | 2010-01-21 |
20100013563 | Voltage-controlled oscillator circuit including level shifter, and semiconductor device including voltage-controlled oscillator circuit - A voltage-controlled oscillator (VCO) circuit includes a level shifter, and a semiconductor device includes the VCO circuit. The VCO circuit includes an input voltage receiver, a current mirror, and a frequency oscillator. The input voltage receiver receives a first voltage input to the VCO circuit so as to generate a first current. The current mirror copies the first current so as to generate a second current. The frequency oscillator oscillates in response to the second current. The input voltage receiver includes a level shifter and a first current generator. The level shifter shifts a voltage level of the first voltage to a voltage level of a second voltage. The first current generator generates the first current corresponding to the second voltage | 2010-01-21 |
20100013564 | Device - A device can be coupled to an electrical load for supplying electrical power to the electrical load. The device contains an oscillator unit and an auxiliary oscillator unit. The oscillator unit is configured to generate an output signal of the device which can be supplied to the electrical load and which has a first frequency. The auxiliary oscillator unit is electrically coupled to the oscillator unit. The auxiliary oscillator unit is configured to excite the oscillator unit to oscillate at a second frequency greater than the first frequency. The auxiliary oscillator unit contains a timing element which is configured and arranged to terminate the excitation of the oscillator unit after the expiration of a pre-specified period of time after the start of the oscillator unit and the auxiliary oscillator unit. | 2010-01-21 |
20100013565 | Surface mount type crystal oscillator - A surface mount crystal oscillator comprises a crystal blank, an IC chip having an oscillation circuit integrated thereon, and a hermetic package for accommodating the crystal blank and IC chip therein. The hermetic package comprises a substantially rectangular ceramic substrate formed with a metal film which makes a round on one main surface thereof, and a concave metal cover having an open end face bonded to the metal film. The IC chip is secured to the one main surface of the ceramic substrate through ultrasonic thermo-compression bonding using bumps, the crystal blank is disposed above the IC chip, and the ceramic substrate has the one main surface formed as a flat surface. | 2010-01-21 |
20100013566 | RESISTOR-CAPACITOR OSCILLATOR - An embodiment for low power-consumption RC oscillator is disclosed. A voltage transforming unit transforms a power supply voltage to an internal voltage. A current mirroring unit is coupled to the voltage transforming unit and receives the internal voltage to provide constant two current outputs with different phases. A current charging/discharging unit includes first and second nodes to receive the two constant current outputs of the current mirroring unit, wherein first and second capacitors are coupled to the first and second nodes, respectively. The first and second capacitors are charged by the two constant current outputs. A voltage sensing and outputting unit is coupled to the first and second nodes, senses voltage levels of the first and second nodes and outputs clock signals when one of the sensed voltage levels is greater than a logic threshold. A pulse generating unit generates pulse signals in response to the clock signals. The current charging/discharging unit further includes a connection switch to electrically connect the first and second nodes in response to the pulse signals. | 2010-01-21 |
20100013567 | SWITCHING CAPACITOR GENERATION CIRCUIT - A switching capacitor generation circuit which reduces the on-resistance and parasitic capacitance of a switch element and improves the operation properties of the switch element. The switching capacitor generation circuit, which has first and second output terminals, includes a first capacitor coupled to the first output terminal, a second capacitor coupled to the second output terminal, and a single switch element coupled between the first and the second capacitors. | 2010-01-21 |
20100013568 | SEMICONDUCTOR DEVICE, RF-IC AND MANUFACTURING METHOD OF THE SAME - Provided is a technology capable of reducing parasitic capacitance of a capacitor while reducing the space occupied by the capacitor. A stacked structure is obtained by forming, over a capacitor composed of a lower electrode, a capacitor insulating film and an intermediate electrode, another capacitor composed of the intermediate electrode, another capacitor insulating film and an upper electrode. Since the intermediate electrode has a step difference, each of the distance between the intermediate electrode and lower electrode and the distance between the intermediate electrode and upper electrode in a region other than the capacitor formation region becomes greater than that in the capacitor formation region. For example, the lower electrode is brought into direct contact with the capacitor insulating film in the capacitor formation region, while the lower electrode is not brought into direct contact with the capacitor insulating film in the region other than the capacitor formation region. | 2010-01-21 |
20100013569 | SYSTEM AND METHOD FOR PROVIDING A PULSE-WIDTH MODULATED SIGNAL TO AN OUTPUT SYSTEM - Systems and methods are disclosed that can be used to control an output signal, such as for controlling a heater for a hard disk drive. A system can include a pre-driver configured to provide a pulse-width modulated (PWM) signal to an output system in response to a control signal and a feedback signal, the output system being configured to provide an output signal for driving a load, the pre-driver comprising a modulator that provides the PWM signal in response to the control signal and a filtered feedback signal. A low pass filter is configured to receive a feedback signal with a voltage corresponding to a voltage of the output signal, wherein the low pass filter provides the filtered feedback signal that controls a frequency of the PWM signal to the modulator, the low pass filter having a bulk driven operational transconductance amplifier. | 2010-01-21 |
20100013570 | WAVEFORM EQUALIZER - Tap coefficients of an FIR filter are prevented from converging to wrong values. A waveform equalizer for performing waveform equalization of an input signal and outputting a waveform equalization result as an output signal includes: an FIR filter for performing a convolution operation between the input signal and a plurality of tap coefficients; an IIR filter for performing a convolution operation between the output signal and a plurality of tap coefficients; an adding section for adding an operation result of the FIR filter and an operation result of the IIR filter and outputting an addition result as the output signal; an error detecting section for detecting an error of the output signal; and a tap coefficient updating section for updating respective tap coefficients of the FIR filter and the IIR filter based on the error. The tap coefficient updating section sets a step size for updating the tap coefficients of the FIR filter to a value smaller than a step size for updating the tap coefficients of the IIR filter during a period from start of operation of the waveform equalizer until a predetermined condition is satisfied. | 2010-01-21 |
20100013571 | High-power switch - A low-loss Radio Frequency (RF) switch for high-power RF signals. The RF switch includes a first-biasing circuit connected to a first transistor and a second-biasing circuit connected to a second transistor. The RF switch switches its output signal between a first input signal and a second input signal. The first transistor is in a conduction state and the second transistor is in a non-conduction state when the first input signal is to be conducted to the output signal. The first-biasing circuit biases the first transistor at a first voltage for increasing conduction of the first input signal and the second-biasing circuit biases the second transistor at a second voltage for decreasing conduction of the first input signal. Moreover, the second transistor is in a conduction state and the first transistor is in a non-conduction state when the second input signal is to be conducted to the output signal. | 2010-01-21 |
20100013572 | APPARATUS FOR MULTIPLE FREQUENCY POWER APPLICATION - Apparatus and methods are provided for a power matching apparatus for use with a processing chamber. In one aspect of the invention, a power matching apparatus is provided including a first RF power input coupled to a first adjustable capacitor, a second RF power input coupled to a second adjustable capacitor, a power junction coupled to the first adjustable capacitor and the second adjustable capacitor, a receiver circuit coupled to the power junction, a high voltage filter coupled to the power junction and the high voltage filter has a high voltage output, a voltage/current detector coupled to the power junction and a RF power output connected to the voltage/current detector. | 2010-01-21 |
20100013573 | PIEZOELECTRIC THIN-FILM FILTER - A piezoelectric thin-film filter reduces insertion loss and deterioration of steepness of a shoulder characteristic and reduces the ripple in the passband. In a first vibration portion, a piezoelectric thin film is disposed between a pair of electrodes along one main surface of a substrate. In a second vibration portion, the piezoelectric thin film is disposed between a pair of electrodes along the one main surface of the substrate. The vibration portions are both acoustically isolated from the substrate. In the first resonator, an additional film is disposed outside the electrode constituting half or more the overall length of the perimeter of the first vibration portion that is in contact with the electrode when seen from a thickness direction. In the second resonator, the external shape of the vibration portion when seen from a thickness direction is a polygon, and each side of the polygon is not parallel with any of the other sides thereof. | 2010-01-21 |
20100013574 | Micro-Electro-Mechanical Transducer Having a Surface Plate - A micro-electro-mechanical transducer (such as a cMUT) is disclosed. The transducer has a base, a spring layer placed over the base, and a mass layer connected to the spring layer through a spring-mass connector. The base includes a first electrode. The spring layer or the mass layer includes a second electrode. The base and the spring layer form a gap therebetween and are connected through a spring anchor. The mass layer provides a substantially independent spring mass contribution to the spring model without affecting the equivalent spring constant. The mass layer also functions as a surface plate interfacing with the medium to improve transducing performance. Fabrication methods to make the same are also disclosed. | 2010-01-21 |
20100013575 | RESONANT DEVICE, COMMUNICATION MODULE, COMMUNICATION DEVICE, AND METHOD FOR MANUFACTURING RESONANT DEVICE - A resonant device includes first and second piezoelectric thin film resonators. The first piezoelectric thin film resonator includes a substrate, a first lower electrode formed on the substrate, a first piezoelectric film formed over the first lower electrode, and a first upper electrode formed on the piezoelectric film and opposed to the first lower electrode. The second piezoelectric thin film resonator includes a second lower electrode formed above the first upper electrode, a second piezoelectric film formed over the second lower electrode, and a second upper electrode formed on the piezoelectric film and opposed to the second lower electrode. The first membrane region in which the first lower electrode opposes to the first upper electrode through the first piezoelectric film and a second membrane region in which the second lower electrode opposes to the second upper electrode through the second piezoelectric film are laminated through a second cavity. | 2010-01-21 |
20100013576 | Switchable bandpass filter having stepped-impedance resonators loaded with diodes - A switchable bandpass filter includes a first stepped-impedance resonator, a second stepped-impedance resonator wirelessly coupled to the first stepped-impedance resonator, and a first diode connected to one end of the second stepped-impedance resonator. | 2010-01-21 |
20100013577 | BANDPASS FILTER, WIRELESS COMMUNICATION MODULE AND WIRELESS COMMUNICATION DEVICE - A bandpass filter for a wide frequency band such as UWB is disclosed. The bandpass filter can receive a pair of signals, namely a balanced signal, and output a pair of signals. The bandpass filter comprises a plurality of ½ wavelength resonance electrodes, a plurality of ¼ wavelength resonance electrodes and a plurality of coupling electrodes. A transmission characteristic of the bandpass filter having flat and low loss over the entire region of the broad pass band can be achieved. | 2010-01-21 |
20100013578 | METHOD OF OPERATION AND CONSTRUCTION OF DUAL-MODE FILTERS, QUAD-MODE FILTERS, DUAL BAND FILTERS, AND DIPLEXER/MULTIPLEXER DEVICES USING FULL OR HALF CUT DIELECTRIC RESONATORS - Novel quadruple-mode, dual-mode, and dual-band filters as well multiplexers are presented. A cylindrical dielectric resonator sized appropriately in terms of its diameter D and length L will operate as a quadruple-mode resonator, offering significant size reduction for dielectric resonator filter applications. This is achieved by having two mode pairs of the structure resonate at the same frequency. Single-cavity, quad-mode filters and higher order 4n-pole filters are realizable using this quad-mode cylindrical resonator. The structure of the quad-mode cylinder can be simplified by cutting lengthwise along its central axis to produce a half-cut cylinder suitable for operation in either a dual-mode or a dual-band. Dual-mode, 2n-pole filters are realizable using this half-cut cylinder. Dual-band filters and diplexers are further realizable using the half-cut structure and full cylinder by carrying separate frequency bands on different resonant modes of the structure. These diplexers greatly reduce size and mass of many-channel multiplexers at the system level, as each two channels are overloaded in one physical branch. Full control of center frequencies of resonances, and input and inter-resonator couplings are achievable, allowing realization of microwave filters with different bandwidth, frequency, and Return Loss specifications, as well as advanced filtering functions with prescribed transmission zeros. Spurious performance of the half-cut cylinder can also be improved by cutting one or more through-way slots between opposite surfaces. Size and mass reduction achieved by using the full and half-cut resonators described, provide various levels of size reduction in microwave systems, both filter level, and multiplexer level. | 2010-01-21 |
20100013579 | Boosted cable for carrying high speed channels and methods for calibrating the same - A self calibrating cable, including a USB3 cable, with a boost device of the embodiment of the invention is described, in which parameters that control the response of the boost device are set optimally in a self-calibrating process comprising looping the boosted cable on itself through a calibration fixture that contains a calibration control device. The boost device includes pattern generators and a sampling circuit. Each high speed channel of the cable is separately tested and calibrated with the help of one of the other channels serving as a sampling channel. Additional embodiments provide for a selected replica boost device and a distinct pattern generator device in the calibration fixture. A corresponding system and method for calibrating a cable are also provided. | 2010-01-21 |
20100013580 | ELECTROMAGNETIC RELAY - An electromagnetic relay includes a relay coil assembly, an armature, and a contact system. The contact system includes a stationary contact assembly stationary contacts and moveable contact springs adjacent to the stationary contacts. The moveable contact springs have a projecting portion. The armature is pivotably actuated in response to an electromagnetic force generated by the relay coil to move the at least one contact spring linearly between a first position and a second position. The stationary contact assembly includes an overmold portion attached to the at least one stationary contact. The overmold portion includes a dielectric material and is bonded to the at least one stationary contact to maintain a predetermined configuration of the stationary contact relative to the at least one moveable contact spring. | 2010-01-21 |
20100013581 | Superconductivity utilizing support mechanism, and permanent magnet utilizing support mechanism - A superconductivity utilizing support mechanism comprises a superconductive coil and a ferromagnetic body. One of the ferromagnetic body, so constituted as to slide in a direction of a center axis of the superconductive coil, and the superconductive coil, so constituted as to slide in a direction of the center axis thereof, is floated and supported relative to the other by axial magnetic attraction caused by a center plane of the superconductive coil and a center plane of the ferromagnetic body moving apart from each other. | 2010-01-21 |