| 03rd week of 2011 patent applcation highlights part 19 |
| Patent application number | Title | Published |
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| 20110012616 | Systems and methods for assessing standoff capabilities of in-service power line insulators - An electrical power transmission system includes electrical insulators arranged to electrically isolate live power lines. Measurement devices are physically incorporated or integrated in the insulator structures. The measurement devices measure and report insulator properties during live wire conditions. | 2011-01-20 |
| 20110012617 | METHODS AND SYSTEMS FOR TESTING DIGITAL-TO-ANALOG CONVERTER/AMPLIFIER CIRCUITS - A digital-to-analog converter (DAC)/amplifier testing system for use in an electron-beam (e-beam) mask writer, the e-beam mask writer including a plurality of DAC/amplifier circuits to output analog voltage signals, each DAC/amplifier circuit having a first output terminal and a second output terminal, the first output terminals of the plurality of DAC/amplifier circuits being respectively coupled to deflection plates of the e-beam mask writer to provide the output analog voltages as deflection voltages, is provided. The testing system including a summation circuit to sum voltage signals and to output a summation signal indicating the sum of the received analog voltage signals and an analyzer circuit to digitize the summation signal and to detect to compare the digitized summation signal with an error tolerance range to detect whether at least one of the DAC/amplifier circuits is experiencing an operating error. | 2011-01-20 |
| 20110012618 | METHOD AND APPARATUS FOR SENSING CAPACITANCE VALUE AND CONVERTING IT INTO DIGITAL FORMAT - A capacitive sensing system are configured to sense a capacitance value and convert the sensed capacitance value to a digital format. The capacitive sensing system provides good selectivity and immunity to noise and interference, which can be further enhanced by enabling spread spectrum excitation. In some embodiments, the capacitive sensing system utilizes a sinusoidal excitation signal that results in low electromagnetic emissions, limited to narrow frequency band. In some embodiments, the capacitive sensing system is configured to operate in a spread spectrum mode, in which the majority of the excitation signal power is carried in the assigned bandwidth. The excitation frequency and the bandwidth of the spread spectrum excitation signal are programmable in a wide range, which allows for avoiding frequency conflicts in the operating environment. | 2011-01-20 |
| 20110012619 | Yield Improvement for Josephson Junction Test Device Formation - An apparatus for measuring component performance including a feed line having an input port and an output port, a first resonator connected to the feed line, and a first Josephson junction device connected to the first resonator and to ground. | 2011-01-20 |
| 20110012620 | CORRECTION FACTORS FOR ELECTROMAGNETIC MEASUREMENTS MADE THROUGH CONDUCTIVE MATERIAL - The present disclosure relates to determining attenuation factors relating to an electromagnetic signal passing through, a conductive material seen by a real sensor. A sensor is provided and disposed proximate to the material. An alternating current is passed through the sensor and the impedance of the sensor is measured. The impedance of an ideal coil is obtained from the measured impedance using electromagnetic modeling combined with a circuit analysis of the coil impedance, and the attenuation factors for the real coil in straight or feedback mode are determined by electromagnetic modeling of casing attenuation factors and impedance of an ideal coil combined with equivalent circuit modeling of the sensor transfer functions. The attenuation factors seen by the real sensor may be determined in real-time or post-survey. The material may be magnetic or non-magnetic. | 2011-01-20 |
| 20110012621 | METHOD AND MONITORING SYSTEM FOR CLOSING COVERS - The invention relates to a method and a monitoring system for automatically actuated, in particular power-driven closing covers, for example boot lids of motor vehicles. The invention also relates to a method and a detection system for detecting the presence of objects per se. The aim of the invention is to provide solutions for the implementation of a reliable safety system. According to the invention, this is achieved by a detection system comprising a modulation unit for generating an alternating voltage, which is applied between a first output and a second output on the modulation device, a field generation structure that is coupled to one of the outputs in order to generate an extensive excitation field and a detection device comprising a detection electrode structure for detecting a field-electric effect in a detection area that extends along the electrode structure, the field generation structure and the detection electrode structure being located in the vicinity of one another and the detection electrode structure and the field generation structure being shielded from one another, in such a way that when the excitation field and the detection area are bridged by an object to be detected, a voltage event that can be classified as indicating a presence is induced in the detection electrode structure. | 2011-01-20 |
| 20110012622 | TEST APPARATUS - Provided is a test apparatus that tests a device under test, comprising a power supply that generates supply power supplied to the device under test; a transmission path that transmits the supply power generated by the power supply to the device under test; a high-capacitance capacitor that is provided between the transmission path and a ground potential; a low-capacitance capacitor that has a lower capacitance than the high-capacitance capacitor and that is provided between the transmission path and the ground potential at a position closer to the device under test than the high-capacitance capacitor is to the device under test; an intermediate capacitor that is provided between the transmission path and the ground potential at a position between the high-capacitance capacitor and the low-capacitance capacitor; and a current measuring section that measures current flowing through the transmission path between the intermediate capacitor and the low-capacitance capacitor. | 2011-01-20 |
| 20110012623 | CAPACITIVE SENSOR ARRAY - A capacitive sensor array includes a sensor electrode, a shielding electrode and a background electrode which are surrounded by insulator materials and connected to a control and evaluation circuit. Using the sensor electrode that extends along a first coordinate line, the entry of an object into a space ahead of the sensor electrode is detected. The control and evaluation circuit detects a capacity change of the sensor electrode as compared to a reference potential. The shielding electrode is connected to the sensor electrode via the control and evaluation circuit in such a manner that its potential follows. The three electrodes are arranged behind each other along a second coordinate line that is perpendicular to the first coordinate line. The insulating materials are arrayed between the sensor electrode and the detection zone. The central axis of the cylinder lies within the plane that is formed by the first and second coordinate lines. The insulator materials between the detection zone and the sensor electrode include at least one plastic layer that directly surrounds the sensor electrode and a plastic layer that is arrayed at a specified distance. The insulator materials are arranged so that the relative dielectricity constant initially assumes a relatively high value of the surrounding plastic layer as the distance from the sensor electrode increases, then drops to a value that approaches the value of 1, and then again rises to a relatively high value of the outer plastic layer. | 2011-01-20 |
| 20110012624 | SENSOR MODULE - A capacitive sensor module with a sensor electrode which is used to detect the entry of an object into a space ahead of the sensor electrode, wherein the sensor electrode is formed from a wire. Parallel to the sensor electrode, auxiliary electrodes extend within a plastic carrier that possesses recesses to receive the sensor electrode and the auxiliary electrodes and partially surrounds them along their circumference. The sensor electrodes can be pressed into the plastic carrier by overcoming an elastic forming force and are held within their recesses by the elastic reshaping process. | 2011-01-20 |
| 20110012625 | ZINC OXIDE SULFUR SENSOR - Sulfur sensors are formed by coating a conductive substrate with ZnO microstructures that are reactive with sulfur in liquids, such as fuel, using MOCVD. The ZnO is changed to ZnS over time and causes the voltage across the sensors to change under a constant current by at least about 25%. The time required for such saturation to occur can then be correlated to a sulfur concentration in the liquid. | 2011-01-20 |
| 20110012626 | Correction for gas entrained water analyzers - An apparatus for measuring a water content in a multiphase fluid flow stream is provided. The apparatus comprises a measurement section configured to obtain a series of electrical measurements of the multiphase fluid flow stream over a first predetermined time interval, and determine a minimum electrical measurement Fmin_baseline from the series of electrical measurements. The measurement section also is configured to calculate a running average of the frequency (Fmin_gas_pattern) from the series of electrical measurements indicative of a change in a gas flow pattern of the multiphase fluid flow stream over a second predetermined time interval. The measurement section further is configured to calculate a corrected electrical measurement F_calc_WC for determining the water content in the multiphase fluid flow stream by subtracting the minimum electrical measurement Fmin_gas_pattern from the minimum electrical measurement Fmin_baseline. | 2011-01-20 |
| 20110012627 | Method for determining porosity with high frequency conductivity measurement - Propagation of ultrasound through a porous body saturated with liquid generates electric response. | 2011-01-20 |
| 20110012628 | CORROSION DETECTING APPARATUS AND OUTDOOR STRUCTURE - A corrosion detecting apparatus includes a first conductive part, an insulating film part made of a material same as that applied to an outdoor structure, which covers the first conductive part, and linear second conductive parts provided in plural with a predetermined gap there between on top of the film part, to detect a corrosion current generated due to degradation of the film part. The corrosion current is detected by a water film generated by a crack formed due to degradation of the film part. | 2011-01-20 |
| 20110012629 | REPLACEMENT-GATE-COMPATIBLE PROGRAMMABLE ELECTRICAL ANTIFUSE - After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state). | 2011-01-20 |
| 20110012630 | DEVICE FOR CHECKING THE OPERABILITY OF A SENSOR ELEMENT - The invention relates to a device for checking the operability of a sensor element ( | 2011-01-20 |
| 20110012631 | Conductive Heating - A storage device transporter is provided for transporting a storage device and for mounting a storage device within a test slot. The storage device transporter includes a frame that is configured to receive and support a storage device. The storage device transporter also includes a conductive heating assembly that is associated with the frame. The conductive heating assembly is arranged to heat a storage device supported by the frame by way of thermal conduction. | 2011-01-20 |
| 20110012632 | Conductive Heating - A test slot assembly is provided for testing a storage device. The test slot assembly is configured to receive and support a storage device, or a storage device supported by a storage device transporter. The test slot assembly also includes a conductive heating assembly. The conductive heating assembly is arranged to heat a storage device by way of thermal conduction. | 2011-01-20 |
| 20110012633 | APPARATUS AND METHOD FOR TESTING OF STACKED DIE STRUCTURE - An integrated circuit device is described that includes a stacked die and a base die having probe pads that directly couple to test logic of the base die so as to implement a scan chain for testing of the integrated circuit device. The base die further includes contacts disposed on a back side of the base die and through-die vias coupled to the contacts and coupled to programmable logic of the base die. In addition, the base die includes a first probe pad configured to couple test input, a second probe pad configured to couple test output and a third probe pad configured to couple control signals. Test logic of the base die is configured to couple to additional test logic of the stacked die so as to implement a scan chain for testing of the integrated circuit device. In accordance with aspects of the present invention, the first probe pad, the second probe pad and the third probe pad are coupled directly to the test logic such that configuration of the programmable logic is not required for coupling the test input, the test output and the control signal between the base die and the stacked die so as to implement the scan chain. | 2011-01-20 |
| 20110012634 | Test probe - A test probe is provided. The test probe includes a group of shielding boards and two probe pins. The group of shielding boards has two opposite surfaces. The group of shielding boards includes at least two insulation boards and at least one metal board. The metal board is formed between the two insulation boards. The two probe pins are formed on the two surfaces of the group of shielding boards and have a distance between each other. | 2011-01-20 |
| 20110012635 | WET HIGH POTENTIAL QUALIFICATION TOOL FOR SOLAR CELL FABRICATION - Embodiments of the invention generally provide methods and an apparatus for processing and qualifying a formed photovoltaic device to assure that the formed photovoltaic device meets desired quality and industry electrical standards. Embodiments of the present invention may also provide a photovoltaic device, or solar cell device, production line that is adapted to form a thin film solar cell device by accepting an unprocessed substrate and performing multiple deposition, material removal, cleaning, bonding, and testing steps to form a complete functional and tested solar cell device. The solar cell device production line, or system, is generally an arrangement of processing modules and automation equipment used to form solar cell devices that are interconnected by automated material handling system. In one embodiment, the system is a fully automated solar cell production line that is designed to reduce and/or remove the need for human interaction and/or labor intensive processing steps to improve the device reliability, process repeatability, and the solar cell formation process cost of ownership (CoO). | 2011-01-20 |
| 20110012636 | MEASURING METHOD AND DEVICE FOR CHARACTERIZING A SEMICONDUCTOR COMPONENT - A measuring method for characterizing a semiconductor component ( | 2011-01-20 |
| 20110012637 | METHOD FOR DETECTION OF INTERLAMINAR SHEET SHORT CIRCUITS IN THE STATOR SHEET CORE OF ELECTROMACHINES - A method and an apparatus are described for detection of interlaminar laminate shorts in the laminated stator core of electrical machines, in which the laminated stator core ( | 2011-01-20 |
| 20110012638 | METHODS AND CIRCUITRY FOR RECONFIGURABLE SEU/SET TOLERANCE - A device is disclosed in one embodiment that has multiple identical sets of programmable functional elements, programmable routing resources, and majority voters that correct errors. The voters accept a mode input for a redundancy mode and a split mode. In the redundancy mode, the programmable functional elements are identical and are programmed identically so the voters produce an output corresponding to the majority of inputs that agree. In a split mode, each voter selects a particular programmable functional element output as the output of the voter. Therefore, in the split mode, the programmable functional elements can perform different functions, operate independently, and/or be connected together to process different parts of the same problem. | 2011-01-20 |
| 20110012639 | RECEIVER, TRANSCEIVER CIRCUIT, SIGNAL TRANSMISSION METHOD, AND SIGNAL TRANSMISSION SYSTEM - A receiver has an offset application circuit for applying a known offset to an input signal, and a decision circuit for comparing the offset-applied input signal with a reference voltage. The level of the input signal is determined based on the known offset and on the result output from the decision circuit. With this configuration, a large common mode voltage can be eliminated in a circuit used for signal transmission. | 2011-01-20 |
| 20110012640 | CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STRUCTURE OF CONFIGURABLE ELEMENTS - Programming of modules which can be reprogrammed during operation is described. Partitioning of code sequences is also described. | 2011-01-20 |
| 20110012641 | CELL ARRANGEMENT METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT - Logic circuit information in which flip-flops of a semiconductor integrated circuit subjected to designing and a logic circuit between flip-flops are defined is input. The logic circuit information is analyzed to detect a logic circuit sandwiched by two flip-flops. The number of logic stages of the detected logic circuit is counted. It is determined, according to the counted number of logic stages, to which substrate potential a cell used for the logic circuit is to be connected. | 2011-01-20 |
| 20110012642 | SIMULTANEOUS LVDS I/O SIGNALING METHOD AND APPARATUS - First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to the input of the driver. The input circuit may also receive an offset voltage. In response to its inputs, the input circuit in each device can use comparators, gates and a multiplexer to determine the logic state being transmitted over the pair of LVDS signal paths from the other device. This advantageously reduces the number of required interconnects between the first and second devices by one half. | 2011-01-20 |
| 20110012643 | APPARATUS AND METHOD FOR TESTING SENSE AMPLIFIER THRESHOLDS ON AN INTEGRATED CIRCUIT - An apparatus and method for testing sense amplifier threshold voltages on an integrated circuit includes one or more sense amplifier modules each including a number of sense amplifier circuits, a voltage generator unit, and detection logic. The voltage generator unit may select a differential voltage to supply to at least some of the sense amplifier circuits, and each sense amplifier circuit may be configured to generate an output value that is dependent upon the applied differential voltage in response to receiving an enable signal. The detection logic may detect and capture an output value of each of the sense amplifier circuits. In one implementation, the voltage generator unit may iteratively select a different differential voltage in response to a control input. Accordingly, the detection logic may capture the output value of the sense amplifiers after each change in differential voltage. | 2011-01-20 |
| 20110012644 | SAMPLING CIRCUITS - A sampling circuit includes an amplifier, a sampling capacitor, a feedback capacitor, and a voltage source. The sampling capacitor and the feedback capacitor are coupled to the same input terminal of the amplifier, such that the offset of the amplifier and low-frequency noise can be cancelled. The voltage source can shift the voltage level of an output signal of the sampling circuit by the difference between the input and output common mode voltages of the amplifier, so that an amplifier having different input common mode voltage and output common mode voltage can be adopted, and the capacitance of the sampling capacitor and that of the feedback capacitor can be different, resulting in a non-unit gain. | 2011-01-20 |
| 20110012645 | SIGNAL LINE DRIVING CIRCUIT AND LIGHT EMITTING DEVICE - Dispersion occurs in the characteristics of the transistors. The invention is a signal line driving circuit having a first and a second current source circuits corresponding to each of a plurality of signal lines, a shift register, and a constant current source for video signal, in which the first current source circuit is disposed in a first latch and the second current source circuit is disposed in a second latch. The first current source circuit includes capacitive means for converting the current supplied from the constant current source for video signal into a voltage, according to a sampling pulse supplied from the shift register, and supplying means for supplying the current corresponding to the converted voltage. The second current source circuit includes capacitive means for converting the current supplied from the first latch into a voltage, according to a latch pulse, and supplying means for supplying the current corresponding to the converted voltage. | 2011-01-20 |
| 20110012646 | BUS LOW VOLTAGE DIFFERENTIAL SIGNALING (BLVDS) CIRCUIT - A differential signaling circuit and a control circuit. The differential signaling circuit includes a first positive driver and a first negative driver. The first negative driver has different impedance than the first positive driver. The first positive driver and the first negative driver together define a first current path between positive and negative power supply terminals. A first output is defined on the first current path intermediate the first positive driver and the first negative driver. The control circuit includes a first driver that drives a transmission line at a first output voltage, a feedback amplifier responsive to the first output voltage to generate a control signal and a metal oxide semiconductor (MOS) driver coupled to the first driver and responsive to the control signal to make impedance of the first driver equivalent to impedance of the transmission line. | 2011-01-20 |
| 20110012647 | FREQUENCY DIVIDER WITH A CONFIGURABLE DIVIDING RATIO - A method for dividing the frequency of a signal using a configurable dividing ratio is disclosed. An input signal with a first frequency is received at clocked switches in a frequency divider with a configurable dividing ratio. Non-clocked switches inside the frequency divider are operated to select one of multiple dividing ratios. An output signal is output with a second frequency that is the first frequency divided by the selected dividing ratio. | 2011-01-20 |
| 20110012648 | SYSTEMS AND METHODS FOR REDUCING AVERAGE CURRENT CONSUMPTION IN A LOCAL OSCILLATOR PATH - A method for reducing average current consumption in a local oscillator (LO) path is disclosed. An LO signal is received at a master frequency divider and a slave frequency divider. Output from the master frequency divider is mixed with an input signal to produce a first mixed output. Output from the slave frequency divider is mixed with the input signal to produce a second mixed output. The second mixed output is forced to be in phase with the first mixed output. | 2011-01-20 |
| 20110012649 | INTERRUPTER, A METHOD OF RESPONDING TO A MONITORED EVENT AND AN INTEGRATED CIRCUIT INCLUDING AN INTERRUPTER - An interrupter, a method of responding to a monitored event and an IC are disclosed. In one embodiment, the interrupter includes: (1) a monitoring circuit configured to monitor for an occurrence of at least one event and generate an external event signal when detecting the occurrence, (2) a microprocessor, having: (2A) at least one functional pin and (2B) a reset input pin, coupled to the monitoring circuit, the microprocessor configured to begin a reset process in response to receiving the external event signal at the reset input pin and thereby set the functional pin to a reset state, and (3) a responding circuit coupled to the functional pin and configured to initiate a predetermined action when the functional pin is set to a reset state. | 2011-01-20 |
| 20110012650 | MICROCONTROLLER UNIT AND METHOD THEREFOR - A microcontroller unit comprises a reset controller operably coupled to a plurality of logic elements of the microcontroller unit. Low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller. A method of operating a microcontroller unit is also described. | 2011-01-20 |
| 20110012651 | POWER-ON RESET CIRCUIT, MODULE INCLUDING SAME, AND ELECTRONIC DEVICE INCLUDING SAME - A power-on reset circuit includes a charge-up circuit to charge a first capacitor after power is on, a first NOR circuit connected to an output terminal of the charge-up circuit and receive a power-on reset signal output from an output terminal of the power-on reset circuit, a first inverter connected to the first NOR circuit, a second capacitor connected between an input terminal of the first NOR circuit and an output terminal of the first inverter, a counter configured to count a clock, a clock selector configured to select whether to output or inhibit a clock signal based on an output signal from the counter, and a second inverter connected to the output terminal of the counter to output the power-on reset signal. | 2011-01-20 |
| 20110012652 | Phase-Locked Loop - A loop filter for receiving an input signal indicative of a phase-difference between a reference signal and a signal output by a signal generator and forming a control signal for controlling the signal generator in dependence thereon, the loop filter comprising a plurality of filter components that determine the frequency response of the filter, said filter components being arranged so that a first set of said components determines one or more zeros of the filter's frequency response and a second set of said components determines one or more poles of the filter's frequency response, each of said first and second sets of filter components being independent of the other such that the zero(s) and pole(s) of the filter's frequency response may be selected independently. | 2011-01-20 |
| 20110012653 | CHARGE PUMP WITH LOW CHARGE INJECTION AND LOW CLOCK FEED-THROUGH - A charge pump with low charge injection and low clock feed-through for a phase locked loop (PLL). A first source-switched current mirror has a source transistor and an output transistor. The source transistor has a drain connected to a first current source. The output transistor has a drain connected to an output of the charge pump. The gates of the source and output transistors are coupled together by a first conductive link. A switch is coupled between a supply voltage source and a source of the output transistor of the current mirror. A tuner is coupled between the switch and the output transistor of the current mirror. A source of the tuner is coupled to a drain of the switch and to the source of the output transistor. A drain of the tuner is coupled to the first conductive link between the source and output transistors of the current mirror. | 2011-01-20 |
| 20110012654 | LOCKING STATE DETECTOR AND DLL CIRCUIT HAVING THE SAME - A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase difference distinction signal to distinguish a first phase difference range, and a second phase difference distinction signal to distinguish a second phase difference range wider than the first phase difference range, and a locking state setting unit configured to generate a locking state signal in response to the first phase difference distinction signal and the second phase difference distinction signal. | 2011-01-20 |
| 20110012655 | LOCKED LOOPS, BIAS GENERATORS, CHARGE PUMPS AND METHODS FOR GENERATING CONTROL VOLTAGES - Locked loops, bias generators, charge pumps and methods for generating control voltages are disclosed, such as a bias generator that generates bias voltages for use by a clock signal generator, such as a voltage controlled delay line, in a locked loop having a phase detector and a charge pump. The charge pump can either charge or discharge a capacitor as a function of a signal from the phase detector to generate a control voltage. The bias generator can receive the control voltage from the capacitor, and it generates bias voltages corresponding thereto. A portion of the bias generator can have a topography that is substantially the same as at least a portion of the topography of the charge pump. As a result, it can cause the charge pump to charge the capacitor at the same rate that it discharges the capacitor over a relatively wide range of control voltages. The charge pump and the bias generator can also include circuitry for limiting the charging of the capacitor when the control voltage is relatively low. | 2011-01-20 |
| 20110012656 | SEMICONDUCTOR INTEGRATED CIRCUIT - During a period of preparation for actual operation, a reference clock is supplied to both a comparison clock input portion and a feedback clock input portion of a phase comparator while a feedback loop of a PLL (phase-locked loop) is interrupted, and a delay of a reset signal within the phase comparator is adjusted so as to reduce a detection dead zone of phase differences in the phase comparator. | 2011-01-20 |
| 20110012657 | DIGITALLY CONTROLLED OSCILLATOR - A digitally controlled LC-tank oscillator is constructed by connecting different tuning circuits to a LC tank. The tuning circuit includes a single bank of tuning cells, a dual bank of tuning cells, or a fractional tuning circuit. Each of said tuning cells in the tuning circuit includes a tuning circuit element and a memory cell. | 2011-01-20 |
| 20110012658 | Adaptive pulse width control power conversation method and device thereof - An adaptive pulse width control power conversion device includes a pulse width adjustable pulse frequency module (PFM) control circuit, a pulse width modulation (PWM) control circuit, a PWM/PFM switching unit, a switching circuit, and a load status detection circuit. When the power conversion device is to be switched from a PWM mode to a PFM mode, pulse width of a series of PFM control signals is sequentially adjusted from a low value to a high value according to a predetermined pulse width increment until an optimum pulse width is determined and thereafter, an output voltage is supplied to a load in the PFM mode, whereby ripple of output voltage in the PFM mode can be improved and improved stability of output of the power conversion device is realized. | 2011-01-20 |
| 20110012659 | SIGNAL GENERATION APPARATUS AND TEST APPARATUS - Provided is a signal generating apparatus that generates an output signal having a designated phase, comprising a phase difference detecting section that outputs a control signal corresponding to a phase difference between a reference signal having a prescribed period and the output signal; an oscillating section that generates a periodic signal having a frequency corresponding to the control signal; and a phase shifting section that outputs the output signal to have a phase that is shifted from the phase of the periodic signal by a designated phase amount. | 2011-01-20 |
| 20110012660 | CLOCK CIRCUIT WITH DELAY FUNCTIONS AND RELATED METHOD - A clock circuit with delay functions includes a first clock tree and a delay module. The first clock tree provides a first clock signal and includes a first clock root and a plurality of first sub-trees. The delay module is coupled to the first clock root or a designated sub-tree among the plurality of first sub-trees for delaying the first clock signal. The delay module includes at least two delay segments, wherein each delay segment includes a delay and a connection net. The delay time caused by each delay segment is substantially the same. | 2011-01-20 |
| 20110012661 | SEQUENTIALLY OPERATED MODULES - Method, modules and a system formed by connecting the modules for controlling payloads. An activation signal is propagated in the system from one module to the modules connected to it. Upon receiving an activation signal, the module (after a pre-set or random delay) activates a payload associated with it, and transmits the activation signal (after another pre-set or random delay) to one or more modules connected to it. The system is initiated by a master module including a user activated switch producing the activation signal. The activation signal can be propagated in the system in one direction from the master to the last module, or carried bi-directionally allowing two way propagation, using a module which revert the direction of the activation signal propagation direction. A module may be individually powered by an internal power source such as a battery, or connected to an external power source such as AC power. | 2011-01-20 |
| 20110012662 | SUB-BEAM FORMING TRANSMITTER CIRCUITRY FOR ULTRASOUND SYSTEM - Multi-channel pulser driver circuitry for a sub-beam forming transmitter of an ultrasound system in which sub-beam signals are formed by delaying sub-beam pulse pattern data in accordance with sub-beam pulse delay data and multiple clock signals. | 2011-01-20 |
| 20110012663 | CLOCK SIGNAL GENERATING ARRANGEMENT FOR A COMMUNICATION DEVICE - A clock signal generating arrangement for a communication device generates a system clock signal at an output for use as a timing reference. The clock signal generating arrangement comprises a reference clock generator for generating a reference clock signal, a main clock generator for generating a main clock signal having a greater accuracy than the reference clock signal, a clock adjust circuit coupled to the reference clock generator for generating a compensated reference clock signal to compensate for error in the reference clock signal and a clock signal selector coupled to the reference clock generator the main clock generator and the clock adjust circuit. The clock signal selector selectively provides to the output of the clock signal generating arrangement as the system clock signal the compensated reference clock signal when an error in the reference clock signal reaches a first predetermined threshold and until the error in the reference clock signal has been compensated and otherwise the reference clock signal when the communication device is operating in an idle mode or the main clock signal when the communication device is operating in an active mode. | 2011-01-20 |
| 20110012664 | CLOCK SIGNAL AMPLIFIER CIRCUIT - A clock signal amplifier circuit includes: an inverter; a coupling capacitor connected to the input of the inverter; two resistors connected in series between the power supply potential and the ground potential, a connection node of the two resistors being connected to the input of the inverter; a feedback resistor provided between the input and output of the inverter; and two switches configured to perform a same open/close operation according to a control signal, the two switches being provided on any two of a supply path of the power supply potential to the inverter, a supply path of the ground potential to the inverter, and a feedback path of the inverter via the feedback resistor. | 2011-01-20 |
| 20110012665 | Systems and Methods for Lowering Interconnect Capacitance Through Adjustment of Relative Signal Levels - Methods and circuitry for lowering the capacitance of interconnects, particularly Through Wafer Interconnects (TWIs), using signal level adjustment are disclosed. Embodiments of the invention seek to bias the midpoint voltage level of the signals on the TWIs towards inversion, where at high frequencies capacitance is at its minimum. In one embodiment, reduced swing signals are used for the data states transmitted across the TWIs, in which the reduced swing signals use a midpoint voltage level tending to bias the TWI capacitance towards inversion. In another embodiment, signals are AC coupled to the TWI where they are referenced to an explicit bias voltage directly connected to the TWI. This allows signals to propagate through the TWI while the TWI is biased towards inversion. In a third embodiment, the potential of the substrate is explicitly lowered with respect to the TWI potential. Regardless of the particular embodiment used, raising the midpoint-voltage level of the signals on the TWIs relative to the substrate decreases capacitance, which increases the frequency of the data which can propagate through the TWIs while potentially reducing the signaling power. | 2011-01-20 |
| 20110012666 | NON-PREDICATED TO PREDICATED CONVERSION OF ASYNCHRONOUS REPRESENTATIONS - Methods, circuits and systems for converting of a non-predicated asynchronous netlist to a predicated asynchronous netlist are described. These may operate to identify one or more portions of an asynchronous netlist corresponding to a partially utilized portion of an asynchronous circuit. The asynchronous netlist may be modified to control the partially utilized portion. Additional methods, circuits, and systems are disclosed. | 2011-01-20 |
| 20110012667 | Zero Power Drain Pushbutton On Switch - A normally-open pushbutton switch is coupled to and cooperates with a pair of MOSFETs to provide a power on switch function for a personal audio device that does not require power to be drawn from a power source to monitor the pushbutton switch while awaiting operation of the pushbutton switch to cause the personal audio device to be powered on. | 2011-01-20 |
| 20110012668 | PROGRAMMABLE EFUSE AND SENSE CIRCUIT - A circuit for electric fuses includes circuits for sensing status and programming that have separate paths for each operation. The circuit includes a plurality of electrically programmable fuses and, associated with each fuse, a switch for coupling a first terminal of the fuse to a ground supply for programming or to a comparator for sensing. The circuit uses a switched current source to supply current to the fuses for programming. The comparator senses a fuse status when a current source is switched through the fuse. The comparator compares a voltage across the fuse and associated switches to a comparison voltage across a comparison resistor and switches included for matching. | 2011-01-20 |
| 20110012669 | SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE CONNECTION - Embodiments of the present invention provide for the removal of excess carriers from the body of active devices in semiconductor-on-insulator (SOI) structures. In one embodiment, a method of fabricating an integrated circuit is disclosed. In one step, an active device is formed in an active layer of a semiconductor-on-insulator wafer. In another step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In another step, an insulator material is removed from a back side of the SOI wafer to form an excavated insulator region. In another step, a conductive layer is deposited on the excavated insulator region. Depositing the conductive layer puts it in physical contact with a body of an active device in a first portion of the excavated insulator region. The conductive layer then couples the body to a contact in a second detached portion of the excavated insulator region. | 2011-01-20 |
| 20110012670 | Providing in package power supplies for integrated circuits - A device with an in package power supply may be utilized to supply power to other components. As a result, the overall system size may be reduced and economies may be achieved. | 2011-01-20 |
| 20110012671 | Charge Pump Circuit - A charge pump circuit includes an input end, a first reservoir capacitor, a second reservoir capacitor, a first output end, a second output end, and a charge pump unit. The input end is utilized for receiving an input voltage. The charge pump unit includes a first flying capacitor, a second capacitor, a plurality of switches, and a control unit. The control unit is utilized for controlling on/off state of the plurality of switches so that the first flying capacitor provides a positive charge pump voltage to the first output end or a negative charge pump voltage to the second output and the second flying capacitor provides a positive charge pump voltage to the first output end through charge and discharge process. | 2011-01-20 |
| 20110012672 | BODY-BIAS VOLTAGE CONTROLLER AND METHOD OF CONTROLLING BODY-BIAS VOLTAGE - A body-bias voltage controller includes: a plurality of transistors at least one of which is supplied with a body-bias voltage; a monitor circuit to detect voltage characteristics of the plurality of transistors and to output a indicator signal; and a body-bias voltage generator to generate the body-bias voltage based upon the indicator signal. | 2011-01-20 |
| 20110012673 | INTEGRATED CIRCUIT INCLUDING A LARGE NUMBER OF IDENTICAL ELEMENTARY CIRCUITS POWERED IN PARALLEL - The invention relates to an integrated circuit comprising a succession of N identical elementary circuits, juxtaposed in the order of their rank j varying from 1 to N, N being at least equal to 50, and all having to receive two reference potentials Vref and V | 2011-01-20 |
| 20110012674 | QUIET POWER UP AND POWER DOWN OF CLOSED LOOP DIGITAL PWM MODULATORS - A switching audio amplifier circuit drives a switching audio amplifier stage using a digital PWM signal from an audio source. A PWM duty ratio modifier modifies an edge timing of the digital PWM signal to produce a modified digital PWM signal. A mode switch switches between the digital PWM signal and the modified digital PWM signal in a way that masks audible noise such as clicks and pops at power-up and power-down of the switching audio amplifier. An integrating error amplifier compares a difference between the digital PWM signal and an amplified PWM signal and integrates the difference to control the edge timing modified by the PWM duty ratio modifier. A mode controller can apply an offset signal to the integrating error amplifier and can control the switching of the mode switch. | 2011-01-20 |
| 20110012675 | POWER AMPLIFICATION DEVICE FOR SATELLITE COMMUNICATION DEVICE - A power amplification device for a satellite communication device with a redundant configuration, in which a plurality of power amplifiers including a standby power amplifier are connected in a ring shape, and which easily switches connection to the standby power amplifier in a case of a failure in active power amplifiers without closing a detour route. The power amplification device for the satellite communication device includes a plurality of basic units each including: a plurality of power amplifiers including at least one standby power amplifier, which are arranged in parallel; a plurality of switches provided to input ends and output ends of the plurality of power amplifiers for switching connection paths; and bypass connection lines for connecting the plurality of switches in a ring shape, and the plurality of basic units are connected in cascade. | 2011-01-20 |
| 20110012676 | SYSTEMS AND METHODS OF REDUCED DISTORTION IN A CLASS D AMPLIFIER - Systems and methods for reduced distortion in a class D amplifier are provided. An “ideal” digital output signal is produced. The “ideal” digital output signal is then compared to the actual output signal in an error amplifier. The integrator input is the difference between the output stage waveform and the ideal output stage waveform. The net input to the integrator now comprises the imperfections of the power stage, and the feedback loop drives their average to zero. This error is then amplified and integrated. The integrated signal is than applied to a summer where it is added to the analog input. Then as in the typical Class D amplifier, the integrated signal is compared in an error amplifier to a ramp signal generated from the ramp generator. | 2011-01-20 |
| 20110012677 | CURRENT SENSING - A switching amplifier comprising: an output driving circuit ( | 2011-01-20 |
| 20110012678 | TRANSFER-FUNCTION CONTROL IN AN ACTIVE FILTER - A filter circuit includes a differential amplifier circuit to provide a number of poles including a dominant pole, and a feedback circuit to feed a portion of an output of the differential amplifier circuit to an input of the differential amplifier circuit. The feedback circuit includes a feedback resistor and a feedback capacitor to provide a controllable increase in an order of a transfer function of the filter circuit along with non-dominant poles of the differential amplifier circuit coupled in parallel with the feedback resistor. Coefficients of a transfer function of the differential amplifier circuit are forced to substantially depend solely on one or more of a plurality of passive circuit elements, the feedback resistor, and the feedback capacitor to control a dependence of the transfer function of the filter circuit on a gain of the differential amplifier circuit and poles of the differential amplifier circuit. | 2011-01-20 |
| 20110012679 | HIGH EFFICIENCY MICROWAVE AMPLIFIER - Disclosed is an apparatus and method for operating a microwave amplifier with improved efficiency and reduced harmonic emissions. The disclosed amplifier includes a variable rail voltage supply and a variable input drive stage. A controller continually monitors the amplifier output and adjusts the rail voltage and input drive signal to achieve high efficiency and low harmonic emissions. The amplifier may include a dynamic bias controller configured to operate the gain elements outside the linear region. Efficiencies of over 70% may be achieved by the disclosed amplifier. | 2011-01-20 |
| 20110012680 | SEMICONDUCTOR DEVICE, RADIO FREQUENCY CIRCUIT, AND RADIO FREQUENCY POWER AMPLIFIER - A semiconductor device and a radio frequency circuit which are appropriate for multiband, multimode performance can be realized as a semiconductor device including a field-effect transistor formed on a semiconductor substrate, and include: ohmic electrodes serving as source and drain electrodes of the field-effect transistor, first and second Schottky electrodes provided between the ohmic electrodes and serving as gate electrodes of the field-effect transistor, and a third Schottky electrode provided and grounded between the first and second Schottky electrodes. | 2011-01-20 |
| 20110012681 | LOW DISTORTION AMPLIFIER AND DOHERTY AMPLIFIER USING LOW DISTORTION AMPLIFIER - Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element. | 2011-01-20 |
| 20110012682 | ELECTRONIC CIRCUIT WITH CASCODE AMPLIFIER - An electronic circuit has an amplifier with an amplifying transistor ( | 2011-01-20 |
| 20110012683 | METHOD AND APPARATUS OF PHASE LOCKING FOR REDUCING CLOCK JITTER DUE TO CHARGE LEAKAGE - a phase lock loop is disclosed, the phase lock loop comprising: a first phase detector configured to receive a first clock and a second clock and output a first detector output signal; a second phase detector configured to receive the first clock and the second clock and output a second detector output signal; a summing circuit to sum the first detector output signal and the second detector output signal into a control signal; a loop filter to filter the control signal into a refined control signal; and a controllable oscillator to generate the output clock in accordance with a control by the refined control signal. | 2011-01-20 |
| 20110012684 | LOCAL OSCILLATOR - Equal numbers of variable capacitance elements, capacitance values of which are separately controlled according to a logic value of a corresponding bit of a delay control signal that is in a one-to-one relation with an oscillation frequency, are connected in parallel among differential outputs of all delay circuits excluding a differential non-inverting delay circuit at the end, which extracts a frequency signal to the outside. Bits of the delay control signal are connected in a one-to-one relation to the equal numbers of variable capacitance elements arranged on output sides of all the delay circuits, in a relation in which delay control signals continuous in terms of frequency are not connected to the equal number of variable capacitance elements arranged on an output side of one of the delay circuits. | 2011-01-20 |
| 20110012685 | Wide-band Low-voltage IQ-generating Ring-oscillator-based CMOS VCO - A voltage controlled oscillator circuit includes first and second power rails, a control voltage rail, an input terminal, and an output terminal. A plurality of domino stages are series connected in a ring, with each of the domino stages being connected across the first and second power rails and being responsive to the control voltage rail. A plurality of feedback paths is provided with each path connected to enable one of the plurality of domino stages to input a feedback output signal to a preceding serially connected domino stage. A reset signal is asserted to place the domino stages in a post charge state and deasserted to allow the domino stages to begin producing an oscillating signal. | 2011-01-20 |
| 20110012686 | DEVICE AND METHOD FOR COMPENSATING FOR A RESONATOR - A device for compensating for the frequency of a resonator, includes: a temperature sensor for the resonator; a sequencer determining a second compensation signal on the basis of the temperature value corresponding to a positive value N, and a third compensation signal on the basis of the temperature value, corresponding to a ratio between a positive integer S and N, S being lower than or equal to N; a variable counter receiving the compensation signals and generating a fourth output signal every N periods of a clock signal from the resonator and generating a fifth signal for modifying the charge capacity of the resonator. N includes an integer part Nint and a fractional part Nfrac, and the variable counter includes: an accumulator receiving Nfrac; a dual-module Nint, Nint+1 counter receiving Nint, a counting member connected to the output of the sequencer and to the output of the dual-module counter, and receiving the third and fourth signals, the counting element generating the fifth signal based on the state of S. | 2011-01-20 |
| 20110012687 | DIGITAL PULSE WIDTH MODULATOR - The invention provides a multi-phase digital pulse width modulator (MP-DPWM) to implement a distribution scheme which applies the duty cycle in the fastest possible manner with restriction on the number of switching actions per phase and cycle, and additionally takes the number of available phases into account. It modulates switching signals according to a duty cycle input command, their previous switching states, and the current switching cycle. The controller is adapted to additionally take the residue of the previous subcycle into account. In the control scheme: | 2011-01-20 |
| 20110012688 | FREQUENCY MODULATOR AND METHOD FOR ADJUSTING GAIN THEREOF - A frequency modulator capable of performing frequency modulation without increasing quantization noise; and a method for adjusting the gain thereof are provided. An input signal is gain-adjusted by a gain adjustment section and outputted to a frequency modulation section. The frequency modulation section is gain-controlled based on a first signal. For setting a digital gain coefficient and an analog gain coefficient of the gain adjustment section, a test signal is inputted. In this state, in a generation section, first control information for setting the digital gain coefficient and second control information for setting the analog gain coefficient are generated based on information regarding a state of the frequency modulation section. | 2011-01-20 |
| 20110012689 | Impedance Adjustment Circuit for Adjusting Terminal Resistance and Related Method - An impedance adjustment circuit for adjusting a terminal resistance includes a resistance evaluation unit and a terminal resistor unit. The resistance evaluation unit is utilized for evaluating a ratio of an off-chip resistor and a basic resistor to generate a control signal by a successive approximation method. The terminal resistor unit is coupled to the resistance evaluation unit, and is utilized for deciding a number of shunt basic resistors to provide a matched terminal resistance according to the control signal. | 2011-01-20 |
| 20110012690 | THIN FILM BALUN - A thin film balun that can be made smaller and thinner while maintaining required balun characteristics is provided. A thin film balun | 2011-01-20 |
| 20110012691 | 1:9 BROADBAND TRANSMISSION LINE TRANSFORMER - A single-core transmission line transformer includes first, second and third transmission lines, and first and second ports. The first and second transmission lines are wound around a common core. The first port interconnects respective first ends of the first and second transmission lines in parallel. The second port communicates with respective second ends of the first and second transmission lines. The third transmission line communicates with the first and second transmission lines without being wound around any solid core. The impedance transformation ratio of the transformer is 1:9 in a direction from the first port to the second port. | 2011-01-20 |
| 20110012692 | CURRENT-INPUT CURRENT-OUTPUT RECONFIGURABLE PASSIVE RECONSTRUCTION FILTER - Embodiments of the present invention relate generally to reconstruction filtering. In particular, embodiments enable highly linear, highly programmable, and easily reconfigurable reconstruction filters. Further, embodiments provide substantial power consumption, area, and cost savings compared to conventional solutions. For example, embodiments use all-passive filtering and substantially reduce active elements compared to conventional solutions. As a result, significant reductions in required area, noise, and power consumption can be achieved. In addition, embodiments perform filtering solely in the current domain, thereby eliminating the non-linear voltage-to-current conversion used in conventional circuits and enabling highly linear filtering. Furthermore, embodiments are highly programmable and easily reconfigurable without the use of tunable capacitors. As such, embodiments are very suitable solutions for multi-band multi-mode wireless transmitters. | 2011-01-20 |
| 20110012693 | BULK-MODE RESONATOR - A method for forming a resonator including a resonant element, the resonant element being at least partly formed of a body at least partly formed of a first conductive material, the body including open cavities, this method including the steps of measuring the resonator frequency; and at least partially filling said cavities. | 2011-01-20 |
| 20110012694 | RESONATOR AND RESONATOR ARRAY - [Subject] An object of the present invention is to provide a resonator readily achieving a high resonance frequency without extreme downsizing and allowing for a high Q factor. | 2011-01-20 |
| 20110012695 | ACOUSTIC WAVE DEVICE AND ELECTRONIC APPARATUS USING THE SAME - An acoustic wave device includes a piezoelectric substrate, an IDT electrode on the substrate, an internal electrode above the substrate, a side wall above the internal electrode, a lid on the side wall, an electrode base layer on the internal electrode, a connection electrode on the electrode base layer, and an anti-corrosion layer between the internal electrode and the side wall. The internal electrode is electrically connected to the IDT electrode. The side wall surrounds the IDT electrode. The lid covers the IDT electrode to provide a space above the IDT electrode. The electrode base layer is provided outside the space and the side wall. The anti-corrosion layer protrudes outside the side wall, and is made of material less soluble in plating solution than the internal electrode. This acoustic wave device prevents the internal electrode from breaking due to plating solution, hence being manufactured at a high yield rate. | 2011-01-20 |
| 20110012696 | SWITCHED ACOUSTIC WAVE RESONATOR FOR TUNABLE FILTERS - A filter for a mobile terminal may include a substrate through which to propagate an acoustic wave; a resonator on a surface of the substrate, the resonator including a first segment and a second segment, the first segment operatively connected to an electrical port; and a switch unit, where the switch unit connects the first segment and the second segment when the switch unit is in one position, the connected first segment and second segment being configured to generate, through the substrate, an acoustic wave at a first frequency, and where the switch unit separates the first segment and the second segment when the switch unit is in another position, the separated first segment being configured to generate, through the substrate, an acoustic wave at a second frequency. | 2011-01-20 |
| 20110012697 | ELECTRO-MAGNETIC BAND-GAP STRUCTURE, METHOD FOR MANUFACTURING THE SAME, FILTER ELEMENT AND PRINTED CIRCUIT BOARD HAVING EMBEDDED FILTER ELEMENT - An electromagnetic bandgap structure EBG includes a rigid substrate, a first conductive plane provided on the rigid substrate, a dielectric layer provided on the first conductive plane, and a plurality of conductor patches arrayed in a two-dimensional regular pattern on the dielectric layer. The electromagnetic bandgap structure also includes an interlayer insulation film provided on top of the conductor patches, and a second conductive plane provided on the interlayer insulation film. The conductor patches and the second conductive plane are interconnected by a plurality of conductors provided in extending through the bulk of the interlayer insulation film. | 2011-01-20 |
| 20110012698 | Method of Manufacturing a Solenoidal Magnet, and a Solenoidal Magnet Structure - A method of manufacturing a solenoidal magnet structure, comprising the steps of providing a collapsible mold in which to wind coils; winding wire into defined positions ( | 2011-01-20 |
| 20110012699 | R-Fe-B RARE EARTH SINTERED MAGNET - An R—Fe—B based rare-earth sintered magnet according to the present invention includes, as a main phase, crystal grains of an R | 2011-01-20 |
| 20110012700 | PERMANENT MAGNET AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a permanent magnet obtained by sintering a green sheet which is produced by mixing a magnet raw material with a resin binder and molding the resulting mixture, and a method for producing the same. Since the present invention has such a constitution, the contraction due to sintering becomes uniform, whereby the deformations such as warpage and depressions do not occur after sintering. Further, it is unnecessary to perform the conventional correcting processing after sintering, which can simplify the production steps, because the pressure unevenness at the time of pressing disappears. Therefore, it becomes possible to mold the permanent magnet with a high degree of dimension accuracy. Furthermore, even when the permanent magnet is reduced in film thickness, the magnetic characteristics are not deteriorated by the processing-deteriorated layer on the surface. | 2011-01-20 |
| 20110012701 | MULTILAYER INDUCTOR - A multilayer inductor is disclosed. The multilayer inductor includes a bottom magnetic layer having an external conductive pattern formed on a bottom surface thereof for connection to a substrate such as a printed circuit board. The bottom external conductive pattern includes signal/power contacts and first and second inductor electrodes. A top magnetic layer includes a top external conductive pattern having signal/power contacts and inductor electrode contacts. An inductor conductive pattern formed on the top surfaces of intermediate magnetic layers disposed between the top and bottom magnetic layers are electrically coupled to each other by means of through holes to form a spiral inductor element. The spiral inductor element is coupled to the first inductor electrode by means of a through hole formed in the bottom magnetic layer and to the second inductor electrode by means of power conductive traces formed on side surfaces of the multilayer inductor. Flux density reducing layers may be inserted directly above the bottom magnetic layer and directly below the top magnetic layer. Signal/power conductive traces formed on side surfaces of the multilayer inductor provide signal/power routing between the top magnetic layer signal/power contacts and the bottom magnetic layer signal/power contacts. The top external conductive pattern accommodates a semiconductor chip in a flip chip configuration. | 2011-01-20 |
| 20110012702 | MnZn FERRITE AND A TRANSFORMER MAGNETIC CORE - A MnZn ferrite having excellent characteristics of an incremental permeability μΔ value of 250 or greater in a wide temperature range of 0 to 85° C. and an incremental permeability μΔ value of 400 or greater at 65° C. when an 80 A/m direct current magnetic field is applied is provided. The MnZn ferrite has basic components that comprise: ferric oxide (in terms of Fe | 2011-01-20 |
| 20110012703 | MEMS ACTUATORS AND SWITCHES - Micro-electromechanical systems (MEMS) actuators and switches exhibiting geometries and configurations providing superior operating characteristics and longer lifetimes. | 2011-01-20 |
| 20110012704 | PROTECTIVE ELEMENT AND SECONDARY BATTERY DEVICE - A protection element and a secondary battery device employing the protection element are provided for stably retaining a flux on a soluble conductor at a predetermined position, so as to enable appropriate blowout of the soluble conductor in the event of an abnormality. The protection element has a soluble conductor which is disposed on an insulation baseboard, and which is connected to a power supply path of a device targeted to be protected, and which causes a blowout when a predetermined abnormal electric power, amount is supplied. A flux is coated on a surface of the soluble conductor, and an insulation cover member is mounted on the baseboard and covers the soluble conductor. The protection element also includes a stepped portion for retaining the flux at a predetermined position in contact with the flux, and the stepped portion is formed opposite to the soluble conductor on an interior face of the insulation cover member. | 2011-01-20 |
| 20110012705 | MEMS ACTUATORS WITH STRESS RELEASING DESIGN - The micro-electromechanical (MEMS) actuator comprises a hot arm member and a cold arm member. The cold arm member comprises at least two longitudinally spaced-apart flexors. The actuators may also be constructed with at least one among the hot arm member and the cold arm member comprising at least one spring section. The stress in this improved MEMS actuator is more uniformly distributed, thereby reducing the mechanical creep and improving its reliability as well as its operation life. | 2011-01-20 |
| 20110012706 | Smart link coupled to power line - A smart link in a power delivery system includes an insulator, which electrically isolates a power line, and a switchable conductance placed in parallel with the insulator. The switchable conductance includes switchgear for sourcing, sinking, and/or dispatching real and/or reactive power on the power line to dynamically in response to dynamic loading, transient voltages and/or currents, and phase conditions or other conditions on the power line. | 2011-01-20 |
| 20110012707 | NTC THERMISTOR CERAMIC, METHOD FOR PRODUCING NTC THERMISTOR CERAMIC, AND NTC THERMISTOR - A ceramic main body | 2011-01-20 |
| 20110012708 | ELECTRONIC DEVICE - An electronic device includes a remote control and a host. The remote control is for generating different wireless signals. The host communicates with the remote control. The host includes a processor, a control panel, and a receiving unit. The control panel is for generating different key signals. The control panel includes a key for generating a locking signal and an unlocking signal. The receiving unit is for transferring the different key signals from the control panel to control the processor, and further for transferring the different wireless signals from the remote control to control the processor. The processor disables the receiving unit according to the locking signal and enables the receiving unit according to the unlocking signal. | 2011-01-20 |
| 20110012709 | METHOD AND SYSTEM FOR DATA CONTROL IN ELECTRONIC LOCKS - Disclosed are apparatus and corresponding methodologies for data control in an electronic access control system. A plurality of electronic locks are connected to a central server over a network such as an 802.11 WiFi wireless network that may be used to provide data updates and management for the individual electronic locks. To address power management problems associated with electronic locks having the capability to communicate over an 802.11 WiFi network, the present disclosure provides method and apparatus for selectively powering on and off an 802.11 WiFi communications module integrated into the electronic lock to conserve power resources. An electronic access control system is disclosed which allows efficient data exchange between a central server and a plurality of electronic locks using a database structure, and which allows for multiple simultaneous database manipulations in a cost effective manner. | 2011-01-20 |
| 20110012710 | DEVICE CONTROL BY MULTIPLE REMOTE CONTROLS - A method and system for remotely controlling a remote-controlled device (RCD) includes receiving an instruction from a remote control (RC). The instruction may include an RC code and a control code. The RC code may identify the RC and the control code may identify an operation to be performed on the RCD. RC codes matching an authorized set of RC codes may cause the control code to be accepted, since the RC is authorized. If a non-matching RC code is received, the control code may be rejected as coming from a prohibited RC. An authorization mode on the RCD may allow modification of the authorized set of RC codes. | 2011-01-20 |
| 20110012711 | Information processing apparatus, information processing method and program - There is provided an information processing apparatus according to the present invention including an authentication processing unit for authenticating biometrics information unique to a living body and an application control unit for controlling an application providing a predetermined service according to the authentication result of the biometrics information and requesting the authentication processing unit to authenticate the biometrics information. The authentication processing unit includes a biometrics information authentication unit for authenticating the biometrics information based on registered biometrics information that is biometrics information registered in advance and an attribute certificate generation unit for generating an attribute certificate indicating information about a valid period of the authentication result of the biometrics information when the biometrics information authentication unit has successfully authenticated the biometrics information. When the attribute certificate is issued for the biometrics information whose authentication is requested, the issued attribute certificate is stored. | 2011-01-20 |
| 20110012712 | SYSTEM FOR MONITORING DETACHABLE CONNECTIONS USING RFID TAGS - The invention relates to communication technology. Use of the invention allows to monitor detachable connections using one antenna for a group of ports. This technical result is achieved by steps of: a patch cord plug is provided with the sensor of connection which contains an RFID tag; a port is provided with the modulator which changes uniquely the reply signal of the RFID tag; the reply signal of the RFID tag changes perceived by an RFID interrogator is changed in an unique manner when the plug is connected to the port; the port and the plug connected to the port is identified using the changed reply signal of the RFID tag. The tag can contain a dry reed switch which is a part of the RFID tag antenna. The modulator can be an electromagnet. | 2011-01-20 |
| 20110012713 | RFID TAG SENSORS AND METHODS - Radio frequency identification (RFID) devices for use in RFID-based sensors and related methods are described herein. In one implementation, an RFID sensor system includes an RFID device having a near field only RFID tag and a conductive element which functions as a far field antenna. A coupling structure selectively locates the near field only RFID tag and the conductive element in at least a first position and a second position relative to each other; wherein in the first position, the RFID device only operates in a near field, and in the second position, the RFID device operates in both the near field and a far field. The system may also include an RFID reader and controller located within the far field to read the RFID device only when the coupling structure locates the components in the second position. | 2011-01-20 |
| 20110012714 | PROCESSING SYSTEM FOR PORTABLE ELECTRONIC APPARATUS, PORTABLE ELECTRONIC APPARATUS, AND PROCESSING APPARATUS FOR PORTABLE ELECTRONIC APPARATUS - A portable electronic apparatus has a first storage section configured to store information to be communicated to the processing apparatus and formats for a frame to be transmitted to the processing apparatus, in association with one another. The processing apparatus has a second storage section configured to store information communicated by the portable electronic apparatus and the format of the frame transmitted by the portable electronic apparatus, in association with each other. The portable electronic apparatus select one of the formats stored in the first storage section based on the data to be transmitted to the processing apparatus. The processing apparatus recognize information communicated by the portable electronic apparatus based on the format of the frame received from the portable electronic apparatus. | 2011-01-20 |
| 20110012715 | PROVISION OF A TAG-BASED SERVICE USING A BROKER SERVER - There is provided a method for providing a tag-based service. The exemplary method comprises registering in a broker server an allocation between at least one application server and a tag. An identification code included in the tag is read using a reader device. The identification code may be transmitted from the reader device to the broker server via a communication network. The exemplary method also comprises determining, in the broker server, the application server using the allocation. The exemplary method additionally comprises sending from the broker server to the application server a notification that the tag has been read. The exemplary further comprises executing a predetermined action in response to a receipt of the notification in the application server. | 2011-01-20 |
