01st week of 2010 patent applcation highlights part 18 |
Patent application number | Title | Published |
20100001704 | Programmable Step-Down Switching Voltage Regulators with Adaptive Power MOSFETs - A step-down switching voltage regulator includes M high-side switches connected between an input voltage and a node; N synchronous rectifiers connected between the node Vx and a ground voltage and an inductor connected between an input voltage and a node Vx and an inductor connected between the node Vx and an output node. An interface circuit decodes a control signal to identify: 1) a subset (m) of the high-side switches, 2) a subset (n) of the synchronous rectifiers. A control circuit drives the high-side switches and synchronous rectifiers in a repeating sequence that includes an inductor charging phase where the high-side switches in the subset m are activated to connect the node Vx to the input voltage; and an inductor discharging phase where the synchronous rectifiers in the subset n are activated to connect the node Vx to the ground voltage. | 2010-01-07 |
20100001705 | Power controller for supplying power voltage to functional block - A power controller includes a digital control circuit which performs a digital control on a basis of a difference between an output voltage supplied to a power control target device and a voltage reference, so that the output voltage is equal to the voltage reference, and a processor control circuit which conducts an operation of a processor in the digital control circuit, in response to a change of a control signal supplied by the power control target device and indicating a state of a load in the power control target device, which monitors an output from the digital control circuit, and which stops the operation of the processor when the load is judged to have no change. | 2010-01-07 |
20100001706 | CONVERTER HAVING PWM RAMP ADJUSTABLE IN DISCONTINUOUS MODE OPERATION - A ramp adjustment circuit for a voltage converter including a gate driver for controlling series connected high- and low-side switches connected across DC voltage and coupled at an output node connected to a load through an inductor such that the converter operates in a continuous conduction mode (CCM) or a discontinuous conduction mode (DCM). The circuit includes a first current generating circuit for providing a first current signal for generating a first ramp signal; a second current generating circuit for providing a second reduced current signal for generating a second ramp signal having a reduced slope when the first current generating circuit is disabled and the second current generating circuit is enabled; and a circuit for enabling the first current generating circuit and disabling the second current generating circuit when the converter is in CCM and enabling the second current generating circuit and disabling the first current generating circuit when the converter is in DCM thereby providing the first current signal when the converter is in CCM to provide the first ramp signal and providing the second reduced current signal when the converter is in DCM to provide the second reduced slope ramp signal. | 2010-01-07 |
20100001707 | STEPWISE RAMP VOLTAGE GENERATOR - A stepwise voltage ramp generator includes a tank capacitor, a terminal of which is coupled to a reference potential to be charged with a voltage ramp. A transistor couples the tank capacitor to a supply line. A diode-connected transistor, biased with a bias current is coupled to the transistor to form a current mirror. A by-pass switch is electrically coupled in parallel to the diode-connected transistor, and is controlled by a PWM timing signal, the duty-cycle of which determines a mean slope of the generated voltage ramp. | 2010-01-07 |
20100001708 | Paralleling Voltage Regulators - Circuits and methods for paralleling voltage regulators are provided. Improved current sharing and regulation characteristics are obtained by coupling control terminals of the voltage regulators together which results in precise output voltages and proportional current production. Distributing current generation among multiple paralleled voltage regulators improves heat dissipation and thereby reduces the likelihood that the current produced by the voltage regulators will be temperature limited. | 2010-01-07 |
20100001709 | SYSTEM TO GENERATE A REFERENCE FOR A CHARGE PUMP AND ASSOCIATED METHODS - A system to generate a reference for a charge pump may include a diode-connected transistor providing a reference voltage, and an output transistor. The system may also include a reference circuit to provide a current that is substantially temperature insensitive and the reference circuit delivers the current across the diode-connected transistor thereby enabling the reference voltage to move with processing of the diode-connected transistor. | 2010-01-07 |
20100001710 | REFERENCE VOLTAGE GENERATING CIRCUIT - A reference voltage generating circuit provides a stabilized reference voltage and includes; a clock generator providing a clock signal, a high voltage generator providing a pumping voltage in response to the clock signal, a ripple eradicator providing a static voltage by removing voltage ripple from the pumping voltage, and a reference voltage generator providing the reference voltage. | 2010-01-07 |
20100001711 | REFERENCE CIRCUIT AND METHOD FOR PROVIDING A REFERENCE - A reference circuit configured to provide a reference value. The circuit includes a first circuit unit which is configured to provide a first electrical representation that varies linearly with temperature and has a crossover point where its polarity relative to zero changes from a negative value to a positive value. A second circuit unit is configured to provide a second electrical representation that varies linearly with temperature. The first and second circuit units are operable for facilitating combining the first and second electrical representations such that the combination has a value corresponding to the value of the second electrical representation at a reference temperature. | 2010-01-07 |
20100001712 | System for and Method of Detecting a Buried Conductor - A system for detecting a buried conductor comprises a transmitter for producing an alternating test current in the buried conductor and a receiver for detecting an electromagnetic field produced by the test current in the buried conductor. A communication link is provided between the receiver and the transmitter. The receiver measures the signal to noise ratio, SNR, of the electromagnetic field produced by the test current and if the SNR is below a threshold then the receiver controls the transmitter to set frequency and/or power characteristics of the test current. | 2010-01-07 |
20100001713 | System for and Method of Detecting a Buried Conductor - A system for detecting a buried conductor comprises a transmitter for producing an alternating test current in the buried conductor and a receiver for detecting an electromagnetic field produced by the test current in the buried conductor. A communication link is provided between the receiver and the transmitter. The test current comprises first and second components of different frequency. The receiver monitors the phase creepage of the first and second components and controls the transmitter to reset the phase difference between the first and second components as phase creepage increases. | 2010-01-07 |
20100001714 | Detector for Calculating the Depth of a Buried Conductor - A detector for calculating a depth of a buried conductor comprises a plurality of antennas B, M T for detecting an electromagnetic field radiated by the conductor and means for calculating the depth of said conductor based on the field detected by the antennas B, M, T. The calculated depth of the conductor is displayed when one or more predetermined criteria are satisfied. | 2010-01-07 |
20100001715 | FOLDING CURRENT SENSOR - The invention provides a current sensor that may be folded over a conductor without the need to sever the conductor or thread the conductor through the current sensor. In one embodiment, the current sensor includes an outer body having a first folding portion and a second folding portion coupled to the first folding portion. The current sensor also includes a soft ferromagnetic body disposed within the outer body comprising a first core element and a second core element. The first and second core elements form a lumen when the first and second folding portions are folded. The lumen is configured to receive a conductor. The current sensor also includes a magnetic field detector to sense a current in the conductor. The magnetic field detector is disposed at least partially between the first and second core elements when the first and second folding portions are folded. | 2010-01-07 |
20100001716 | Direct Current Measuring Device With Wide Measuring Range, Electro-Technical Unit Comprising One Such Measuring Device and Switchgear Unit Having One Such Electro-Technical Unit - A direct current measuring device comprising at least one first magnetic sensor and at least one second magnetic sensor sensitive to a magnetic field generated by an electric current flowing in a conductor. The measuring device comprises a processing unit connected to the magnetic sensors and designed to generate an output signal dependent on the measurement signals supplied by the magnetic sensors. Said processing unit comprises selection means supplying the output signal dependent, for weak electric currents on the first measurement signals from at least one first magnetic sensor, and dependent, for strong electric currents, on the second measurement signals from at least one second magnetic sensor. | 2010-01-07 |
20100001717 | ANNULAR MAGNETIC ENCODER - An annular magnetic encoder capable of detecting an absolute position precisely by specifying the shape of a magnetization pattern. The annular magnetic encoder (A) is of such a type that the magnetic poles ( | 2010-01-07 |
20100001718 | INDUCTIVE POSITION SENSOR - A detector to measure the displacement of relatively moveable bodies along an axis comprising: a resonant electrical intermediate device further comprising an inductor, whose width varies along the displacement axis, and a capacitor in electrical series which co-operates with an antenna comprising transmit and receive windings whose mutual inductance varies according to the position of the electrical intermediate device relative to the antenna. | 2010-01-07 |
20100001719 | SENSOR MAGNET HOLDER FOR USE IN MOTOR AND ITS MANUFACTURING PROCESS - A sensor magnet holder is mounted on a motor shaft, and a sensor magnet is provided relative to a magnetic induction sensor on the non-moving side for obtaining a signal indicative of a rotational position of the motor shaft. The sensor magnet holder integrally forms a cylindrical portion, a flange portion of a terminal end of the cylindrical portion having a large diameter, a magnet rear end holding portion of the other terminal end of the cylindrical portion and a plurality of snap fit board portions. A shaft press fit portion is formed on an internal diameter of the flange portion. The plural snap fit board portions extend from the cylindrical portion in an axial direction of the motor shaft. A magnet front end holding portion is formed at an extending tip over an outer diameter surface of each of the snap fit board portions. Each of the flexible snap fit board portions snuggly contacts the inner flat surface of the sensor magnet while the sensor magnet is held between said magnet rear end holding portion and said magnet front end holding portion. | 2010-01-07 |
20100001720 | ROTATION SENSOR-EQUIPPED BEARING DEVICE FOR WHEEL - A rotation sensor equipped wheel support bearing assembly detects rotational speed and rotational direction, in which a high resolution rotation signal is utilized in various vehicle controls with a suppressed size. The bearing assembly includes a plurality of rows of rolling elements between rolling surfaces in outer and inner members. A magnetic field generating element having anisotropy about a bearing center axis is provided in the outer member in alignment with the axis. The inner member is provided with a sensor for sensing the magnetic field of the magnetic field generating element oriented axially. The sensor detects the angle of rotation of the magnetic field generating element and is in the form of magnetic sensor arrays or elements for detecting the orientation of the magnetic field with a two-dimensional vector sensor to detect rotation of the magnetic field generating element. | 2010-01-07 |
20100001721 | Rotation angle sensor - A rotation angle sensor providing excellent output characteristics is provided. The rotation angle sensor has a structure in which a ring-shaped permanent magnet provided so as to be rotatable integrally with a rotor connected to a member to be detected; magnetic flux gathering yokes surrounding the outer circumferential surface of the ring-shaped permanent magnet with a certain clearance being formed between the outer circumferential surface and the magnetic flux gathering yokes; and Hall ICs | 2010-01-07 |
20100001722 | MAGNETIC SENSOR DEVICE WITH SUPPRESSION OF SPURIOUS SIGNAL COMPONENTS - The invention relates to a magnetic sensor device for the determination of magnetized particles ( | 2010-01-07 |
20100001723 | BRIDGE TYPE SENSOR WITH TUNABLE CHARACTERISTIC - A bridge type magnetic sensor is disclosed having four resistive elements in a bridge arrangement, two of the resistive elements on opposing sides of the bridge having a magnetoresistive characteristic such that their resistance increases with increasing positive magnetic field and with increasing negative magnetic field. A frequency doubling is obtained because the output characteristic of the magnetic sensor is a V-shaped curve, where the signal rises for increasing positive and negative fields. | 2010-01-07 |
20100001724 | IC Microfluidic Platform With Integrated Magnetic Resonance Probe - An integrated hybrid microfluidic-IC platform for single cell manipulation and microscopy and method for making the platform. In particular, the integrated platform can incorporate a planar microcoil embedded in a silicon substrate that is subsequently used to fabricate a CMOS IC for the platform. The CMOS IC circuitry provides a two dimensional array of microsites that can incorporate an electrode (microelectrode), sensors, and control logic. A direct conversion receiver (DCR) can also be embedded within the CMOS circuitry to create an integrated IC platform. A microfluidic chamber can be formed on the integrated IC platform. The integrated hybrid platform can provide an increased sensitivity for mass limited samples and high resolution manipulation of biological cells. In addition, individual cell manipulation can be performed via dielectrophoresis (DEP). | 2010-01-07 |
20100001725 | MRI SYSTEM WITH DIRECT DIGITAL RECEIVER USING RESAMPLING - The present invention relates to magnetic resonance imaging system and to a direct digital receiver ( | 2010-01-07 |
20100001726 | MAGNETIC RESONANCE IMAGING APPARATUS AND RECEIVING-PATH SWITCHING METHOD - In a magnetic resonance imaging apparatus, an event generating substrate included in a sequence control unit generates an event code to make an instruction for switching a receiving path during a scan based on scanning conditions that are set in advance of the scan. When the event code is generated, a radio-frequency switch-matrix substrate of a gantry unit switches the receiving path that connects a receiving coil and a receiving circuit. | 2010-01-07 |
20100001727 | METHOD AND APPARATUS FOR ACQUIRING HIGH RESOLUTION SPECTRAL DATA OR HIGH DEFINITION IMAGES IN INHOMOGENEOUS ENVIRONMENTS - A method and apparatus for treating a sample for acquiring high-definition magnetic resonance images (MRI images) or high resolution nuclear magnetic resonance (NMR) spectra even in the presence of magnetic field distortions within one or multiple scans. The spatial nature and temporal dependence of the field inhomogeneities are determined a priori using any of several literature procedures. A static or oscillating magnetic field gradient is applied on the sample so as to endow spins at different positions within the sample with different resonance frequencies. A phase- and amplitude-modulated radiofrequency (RF) pulse is applied in unison with the magnetic field gradient so as to endow spins at different positions within the sample with a homogeneous excitation/inversion profile. The nature of the spatially-selective RF irradiation is tailored in such a way that, when added on top of the effects of the inhomogeneities, the spins' evolution phases and their signal amplitudes at the time of the acquisition become independent of the inhomogeneities. The spin signals thus created are captured and decoded, so as to obtain the spins' response as if the inhomogeneity was not present. The collected data is processed to a suitable rearrangement and Fourier analysis procedure to retrieve a final undistorted image or spectrum. The magnetic field gradient can be oscillated to impose this kind of inhomogeneity corrections on multiple spatial dimensions sequentially, or simultaneously. | 2010-01-07 |
20100001728 | PROBE AND SYSTEM FOR ELECTRON SPIN RESONANCE IMAGING - ESR imaging probe, system, and method are described. The probe is an ex-situ probe, the system comprises the probe and configured for operating the probe, and the method comprises detecting ESR from outside a resonator of the probe. An exemplary embodiment of a probe according to the invention comprises a cooled dielectric resonator, and one sided gradient coils. An exemplary embodiment of the system comprises source current that is configured to supply to the gradient coils currents of up to 100 A in pulses shorter than 1 μsec. | 2010-01-07 |
20100001729 | Open Yoke Magnet Assembly - An open yoke MRI apparatus has a set of permanent magnets arranged at the inner surfaces of the yoke and spaced apart from one another. A set of annular permanent magnets is included in each magnet arrangement, including a set with trapezoidal cross-sections to provide a more uniform field and to allow greater access to a patient placed within the magnetic field. | 2010-01-07 |
20100001730 | ENHANCED FILL-FACTOR NMR COILS AND ASSOCIATED METHODS - An NMR probe which includes a probe matrix ( | 2010-01-07 |
20100001731 | Transmitter of a System for Detecting a Buried Conductor - A system for detecting a buried conductor comprises a transmitter for generating a test signal in the buried conductor and a detector for detecting an electromagnetic signal resulting from the test signal flowing in the buried conductor. The transmitter comprises a waveform generator for generating a drive waveform signal, a power supply, an amplifier, connected to the power supply and the waveform generator for producing an output drive signal based on the drive waveform signal and an output circuit for acting on the output drive signal to generate an output signal having a current and a voltage. In-phase and quadrature components of the current and voltage of the output signal are fed back for controlling the amplifier. | 2010-01-07 |
20100001732 | Detector for Calculating a Depth of a Buried Conductor - A detector for calculating a depth of a buried conductor comprises three parallel antennas B, M, T. The second antenna M is spaced a distance s from the first antenna B and the third antenna T is a distance 2s from the first antenna B and a distance s from the second antenna M. The outputs of the first and second antennas B, M are compared and the outputs from the second and third antennas M, T are compared. The depth of the buried conductor is calculated based on the first and second compared values. | 2010-01-07 |
20100001733 | SENSOR CABLE FOR ELECTROMAGNETIC SURVEYING - A sensor cable for surveying. The sensor cable has a housing, which includes one of more electrodes and a conductive gel surrounding the one or more electrodes. The conductive gel is configured to conduct electrical current to the one or more electrodes and keep the one or more electrodes moist. The housing may also have a membrane surrounding the conductive gel, wherein the membrane is configured to hold the conductive gel in contact with the one or more electrodes and permit electric current to flow between a surrounding medium and the conductive gel. | 2010-01-07 |
20100001734 | Circumferentially Spaced Magnetic Field Generating Devices - A downhole induction resistivity assembly that comprises a downhole tool string component. The tool string component comprises an induction transmitter. The transmitter is adapted to induce an induction field in the surrounding formation. A first induction receiver is spaced apart from the transmitter and is adapted to measure the induction field. A magnetic field generating mechanism is disposed circumferentially adjacent the transmitter and adapted to guide the transmitter's signal into the formation. | 2010-01-07 |
20100001735 | SURVEYING A SUBTERRANEAN STRUCTURE USING ELECTROMAGNETIC MEASUREMENTS AND MICROORGANISM CONTENT DATA - A survey apparatus for surveying a subterranean structure includes an electromagnetic (EM) sensing element to measure an EM field received from the subterranean structure, and a sample collector activatable to collect a sample of soil. | 2010-01-07 |
20100001736 | FLOW TRACKING IN BLOCK CAVING MINING - The invention provides a method and system for monitoring the flow of ore in block cave mining operations by inserting an active magnetic beacon | 2010-01-07 |
20100001737 | Battery System - A battery system includes a battery module that is constituted with a plurality of serially connected battery cells, a plurality of integrated circuits that group the battery cells by a plurality thereof so as to perform processing on battery cells in each group, a first transmission path through which a command signal is transmitted via a first insulating circuit from a higher-order control circuit that controls the plurality of integrated circuits to a highest-order integrated circuit of the integrated circuit, a second transmission path through which a data signal collected by the plurality of integrated circuits is transmitted from the highest-order integrated circuit to a lowest-order integrated circuit, and a third transmission path through which the data signal is transmitted from the lowest-order integrated circuit to the higher-order control circuit via a second insulating circuit. | 2010-01-07 |
20100001738 | System and Method for Conducting Accelerated Soft Error Rate Testing - An apparatus for a user to conduct an accelerated soft error test (ASER) on a semiconductor sample is provided. The apparatus comprises a first component for holding the radiation source, where the radiation source may be either an alpha-particle or neutron-particle source. The apparatus comprises a second component for holding the semiconductor sample, where the semiconductor sample may be either a silicon wafer or semiconductor chip. The apparatus comprises a connecting assembly for placing the first component and the second component relative to each other at a plurality of positions that subject the semiconductor sample to a radiation stress from the radiation source at a plurality of stress efficiencies. Among the benefits provided are improved repeatability and credibility of ASER tests and reduced radiation exposures to operators of ASER tests. | 2010-01-07 |
20100001739 | TEST TRAY FOR TEST HANDLER - A test tray for a test handler is disclosed that is loaded with semiconductor devices and then carries them along a predetermined circulation route. The test tray allows one fixing unit to fix a plurality of adjacent insert modules to the receiving spaces of the frame, thereby efficiently using the space of the frame and allowing a relatively large number of insert modules to be installed in the same area, in comparison to the conventional test tray. | 2010-01-07 |
20100001740 | METHOD AND DEVICE FOR MEASURING IMPEDANCE - The invention relates to a method and system and microchip for determining impedance of a variable impedance component. The method comprises tuning a tunable oscillator over a predefined tuning range, the tunable oscillator having the variable impedance component coupled as a load thereof. The frequency response of the tunable oscillator is measured as a function of said tuning. Finally, the measured frequency response is analyzed for determining the impedance of the variable impedance component. The invention makes possible to manufacture smaller and simpler monolithic sensor microchips. | 2010-01-07 |
20100001741 | Method for Locating Pipe Leaks - A method for identifying leaks in pipes employs an electrical conductor extending longitudinally along a pipe between first and second measuring points. A measurement signal in the form of a temporally variable voltage is applied to the electrical conductor, and the impedance behavior of the conductor is used to determine the presence of a leak. A first measurement signal in the form of a temporally variable voltage is transmitted from the first measuring point to the second measuring point via the electrical conductor, and both measuring points evaluate the impedance of the electrical line. The second measuring point transmits a first result signal with the results of the impedance evaluation to the first measuring point via the same electrical conductor such that the first result signal temporally overlaps the first measurement signal, and the first measurement signal and the first result signal are present in non-overlapping frequency bands. | 2010-01-07 |
20100001742 | Calibration technique - The tolerance of Short-Open-Load (SOL) and Short-Open-Load-Reflect (SOLR) VNA calibration for variability in probe position is improved by using load and short calibration structures having impedance elements with a length at least two times the probe contact pitch and a width at least two times the sum of the combined pitches of the probe contacts. | 2010-01-07 |
20100001743 | Apparatus and method to distinguish nominally identical objects through wave fingerprintsApparatus and method to distinguish nominally identical objects through wave fingerprints - The present invention exploits extreme sensitivity to initial conditions in ray-chaotic enclosures to create a method to distinguish nominally identical objects through their unique “wave fingerprints.” The fingerprint can be measured through transmission of a pulsed microwave signal as a function of carrier frequency and time. When internal components are re-arranged, the Electromagnetic Fingerprints (EMF) changes in significant ways. The EMF can be detected by direct injection measurements of the enclosure or through remote measurement. | 2010-01-07 |
20100001744 | STANDING WAVE MEASURING UNIT AND STANDING WAVE MEASURING METHOD IN WAVEGUIDE, ELECTROMAGNETIC WAVE UTILIZATION APPARATUS, PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD - [Problem] To precisely measure a standing wave to be an indication for comprehending a guide wavelength λg or the like in a waveguide. | 2010-01-07 |
20100001745 | RESONANCE TAG WITH TEMPERATURE SENSOR - A temperature-history sensor includes a resonance circuit composed of at least a capacitor and a coil. The temperature-history sensor has a display for indicating a predetermined set temperature of the temperature-history sensor. The capacitor has at least a thermofusion material between electrodes of the capacitor, and the melting point of the thermofusion material is in the region of the set temperature. | 2010-01-07 |
20100001746 | Method for selecting an item of equipment and control unit enabling this method to be implemented - A group of home automation equipment ( | 2010-01-07 |
20100001747 | METHOD AND A DEVICE FOR MEASURING DIELECTRIC CHARACTERISTICS OF MATERIAL BODIES - The inventive method for measuring dielectric characteristics of material bodies consists in generating a microwave signal, in dividing said signal into reference and sounding signals, in irradiating a body with the microwave signal when a waveguide probe contacts a tested material, in receiving the reflected, reference and total signals and in detecting said signals. The irradiation is carried out by means of a waveguide wave, the propagation number of which in the free space of the waveguide probe, which is filled with a prism-shaped dielectric insert,—“[εk | 2010-01-07 |
20100001748 | Probe Card - A probe card includes a flat wiring board having a wiring pattern corresponding to a circuit structure for generating a signal for a test, an interposer that is stacked on the wiring board and relays wirings of the wiring board, a space transformer that is stacked on the interposer and fastened thereto by an adhesive, transforms a space between the wirings relayed by the interposer, and leads the wirings out to a surface opposite a surface facing the interposer, and a probe head that is stacked on the space transformer and houses and holds a plurality of probes. | 2010-01-07 |
20100001749 | Method and Apparatus For Multi-Planar Edge-Extended Wafer Translator - An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs. | 2010-01-07 |
20100001750 | Methods and Apparatus For Single-Sided Extension of Electrical Conductors Beyond the Edges of a Substrate - An apparatus for providing electrical pathways between one or more unsingulated integrated circuits and one or more test circuits external to the integrated circuits, includes a flexible substrate having a first major surface and a second major surface, a plurality of first contact structures disposed in a central portion of the first surface of the flexible substrate, a plurality of second contact structures disposed in a peripheral annular region of the first surface of the flexible substrate, and a plurality of first electrically conductive pathways, each of the plurality of first electrically conductive pathways coupled to a respective first and second contact structure, wherein the second surface is free from first contact structures, second contact structures, and first electrically conductive pathways. | 2010-01-07 |
20100001751 | TRANSFER MECHANISM FOR TARGET OBJECT TO BE INSPECTED - A transfer mechanism for a target object includes at least two insulating wire materials disposed spaced from each other to transverse a mounting table, at least two pairs of supporting bodies horizontally disposed at outsides of the mounting table, for stretching said at least two wire materials in parallel with a mounting surface of the mounting table, and at least two grooves formed on the mounting surface of the mounting table to respectively receive therein said at least two wire materials by said at least two pairs of supporting bodies. The transfer mechanism further includes a first elevation driving mechanism for vertically moving said wire materials between said grooves and above of the mounting surface through said pairs of supporting bodies, wherein the target object is transferred between a carrying mechanism and the mounting table through said at least two wire materials. | 2010-01-07 |
20100001752 | PARALLELISM ADJUSTING MECHANISM OF PROBE CARD - A parallelism adjusting mechanism of a probe card is provided. The parallelism adjusting mechanism can bring probes held by a probe card into uniform contact with a wafer even if a parallelism between a mounting reference surface for the probe card and the wafer as a test object is lost. To achieve this purpose, specifically, to adjust a parallelism of a probe card ( | 2010-01-07 |
20100001753 | Position changing apparatus for test handler and power transferring apparatus - A test handler is disclosed. A posture changing unit for changing a posture of a test tray on which semiconductor devices have been loaded changes the posture of the test tray in a soak chamber. While the posture of the test tray is changed, the devices can be pre-heated/pre-cooled, thereby reducing the soak chamber length and the pre-heating/pre-cooling time. | 2010-01-07 |
20100001754 | SEMICONDUCTOR TEST DEVICE - It is possible to provide a semiconductor test device capable improving the test efficiency. The semiconductor test device includes: a driver ( | 2010-01-07 |
20100001755 | METHOD FOR TESTING NOISE IMMUNITY OF AN INTEGRATED CIRCUIT AND A DEVICE HAVING NOISE IMMUNITY TESTING CAPABILITIES - A method for testing a noise immunity of an integrated circuit; the method includes: determining a value of a power supply noise regardless of a relationship between the power supply noise value and a phase sensitive signal edge position resulting from an introduction of the power supply noise; receiving, by the integrated circuit, a phase sensitive signal; introducing jitter to the phase sensitive signal by a circuit adapted to generate a substantially continuous range of power supply noise such as to alter edges position of the phase sensitive signal; providing the jittered phase sensitive signal to at least one tested component of the integrated circuit; and evaluating at least one output signal generated by the at least tested component to determine the noise immunity of the integrated circuit. | 2010-01-07 |
20100001756 | ARRAY SUBSTRATE HAVING INCREASED INSPECTION EFFICINCY AND DISPLAY APPARATUS HAVING THE SAME - In an array substrate and a display apparatus, a pixel part has a plurality of gate lines, a plurality of data lines, and a plurality of pixels electrically connected to the gate and data lines. A driving circuit drives the pixel part electrically connected to a first end of the gate lines. An inspection circuit is electrically connected to a second end of the gate lines, and inspects the pixel part in response to an inspection signal externally provided. Thus, positions and causes for defects of the pixel part may be accurately detected, thereby improving inspecting efficiency. | 2010-01-07 |
20100001757 | INTEGRATED CIRCUIT AND METHOD OF PROTECTING A CIRCUIT PART TO BE PROTECTED OF AN INTEGRATED CIRCUIT - A integrated circuit comprises a circuit part to be protected and protective lines located at least one wiring level of the integrated circuit. In addition, the integrated circuit comprises logical gates coupled to the protective lines, whereby a logic circuit is formed, and a processing unit implemented to detect a manipulation of the integrated circuit by applying test patterns to the logic circuit and verifying a logic output value of the logic circuit responsive to the test patterns. | 2010-01-07 |
20100001758 | CONTROLLING FOR VARIABLE IMPEDANCE AND VOLTAGE IN A MEMORY SYSTEM - A memory interface device, system, method, and design structure for controlling for variable impedance and voltage in a memory system are provided. The memory interface device includes a calibration cell configurable to adjust an output impedance relative to an external reference resistor, and driver circuitry including multiple positive drive circuits and multiple negative drive circuits coupled to a driver output in a memory system. The memory interface device further includes impedance control logic to adjust the output impedance of the calibration cell and selectively enable the positive and negative drive circuits as a function of a drive voltage and a target impedance. | 2010-01-07 |
20100001759 | CONFIGURABLE IC HAVING A ROUTING FABRIC WITH STORAGE ELEMENTS - Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC. | 2010-01-07 |
20100001760 | PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL - A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads. | 2010-01-07 |
20100001761 | Multi-function input terminal of integrated circuits - A single terminal is used to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is coupled by a low impedance to a voltage source, or 2) is coupled by a medium impedance to the voltage source, or 3) is floating or substantially floating. The circuit asserts a first digital logic signal when the circuit determines that the terminal is coupled by the low impedance to the voltage source. The circuit asserts a second digital logic signal when the circuit determines that the terminal is coupled by the medium impedance to the voltage source. The circuit asserts a third digital logic signal when the circuit determines that the terminal is floating or substantially floating. The terminal and circuit are particular suited for use in a Power Management Unit (PMU) Integrated Circuit. | 2010-01-07 |
20100001762 | DOMAIN CROSSING CIRCUIT AND METHOD - A domain crossing circuit for reducing current consumption includes an internal counter to count an internal clock in response to the release of a reset signal, outputting an internal code, a replica delay unit to delay the reset signal as much as a timing difference between the internal clock and an external clock, outputting a delayed reset signal, an external counter to count the external clock in response to the release of the delayed reset signal outputted from the replica delay unit, outputting an external code, and an internal signal generation unit to convert an external signal to an internal signal using the internal code and the external code. | 2010-01-07 |
20100001763 | Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same - A semiconductor integrated circuit includes multiple cells each containing transistors. The transistors include a gate and diffusion layers. The multiple cells are adjacently formed in a first direction perpendicular to the gate. The distance between the cell border and the adjacent and corresponding diffusion layer, the first direction, is the same. | 2010-01-07 |
20100001764 | Configurable Differential Lines - Embodiments related to configurable differential lines are disclosed herein. | 2010-01-07 |
20100001765 | SENSE AMPLIFIER FOR LOW VOLTAGE HIGH SPEED SENSING - A memory system includes a sense amplifier for detecting content of data memory cells by comparison with a voltage stored in a reference cell. The sense amplifier may comprise a comparator, first and second load circuits, and a low impedance circuit. A first input of the comparator is coupled to the low impedance circuit and a reference voltage node. A second input of the comparator is coupled to a data voltage node. The first load circuit loads a reference cell coupled to the reference voltage node. The second load circuit loads a data cell coupled to the data voltage node. | 2010-01-07 |
20100001766 | SYSTEM TO EVALUATE A VOLTAGE IN A CHARGE PUMP AND ASSOCIATED METHODS - A system to evaluate a voltage in a charge pump may include a transistor, and a transistor drain carried by the transistor with the transistor drain receiving a reference current. The system may also include a transistor gate carried by the transistor and connected to the transistor drain. The system may further include an additional transistor and an additional transistor gate carried by the additional transistor and connected to the transistor gate. The system may additionally include an additional transistor drain to receive the reference current mirrored from the additional transistor. | 2010-01-07 |
20100001767 | CLOCK SIGNAL SELECTION CIRCUIT - There is provided a clock signal selection circuit including: a first AND circuit (AND_A | 2010-01-07 |
20100001768 | MEMS Capacitor Circuit and Method - A communications circuit processes a signal in at least one predetermined communications standard such as GSM or UMTS. A switched capacitor impedance matching unit is provided, controlled by driver control unit. The driver control unit is arranged to control the driver to start switching of the capacitors of the switched capacitor array during transition periods in the signals. | 2010-01-07 |
20100001769 | Method and Apparatus for Synchronizing Time Stamps - Various apparatuses and methods for synchronizing time stamps are disclosed herein. For example, some embodiments of the present invention provide apparatuses for synchronizing a coarse time stamp with a fine time stamp. Such apparatuses include an event signal input, a clock input, a coarse time stamp generator having an input connected to the clock input, and a fine time stamp generator having a first input connected to the clock input, a second input connected to the event signal input, and a synchronization signal output. The apparatuses also include a synchronizer having a first input connected to the clock input, a second input connected to the event signal input, a third input connected to the synchronization signal output and an output connected to the coarse time stamp generator. The synchronizer is adapted to synchronize the coarse time stamp generator to the fine time stamp generator based at least in part on the synchronization signal output. The apparatuses are adapted to combine a synchronized coarse time stamp from the coarse time stamp generator with a fine time stamp from the fine time stamp generator to form a time stamp indicating when an event signal transitioned on the event signal input. | 2010-01-07 |
20100001770 | NETWORK AND METHOD FOR SETTING A TIME-BASE OF A NODE IN THE NETWORK - A data communication network may include two or more master clocks, and a synchronisation system connected to the master clocks. The synchronisation system may determine a time-base for the master clocks. The synchronisation system may control the master clocks according to the determined time-base. The data communication network may include one or more slave clocks. The slave clocks may be controlled by a slave clock time-base controller based on time information of a single selected master clock selected from the master clocks. | 2010-01-07 |
20100001771 | PHASE LOCKED LOOP WITH LEAKAGE CURRENT CALIBRATION - A phase locked loop with a current leakage adjustment function is provided. The phase locked loop includes a phase locked loop unit having a compensation voltage node, a digitalized leakage-detection circuit generating a plurality of digital control signals based upon the phase error between a reference clock signal and a feedback signal, and a compensation circuit generating a compensation current based upon the plurality of digital control signals. When there exist current leakages of the MOS capacitors, the current leakage adjustment circuits provided by the present invention may prevent the conventional phase locked loop from un-locking due to jittering. | 2010-01-07 |
20100001772 | METHODS AND SYSTEMS FOR DELAY COMPENSATION IN GLOBAL PLL-BASED TIMING RECOVERY LOOPS - A system in one embodiment includes a global PLL circuit comprising multiple inputs, each input being for receiving an error signal associated with an individual channel; and a delay compensation circuit coupled to the global PLL circuit. A method in one embodiment includes receiving multiple error signals, each error signal being associated with an individual channel; applying one or more delay compensation signals to the error signals; and outputting phase error output signals for each of the channels. | 2010-01-07 |
20100001773 | DIGITAL PLL DEVICE - An input clock dividing unit frequency-divides an input clock, and an input clock multiplying unit frequency-multiplies the input clock. An operation clock selecting unit selects the frequency-divided clock when the input clock is fast and selects the frequency-multiplied clock when the input clock is slow, based on the frequency detection result of frequency detecting unit. The operation clock selecting unit then outputs the selected clock to a phase comparing unit as an operation clock. The phase comparing unit operates according to the frequency-divided or frequency-multiplied clock, and controls an oscillating unit so that the phase difference between a reference signal and a comparison signal becomes zero. The phase of an output clock is thus caused to track the phase of the reference signal. | 2010-01-07 |
20100001774 | Data retention flip flop for low power applications - A disclosed embodiment is a data retention flip flop comprising master and slave circuits that are configured to be turned off when a single sleep mode signal is activated. The disclosed embodiment also comprises an always-on balloon circuit coupled to the master circuit, where the always-on balloon circuit includes a common sub-circuit shared with the master circuit. The master circuit writes into the always-on balloon circuit when the single sleep mode signal is activated, and the master circuit reads from the always-on balloon circuit when the single sleep mode signal is deactivated. The always-on balloon circuits comprises high threshold voltage transistors, while the slave circuit comprises low threshold voltage transistors. The master and slave circuits have no leakage current, or substantially no leakage current, after the single sleep mode signal is activated. | 2010-01-07 |
20100001775 | Phase shifting circuit which produces phase shift signal regardless of frequency of input signal - A waveform generating circuit includes a constant current circuit that supplies a constant current through a power source; a current mirror circuit that flows an output current that is n times an input current; and a switching circuit that switches a flowing direction of the current in the constant current circuit between the current mirror circuit and the output terminal according to the logical level of the rectangle input signal. The waveform generating circuit generates a triangle wave having a falling slope waveform that is n times the rising slope. On the other hand, the waveform generating circuit that receives an inverted signal of the signal generates a triangle wave and its voltage is compared with another in the comparator to generate an output signal. | 2010-01-07 |
20100001776 | DIFFERENTIAL SIGNAL TRANSMITTING APPARATUS AND A TEST APPARATUS - Provided is a differential signal transmission apparatus that transmits a differential signal expressed by a potential difference between a positive signal and a negative signal, including a positive signal transmission line that transmits the positive signal; a negative signal transmission line that transmits the negative signal; and a delay compensating circuit that compensates for a time difference between the positive signal and the negative signal with a variable compensation time. | 2010-01-07 |
20100001777 | Flash Time Stamp Apparatus - One embodiment of an apparatus for generating a time stamp includes a clock input, an event signal input and a time stamp output. A DLL is connected to the clock input, with a plurality of delay elements inside the DLL. An output of each of the delay elements is connected to a data input on a latch. An event signal input is connected to an enable input on each of the latches. An output of each of the latches is connected to the time stamp output. The apparatus is adapted to produce a value on the time stamp output indicating a point at which the event signal input transitions between transitions on the clock input. | 2010-01-07 |
20100001778 | A/B-Phase Signal Generator, RD Converter and Angle Detection Unit - An A/B-phase signal generator wherein an up/down count unit | 2010-01-07 |
20100001779 | Constant-ON State High Side Switch Circuit - An electrical switching circuit for controlling current flow to an electrical load from a primary power source with a first electrical potential difference relative to a circuit ground comprises: a primary electrical switch coupled between the primary power source and the electrical load with a control input that is responsive to a control signal of predetermined potential difference relative to the electrical load; a primary energy storage device with a low side coupled to the electrical load; a primary switch controller coupled to the primary energy storage unit with a controller output coupled to the primary switch control input that develops a controller output signal that approximates the potential difference across the primary energy storage unit in response to a controller input signal; a secondary electrical energy storage device with a high side and a low side; a controllable electrical switch that toggles the low side of the secondary energy storage device from the circuit ground to the low side of the primary energy storage device; a primary unidirectional current gate coupled between the high side of the secondary energy storage device and the high side of the primary energy storage device to let current flow from the secondary energy storage device to the primary energy storage device when the potential difference of the high side of the secondary energy storage device is higher than the high side of the primary energy storage device; a secondary unidirectional current gate coupled between a secondary power source with an electrical potential difference of at least the predetermined potential relative to the circuit ground and the high side of the secondary energy storage device to let current flow from the secondary power source to the high side of the secondary energy storage device when the potential difference of the secondary power source is higher than the high side of the secondary energy storage device; wherein periodic operation of the secondary electrical switch charges the secondary energy storage device when the secondary switch toggles its low side to the circuit ground and the secondary energy storage device charges the primary storage device when the secondary switch toggles its low side to the low side of the primary energy storage device. | 2010-01-07 |
20100001780 | Device and Method for High Resolution Time Measurements - The invention relates to a device for determining the temporal position of an analogue trigger signal with relation to an analogue clock signal, comprising an analogue cross-correlator ( | 2010-01-07 |
20100001781 | Reconfigurable Heterodyne Mixer and Configuration Methods - Heterodyne mixer comprising:
| 2010-01-07 |
20100001782 | POWER SWITCH CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A power switch circuit that ensures suppression of an increase in a transient current. The power switch circuit includes a first transistor, which generates an output voltage in response to a control signal, and a time difference generation circuit, which delays the control signal by performing a logical process with the output voltage of the first transistor and the control signal. | 2010-01-07 |
20100001783 | THREE-TERMINAL POWER DEVICE WITH HIGH SWITCHING SPEED AND MANUFACTURING PROCESS - An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition. | 2010-01-07 |
20100001784 | ADJUSTABLE ELECTRICAL COMPONENTS FORMED FROM ARRAYS OF DIFFERENTIAL CIRCUIT ELEMENTS - Adjustable circuit components may be formed from arrays of differential circuit elements such as differential capacitors and differential current sources. The differential circuit elements may each have a control input. The differential circuit elements in each array of differential circuit elements may be connected in parallel between first and second terminals. A thermometer code control signal may be provided to the control inputs to adjust the capacitance, current, or other parameter associated with the adjustable circuit component. Adjustable circuit components may also be formed from an array of capacitors or other circuit elements having successively increasing strengths. | 2010-01-07 |
20100001785 | SEMICONDUCTOR COMPONENT AND METHOD OF DETERMINING TEMPERATURE - One embodiment provides a circuit arrangement integrated in a semiconductor body. At least one power semiconductor component integrated in the semiconductor body and having a control connection and a load connection is provided. A resistance component is thermally coupled to the power semiconductor component and likewise integrated into the semiconductor body and arranged between the control connection and the load connection of the power semiconductor component. The resistance component has a temperature-dependent resistance characteristic curve. A driving and evaluation unit is designed to evaluate the current through the resistance component or the voltage drop across the resistance component and provides a temperature signal dependent thereon. | 2010-01-07 |
20100001786 | CLOCK GENERATION FOR MEMORY ACCESS WITHOUT A LOCAL OSCILLATOR - A method of accessing electronic memory is provided in electronic circuits where it is desired to lower power consumption and hence there is no active oscillator at the time when access to data within the electronic memory is required. The invention provides a method therefore for accessing the electronic memory from a controller, which generates its own clock signals from a data, communications bus electrically coupled to the controller. Advantageously the method allows for memory access to be continued in integrated circuits where a subset of circuits are powered down to reduce power consumption, and one of the subset of circuits is an oscillator. | 2010-01-07 |
20100001787 | DYNAMICALLY-DRIVEN DEEP N-WELL CIRCUIT - A circuit includes an NMOS transistor having a drain and a source, a p-well containing the drain and the source, an n-well under the p-well, and a first well switch configured to selectively connect the n-well to a predetermined voltage in response to an enable phase of a first switching signal. The first well switch can be configured to connect the n-well to the predetermined voltage during the enable phase of the first switching signal and to electrically float the n-well during a non-enable phase of the first switching signal. | 2010-01-07 |
20100001788 | SYSTEM TO EVALUATE CHARGE PUMP OUTPUTS AND ASSOCIATED METHODS - A system to evaluate charge pump output may include a comparator to compare a charge pump output voltage to a reference voltage to generate a comparison result. The system may also include a divider to divide down a clock signal. The system may further include a logical conjunction unit to operate on the comparison result and the divided down clock signal. | 2010-01-07 |
20100001789 | SYSTEMS AND METHODS FOR LOWERING INTERCONNECT CAPACITANCE THROUGH ADJUSTMENT OF RELATIVE SIGNAL LEVELS - Methods and circuitry for lowering the capacitance of interconnects, particularly Through Wafer Interconnects (TWIs), using signal level adjustment are disclosed. Embodiments of the invention seek to bias the midpoint voltage level of the signals on the TWIs towards inversion, where at high frequencies capacitance is at its minimum. In one embodiment, reduced swing signals are used for the data states transmitted across the TWIs, in which the reduced swing signals use a midpoint voltage level tending to bias the TWI capacitance towards inversion. In another embodiment, signals are AC coupled to the TWI where they are referenced to an explicit bias voltage directly connected to the TWI. This allows signals to propagate through the TWI while the TWI is biased towards inversion. In a third embodiment, the potential of the substrate is explicitly lowered with respect to the TWI potential. Regardless of the particular embodiment used, raising the midpoint-voltage level of the signals on the TWIs relative to the substrate decreases capacitance, which increases the frequency of the data which can propagate through the TWIs while potentially reducing the signaling power. | 2010-01-07 |
20100001790 | SEMICONDUCTOR DEVICE - In a semiconductor device, a high-side driver is arranged in a region closer to a periphery of a semiconductor substrate than a high-side switch, and a low-side driver is arranged in a region closer to the periphery of the semiconductor substrate than the low-side switch. By this means, a path from a positive terminal of an input capacitor to a negative terminal of the input capacitor via the high-side switch and the low-side switch is short, a path from a positive terminal of a drive capacitor to a negative terminal of the drive capacitor via the low-side driver is short, and a path from a positive terminal of a boot strap capacitor to a negative terminal of the boot strap capacitor via the high-side driver is short, and therefore, the parasitic inductance can be reduced, and the conversion efficiency can be improved. | 2010-01-07 |
20100001791 | CURRENT AMPLIFYING ELEMENT AND CURRENT AMPLIFICATION METHOD - A current amplifying element that operates at a higher speed than conventional semiconductor devices is provided. An input current flows through an input current path | 2010-01-07 |
20100001792 | Low-noise DC Offset Calibration Circuit and Related Receiver Stage - A receiver stage has an operational amplifier, a feedback resistor coupled between an output of the operational amplifier and an input of the operational amplifier, and a DC offset calibration circuit. The DC offset calibration circuit includes a plurality of resistors and a plurality of switches. Each resistor has a first end coupled to a supply voltage. First ends of each of the switches are coupled to second ends of each of the resistors, respectively, and second ends of the switches are coupled to the input of the operational amplifier. | 2010-01-07 |
20100001793 | HIGH EFFICIENCY MODULATING RF AMPLIFIER - A high efficiency modulating RF amplifier ( | 2010-01-07 |
20100001794 | METHOD AND SYSTEM FOR INCREASING SAMPLING FREQUENCY FOR SWITCHING AMPLIFIERS - The present invention is directed toward providing a system and method of reducing RF interference in switching amplifiers without degrading performance. In one embodiment, the sampling rate of coarse high voltage modulated pulsewidths are increased relative to the sampling rate of fine lower voltage modulated pulsewidths. This increase in the sampling rate of coarse high voltage modulated pulsewidths results in a reduction in EMI. | 2010-01-07 |
20100001795 | Baseband Predistortion Device And Method - The present invention discloses a baseband predistorter and baseband predistortion method. The baseband predistorter comprising: an address generator for calculating an address of a phase basic lookup table and an address of an amplitude basic lookup table; a parameter determining unit for determining a phase translational amount, an amplitude translational amount, a phase curvature adjustment amount and an amplitude curvature adjustment amount; a phase translating unit for changing the address in accordance with the phase translational amount; an amplitude translating unit for changing the address in accordance with the amplitude translational amount; a phase basic lookup table searching section for determining a corresponding phase output; an amplitude basic lookup table searching section, for determining a corresponding amplitude output; a phase curvature adjusting section, for adjusting the phase output; and an amplitude curvature adjusting section, for adjusting the amplitude output. | 2010-01-07 |
20100001796 | Radio Frequency (RF) Envelope Pulsing Using Phase Switching of Switch-Mode Power Amplifiers - A radio frequency (RF) power generator includes a first switch-mode amplifier that generates a first RF signal in accordance with a first control signal and a second switch-mode amplifier that generates a second RF signal in accordance with a second control signal. The first and second control signals determine a phase difference between the first and second RF signals. An output signal envelope is based on the first and second RF signals and the phase difference. The first control and second control signals alternate phases of the first and second RF signals. | 2010-01-07 |
20100001797 | DIFFERENTIAL AMPLIFIER - A differential amplifier circuit at the input stage is configured with a twin differential type having a first differential amplifier circuit ( | 2010-01-07 |
20100001798 | DIGITALLY PROGRAMMABLE TRANSCONDUCTANCE AMPLIFIER AND MIXED-SIGNAL CIRCUIT USING THE SAME - The present invention relates to an trans-conductance amplifier, cooperating with a digital programmable current mirrors, can be applied to digital programmable current-mode integrated circuits, voltage control oscillators, adaptive frequency adjust mechanism, adaptive continuous analog filters via the corresponding trans-conductance adaptation controlled by the digital control signals. The present invention disclosed a digital programmable current mirror suitable for the second stage of the trans-conductance amplifier so as to reform the fixed gain trans-conductance amplifier to be digitally programmable. | 2010-01-07 |
20100001799 | AMPLIFIER CURRENT DRIVE REVERSAL - A drive current direction between first and second amplifiers can be selected using a received indication of an output current in an at least partially reactive load, and an amplified output signal can be produced using the selected drive current direction and the first and second amplifiers. Further, the first and second amplifiers can be configured to alternate between a pull-up mode and a pull-down mode, each amplifying half of a full wave output signal. | 2010-01-07 |
20100001800 | BOOTSTRAPPED CLASS AB CMOS OUTPUT STAGE - A bootstrapped class AB CMOS output circuit and method for generating a class AB output are disclosed. The bootstrapped class AB CMOS output circuit has a voltage offset circuit coupled to an NMOS transistor and a PMOS transistor. The voltage offset circuit has a capacitor bootstrapped between the NMOS transistor and the PMOS transistor to establish a voltage offset between the NMOS transistor and the PMOS transistor to effect a class AB output. The method for generating a class AB output in a semiconductor device having a capacitor coupled to the NMOS transistor and the PMOS transistor includes providing a voltage offset across the capacitor to effect a class AB output. | 2010-01-07 |
20100001801 | INTERMODULATION SIGNAL GENERATOR OF POWER AMPLIFIER AND PRE-DISTORTION LINEARIZER HAVING THE SAME - Provided are an intermodulation signal generator of a power amplifier and a pre-distortion linearizer having the same. The intermodulation signal generator of the power amplifier includes: a circulator for outputting a radio-frequency (RF) input signal input via a first port to a second port and outputting an intermodulation signal input via the second port to a third port; a directional coupler for shifting phases of the input signals input via the second port of the circulator to divide or couple the phase-shifted signals; first and second Schottky diodes, disposed symmetrically, for receiving the signals divided by the directional coupler to generate intermodulation signal components; first and second phase adjusters, disposed symmetrically, for controlling phases of the intermodulation signal components gene rated by the first and second Schottky diodes by means of first and second bias voltages; and first and second scalers, disposed symmetrically, for controlling magnitudes of the intermodulation signal components generated by the first and second Schottky diodes by means of third and fourth bias voltages. The above-described intermodulation signal generator can be applied to a power amplifier of a high-performance downscaled communication system. | 2010-01-07 |
20100001802 | INTEGRATED DOHERTY TYPE AMPLIFIER ARRANGEMENT WITH HIGH POWER EFFICIENCY - The present invention relates to an integrated Doherty type amplifier arrangement and an amplifying method for such an arrangement, wherein a lumped element hybrid power divider ( | 2010-01-07 |
20100001803 | ELECTRONIC CIRCUIT FOR OBTAINING A VARIABLE CAPACITATIVE IMPEDENCE - The invention is characterized in that it comprises a plurality of impedances (R | 2010-01-07 |