Entries |
Document | Title | Date |
20100277195 | Modular Probe System - A modular probe system that includes components that are selected to test different devices-under-test (DUTs) in a number of different scientific fields. The system includes quick-release connectors that may be used to releasably secure components of the modular probe system to one another or to a mounting interface. These connectors permit quick and easy attachment and detachment of various components in a manner that permits a user to readily configure the probe system for each DUT. | 11-04-2010 |
20100315111 | SINGLE SUPPORT STRUCTURE PROBE GROUP WITH STAGGERED MOUNTING PATTERN - A probe group can include multiple probes for testing devices having contact pads. The probes can comprise beams, contact tip structures, and mounting portions. The beams can provide for controlled deflection of the probes. The contact tip structures can be connected to the beams and can include contact portions for contacting with the devices. The mounting portions of the beams can be attached to support structures, which can be arranged in a staggered pattern. The beams located in a first row of the staggered pattern can include narrowing regions that lie substantially in line with the mounting portions of a second row of the beams. | 12-16-2010 |
20100327895 | MODULE FOR A PARALLEL TESTER FOR THE TESTING OF CIRCUIT BOARDS - The invention relates to a module for a parallel tester for the testing of circuit boards, and to a parallel tester comprising such modules. | 12-30-2010 |
20110001504 | METHOD AND APPARATUS OF DEEMBEDDING - Provided is a method of de-embedding. The method includes forming a test structure having a device-under-test embedded therein, the test structure having left and right pads coupling the device-under-test, the device-under-test dividing the test structure into left and right half structures, the left and right half structures each having intrinsic transmission parameters; forming a plurality of dummy test structures, each dummy test structure including a left pad and a right pad; measuring transmission parameters of the test structure and the dummy test structures; and deriving intrinsic transmission parameters of the device-under-test using the intrinsic transmission parameters of the left and right half structures and the transmission parameters of the test structure and the dummy test structures. | 01-06-2011 |
20110006796 | PROBE RETENTION ARRANGEMENT - A retention arrangement that includes one or more templates for securing and aligning probes for testing a device under test. | 01-13-2011 |
20110037490 | Dielectric Film and Layer Testing - A system for testing and a method for making a semiconductor device is disclosed. A preferred embodiment includes a conductor overlying a dielectric layer. The conductor is coupled to a first test pad via a first conducting line and to a second test pad via a second conducting line. | 02-17-2011 |
20110037491 | Circuit Board Having Bypass Pad - An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided. | 02-17-2011 |
20110043236 | COMPRESSION CONNECTOR MODULE FOR USE WITH STORAGE DEVICES AND A TEST CARRIER INCORPORATING SAME - A compression connector module ( | 02-24-2011 |
20110057677 | DIE STACKING, TESTING AND PACKAGING FOR YIELD - A method to test and package dies so as to increase overall yield is provided. The method includes performing a wafer test on a first die and mounting the first die on a package substrate to form a partial package, if the wafer test of the first die is successful. The method further includes performing a system test on the partial package including the first die and stacking a second die on the first die if the system test on the partial package and the first die is successful. | 03-10-2011 |
20110068816 | TESTING APPARATUS AND TESTING METHOD FOR LCD - The present technology discloses a testing apparatus and a testing method for liquid crystal display (LCD). The apparatus comprises a testing chamber, at least one support device in the testing chamber and an adjusting device. The support device comprises a support stage located at the bottom of the testing chamber and a support rail located on a side wall of the testing chamber. The LCD is supported by the support stage and the support rail. The adjusting device is used to control the support rail to adjust angle of the LCD relative to the support stage. | 03-24-2011 |
20110095775 | FORK ASSEMBLY FOR PROTECTION CIRCUIT OF TEST SYSTEM - A fork assembly includes a fixed board, a ground portion, a trigger portion, a switch and a resilient element. The ground portion includes a first arm and a second arm located opposite to the first arm, one end of each of the first arm and the second arm is connected to the fixed board, and the other end is free. The trigger portion includes a third arm and a fourth arm located opposite to the third arm, one end of each of the third arm and the fourth arm is connected to the fixed board. The switch is fixed on the other end of the third arm, and includes a normally open contact. The resilient element is configured on the other end of the fourth arm and corresponding to the normally open contact of the switch. The first, second, third and forth arms are conductively and resiliently connected together. | 04-28-2011 |
20110095776 | ELECTRONIC COMPONENT AND INSPECTION SYSTEM | 04-28-2011 |
20110095777 | TEST WAFER UNIT AND TEST SYSTEM - A wafer unit for testing is electrically connected to a plurality of chips to be tested formed on a wafer to be tested, the wafer unit for testing including: a connecting wafer provided to face the wafer to be tested, and to be electrically connected to each of the plurality of chips to be tested; and a temperature distribution adjusting section provided on the connecting wafer, and to adjust a temperature distribution of the wafer to be tested. | 04-28-2011 |
20110109337 | PROBE WAFER, PROBE DEVICE, AND TESTING SYSTEM - A probe wafer electrically connected to a semiconductor wafer on which a plurality of semiconductor chips are formed includes: a wafer substrate for pitch conversion including a wafer connection surface and an apparatus connection surface opposing the wafer connection surface; a plurality of wafer connection terminals formed on the wafer connection surface of the wafer substrate for pitch conversion, at least one wafer connection terminal provided for each of the semiconductor chips and electrically connected to an input/output terminal of the corresponding semiconductor chip; a plurality of apparatus connection terminals formed on the apparatus connection surface of the wafer substrate in one-to-one relation with the plurality of wafer connection terminals at an interval different from an interval of the wafer connection terminals, to be electrically connected to an external apparatus; and a plurality of transfer paths, each electrically connecting a corresponding wafer connection terminal to an apparatus connection terminal. | 05-12-2011 |
20110128027 | WAFER UNIT FOR TESTING AND TEST SYSTEM - Provided is a test wafer unit that tests a plurality of circuits under test formed on a wafer under test. The test wafer unit comprises a test wafer that is formed of a semiconductor material and exchanges signals with each of the circuits under test, and a plurality of loop-back sections that are provided in the test wafer to correspond to the plurality of circuits under test and that each supply the corresponding circuit under test with a loop-back signal corresponding to a signal received from the corresponding circuit under test. | 06-02-2011 |
20110140726 | Apparatus and Methods for Measuring Solar Cell Module Performance - Methods and apparatus for moving and evaluating the performance of solar cell modules are described. Specifically, embodiments of the invention are directed to apparatus and methods including a transparent plate having a plurality of fluid conduits therethrough, where the fluid conduits are configured to direct a fluid with sufficient force to elevate/support a solar cell module during measurement of the solar cell performance. | 06-16-2011 |
20110187399 | SIGNAL DISTRIBUTION STRUCTURE AND METHOD FOR DISTRIBUTING A SIGNAL - A signal distribution structure for distributing a signal to a plurality of devices includes a first signal guiding structure including a first characteristic impedance. The signal distribution structure also includes a node, wherein the first signal guiding structure is coupled to the node. The signal distribution structure includes a second signal guiding structure including one or more transmission lines. The one or more transmission lines of the second signal guiding structure are coupled between the node and a plurality of device connections. The second signal guiding structure includes, side-viewed from the node, a second characteristic impedance which is lower than the first characteristic impedance. The signal guiding structure also includes a matching element connected to the node. | 08-04-2011 |
20110204913 | TEST SECTION UNIT AND TEST HEAD - A test section unit | 08-25-2011 |
20110254576 | METHOD AND APPRATUS FOR DE-EMBEDDING - A short dummy test structure is disclosed, including a grounded shield layer above a substrate, at least two signal test pads, and a signal transmission line above the grounded shield layer and between the two signal test pads, wherein the signal transmission line is electrically coupled to the grounded shield layer. In one embodiment, the signal transmission line has a smaller total length than a total length of a corresponding signal transmission line and a device-under-test (DUT) of a test structure including the DUT. A de-embedding apparatus and method of de-embedding utilizing such a short dummy test structure are also disclosed. | 10-20-2011 |
20120007625 | Test Socket for Testing Electrical Characteristics of a Memory Module - A test socket may include a socket frame, a plate, a socket pin and a link. The socket frame may have a slot configured to accept an object. The plate may be free to move in the slot along an inserting direction of the object to support a lower surface of the object. The socket pin may be movably arranged in a direction substantially perpendicular to the inserting direction of the object. The socket pin may selectively make contact with a tab of the object. A link may be pivotally connected to the socket pin and the plate. Thus, the socket pin of the test socket may avoid dragging along the tab of the object during insertion, and accordingly, the tab of the object may avoid damage. | 01-12-2012 |
20120019278 | TESTING CARD AND TESTING SYSTEM FOR USB PORT - A testing card for a USB port includes first USB contacting pins, a second USB contacting pin, a transmitting circuits, a voltage converting circuit, and a testing portion. The first USB contacting pins are connected to the USB port to receive a number of USB signals. The second USB contacting pin is connected to the USB port to receive a voltage signal from the USB port. The transmitting circuit is electrically connected to the first USB contacting pins to transmit the USB signals therefrom. The voltage converting circuit is electrically connected to the second USB contacting pin to convert the voltage signal to a predetermined level. The testing portion is electrically connected to the outputs of the transmitting circuit and the voltage converting circuit to receive the USB signals and the converted voltage signal. | 01-26-2012 |
20120038383 | DIRECT-DOCKING PROBING DEVICE - A direct-docking probing device is provided. The probing device includes a probe interface board, a space transformer, a conductive elastic member, a fixing frame, and at least one vertical probe assembly. The space transformer includes a space transforming plate and a reinforcing plate, and the mechanical strength of the reinforcing plate is larger than that of the space transforming plate. The reinforcing plate is electrically connected with the space transforming plate. Furthermore, the conductive elastic member is electrically connected with the probe interface board and the reinforcing plate. The fixing frame includes a stiffener, a frame body, and a pressing portion. The stiffener is disposed on the probe interface board. The frame body contains the conductive elastic member. The pressing portion is pressed on the space transformer. The vertical probe assembly includes a plurality of vertical probes which are electrically connected with the space transforming plate. | 02-16-2012 |
20120043986 | Junction box with test contact - A junction box for a solar module, including a base that is parallel to a mounting surface for the solar module; an inner cavity formed by a housing and closed by a cover; a connecting conductor for putting out electricity generated by the solar module and connected in the inner cavity with a contact for the solar module, and a test contact that is accessible in a direction substantially perpendicular to the base. The connecting conductor exits the inner cavity and is provided with a plug connector that is arranged in a support device at the junction box, wherein the test contact is electrically connected with a connecting contact of the plug connector of the connecting conductor, and wherein a function of the junction box is testable through feeding an electrical voltage into the test contact. | 02-23-2012 |
20120086467 | APPARATUS FOR SUPPORTING A DISK DRIVE AND DISK DRIVE TEST APPARATUS - The invention provides a method and apparatus for inserting a disk drive into or removing a disk drive from a test cell, the test cell including plural slots, each slot having a carrier for receiving the disk drive, the method including: moving the carrier out of the slot into an open position so that it can receive a disk drive, wherein the carrier remains in contact with the slot; inserting a disk drive into the carrier when the tray is still in contact with the slot; and moving the carrier containing the disk drive into a closed position back in the slot. | 04-12-2012 |
20120119772 | INSPECTING JIG - Inspecting jig operable to bring a probe into contact with a connector on a board includes a probe holding body; a guide guiding the probe to be in contact with the connector on the board, the guide being engaged with the connector to be positioned with respect to the connector; and a coupling unit coupling the probe holding body and the guide to move relative to each other between a first relative position and a second relative position, the first relative position where a distal end of the probe is brought into contact with the connector when the guide is positioned with respect to the connector, the second relative position where the distal end of the probe is separated from the board and is separated from an imaginary line perpendicular to the board and passing the connector, when the guide is positioned with respect to the connector. | 05-17-2012 |
20120153981 | System and Method for Manufacturing a Swallowable Sensor Device - Methods and systems for manufacturing a swallowable sensor device are disclosed. Such a method includes mechanically coupling a plurality of internal components, wherein the plurality of internal components includes a printed circuit board having a plurality of projections extending radially outward. A cavity is filled with a potting material, and the mechanically coupled components are inserted into the cavity. The cavity may be pre-filled with the potting material, or may be filled after the mechanically coupled components have been inserted therein. A distal end of each projection abuts against a wall of the cavity thereby preventing the potting material from covering each distal end. The cavity is sealed with a cap causing the potting material to harden within the sealed cavity to form a housing of the swallowable sensor device, wherein the distal end of each projection is exposed to an external environment of the swallowable sensor device. | 06-21-2012 |
20120217987 | NON-DESTRUCTIVE DETERMINATION OF THE MOISTURE CONTENT IN AN ELECTRONIC CIRCUIT BOARD USING COMPARISON OF CAPACITANCE MEASUREMENTS ACQUIRED FROM TEST COUPONS, AND DESIGN STRUCTURE/PROCESS THEREFOR - Two test coupons are utilized in an apparatus, method and design process/structure for determining the moisture content in an electronic circuit board (e.g., a printed circuit board (PCB) or panel). The first coupon has a laminate stack-up with voltage planes separated from each other by dielectric material. These voltage planes include etched clearances with neither plated through holes (PTHs) nor drilled holes extending therethrough. The second coupon is substantially identical to the first coupon except that each of the voltage planes of the first coupon includes PTHs extending through etched clearances corresponding to the etched clearances of the first coupon. In one embodiment, an alarm indicating unacceptably high moisture content is generated if a delta capacitance calculated as a difference between capacitance measurements acquired from the respective coupons is greater than a threshold. Preferably, the alarm notifies a user that at least one aqueous process related to PTH formation is implicated. | 08-30-2012 |
20120223731 | TEST BRACKET FOR CIRCUIT BOARD - A test bracket for testing a circuit board includes a base, two connection pieces, and a supporting member for supporting the circuit board. The base includes a board and two posts extending up from the board. The supporting member includes two poles and a number of ribs slidably connected between the poles. First ends of the connection pieces are respectively detachably connected to the posts of the base, and second ends of the connection pieces opposite to the first ends are respectively pivotably connected to the poles. | 09-06-2012 |
20120235699 | TEST CARRIER - A test carrier includes a base member and a cover member between which a die is interposed. The base film of the base member has: first interconnect patterns which are formed in advance; and a printing region where second interconnect patterns which electrically connect to the first interconnect patterns are to be formed by printing. | 09-20-2012 |
20120249175 | CONVEYOR-MOUNTABLE CARRIER FOR ELECTRONIC DEVICE TESTING - A conveyor mountable carrier is adapted to test an electronic device that has electrical leads. The carrier includes a body having a clamping area defined by a base surface and at least one lateral stop surface. The body also defines a pneumatic channel for directing pressurized air toward the clamping area. A clamp is movably connected to the body and has an engaging portion that is positioned opposite the stop surface of the body. The clamp is moveable between an engaged position in which the electronic device is securable to the body and a disengaged position in which the electronic device is releasable from the body. | 10-04-2012 |
20120256651 | TEST STRUCTURE FOR PARALLEL TEST IMPLEMENTED WITH ONE METAL LAYER - An integrated test circuit includes pads of a padset for testing multiple device under test units (MDUTs). The MDUTs each include devices under test (DUTs). A first integrated test circuit metal layer is patterned to connect the pads to N MDUTs such that a first set of pads are employed for enabling testing of each MDUT and a second set of pads are designated for testing individual DUTs associated with the enabled MDUTs such that N parallel tests may be concurrently performed. | 10-11-2012 |
20120280704 | SYSTEM FOR TESTING AN INTEGRATED CIRCUIT OF A DEVICE AND ITS METHOD OF USE - A cartridge, including a cartridge frame, formations on the cartridge frame for mounting the cartridge frame in a fixed position to an apparatus frame, a contactor support structure, a contactor interface on the contactor support structure, a plurality of terminals, held by the contactor support structure, for contacting contacts on a device, and a plurality of conductors, held by the contactor support structure, connecting the interface to the terminals. | 11-08-2012 |
20120299613 | JIG FOR SEMICONDUCTOR TEST - A jig for use in a semiconductor test includes: a base on which a probe pin and an insulating material are placed, the insulating material surrounding the probe pin in plan view; and a stage arranged to face a surface of the base on which the probe pin and the insulating material are placed. The stage is capable of holding a test object on a surface of the stage facing the base. When the base and the stage move in a direction in which they go closer to each other while the test object is placed on the stage, the probe pin comes into contact with an electrode formed on the test object and the insulating material comes into contact with the test object. | 11-29-2012 |
20130002286 | TEST APPARATUS AND PALLET FOR PARALLEL RF TESTING OF PRINTED CIRCUIT BOARDS - A test apparatus features an upper RF impermeable hood and lower RF impermeable hood, wherein each of the hoods have internal dividers. When in a closed position, the hoods and dividers create two or more RF impermeable chambers. The hoods are configured to enclose or sandwich a pallet supporting two or more printed circuit boards. One of the printed circuit boards is disposed in each chamber formed by the hoods and dividers. | 01-03-2013 |
20130043896 | TEST DEVICE FOR PRINTED CIRCUIT BOARD - A test device for testing a printed circuit board (PCB) includes a base and a measuring device. The measuring device includes a testing pin and is capable of measuring any desired point of the PCB on condition that the pin makes contact with the point at an included angle between the pin and a back surface of the PCB which is larger than a predetermined angle. The distance between the base and the PCB satisfies: H>L tan θ, where H is the vertical distance between the PCB and the base, L is the maximum length of an orthogonal projection of the pin on the PCB when the pin is contacting the point, and θ is the predetermined angle. | 02-21-2013 |
20130049786 | NON-SYNCHRONIZED RADIO-FREQUENCY TESTING - A device under test (DUT) may be tested using a test station having a test host, a non-signaling tester, and a test cell. During testing, the DUT may be placed within the test cell, and the DUT may be coupled to the test host and the tester. In one suitable arrangement, the DUT may be loaded with a predetermined test sequence. The predetermined test sequence may configure the DUT to transmit test signals using different network access technologies without synchronizing with the tester. The tester may receive corresponding test signals and perform desired radio-frequency measurements. In another suitable arrangement, the tester may be loaded with the predetermined test sequence. The predetermined test sequence may configure the tester to generate test signals using different network access technologies without establishing a protocol-compliant data link with the DUT. The DUT may receive corresponding test signals and compute receive signal quality. | 02-28-2013 |
20130063173 | METHOD OF REPAIRING PROBE PADS - A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced. | 03-14-2013 |
20130093451 | METHOD AND APPARATUS FOR DE-EMBEDDING - De-embedding apparatus and methods of de-embedding are disclosed. A de-embedding apparatus includes a test structure including a device-under-test (DUT) embedded in the test structure, and a plurality of dummy test structures including an open dummy structure, a distributed open dummy structure, and a short dummy structure. The distributed open dummy structure may include a first signal transmission line coupled to a left signal test pad and a second signal transmission line coupled to a right signal test pad, the first and second signal transmission lines having a smaller total length than a total length of signal transmission lines of the open dummy structure, and intrinsic transmission characteristics of the DUT can be derived from transmission parameters of the dummy test structures and the test structure | 04-18-2013 |
20130154681 | SUBSTRATE INSPECTION JIG AND SUBSTRATE INSPECTION METHOD - A substrate inspection jig for use in inspection of an electrical property of a printed board to be inspected on which an electronic component is mounted includes a spacer which is mounted on the printed board to be inspected, a conductive plate which is connected to the spacer, and is disposed along an arrangement direction of electrode terminals of the electronic component to be inspected, and a fastener which fastens the spacer on the printed board to be inspected, wherein the plate is disposed above the printed board to be inspected so as to avoid contact with the printed board to be inspected, and a predetermined potential of the printed board to be inspected is set to the plate through the spacer or/and the fastener. | 06-20-2013 |
20130200911 | Test System with Test Trays and Automated Test Tray Handling - A test system may be provided in which devices under test are loaded into test trays. Each test tray may include clamps for retaining a device under test within the test tray. The test tray may be configured to transmit test tray identification information to facilitate tracking of the device under test associated with the test tray. The test tray may include engagement features configured to receive corresponding engagement features on a computer-controlled loading arm. The loading arm may be used to move the test tray and associated device under test to a test fixture for testing. A contact extending structure may be retained in the test tray and may be configured to mate with the device under test. Contact pads on the contact extending structure may be mated with corresponding contacts on the test fixture to form an electrical connection between the device under test and the test fixture. | 08-08-2013 |
20130200912 | Test System With Test Trays and Automated Test Tray Flipper - A test system may be provided in which devices under test (DUTs) are loaded into test trays. Test trays may be moved between test stations using a conveyor belt. The test system may include loading equipment for placing test trays on the conveyor belt at desired intervals. Each test tray may be tested using test stations positioned along the conveyor belt. A first group of test stations may be configured to test DUTs in their upright orientation, whereas a second group of test stations may be configured to test DUTs in their inverted orientation. Test tray flipping equipment may be interposed between the first and second groups of test stations. The flipping equipment may include a movable arm configured to receive an incoming tray, grab the tray, lift the tray from the conveyor belt, rotate the tray, and drop off the tray back onto the conveyor belt. | 08-08-2013 |
20130229199 | TESTING APPARATUS FOR PERFORMING AVALANCHE TEST - A testing apparatus for performing an avalanche test includes a wafer chuck configured to retain a wafer having a plurality of transistors, wherein the wafer chuck includes an insulating body and a plurality of conductors embedded in the insulating body. In one embodiment of the present invention, the device holder includes a plurality of conductors having horizontal sides and longitudinal sides, a plurality of insulating horizontal lines positioned at the horizontal sides, and a plurality of insulating longitudinal lines positioned at the longitudinal sides and intersecting the horizontal lines. | 09-05-2013 |
20130229200 | TESTING APPARATUS FOR PERFORMING AN AVALANCHE TEST AND METHOD THEREOF - A testing apparatus for performing an avalanche test comprises a wafer chuck configured to retain a wafer having a plurality of transistors, an inductor with a first end connected to a drain terminal of the transistor, a power source configured to provide a current to a second end of the inductor through a switch, a meter connected to a source terminal of the transistor through the wafer chuck, and a driver configured to synchronously control the operation of the switch and the operation of the transistor. | 09-05-2013 |
20130257469 | CURRENT SENSOR - A current sensor including electromagnetic conversion elements to detect magnetic fields generated when current flows through a current path under test, a chassis that stores the electromagnetic conversion elements and includes a channel to which the current path under test is disposed, and an installation member securable to the chassis, with the installation member including two arm units and a connecting unit to movably connect each end of the two arms, in which hook units are provisioned on the outer side of the two arm units, and holes are provisioned on the channel of the chassis to engaged with the hook units of the installation member, and when the current path under test and the installation member is disposed in the channel, the current path under test is securely supported, and at the same time the hook units and the holes are engaged. | 10-03-2013 |
20130271174 | METHODS AND APPARATUS FOR THINNING, TESTING AND SINGULATING A SEMICONDUCTOR WAFER - A wafer translator is provided with a patterned layer of wafer bonding thermoset plastic and is removably attached with a wafer so as to form a wafer/wafer translator pair. The wafer translator acts as a mechanical support during a thinning process as well as during a wafer dicing operation. The singulated integrated circuits are then removed from the wafer translator. In some embodiments, wafer level testing of the integrated circuits on the wafer is performed subsequent to the wafer thinning process but before the wafer and wafer translator are separated. In other embodiments, wafer level testing of the integrated circuits on the wafer is performed subsequent to the wafer dicing operation but before the diced wafer and wafer translator are separated. | 10-17-2013 |
20130300446 | CHUCKS FOR SUPPORTING SOLAR CELL IN HOT SPOT TESTING - In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a cavity between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion. | 11-14-2013 |
20140009183 | SEMICONDUCTOR TESTING JIG AND SEMICONDUCTOR TESTING METHOD PERFORMED BY USING THE SAME - A semiconductor testing jig fixes a measurement target while it is held between a chuck stage and the measurement target. The semiconductor testing jig includes a base on which the measurement target is to be installed and which can be attached to the chuck stage. The base includes: a first main surface to become an installation surface for the measurement target; a second main surface opposite the first main surface and which is to contact the chuck stage; and a porous region containing a porous member. The porous region is provided selectively as seen in plan view, and penetrates through the base from the first main surface toward the second main surface. | 01-09-2014 |
20140028340 | SENSOR DEVICE - In a method for manufacturing a sensor chip a spacer ( | 01-30-2014 |
20140103953 | CHUCKS FOR SUPPORTING SOLAR CELL IN HOT SPOT TESTING - In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a cavity between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion. | 04-17-2014 |
20140167803 | TESTING DEVICE AND TESTING METHOD THEREOF - Disclosed are a testing device and a testing method thereof. The testing device includes a frame, a flexible multi-layer substrate and at least one electrical testing point. The frame is positioned corresponding to a chip. At least one electrical connecting point is formed on a surface of the chip. The flexible multi-layer substrate is fixed in the frame. The electrical testing point is corresponding to the electrical connecting point and formed on an upper surface of the flexible multi-layer substrate for contacting the electrical connecting point and performing an electrical test to the chip. Furthermore, the electrical connecting point or the electrical testing point is a bump. | 06-19-2014 |
20140203832 | APPARATUS FOR SPINNING TEST TRAY OF IN-LINE TEST HANDLER AND IN-LINE TEST HANDLER - Disclosed is an apparatus for spinning a test tray and an in-line test handler including the above apparatus, wherein the apparatus may include a supporting unit for supporting a test tray transported between first and second chamber units facing in the different directions, wherein the first chamber unit is provided at a predetermined interval from the second chamber unit; a base unit to which the supporting unit is spinnably connected; and a spinning unit which spins the test tray so that semiconductor devices received in the test tray are tested at the same arrangement in each of the first chamber unit and the second chamber unit. | 07-24-2014 |
20140253164 | BASE ELEMENT FOR ACCOMMODATING AN OVERVOLTAGE PROTECTION MODULE, AND MODULAR BUS SYSTEM - The invention relates to a base element (ST | 09-11-2014 |
20140300382 | SYSTEM FOR ELECTRICAL TESTING AND MANUFACTURING OF A 3-D CHIP STACK AND METHOD - A method for electrical testing of a 3-D integrated circuit chip stack is described. The 3-D integrated circuit chip stack comprises at least a first integrated circuit chip and a second integrated circuit chip. The first integrated circuit chip and the second integrated circuit chip are not soldered together for performing electrical testing. | 10-09-2014 |
20140333338 | DEVICE FOR CHECKING ELECTRONIC CARDS - The device for checking electronic cards includes a base in which conductive nails are arranged pointing upwards, and a cover, also fitted with nails pointing downwards in the closed cover position. The cover is mobile in horizontal translation between an open position and an intermediate position. The device can also include a vertical translation mechanism capable of bringing the nails arranged in the cover closer to the nails arranged in the base so as to allow contact of the nails on the two faces of an electronic card. The invention also relates to a method of opening and a method of closing such a device. | 11-13-2014 |
20140361802 | TESTING DEVICE - A testing device is disclosed, including a system circuit board, a first chip component, a supporting structure, a circuit board and an interposer. The system circuit board has a surface where the first chip component is disposed. The first chip component is connected to the system circuit board. The supporting structure is disposed on the surface and surrounds the first chip component; the circuit board is fixed on the supporting structure and keeps distance from the first chip component. The circuit board has a connector for connecting to a chip component that is to be tested. The interposer is located between the circuit board and the first chip component. The circuit board is connected to the first chip component via the interposer. The first chip component need not connect to the chip component to be tested, so is less liable to be damaged by the frequent testing. | 12-11-2014 |
20150015292 | WAFER TESTING SYSTEM AND ASSOCIATED METHODS OF USE AND MANUFACTURE - A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways. | 01-15-2015 |
20150028910 | TESTING APPARATUS FOR EXPANSION CARD - A testing apparatus includes a base mounted on a motherboard, an inserting unit mounted on the base, a movable unit secured to the inserting unit, and a driving device mounted between the movable unit and the base. The movable unit is driven to move by the driving device, thereby enabling the inserting unit to move to enable the expansion card to be inserted into the motherboard. The movable unit is driven to move by the driving device, thereby enabling the inserting unit to move to enable the expansion card to move out of the motherboard. | 01-29-2015 |
20150035554 | WAFER DEBONDING USING MID-WAVELENGTH INFRARED RADIATION ABLATION - Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers which are laser-ablatable using mid-wavelength infrared radiation | 02-05-2015 |
20150048860 | DETERMINING INTRA-DIE VARIATION OF AN INTEGRATED CIRCUIT - Embodiments of the present invention disclose an apparatus and method to determine the intra-chip variation of an integrated circuit. In an embodiment, an apparatus comprises a test macro that includes two or more test structures; wherein each test structure includes identical copies of the same performance monitor; wherein each performance monitor has a unique bounding circuitry that encompasses the performance monitor; and wherein the two or more test structures are positioned close enough to each other as to reduce systematic across chip variation between the two or more test structures. | 02-19-2015 |
20150091599 | SEMICONDUCTOR TESTING JIG AND TRANSFER JIG FOR THE SAME - A semiconductor testing jig is provided with a conductive stage including a plurality of mounting portions on which a plurality of vertical semiconductor devices are each individually disposed with lower surface electrodes being in contact with the plurality of mounting portions, an insulating frame portion having a lattice pattern that is disposed on the stage and surrounds each of the plurality of mounting portions in plan view to define each of the mounting portions, and an abrasive layer disposed in a position in the frame portion, the position facing each of the vertical semiconductor devices disposed on the mounting portions. | 04-02-2015 |
20150115991 | MAINTENANCE CARRIAGE FOR WAFER INSPECTION APPARATUS AND MAINTENANCE METHOD FOR WAFER INSPECTION APPARATUS - A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus | 04-30-2015 |
20150130492 | TEST CARRIER - A test carrier includes a base member that holds a die and a cover member. The base member includes a board having a wiring line that is electrically connected to the die. The wiring line includes a wiring line and a resistive portion having a resistance value that is higher than the resistance value of the wiring line. | 05-14-2015 |
20150137846 | ELECTRICAL TEST PLATFORM WITH ORGANIZED ELECTRICAL WIRING - A test platform for devices requiring electromagnetic interference testing includes a base, a supporting pole perpendicularly mounted on the base, a supporting member rotatably supported on the supporting pole, and a number of conductive apparatus mounted to the supporting pole. The supporting member includes a power socket. Each conductive apparatus includes a tank fitted about the supporting pole, conductive liquid received in the tank, first cables, and a second cable. Each tank defines an annular slide slot surrounding the supporting pole. First ends of the first cables are connected the power socket, second ends of the first cables are extended through the slide slots and electrically coupled to the conductive liquid. A first end of the second cable is electrically coupled to the conductive liquid, and a second end of the second cable is electrically coupled to an uninterrupted power supply. | 05-21-2015 |
20150293146 | LAMINATE STRUCTURE AND CLAMPING MECHANISM FOR FAULTED CIRCUIT INDICATOR - A faulted circuit indicator (FCI) device for installation on a power line includes a housing, a laminate structure fastened to the housing and configured to receive the power line, and a clamp mechanism pivotally fastened to the housing and configured to secure the housing to the power line. The clamp mechanism includes a pair of opposing clamp arms each having a curved configuration. The curved configuration of the clamp arms maintains the power line in a centered relationship within the laminate structure when the clamp arms are engaged on the power line over a range of power line diameters. | 10-15-2015 |
20150316603 | De-Embedding On-Wafer Devices - An apparatus includes three components. The first component includes a first transmission line; the second component is coupled with the first component and includes a second transmission line; and the third component electrically coupled with the first component and/or the second component. The transmission lines each include a substrate with a p-well or n-well within the substrate and a shielding layer over the p-well or n-well. The transmission lines also each include a plurality of intermediate conducting layers over the shielding layer, the plurality of intermediate conducting layers coupled by a plurality of vias. The transmission lines further each include a top conducting layer over the plurality of intermediate conducting layers. | 11-05-2015 |
20150326178 | CHUCKS FOR SUPPORTING SOLAR CELL IN HOT SPOT TESTING - In an embodiment, a chuck to support a solar cell in hot spot testing is provided. This embodiment of the chuck comprises a base portion and a support portion disposed above the base portion. The support portion is configured to support the solar cell above the base portion and to define a cavity between a bottom surface of the solar cell and the base portion that thermally separates a portion of the bottom surface of the solar cell from the base portion. | 11-12-2015 |
20150355230 | UNIVERSAL CONTAINER FOR DEVICE UNDER TEST - In one embodiment, a universal test container can include a universal external electrical interface configured to couple to each of a plurality of different devices to test. In addition, the universal test container is configured to enclose each of the plurality of different devices to test. | 12-10-2015 |
20150362526 | TESTING OF SEMICONDUCTOR CHIPS WITH MICROBUMPS - A package includes a semiconductor chip. The semiconductor chip includes a test pad, and a plurality of microbump pads, wherein each microbump pad of the plurality of microbump pads is electrically connected to the test pad. The package further includes a substrate; and a plurality of microbumps configured to electrically connect the semiconductor chip to the substrate, wherein each microbump of the plurality of microbumps is electrically connected to a corresponding microbump pad of the plurality of microbump pads. The package further includes a package substrate, wherein the package substrate comprises a bump pad, wherein an area of the bump pad is greater than a combined area of the test pad and the plurality of microbump pads. The package further includes a bump configured to electrically connect the substrate to the package substrate. | 12-17-2015 |
20160012920 | PROBER CHUCK FOR MAGNETIC MEMORY, AND PROBER FOR MAGNETIC MEMORY PROVIDED WITH SAID CHUCK | 01-14-2016 |
20160025774 | PROBE SUPPORTING AND ALIGNING APPARATUS - An apparatus for testing electrical characteristics of a device, having one or more testing sites. The apparatus comprises a nonconductive plate having a through-hole. The through-hole is positioned such that it at least partially overlays one of the one or more testing sites when at least a portion of the bottom surface of the nonconductive plate is adjacent to the device to be tested. The apparatus also comprises a probe positioning body protruding from the top surface of the nonconductive plate and having a through-hole. The probe positioning body is positioned such that the through-hole of the probe positioning body at least partially aligns with the through-hole of the nonconductive plate. | 01-28-2016 |
20160139180 | TESTING SEMICONDUCTOR DEVICES - An apparatus includes a plurality of semiconductor devices and an electrical input device for applying voltage to the plurality of semiconductor devices. There is a switching array configured to sequentially interconnect the electrical input device to each of the semiconductor devices and disconnect the other semiconductor devices from the electrical input device. The semiconductor device connected to the electrical input device is a device under test that produces a test current and the other semiconductor devices are devices not under test that produce, in the aggregate, a leakage current. There is an output node interconnected to the switching array for enabling the measurement of the test current at the output node. There is also a leakage current compensator connected to the output node and the switching array that is configured to divert the leakage current away from the output node. | 05-19-2016 |