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Particular stimulus creation

Subclass of:

714 - Error detection/correction and fault detection/recovery

714100000 - DATA PROCESSING SYSTEM ERROR OR FAULT HANDLING

714001000 - Reliability and availability

714025000 - Fault locating (i.e., diagnosis or testing)

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
714035000 Substituted or added instruction (e.g., code instrumenting, breakpoint instruction) 46
714033000 Derived from analysis (e.g., of a specification or by stimulation) 42
714036000 Test sequence at power-up or initialization 32
714034000 Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping) 24
Entries
DocumentTitleDate
20130031412PROCESSING APPARATUS, TEST SIGNAL GENERATOR, AND METHOD OF GENERATING TEST SIGNAL - A first test signal receiver that receives first test signals output from a first test signal output terminal in response to a test start instruction; 01-31-2013
20090193295VOLTAGE MARGIN TESTING FOR PROXIMITY COMMUNICATION - A method of testing a proximity communication system for voltage margin by impressing a voltage upon the data link between the transmitter on one chip and the receiver on the other chip coupled to the transmitter through a capacitively coupling circuit formed by juxtaposed capacitor pads on the respective two chips. The impressed voltage is varied and the output of the receiver is monitored to determine an operational voltage margin. The floating inputs on the receiver may be continuously biased by connecting them to variable biasing supply voltages through high impedances. When the floating inputs are periodically refreshed to a refresh voltage during a quiescent data period, the refresh voltage is varied between successive refresh cycles. The variable test voltage may be applied to transmitter output when it is in a high-impedance state, and the output of the receiver is measured.07-30-2009
20130086425SYSTEM TEST APPARATUS - The present invention relates to a system test apparatus. The system test apparatus includes an insertion module configured to insert a test agent into a process control block, a hooking module configured to hook a test target to a test code using the test agent when an event related to the test target occurs, a scanning module configured to collect pieces of test information about a process in which the event related to the test target has occurred when the test target is hooked, and a logging module configured to store the pieces of test information collected by the scanning module.04-04-2013
20130086422READ/WRITE TEST METHOD FOR HANDHELD ELECTRONIC PRODUCT - A read/write test method for handheld electronic product is introduced. The handheld electronic product is connected to a storage device and is equipped with an open platform having a data read/write test program installed thereon. In the read/write test method, the following steps are repeatedly executed according to a default test condition: the data read/write test program sends out a first test command to write a test data file into the storage device; the data read/write test program sends out a second test command to execute closing, opening and reading of the test data file; and the data read/write test program, upon confirmation of successful reading of the test data file, sends out a third test command to execute cutting, pasting, copying, and deleting of the test data file. Upon completion of the above steps, test results from each of the steps are output for a test operator to analyze.04-04-2013
20130086421DIAGNOSTIC METHOD, DIAGNOSTIC CODE GENERATION SYSTEM, AND PROGRAM FOR THE SAME - The operator terminal 04-04-2013
20130086420METHOD AND SYSTEM FOR IMPLEMENTING A TEST AUTOMATION RESULTS IMPORTER - A test automation results importer allows for the results of automated test cases to be imported into a test management platform thereby providing the integration of otherwise incompatible automation platforms with test management platforms. This system utilizes the automation platform for the creation of a generic automation results file containing a data format that allows the results to be easily understood by the test management platform. The automated test results may be stored in a pre-defined area of the test management system on the management system platform. This process virtually integrates a third party automation platform with another third party test management platform to create a virtual single platform to conduct testing from automated test case creation to automated test case results documentation.04-04-2013
20130086424DEBUGGING ANALYSIS IN RUNNING MULTI-USER SYSTEMS - Various arrangements for debugging logic being executed by a webserver is presented. A virtual machine of the webserver may execute runtime threads for a plurality of remote users. The web server may compile business logic code received from a developer computer system via a web-based interface into an logic insight injected code. The logic insight injected code may be compiled from the business logic code to include debugging functionality. The virtual machine of the webserver may execute the logic insight injected code concurrently with the runtime threads being executed for the plurality of remote users. The debugging functionality of the logic insight injected code being executed may not affect execution of the runtime threads for the plurality of users.04-04-2013
20130086423TEST APPARATUS AND TEST METHOD - Provided is a test apparatus including: an address generator that generates an address of a memory under test; a selector that selects whether to perform bit inversion on the address generated by the address generator before supplying the address to the memory under test; an inversion processing section that outputs the address generated by the address generator after performing bit inversion on the address if the selector has selected in the affirmative, and outputs the address generated by the address generator without performing any bit inversion on the address if the selector has selected in the negative; and a supply section that supplies, to the memory under test, the address having undergone inversion control outputted from the inversion processing section and an inversion cycle signal that indicates whether the address outputted from the inversion processing section is bit inverted or not.04-04-2013
20130080833DIAGNOSTIC CODE GENERATION TERMINAL, DIAGNOSTIC METHOD AND PROGRAM FOR DIAGNOSTIC CODE GENERATION TERMINAL - The diagnostic method is provided with no leakage of user's private information, less errors in reproduction of the setting status, and no performing of useless diagnoses. Input from a user is received by outputting a select object for limiting a diagnosis item of the diagnostic code generation terminal 03-28-2013
20130080834COMPUTER PRODUCT, TEST SUPPORT METHOD, AND TEST SUPPORT APPARATUS - A computer-readable recording medium has stored therein a program for causing a computer to execute a test supporting process. The computer supports testing of a series of tasks related to system administration of a system. The test supporting process includes acquiring, by the computer, input data concerning a given task that is among the series of tasks and operates a given device included in the system; retrieving, by the computer, execution history data concerning the given task, from a storage device that associates and stores therein execution history data including input data and output data of each task that has been executed in the system, and identification information of the tasks; and outputting, by the computer and from among the retrieved execution history data, the output data included in the execution history data that includes the acquired input data of the given task.03-28-2013
20120266023PRIORITIZATION AND ASSIGNMENT MANAGER FOR AN INTEGRATED TESTING PLATFORM - A method of prioritizing and assigning test scripts is provided in a testing platform configured to organize, manage, and facilitate the debugging of test scripts. The test scripts are used in testing software modules. The method includes receiving a plurality of test scripts, applying a predetermined set of factors to each test script, and assigning a weight value to each factor based on a relative importance of the factor. A priority value is set for each test script based on the weighted factors, and the test script is assigned to a queue position for execution based on the corresponding priority value, where the assigned test script is associated with one or more bias factors. The test script is then selected from the testing queue and forwarded if the bias factors indicate that requirements of the test script match corresponding bias factors of the testing individual.10-18-2012
20120266022Method for Verifying an Application Program in a Failsafe Programmable Logic Controller, and Programmable Logic Controller for Performing the Method - A method and a programmable logic controller (SPS) for verifying an application program in a failsafe programmable logic controller, wherein a signature (desired value) is generated using program modules or a complete application program when creating a program, and a copy of the signature is stored in the programmable logic controller and in an external component, respectively. Before the safety-oriented application program is started, the copy of the signature stored by the programmable logic controller is transmitted to the external component and is compared with the copy in the external component. In a further comparison, a signature (actual value) is generated using the content of the main memory of the programmable logic controller and using the actually loaded application program and is then compared with the local copy of the desired value of the signature. Starting of the actual application program is enabled only when both comparisons are positive.10-18-2012
20130139004TEST MODULE GENERATION APPARATUS, TEST PROCEDURE GENERATION APPARATUS, GENERATION METHOD, PROGRAM, AND TEST APPARATUS - Provided is a test module generation apparatus that generates a test module executed on a test apparatus for testing a device under test. The apparatus includes a condition file generating section in which a test condition is input and that generates a condition file specifying the input test condition, a test method storing section that stores a test method, a test method selecting section that receives, from a user, a selection instruction of the test method adapted to the test module to be generated, a condition file selecting section that receives, from a user, a selection instruction of the condition file corresponding to a parameter which the selected test method requires, and a test module generating section that generates the test module in which a test according to the selected test method is executed with a parameter specified by the condition file.05-30-2013
20130080832PROTOCOL INDEPENDENT INTERFACE SUPPORTING GENERAL COMMUNICATIONS INTERFACE DEBUGGING AND TESTING TOOL - A protocol independent debugging tool for debugging communication interfaces of devices is disclosed. The debugging tool is configured to receive communication protocol plug-ins corresponding to different communication protocols. The debugging tool instantiates a stack interface from the protocol plug-in, such that the stack interface implements a protocol-specific stack wrapper that communicates with a device being tested. The stack specific wrapper receives commands from a command interface for the device being tested, generates data packets in accordance with the communication protocol of the device being tested, and transmits the data packets to the device being tested.03-28-2013
20130042145SYSTEM AND METHOD FOR AUTOMATIC TEST DATA GENERATION FOR RELATIONAL TESTING - An automated system and method for test data generation for software testing. The present application relates to management of software testing by generating test data automatically. Further the system and method generate test data automatically with respect to two coverage criteria Boundary Value Coverage (BVC) and Masking Boundary Value Coverage (MBVC) in the white-box setting.02-14-2013
20130042146TESTING DATA SILO - In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for creating a data silo and testing with a data silo including, for example, initiating a test sequence against a production database within the host organization, in which the test sequence specifies: a) new data for insertion into the production database during the test sequence, and b) one or more test queries against the production database during the test sequence; performing a database transaction to insert the new data into the production database without committing the new data to the production database; recording names of one or more objects corresponding to the inserted new data, the one or more objects created as part of the transaction to insert the new data into the production database within a transaction entity object map; modifying the one or more test queries specified by the test sequence to no longer query against the production database by substituting the one or more test queries with references to the names of the one or more objects in operating memory separate from information stored within the production database; and executing the one or more modified test queries. Other related embodiments are disclosed.02-14-2013
20100100768NETWORK FAILURE DETECTING SYSTEM, MEASUREMENT AGENT, SURVEILLANCE SERVER, AND NETWORK FAILURE DETECTING METHOD - Measurement agents in a network failure detecting system each configure a group together with other measurement agents that receive a service from the same provision server, and form a link to create a tree structure with a predetermined measurement agent in the group at its top. The measurement agent then receives measurement results from the other measurement agents in the group, and narrows down candidates of a failure location based on the received measurement results. The measurement agent transmits the narrowed candidates of the failure location to a surveillance server or one of the other measurement agents. The surveillance server then receives the transmitted candidates of the failure location, and specifies the failure location based on the received candidates of the failure location.04-22-2010
20100095155Diagnostics and Error Reporting For Common Tagging Issues - Content requests are debugged in accordance with a presence of a flag in a request to a publisher. A document received from the publisher contains a script to debug requests for content to a content provider. The requests are examined to determine the presence of informational, warning and error conditions. The conditions are written to a debugging user interface.04-15-2010
20120166875Conducting an application-aware test in a virtual environment - A system and method for service aware virtualization is disclosed. The system comprises a plurality of virtual instances operating on virtualization software and a plurality of service manager modules operating on the virtualization software. Each service manager module is coupled to a separate virtual instance and configured to interface with an operation of guest software operating within the virtual instance on the virtualization software. A management interface coupled to the service manager modules interfaces with the plurality of virtual instances.06-28-2012
20090307528SIMULATING OPERATIONS THROUGH OUT-OF-PROCESS EXECUTION - The present invention extends to methods, systems, and computer program products for simulating operations through out-of-process execution. When a diagnostic operation is to be performed for a target execution context, a separate execution context is created based on the same executable code used to create the target execution context. An execution boundary separates the target execution context and the separate execution context such that execution in the separate execution context does not influence the behavior of the target execution context. State data from the target execution context is marshaled and transferred to the separate execution context. The separate execution context reconstitutes the state data and uses the state data to perform the diagnostic operation. Accordingly, performance of the diagnostic operation is simulated in the separate execution context without influencing the behavior of the target execution context.12-10-2009
20120192011DATA PROCESSING APPARATUS THAT PERFORMS TEST VALIDATION AND COMPUTER-READABLE STORAGE MEDIUM - In a data processing apparatus, when an instruction for starting validation is provided, or when definition information is updated, data input from a data source is collected, and a process for narrowing down of the collected data is executed. In the data narrowing process, by extracting records and items as process targets according to the definition information that defines the operation of the apparatus, the number of data items used for validation is reduced. Then, the operation is validated using the narrowed data. In the operation validation process, a virtual transfer destination of output of data is provided within the apparatus, and the data is output to the virtual transfer destination, for comparison with the output data, whereby the validation of the operation is performed.07-26-2012
20120192010DATA ISOLATION WHILE SHARING INFORMATION BY A PLURALITY OF USERS WHEN EVALUATING PERFORMANCE OF A SERVER - A method for data isolation while sharing information by a plurality of emulated users for evaluating a performance of a server executing an application may include creating a master profile for use by the plurality of emulated users. The master profile may be configured to hold shared user related configuration information shared by the emulated users. The method may also include creating script profiles configured for a specific emulated user of the emulated users. A non-transitory computer readable medium and system are also disclosed.07-26-2012
20130073907METHOD OF TESTING A DEVICE UNDER TEST, DEVICE UNDER TEST, AND SEMICONDUCTOR TEST SYSTEM INCLUDING THE DEVICE UNDER TEST - A method of testing a plurality of DUTs includes providing a plurality of shift registers to test a plurality of cores in each DUT, supplying test input data, a test mode input signal, a test clock signal, and a test reset signal to the shift registers and cores, receiving a master bit, a first control value, and a second control value, based on the test input data and the test mode input signal, according to the test clock signal and the test reset signal, selecting at least one core and a test method, according to the first control value, selecting a target DUT according to the master bit or the second control value, simultaneously testing and debugging the selected core according to the test method, and outputting the test data output of the target DUT to check a result of the testing when an output enable signal is received.03-21-2013
20090031168Monitoring VRM-Induced Memory Errors - A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold, then a counter is increased by one. If the counter exceeds a count threshold, a VRM error is posted. If a memory failure occurs within a predetermined period of time, then the VRM error pinpoints the VRM output voltage transient as being the likely cause of the memory failure.01-29-2009
20130067280METHOD AND SYSTEM FOR PROVIDING A RANDOM SEQUENCE COVERAGE - The various embodiments of the present invention provide a method and system for providing random sequence coverage. The method comprising receiving a plurality of data packet packets carrying transaction data from a transaction database, specifying transactions in a configuration file along with the transaction data, identifying one or more fields in the packets received from the transaction database, generating an automatic random sequence based on the identification of at least one of a field among the one or more fields in the data packets, generating a coverage report for the random sequence generated automatically and determining uncovered sequences based on the coverage report generated. The system comprises a transaction database for storing transaction data during simulation, a transaction viewer for providing transactions data packets, an auto sequence generator module for generating an automatic random sequence and a report generator module for generating a coverage report for the random sequence generated.03-14-2013
20120233505REMOTE TESTING - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for remote testing. In one aspect, a method includes receiving a first message from a first user device indicating initialization of a client application. The method includes determining that the first user device is a member of a first testing group. The method includes identifying a first testing component associated with the first testing group and capable of altering the client application. The method includes sending the first testing component to the first user device.09-13-2012
20130166955KEYBOARD AUTOMATIC TEST METHOD AND SYSTEM USING THE SAME - A keyboard automatic test method is provided. A keyboard test unit first outputs a key test command to a keyboard controller. The key test command represents a trigger element of a keyboard is triggered. The keyboard controller generates a corresponding code corresponding to the trigger element. The keyboard test unit then determines whether a relationship between the corresponding code and the trigger element is correct.06-27-2013
20120239978CONTROLLER SUPPORT APPARATUS, CONTROLLER SUPPORT PROGRAM EXECUTED ON THE APPARATUS, STORAGE MEDIUM STORING THE PROGRAM, AND METHOD OF ESTIMATING EXECUTION TIME OF CONTROL PROGRAM - A controller support program causes a processor to acquire a first control execution time which is an execution time of a first control program which is an object program generated from a control source program, which is a source program of a control program generated in accordance with an object of control of a user, and operating at the simulator, the first control execution time being measured at the simulator. The processor also calculates an estimated execution time which is an estimated value of an execution time, at the controller, of a second control program which is an object program generated from the control source program and operating at the controller, by converting the first control execution time using the calibration data. Data representing the estimated execution time is output.09-20-2012
20110302451FINANCIAL INTEGRATION TEST PROCESS - A method for testing financial operations of network applications within a computer network generates a test matrix to store test data relating to testing of financial operations related to the network applications within the computer network. A unique testing scenario is developed for testing the financial operations across a plurality of network applications and stored within the test matrix. An expected financial result achieved in accordance with execution of the unique testing scenario is calculated and stored within the test matrix. The unique testing scenario is executed using the network applications within the computer network to achieve an actual financial test result which is stored within the test matrix. The expected financial result is compared with the actual financial result to detect issues within the network applications relating to financial operations.12-08-2011
20110289353DEVICE AND METHOD FOR COLLECTING NETWORK FAILURE INFORMATION - An apparatus to collect information about network failure includes: a normal mode packet assembly unit to assemble a transmission packet from transmission data output from an application in a normal mode being a procedure used when a transmission process is performed by specified communication protocol; a special mode packet assembly unit to assemble the transmission packet from the transmission data in a special mode being a procedure in which a procedure for collecting failure information is embedded into the procedure used when a transmission process is performed by the specified communication protocol; a switching control unit to activate the normal mode packet assembly unit or the special mode packet assembly unit selectively; and a response analysis unit to collect failure information according to a behavior of the response to the transmission packet transmitted from the special mode packet assembly unit.11-24-2011
20110173497SAFETY OUTPUT DEVICE - A safety output includes an output controller to make an instruction to output normal output data and first self-diagnosis pattern data synchronously with a control cycle, a normal output unit to output the normal output data synchronously with the control cycle, a test pattern generating unit to encode the self-diagnosis pattern data into a pulse train signal having a pulse width not larger than a preset value and output the pulse train signal in accordance with a baseband transmission system, a combination output unit to combine the pulse train signal with the normal output signal and output the resultant signal, a reconfiguration unit to decode the inputted operation-terminal-portion output signal to reconfigure the operation-terminal-portion output signal as second self-diagnosis pattern data, and a comparator to compare the first self-diagnosis pattern data with the second self-diagnosis pattern data to judge the presence or absence of a difference.07-14-2011
20100268991APPARATUS, SYSTEM, AND METHOD FOR VALIDATING APPLICATION SERVER REPLICATION ERRORS - An apparatus, system, and method are disclosed for validating application server replication errors. The method includes receiving a first information message with a test sequence from a caller. The caller is engaged in a communication session with a callee according to a communication protocol and the communication session is managed by a first application server. The method also includes storing the test sequence in a replicable data structure on the first application server. The replicable data structure is replicated to a second application server to form a replicated data structure and both servers operate within an active-active configuration. The method also includes receiving a second information message from the caller. The second information message includes a confirmation sequence. In addition, the method includes determining a replication error in response to comparing the stored test sequence in the replicated data structure with the confirmation sequence.10-21-2010
20110219265COMPUTER READABLE MEDIUM, VERIFICATION SUPPORT METHOD AND VERIFICATION SUPPORT APPARATUS - A computer readable medium storing a program causing a computer to execute a process for verification support, the process includes: acquiring information of a timing of transmission of a process request for operating a program to-be-verified; acquiring first record information of a transfer process in a time zone corresponding to the acquired timing of the transmission, from a transfer device which transfers the process request to any of a plurality of information processing devices capable of running the program to-be-verified and which records the transfer process; specifying the information processing device to which the process request has been transferred, on the basis of the acquired first record information of the transfer process; and acquiring second record information of a process in the time zone corresponding to the timing of the transmission, from the specified information processing device.09-08-2011
20110138228VERIFICATION COMPUTER PRODUCT AND APPARATUS - A non-transitory, computer-readable recording medium stores therein a verification program that causes a computer to execute detecting from a structure expressing a group of scenarios for verifying an operation of a design under verification and by hierarchizing sequences for realizing the operation as nodes, a similar node similar to a faulty node representing a sequence in which a fault has occurred; generating a string of sequences represented by a group of nodes on a path starting from a start node of the structure to the detected similar node; and outputting the generated string of sequences.06-09-2011
20110173498Methods and Apparatuses for Generating Network Test Packets and Parts of Network Test Packets - Some aspects of the technology relate to the generation for test purposes of test packet ingredients by a microprocessor, ongoing with the generation for test purposes of test packets incorporating the test packet ingredients by a high-speed FPGA. Some aspects of the technology relate to the generation of outgoing test packets incorporating the test packet ingredients, at a programmable logic device such as an FPGA. These aspects are implemented as an apparatus, a method, computer readable medium, and a data structure.07-14-2011
20090276664METHOD AND APPARATUS FOR MONITORING BIT-ERROR RATE - A test set for evaluating network performance is described, and which may include an output device, a processor, a power supply, a memory unit, and a control terminal. The test set may be configured to receive a user-entered selection of one of a plurality of different bit-error rate profiles and generate a test signal exhibiting the selected bit-error rate profile. The test set may also supply the test signal exhibiting the selected bit-error rate profile to a network under test. In addition, the test set may receive as an input, an output from the network under test. The output may include the test signal exhibiting the selected bit-error rate. The test set may evaluate the received test signal and determine the performance of the network in response to the received test signal exhibiting the bit-error rate. The test set may then output the results of the evaluation.11-05-2009
20120297250CREATING RANDOMLY ORDERED FIELDS WHILE MAINTAINING THE TEMPORAL ORDERING BASED ON THE VALUE OF THE FIELDS - A mechanism for verifying order of entities being processed by a device under test (DUT) is provided. The mechanism includes arranging the entities into a temporal order, and encoding the entities to maintain the temporal order of the entities and produce encoded entities with each being a random value. The encoded entities each have a one-to-one mapping to their corresponding one of the entities in the temporal order. The encoded entities are input into the DUT to verify its output, and responsive to detecting an error in the output corresponding to one encoded entity, the one encoded entity is decoded into a current decoded error entity. It is determined which is lower in the temporal order between the current decoded error entity and a previous decoded error entity. Responsive to the current decoded error entity being lower than the previous decoded error entity, the current decoded error entity is stored.11-22-2012
20080288822EXHAUSTIVE SECURITY FUZZING FOR TRANSACT STRUCTURED QUERY LANGUAGE - Systems and methods that incorporate fuzzing capabilities within an SQL server to facilitate penetration testing. A fuzzing component associated with the SQL server provides an entry point for accessing the fuzzing system to update explicit user specified parameters associated with SQL, wherein the server's in depth knowledge regarding semantics of the language code (e.g., manner of parsing) can be employed to determine vulnerabilities thereof.11-20-2008
20090319829PATTERN EXTRACTION METHOD AND APPARATUS - A test pattern extraction method includes obtaining an identifier of a processing executed for a test pattern by a verification target, and storing the identifier of the processing into a test result data storage device in association with the test pattern; calculating a distance between the test patterns whose identifiers of the processing are different each other and which are stored in the test result data storage device, identifying, for each pair of the identifiers of the processing, a pair of the test patterns whose distance satisfies a predetermined condition, and storing data of the identified pair of the test patterns into a pattern data storage device.12-24-2009
20080244315TESTING METHOD FOR COMPLEX SYSTEMS - A method of testing a complex system of components is provided. The method includes providing a test log for each component, each test log comprising a list of tests and a respective test routine for each test. The method also includes activating the test logs and commencing a test procedure of the complex system. The method further includes running one or more test routines, terminating the test procedure of the complex system, and creating a test report based upon the output of the test routines.10-02-2008
20080270833SYSTEMS AND METHODS FOR REDUCING NETWORK PERFORMANCE DEGRADATION - Systems and methods for reducing network performance degradation by assigning caching priorities to one or more states of a state machine are disclosed herein. In one embodiment, the method comprises storing, in a memory, a state machine corresponding to one or more patterns to be detected in a data stream, wherein the state machine comprises a plurality of states, generating a test data stream based on the one or more patterns, traversing the state machine with the test data stream, determining a respective hit quantities associated with each of the plurality of states, the hit quantities each indicating a number of accesses to a corresponding state by the traversing, and associating a caching priority to at least some of the plurality of states based on the hit quantities of the respective states.10-30-2008
20090089617METHOD AND APPARATUS FOR TESTING MATHEMATICAL ALGORITHMS - A method and apparatus for testing mathematical programs where code coverage is exceedingly difficult to hit with random data test vectors (probability <204-02-2009
20090024873System and Method for Increasing Error Checking Performance by Calculating CRC Calculations After Multiple Test Patterns for Processor Design Verification and Validation - A system and method to reduce verification time by sharing memory between multiple test patterns and performing results checking after each test pattern executes one time is presented. A test pattern generator generates multiple test pattern sets, each of which including multiple test patterns. Each test pattern set is executed by a corresponding thread/processor until each test pattern included in the test pattern set has executed at least once. After all test patterns have executed at least once, a test pattern executor performs a memory error detection check to determine whether the system is functioning correctly. Since the invention described herein waits until all test patterns have executed before performing a memory error detection check, less time is spent on memory error detection checks, which allows more time to execute test patterns.01-22-2009
20090249121SYSTEM AND METHOD FOR GRAMMAR BASED TEST PLANNING - The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. Prior to generating the set of test cases from the grammar, the testing framework processes the grammar to identify attributes of the test cases to be derived from the grammar and facilitates the modification of the grammar.10-01-2009
20090070629System and Method for Testing Multiple Processor Modes for Processor Design Verification and Validation - A system and method for generating a test case and a bit mask that allows a test case executor the ability to re-execute the test case multiple times using different machine state register bit sets. A test case generator creates a bit mask based upon identified invariant bits and semi-invariant bits. The test case generator includes compensation values corresponding to the semi-invariant bits into a test case, and provides the test case, along with the bit mask, to a test case executor. In turn, the test case executor dispatches the test case multiple times, each time with a different machine state register bit set, to a processor. Each of the machine state register bit sets places the processor in different modes.03-12-2009
20110145642METHOD AND SYSTEM FOR TESTING AN APPLICATION - The present invention provides a method, test-bed and computer program product for testing an application installed on a wireless communication device. The wireless communication device communicates one or more messages wirelessly to a server through a test-bed. The test-bed is connected with the server and provides one or more testing parameters for the one or more messages. A tester, testing the application, assigns a probability to the one or more messages. Further, the tester assigns a probability to the one or more testing parameters. Thereafter, the messages are re-communicated between the server and wireless communication device through the test-bed. Subsequently, the one or more messages are identified by the test-bed and one or more wireless network conditions are emulated based on the probabilities assigned to the one or more messages and the one or more testing parameters.06-16-2011
20120198279Automated Testing on Mobile Devices - Disclosed herein are techniques for testing a device. In some implementations, a request to perform a test instruction on one or more of a plurality of computing devices is received at a server. The test instruction may be configured to test an application or capability associated with the one or more computing devices. The test instruction may be written in accordance with a computer programming language capable of being translated into a plurality of different programming language instructions sets. A first computing device may be selected from the plurality of computing devices. The first computing device may be capable of performing instructions written in a first one of the computer programming language instruction sets. The test instruction may be transmitted to the first computing device via the network. A response message may be received from the first computing device.08-02-2012
20080263402 METHOD, ARRANGEMENT, TESTING DEVICE AND PROGRAM FOR TESTING MULTIMEDIA COMMUNICATION EQUIPMENT AND SOFTWARE - The invention relates to a method, testing arrangement, simulator and software program for evaluating quality of a transmission channel or a transmission device or a codec. The evaluation is made by using multimedia stream including voice and video frames. The multimedia frames used in the evaluation are generated by using fractal functions both in the transmitting device and the receiving device.10-23-2008
20120198280TEST CASES GENERATION FOR DIFFERENT TEST TYPES - A method, and associated data processing system and computer program product, for generating test cases of different types for testing an application. A functional flow of the application is created based on a system design of the application. Additional test information corresponding to different stages of the functional flow with respect to a test types is generated. The generation of additional test information includes utilizing templates associated with the test types. The test cases are generated based on the additional test information and at least one test case generation rule. The test cases of different types are associated with one another.08-02-2012
20100275063METHOD OF TESTING VALIDITY OF AUTHENTICATION IC - A method in which a test function is called in a system's internal authentication IC multiple times with a known incorrect value such that, if the internal IC is invalid, an expected invalid response is not generated and, otherwise, the internal IC generates a secret random number and its signature and encrypts these using a first secret key, an external authentication IC connected to the system calls a read function which decrypts the encrypted random number and signature using the first key, calculates the decrypted random number's signature, compares the signatures and upon a match encrypts the decrypted random number and a message of the external IC using a second secret key, the internal IC calls the test function which encrypts the random number and message using the second key, compares the encrypted random numbers and messages, validates the external IC if they match and invalidates the external IC otherwise.10-28-2010
20130219222SYSTEMS AND METHODS TO TEST PROGRAMS - The embodiments described herein include a host that includes an operating system and a storage simulation module in communication with the host. The storage simulation module includes a pseudo-adapter configured to emulate a storage adapter and a pseudo-storage device coupled to the pseudo-adapter, wherein the pseudo-storage device is configured to emulate a storage device. The storage simulation module is configured to simulate an error event for the pseudo-adapter and/or the pseudo-storage device upon receipt of an operation from the operating system.08-22-2013
20130219220GENERATING A REPLAYABLE TESTING SCRIPT FOR ITERATIVE USE IN AUTOMATED TESTING UTILITY - A method for generating a replayable testing script for iterative use by an automated testing utility may include recording a plurality of scripts, each script relating to a separate iteration of a transaction between a user and a tested application performed by an operator. The method may also include comparing the recorded scripts to identify a location of a data item by finding different values in a pair of corresponding locations in the recorded scripts, indicative of a dynamic data item. The method may further include generating the replayable testing script comprising one of the recorded scripts and having a variable parameter at the identified location of the dynamic data item.08-22-2013
20130219219Customizing Code Modules of Software and Programmable Hardware for a Test Instrument - Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.08-22-2013
20120246515SCALABLE TESTING TOOL FOR GRAPHICAL USER INTERFACES OBJECT ORIENTED SYSTEM AND METHOD - The present invention involves an automated software testing system and method which specifies a screen of a program having a graphic user interface for testing; specifies an area of the screen for activation; specifies an activation procedure to invoke within the activation area, and an expected result of the activation; and runs the program including a display of the screen, activating the activation area with the activation procedure, and comparing the actual result with the expected result.09-27-2012
20120246514Adaptive Test Sequence for Testing Integrated Circuits - A method includes testing a first device and a second device identical to each other and comprising integrated circuits. The testing of the first device is performed according to a first test sequence of the first device, wherein the first test sequence includes a plurality of ordered test items, and wherein the first test sequence includes a test item. A test priority of the test item is calculated based on a frequency of fails of the test item in the testing of a plurality of devices having an identical structure as the first device. The first test sequence is then adjusted to generate a second test sequence in response to the test priority of the test item, wherein the second test sequence is different from the first test sequence. The second device is tested according to the second test sequence.09-27-2012
20100262864AUTOMATIC REPRODUCTION TEST DEVICE AND AUTOMATIC REPRODUCTION TEST METHOD IN EMBEDDED SYSTEM - An automatic reproduction test device in an embedded system to which external equipment (10-14-2010
20100192014PSEUDO RANDOM PROCESS STATE REGISTER FOR FAST RANDOM PROCESS TEST GENERATION - A method, system and computer program product are presented for providing pseudo-random input test data to a test program. A seed value is generated and stored in a seed register. Using the seed value as an input, a pseudo-random input test value is generated by a Linear Feedback Shift Register (LFSR), and stored in a GPR within a processor core. Using the pseudo-random input test value from the GPR, a test program is executed within the processor core.07-29-2010
20100262863METHOD AND DEVICE FOR THE ADMINISTRATION OF COMPUTERS - The invention relates to a method and a device (10-14-2010
20120173929SYSTEM AND METHOD FOR TESTING A SOFTWARE UNIT OF AN APPLICATION - A system, computer readable storage medium including instructions, and a computer-implemented method for testing a software unit of an application is described. A method signature for a method of the software unit of the application is received. A generic test specification for a generic test of the method is identified based on the method signature, the generic test specification being one of a plurality of test specifications, wherein the generic test specification includes a definition for at least one reference input parameter value of the method and a definition for at least one reference output parameter value of the method. The method is executed using the at least one reference input parameter value to produce at least one test output parameter value. A test result is determined based on a comparison between the at least one test output parameter value and the at least one reference output parameter value.07-05-2012
20100192017Method For Controlling An Operating Mechanism And A Manipulation Unit - A method for controlling an operating mechanism using a manipulation unit, in which the operating mechanism includes at least one microcontroller, at least one memory with a plurality of memory cells and at least one first value in a first memory cell and at least one debug interface, and the debug interface exhibits a monitoring functionality for monitoring a program code executed by the operating mechanism and using the debug interface a first pre-set timepoint is detected when processing the program code and, using the information transmitted by the debug interface for the first timepoint to the manipulation unit, a trigger timepoint results for a processing routine through the manipulation unit (IN) and a second value is written using the debug interface by the manipulation unit using the processing routine for a second timepoint in the first memory cell before the first memory cell is read by the operating mechanism for a third timepoint.07-29-2010
20100192016Method For Controlling An Operating Mechanism And A Manipulation Unit - A method for controlling an operating mechanism using a manipulation unit, in which the operating mechanism includes at least one microcontroller, at least one memory with a plurality of memory cells, and at least one debug interface, and the debug interface presents a monitoring functionality for monitoring memory content and using the debug interface a first timepoint of the operating mechanism is detected for writing into a first memory cell and, using the information transmitted by the debug interface for the first timepoint to the manipulation unit, a trigger timepoint results for a processing routine through the manipulation unit (IN) and using the processing routine a second value is written by the manipulation unit using the debug interface for a second timepoint in the first memory cell before the first memory cell is read by the operating mechanism for a third timepoint.07-29-2010
20100192015METHOD FOR INFLUENCING A CONTROL UNIT AND MANIPULATION UNIT - A method for influencing a control unit by means of a manipulation unit whereby the control unit has at least one microcontroller, at least one memory having a plurality of memory cells and at least one debug interface, and the debug interface has a monitoring functionality for observing the memory content, and by means of the debug interface a first point in time of the control unit for writing a first value to a first memory cell is detected, and a triggering point in time for a processing routine by the manipulation unit is obtained as the result based on the information transmitted to the manipulation unit by the debug interface at the first point in time, and at a second point in time, a second value is written to the first memory cell by the manipulation unit by means of the processing routine via the debug interface before the first memory cell is read by the control unit at a third point in time.07-29-2010
20100235683TESTING MULTI-CORE PROCESSORS - Methods and apparatuses are disclosed for testing multicore processors. In some embodiments, the tested multicore processor may include at least a first core and a second core, a data input coupled to a first scan chain in the first core and a second scan chain in the second core, and a multiplexer including at least a first input and a second input, the first input coupled with a data output of the first scan chain and the second input coupled with a data output of the second scan chain, the multiplexer further including an output that couples to one or more pins on a package of the processor, the multiplexer further including a select signal that couples to the one or more pins on the package of the processor, and wherein the data input couples to the one or more pins on the package of the processor.09-16-2010
20100251024System and Method for Generating Test Job Control Language Files - A software testing system for generating a test job control language (JCL) file is provided. The system includes a processor, a memory device for storing a source JCL file containing jobs and an instruction file containing instructions for modifying the source JCL file according to a test environment. A JCL generation module executed by the processor determines all procedures that are referenced by the jobs in the source JCL file, opens each unique procedure of the determined procedures once and modifies the jobs in the source JCL file based on the instruction file and the opened procedures to generate the test JCL file. By opening each procedure only once which may be called multiple times in the jobs, the JCL generation module substantially increases the speed of generating the test JCL file.09-30-2010
20100211825DATA GENERATOR APPARATUS FOR TESTING DATA DEPENDENT APPLICATIONS, VERIFYING SCHEMAS AND SIZING SYSTEMS - A data generator for database schema verification, system sizing and functional test of data dependent applications. Allows for generation of data from random values or from working databases which may be profiled to generate patterns for occurrences of values and sizes of values. The data may be filled with a fill rate that dictates the percentage of fields assigned nulls. Cardinality allows for a fixed number of values to occur across the records for a field. May utilize reference data associated with an existing database to fill fields. Qualifiers and multi-value fields may be filled to mimic real data. Maximum, nominal and average number of occurrences of sizes of data and qualifiers and multi-value data may be specified. May also utilize dictionaries to fill. Hierarchical levels and number of child nodes may also be specified and used in filling taxonomy tables and hierarchy tables for example.08-19-2010
20130219221SYSTEMS AND METHODS TO SIMULATE STORAGE - The embodiments described herein include a host that includes an operating system and a storage simulation module in communication with the host. The storage simulation module includes a pseudo-adapter configured to emulate a storage adapter and a pseudo-storage device coupled to the pseudo-adapter, wherein the pseudo-storage device is configured to emulate a storage device. The storage simulation module is configured to simulate an error event for the pseudo-adapter and/or the pseudo-storage device upon receipt of an operation from the operating system.08-22-2013
20090327812METHOD, DEVICE AND COMPUTER ACCESSIBLE MEDIUM FOR SECURE ACCESS PROTOCOL CONFORMANCE TESTING ON AUTHENTICATION SERVER - Exemplary embodiments of a method, device and computer-accessible medium for secure access protocol conformance testing on an authentication service entity can be provided. According to one exemplary embodiment, it is possible to determine whether a certificate issued by the authentication service entity to be tested complies with a corresponding specification of a standard. An authentication requester can be simulated to send a certificate authentication request message to the authentication service entity to be tested. A certificate authentication response fed back from the authentication service entity to be tested can be captured. Further, a secure access protocol conformance testing result on the authentication service entity to be tested can be obtained by analyzing the certificate authentication response.12-31-2009
20110066889TEST FILE GENERATION DEVICE AND TEST FILE GENERATION METHOD - A test file generation method for generating a test file for testing a consistency of a work process includes receiving various types of definition information relating to various types of procedures included in the work process, execution sequence of the various types of procedures, a final goal that is a goal that is finally achieved in the work process, sub-goals that are goals that are achieved in the various types of procedures, a constrained condition that is observed when the various types of procedures are executed, an executioner who executes the various types of procedures, and an authority for determining a procedure that can be executed by the executioner, generating a definition file on the basis of the various types of definition information received, and generating a test file that indicates a behavioral model when the work process is executed on the basis of the definition file generated.03-17-2011
20110066888SYSTEM AND METHOD FOR TESTING SLEEP AND WAKE FUNCTIONS OF COMPUTER - A system for testing sleep and wake functions of a computer includes a test device and a test software installed on a motherboard of the computer. The test device includes a timing module, a counting module, and a switch module. The test software includes an initialization unit, a signal transmission unit, and a comparison unit. The test device communicates with the motherboard, and an operation system of the computer sets that receiving a control signal means executing an operation of putting the computer to sleep or waking the computer up. The system employs the test software cooperating with the test device to test sleep and wake functions of the computer automatically.03-17-2011
20090319830System and Method for Automatically Testing a Model - A system for automatically testing a model of system under test includes (a) means for the automatic generation of a test harness; (b) means for automatic generation of test specifications based on the analysis of the results obtained from the simulation of the test harness; (c) means for the automatic generation of test data and test controls; (d) means for automatic evaluation of the test quality and the automatic generation of a verdict. A method for automatically testing a model system includes (a) detecting at least one feature of an input signal to the model system and (b) detecting at least one feature of an output signal of the model system, wherein the at least one feature of the input signal or the input signal is generated automatically depending on at least one feature of the at least one output signal.12-24-2009
20110239046TEST CIRCUIT FOR INPUT/OUTPUT ARRAY AND METHOD AND STORAGE DEVICE THEREOF - The invention provides a test circuit for n input/output arrays. Each of the n input/output arrays has M pairs of input/output. The test circuit includes M write drivers and M comparing circuits. The i09-29-2011
20120144239CONTINUOUS INTEGRATION OF BUSINESS INTELLIGENCE SOFTWARE - Methods for automatically testing a business intelligence artifact include authoring a business intelligence artifact selected from the group consisting of a report specification, an analysis cube, and a metadata model; creating an assertion to verify the proper functioning of the business intelligence artifact; and testing, with an automated agent interfaced with the business intelligence system, the business intelligence artifact to verify its proper functioning by determining whether the conditions of the assertion are satisfied upon execution of the business intelligence artifact in the business intelligence system.06-07-2012
20110107146Trace Reconstruction for Silicon Validation of Asynchronous Systems-on-Chip - A test system collects passing event data and failing event data, and merges the collected data into passing subsequences and failing subsequences, respectively. The test system identifies an overlap area between the passing subsequence and the failing subsequence in regards to time slices and tracepoint slices, and creates passing transactions and failing transactions using the event data corresponding to the overlap area. Next, the test system detects a timing discrepancy between the first passing transaction relative to the second passing transaction compared with the first failing transaction relative to the second failing transaction. The test system then reports the detected timing discrepancy, which allows a test engineer to perturb the test program in order to more frequently catch intermittent failures caused by asynchronous timing conditions.05-05-2011
20100306590Automated Testing Platform for Event Driven Systems - A platform for the automated testing of event driven software applications is provided. A source environment is replicated to a target environment. The target environment includes a target system. A test case is defined with a target system, specific attributes and verification information. The attributes of the test case include the target system. The test case is fired. An event is simulated for the test case based on the target system and the specific attributes. The simulated event is transmitted to the target environment. The results of the test case being fired are determined based on verification information. The results are recorded to a data store.12-02-2010
20130139003Test Data Generation - Systems and methods for test data generation are described. In one implementation, the method includes receiving seed data having one or more characteristics. Further, the method includes obtaining a selection criterion indicating a selected portion of the seed data to be transformed. Based on the selection criterion, the seed data is transformed for at least a plurality of iterations to generate test data. The test data comprise a plurality of data sets including a primary data set generated in a first iteration and a secondary data set generated in each subsequent iteration. The primary data set includes transformed data corresponding to the selected portion of the seed data and non-transformed data corresponding to a remaining portion of the seed data and each secondary data set includes transformed data corresponding to the selected portion of the seed data.05-30-2013
20110010586TEST METHOD, TEST PROGRAM, TEST APPARATUS, AND TEST SYSTEM - A test method including executing a data transfer instruction with regard to transfer of data between a plurality of multiplexed storage devices and a plurality of main systems logically connected to the plurality of storage devices, storing an initial value of an operand upon execution of the data transfer instruction, re-setting the stored initial value to the operand upon occurrence of an interrupt triggered by an exception, and repeatedly executing the data transfer instruction and re-setting the stored initial value to the operand, by the main system accessing the storage device, until the data transfer instruction is completed normally.01-13-2011
20110010585SYSTEM AND METHOD FOR A TESTING VECTOR AND ASSOCIATED PERFORMANCE MAP - A system and method for testing line state. Traffic through a communications path is determined. A test vector is generated. Attributes of the test vector simulate the traffic. The test vector is communicated to one or more end devices. Performance information for each of the attributes of the test vector is measured. A performance map utilizing the attributes and the performance information is generated.01-13-2011
20110010584Diagnosis of and Response to Failure at Reset in a Data Processing System - Detection of a reset failure in a multinode data processing system is provided by a diagnostic circuit in each of a plurality of the server nodes of the system. Each diagnostic circuit is coupled to a code fetch chain of its corresponding node. At reset, prior to a node processor retrieving startup code from the code fetch chain, the diagnostic circuit provides diagnostic signals to the code fetch chain. A problem in the code fetch chain is detected from a response to the diagnostic signals. When a problem is detected, a node failure status for the problem node may be signaled to the other nodes. The multinode system may be configured in response to signaled node failure status, such as by dropping failed nodes and replacing a failed primary node with a secondary node if necessary.01-13-2011
20110041011TEST SIGNAL GENERATING APPARATUS - The present invention is to provide a test signal generating apparatus which can generate a test signal for testing a device that dynamically change its operational state in response to a signal or the like. The test signal generating apparatus includes: a pattern storage unit 02-17-2011
20110041012METHOD OF SHARING A TEST RESOURCE AT A PLURALITY OF TEST SITES, AUTOMATED TEST EQUIPMENT, HANDLER FOR LOADING AND UNLOADING DEVICES TO BE TESTED AND TEST SYSTEM - A method of sharing a test resource at a plurality of test sites executes respective test flows at the plurality of test sites with an offset in time, the respective test flows accessing the test resource at a predetermined position in the test flow.02-17-2011
20100332904Testing of Distributed Systems - In an embodiment, a method is provided for tracking a test. In this method, a test session identifier is transmitted to a test system. The test session identifier identifies a particular test session. A test of a component is triggered at the test system, and this test provides test results, which are received from the test system. The test results include the test session identifier, which allows the tests to be associated with the particular test session.12-30-2010
20110246829Method for Fast Detection of Node Mergers and Simplification of a Circuit - The present invention discloses a method for fast detection of node mergers and simplification of a circuit. The steps of the method include: (a) a circuit with a large amount of nodes is provided; (b) a target node is selected for computing mandatory assignments (MAs) of the stuck-at 0 and stuck-at 1 fault tests on the target node respectively by a computer; (c) the MAs of the stuck-at 0 and stuck-at 1 fault tests of the target node are utilized to find substitute nodes; (d) the substitute node that is closest to primary inputs is used to replace the target node; and (e) the steps (b)˜(d) are repeated for removing the replaceable nodes and simplifying the circuit.10-06-2011
20100218044REMOTE TESTING SYSTEM AND METHOD - A method and system of supporting and testing equipment distant from the support system are provided. The method includes the steps of forming a communications link between the equipment and the support system, using the support system to measure performance of the equipment and to provide a set of performance data, providing library data relating to the equipment, comparing the performance data with the library data and analysing the compared data whereby to provide a performance diagnosis of the equipment, all in a substantially continuous real time operation.08-26-2010
20090217094Verification Support Device, A Verification Support Method, A Program, and a Recording Medium Recording Medium Recorded With the Program On It - A verification support device that supports verification of a changed state by using changed state data and relating data. The verification support device includes a state with an abnormal condition generating unit adds the abnormal condition to the changed state thereby generating a changes state with an abnormal condition. The verification device also includes an abnormal condition inspection unit that inspects whether the abnormal data may reach the changed state based on the generated changed state with the abnormal condition and the relating data.08-27-2009
20110072307METHODS AND APPARATUSES FOR GENERATING NETWORK TEST PACKETS AND PARTS OF NETWORK TEST PACKETS - Some aspects of the technology relate to the generation for test purposes of test packet ingredients by a microprocessor, ongoing with the generation for test purposes of test packets incorporating the test packet ingredients by a high-speed FPGA. Some aspects of the technology relate to the generation of outgoing test packets incorporating the test packet ingredients, at a programmable logic device such as an FPGA. These aspects are implemented as an apparatus, a method, computer readable medium, and a data structure.03-24-2011
20110078507OPERATIONAL SYSTEM TEST METHOD - The present invention features an operational system test method, comprising defining a fault model, inserting a test agent, hooking a test location, collecting test information, and removing the test agent. The invention also features an operational system test method, comprising defining a fault model, inserting a test agent, identifying a memory area according to a test location, hooking the identified memory area, collecting test information, and removing the test agent.03-31-2011
20110078505System and Method for Locating a Fault on a Device Under Test - System and method for analyzing operation of a device under test (DUT). In one embodiment, a reference component associated with a reference device may be received. The reference device may be in communication with the DUT and a component associated with the DUT can be exchanged with the reference component. A test may be performed on the DUT, wherein a result of the test may correspond to a source of a fault associated with the DUT. An indication of the source of the fault may be provided based on the test result.03-31-2011
20090240986GENERATION OF SIMULATED ERRORS FOR HIGH-LEVEL SYSTEM VALIDATION - Embodiments of the invention enable error simulation for system validation. Errors can be simulated by modifying data presented to the processor as well as generating interrupts consistent with the modified data in the ASIC hardware. Modify logic may be added to the ASIC so when the microprocessor attempts to read a specific address, the modify logic may mask one or more of the data bits returned by the requested address. Address, bit mask, and force value data may be stored in registers to determine which address may be modified, the bit location to be modified, and the value that bit location should be changed to. Selection logic may then determine whether data from the modify logic or the unmodified value from an attached device should be sent to the ASIC interface and on to the microprocessor. A timer may also be used to decouple the setup from the test.09-24-2009
20080320330ROW FAULT DETECTION SYSTEM - An apparatus, program product and method check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.12-25-2008
20090138761System and method for electronic testing of devices - A coupler and associated method electronically tests devices. The method comprises receiving a stimulus signal for testing the electronic device, receiving an aggressor signal, injecting the aggressor signal into the stimulus signal to create a resultant signal that is the stimulus signal having a jitter, and sending the resultant signal to the electronic device. The coupler comprises an input port to receive a stimulus signal for testing the electronic device, an injection device to inject an aggressor signal into the stimulus signal to create a resultant signal that is the stimulus signal having a jitter, and an output port to output the resultant signal to the electronic device.05-28-2009
20090138760System and method for electronic testing of devices - A method for testing electronic devices comprises receiving a stimulus signal for testing a device. The method comprises setting a filter by changing a performance characteristic of the filter while maintaining settings of the filter, thereby altering the stimulus signal to create an altered stimulus signal. The method comprises outputting the altered stimulus signal.05-28-2009
20120311386CONFIGURATION DEVICE FOR THE GRAPHICAL CREATION OF A TEST SEQUENCE - A configuration device for the graphical creation of at least one test sequence for controlling a test device having at least one electronic computer. The test device is controllable according to the created test sequence. The configuration device has at least one display device, graphical library functional elements being displayed with the display device in a library field. The test sequence can be created by placing at least one instance of a library functional element in a configuration field. The instance of a library functional element is placed in the configuration field. The graphical library functional element can be provided with a function placeholder, whereby the function placeholder in the instance of the library functional element can be provided with an instance functionality, whereby the reference of the instance of the library functional element to the library functional element is retained.12-06-2012
20110055634SYSTEM AND METHOD FOR TESTING A COMPUTER - A system and method for testing a computer divide test programs in a test file into hardware test programs and software test programs. A test server selects one or more test programs from the divided test file according to test parameters of the computer. The test server generates a test command for testing test items of the computer. The computer executes the test command. The test server analyzes test results and stores analyzed results into a predefined storage path.03-03-2011
20110055633Declarative Test Execution - A test controller interprets declarative test instructions into imperative test tasks and runs the tests using the imperative test tasks. Declarative test instructions indicate what tests are to be run and the imperative test tasks indicate how these tests are to be run. In addition, the imperative test tasks further indicate a control flow of the running of the tests.03-03-2011
20090222696SYSTEM AND METHOD FOR DETECTING NON-REPRODUCIBLE PSEUDO-RANDOM TEST CASES - A method for monitoring a test case generator system by detecting non-reproducible pseudo-random test cases, comprising: building a first pseudo-random test case having a first sequence of seeds comprising a first starting seed and a first ending seed through the test case generator system; reproducing the first sequence of seeds of the first pseudo-random test case by building a second pseudo-random test case having a second sequence of seeds comprising a second starting seed and a second ending seed through the test case generator system when the test case generator system is operating in a reproduction mode, the first starting seed being used as the second starting seed of the second sequence of seeds; and comparing the first ending seed in the first sequence of seeds to the second ending seed in the second sequence of seeds.09-03-2009
20110264957BOOT TEST APPARATUS AND METHOD OF COMPUTER SYSTEM - A boot test apparatus and method can repeatedly execute actions of power-on and power-off for a cold boot test of a computer to test whether the computer is operable. The boot test apparatus includes a microprocessor, a controller, and a power switch. The microprocessor generates a control signal according to a period voltage provided by an internal power supply. The control signal includes a pulse signal and a voltage signal. The controller controls a power switch to send the pulse signal to the computer through a power button of the computer, and controls the power switch to send the voltage signal to the computer through a power input port of the computer. The microprocessor further obtains test information from the computer when the computer executes a cold boot process according to the control signal, and displays the test information on an LED when the cold boot process is abnormal.10-27-2011
20110191633PARALLEL DEBUGGING IN A MASSIVELY PARALLEL COMPUTING SYSTEM - A method and apparatus is described for parallel debugging on the data nodes of a parallel computer system. A data template associated with the debugger can be used as a reference to the common data on the nodes. The application or data contained on the compute nodes diverges from the data template at the service node during the course of program execution, so that pieces of the data are different at each of the nodes at some time of interest. For debugging, the compute nodes search their own memory image for checksum matches with the template and produces new data blocks with checksums that didn't exist in the data template, and a template of references to the original data blocks in the template. Examples herein include an application of the rsync protocol, compression and network broadcast to improve debugging in a massively parallel computer environment.08-04-2011
20110078506INTEGRATING DESIGN FOR RELIABILITY TECHNOLOGY INTO INTEGRATED CIRCUITS - A method executes computerized instructions stored within a computer storage medium within an integrated and packaged semiconductor device using a centralized programming interface within the packaged semiconductor device to perform in-system preventive and recovery actions, configure and issue stimulus to chips, components and sensors within the semiconductor device. The method monitors chip, components and sensors within the packaged semiconductor device, using the centralized programming interface, to measure characteristics of the packaged semiconductor device in response to the stimulus. The structure including chips, components and sensors produce outputs representing the characteristics. The method performs an engineering evaluation to determine whether the chip, component and sensor outputs are within predetermined limits, using the centralized programming interface; and reports occurrences of instances of the chip, component and sensor outputs being outside the predetermined limits, using the centralized programming interface, to an on-chip storage medium, external test equipment or computerized device outside of the packaged semiconductor device. The instructions cause the centralized programming interface to alter actions, configurations, frequencies and types of the stimulus, engineering evaluations, and reports depending upon whether the characteristics are within the predetermined limits in order to recover from and prevent failure.03-31-2011
20110138227ROTATIONAL VIBRATION TEST SYSTEM AND METHOD - A rotational vibration test system and method of a storage system set storage devices of the storage system, fan speeds of an electric fan of the storage system, and access patterns of the storage system. The electric fan is controlled to run at the fan speeds. The storage system is accessed according to the access patterns. Accordingly, the storage devices are input/output performance tested. Test results of the storage devices are output to an output device.06-09-2011
20110191634TEST-OPERATION CONTROL APPARATUS, SYSTEM, AND METHOD - A test-operation control apparatus, system and method are disclosed to reduce time and cost required for test operation by automatically performing test-operation on a control point of facilities installed on site based on a previously established template sequence and operational conditions of the situation on the spot. The test-operation control apparatus includes: a storage unit configured to store a basic sequence with respect to each of one or more control points set in the facilities installed on the spot (or site); an input unit configured to selectively receive one or more of the control points and receive operational conditions of each basic sequence with respect to each of the one or more of the selected control points; and a controller configured to combine the basic sequences with respect to each of the one or more of the selected control points according to the inputted operational conditions to generate a test-operation sequence.08-04-2011
20120124425Method and Apparatus Useful In Manufacturing Test Case Operations - The incorporation of a simulation mode into existing manufacturing code test cases that communicate with a service processor. While in simulation mode, the test cases are able to run independently of system hardware or network connection. Test case code paths are exercised through the modification of simulated output, without change to the original code.05-17-2012
20100017657System and Method for Performance Test in Outside Channel Combination Environment - Provided are a system and method for a performance test in an outside channel combination environment. In an outside channel combination environment including first and second outside-affairs servers in an active-active form, first and second outside channel combination servers, and first and second network devices, a system for a performance test includes: a plurality of test lines connected to one another so that a closed circuit is formed at outputs of the first and second network devices; and at least one load generator for generating loads corresponding to outbound messages to be sent to a plurality of outside authorities, and measuring system performance, wherein: the loads generated by the load generator are sent to the second outside channel combination server via the first outside-affairs server, the first outside channel combination server, the first network device, the test lines, and the second network device, and the second outside channel combination server generates a response message corresponding to the received load, and then sends the response message to the load generator via the second network device, the test lines, the first network device, the first outside channel combination server, and the first outside-affairs server, so that system performance is measured. Thus, a performance test for transmit/receive message can be effectively performed in advance in a newly built outside channel combination environment.01-21-2010
20090158093MOTHERBOARD TESTER - An exemplary motherboard tester includes a processor comprising a pair of data terminals for transmitting data; and an interface comprising: a pair of data terminals coupled to the data terminals of the processor respectively; at least one output terminal arranged for connecting to a corresponding pin of a chipset mounted on a motherboard to send a test signal generated by the processor to the pin; and at least one input terminal arranged for connecting to a test point on the motherboard which is electrically connected to the pin, to receive a feedback signal from the test point, wherein, the processor compares the feedback signal with the test signal to determine whether the pin of the chipset is normal, open, or shorted.06-18-2009
20110307740Minimizing Database Repros using Language Grammars - Described is automatically processing an initial database repro (text representing a bug when corresponding script is executed in a database engine) into a min-repro (a subset of the text) that is simplified version of the initial repro yet still contains the bug. A parse tree representative of the initial database repro is processed into simplified parse trees based on language grammar rules, e.g., by replacing higher level nodes with descendant nodes. Repros of the simplified parse trees are executed to determine which simplified repros still fail execution because of the bug (that is, the simplified repros were not oversimplified). A minimum simplified parse tree with respect to a desired level of minimality is found from among those failing repros, with the simplified repro that corresponds to the minimum simplified parse tree output as the min-repro.12-15-2011
20120047400COMPUTER STARTUP TEST APPARATUS - A computer startup test apparatus for turning on a computer automatically, includes a control module, a switch module, and a startup module. The control module is configured to output control signals, data signals and clock signals. The switch module is configured to receive the control signals, and turn on the computer according to the received control signals. The startup module is configured to receive the data signals and clock signals, and restarts the computer according to the received data signals and clock signals. The control module stores a predetermined test time. The control module records abnormal information and test times when the computer restarts, and outputs the control signals to turn on the computer using the switch module when the computer cannot restart.02-23-2012
20120210170CIRCUIT FOR DETECTING AND RECORDING CHIP FAILS AND THE METHOD THEREOF - A circuit for detecting and recording chip fails according to one embodiment of the present invention comprises a common error bus, a plurality of fail detector modules and a control center. Each of the plurality of fail detector modules is configured to receive at least a data signal to determine an occurrence of a chip fail and to correspondingly broadcast a fail code on the common error bus when the common error bus is not busy. The control center is configured to record a fail code from the common error bus and to report the recorded fail code when required.08-16-2012
20120047401TEST DEVICE AND TEST METHOD FOR TESTING COMPUTING DEVICE - A test method for restarting a computing device communicating with a remote computer. The computing device is shut down and awakened by the remote computer. A second hardware information of the computing device after restarting the operating system of the computing device is compared with initial hardware information of the computing device when the computing device is initial started. Test results are stored to a predetermined storage path and displayed on a screen after the test ends.02-23-2012
20120011405METHOD AND EQUIPMENT FOR VERIFYING PROPRIETY OF SYSTEM MANAGEMENT POLICIES TO BE USED IN A COMPUTER SYSTEM - Policy verification arrangements effecting operations of: modifying address information of system component information for all system components, stored in a system management server, to redirect-address information to a test tool as a substitute destination in order for the test tool to be able to receive a result of system management operations during testing, instead of a corresponding system component; acquiring configuration information of the information processing system from the system management server; generating a test item specifying a test event; transmitting the test event specified by the generated test item to the policy manager and/or said system management server; and recording a result of the system management operations which is requested by the policy manager and/or system management server responsive to the test event specified by the generated test item, but which is redirected back to the test tool via the redirected-address information stored in the system management server.01-12-2012
20120023371XML-SCHEMA-BASED AUTOMATED TEST PROCEDURE FOR ENTERPRISE SERVICE PAIRS - The testing of services techniques include a method, a system, and a non-transitory computer-readable storage medium. In some embodiments of these techniques, the method includes receiving a first payload generated by a first service. The first service transmits the first payload to a system. The method further includes receiving a second payload from a second service. The second payload is generated based on data received from the first service. The method further includes receiving a schema associated with the second payload. The schema is configured to define the structure of the second payload. The method further includes determining one or more discrepancies between the second payload and the first payload using the schema associated with the second payload. The method further includes determining a testing result based on the one or more discrepancies.01-26-2012
20120060059GPU COMPUTATIONAL ASSIST FOR DRIVE MEDIA WAVEFORM GENERATION OF MEDIA EMULATORS - Disclosed is a method and apparatus for testing devices that will be connected to a computer storage media device by generating a complex test waveform that emulates operation of the computer storage media device using at least one Graphics Processing Unit (GPU) and applying the generated complex test waveform to the device(s) being tested. The complex test waveform may be generated by calculating a plurality of discrete individual portions of the complex test waveform in parallel, in real-time, and continuously using the parallel processing features of the GPU(s). The discrete individual portions of the complex test waveform may be representative of various characteristics of the emulated computer storage media device operation such as operational characteristics of the computer storage media device, environmental effects on the computer storage media device, application of filters to the computer storage media device signal, etc. Various embodiments may generate the base data signal waveform from the emulated computer storage device such that the entire complex test waveform is calculated. Other embodiments may use a pre-existing base data signal waveform provided from another source and modify/alter the pre-existing base data signal waveform to generate the complex test waveform. When available, one or more Central Processing Units (CPUs) and/or CPU cores may also perform calculations in parallel with the calculations performed by the GPU(s).03-08-2012
20120159253Hardware security module and processing method in such a module - The present invention relates to the field of processing within hardware security modules, such as for example debugging of compiled programs. A debugging module includes a microprocessor and a compiled program to be executed by the microprocessor in order to carry out an operation, and is configured to exchange with an external entity, in a master/slave mode, messages relating to the operation. The compiled program includes at least one debugging instruction which whether or not it is executed does not modify the execution of the operation. The hardware security module is moreover configured to transmit, during the execution of the compiled program, data generated, for example by the debugging instruction, over a communication channel initiated by the hardware security module, to an entity external to the hardware security module.06-21-2012
20120159252SYSTEM AND METHOD FOR CONSTRUCTION, FAULT ISOLATION, AND RECOVERY OF CABLING TOPOLOGY IN A STORAGE AREA NETWORK - System and method for construction, fault isolation, and recovery of cabling topology in a storage area network (SAN) is disclosed. In one embodiment, in a method for construction, fault isolation, and recovery of cabling topology in a SAN, subsystem information associated with each subsystem in the SAN is obtained. Then, an IP port and zoning information associated with connections of each subsystem is obtained. Component information associated with each component is also obtained. Any other relevant information associated with each subsystem and each component is obtained from users. The obtained subsystem information, IP port and zoning information, component information, and any other relevant information are compiled. Test packets are then sent from end-to-end in SAN using compiled information. The sent test packets are tracked via each component in each subsystem in the SAN. The cabling topology of the SAN is then outputted based on the outcome of the tracking.06-21-2012
20120110382COMPUTING DEVICE AND METHOD FOR MANAGING MOTHERBOARD TEST - A system and method for managing a test of a motherboard can create a first test data consisting of test items. In the first test data, one or more selected test items to perform can be identified. A second test data is obtained by performing a logical NOR operation on the test bits corresponding to the selected test items. After performing the test items, a third test data is created by setting the test bits corresponding to the selected test items that pass the test to the test bits of the selected test items in the first test data, and by setting the test bits corresponding to the selected test items that fail the test to the test bits of the test items that have not been selected in the first test data. By comparing the third with the test data, a test result of the motherboard is obtained.05-03-2012
20120072774Test Program Set Obsolescence Mitigation Through Software and Automatic Test Equipment Processes - Electronic test system including hardware and software components and method of use which provide obsolescence mitigation. A test program set (TPS) including a test program test is created to enable units to be tested. When a new component is introduced, the change is detected and a new TPS is created with at least part of the test program test. If the new TPS complies with defined, governing rules for the system, testing using the new TPS is possible. If not, a determination is made as to whether any component of the TPS is obsolete and if not, the units can be tested using the new TPS without redefining the rules. When a component of the TPS is obsolete, the rules are reviewed to ascertain the effect of removal of the component and optionally redefined to enable the new component to be used in combination with the remaining components.03-22-2012
20120131385TESTING MEHTOD FOR UNIT UNDER TEST - A testing method for a unit under test is provided. At least one unit under test is electrically connected to a testing machine. The testing machine creates a test script and executes the test script, so as to perform a non-operating system (OS) test and an OS test on the unit under test, and the testing machine is capable of combining the testing results, so a testing process is simplified, a test time is shortened, and test accuracy is improved.05-24-2012
20120166877SYSTEM AND METHOD FOR GRAMMAR BASED TEST PLANNING - The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to the system under test, and result in an output from the system under test. The inputs and outputs are then compared to the expected results to determine whether the system under test is performing correctly. Prior to generating the set of test cases from the grammar, the testing framework processes the grammar to identify attributes of the test cases to be derived from the grammar and facilitates the modification of the grammar.06-28-2012
20120166876APPLICATION INTEGRATION TESTING - Application testing is disclosed. A definition of a test to be performed on a subject application is received in a generic form not specific to the subject application. The test is performed by exchanging data with the subject application, as required to perform the test, using a test connector application associated with the subject application to do at least one of (1) convert an input data to be supplied to the subject application during the test from a generic data format not specific to the subject application into an application-specific data format associated with the subject application, if the application-specific data format is different than the generic data format and (2) normalize an output data received from the subject application in the application-specific data format into the generic data format not specific to the subject application, if the application-specific data format is different than the generic data format.06-28-2012
20120137177APPLICATION PORTAL TESTING - A first test script that includes at least one first step for executing a test of a test portal is provided in a computing device. An indication that an event has occurred in response to the test is received in the computing device. A second test script that includes at least one second step for executing the test is generated in the computing device, the at least one second step being at least in part a response to the event.05-31-2012
20120173930Computer Generated Imagery (CGI) Fault Clearance Instructions - A method of providing instructions to a user of an imaging device includes generating a three-dimensional (3D) model of the imaging device in a 3D computer generated environment. At least one computer generated imagery (CGI) instruction sequence is then rendered from the 3D model. The CGI instruction sequence depicts at least one action being performed on the imaging device and is rendered from a virtual viewpoint corresponding to a viewpoint of a user physically performing the at least one action. The rendered CGI instructions are stored in memory of the imaging device and selectively displayed on a user interface display screen of the imaging device.07-05-2012
20120179935DYNAMIC TEST GENERATION FOR CONCURRENT PROGRAMS - A computer implemented method for dynamic test generation for concurrent programs, which uses a combination of concrete and symbolic execution of the program to systematically cover all the intra-thread program branches and inter-thread interleavings of shared accesses. In addition, a coverage summary based pruning technique, which is a general framework for soundly removing both redundant paths and redundant interleavings and is capable of speeding up dynamic testing exponentially. This pruning framework also allows flexible trade-offs between pruning power and computational overhead to be exploited using various approximations.07-12-2012
20100275062Functional Coverage Using Combinatorial Test Design - A generator generates tests to improve functional coverage. A functional coverage of a first set of tests is examined in respect to a functional coverage model. The functional coverage model is transformed to a combinatorial model. The coverage measurements are used to refine the combinatorial model. The combinatorial model is utilized to generate a second set of tests that have a different functional coverage than the first set of tests. The second set of tests is utilized to examine quality of a tested system.10-28-2010
20100011252FORMAT TRANSFORMATION OF TEST DATA - A device for processing test data, the device having a data input interface adapted for receiving primary test data indicative of a test carried out for testing a device under test, the primary test data being provided in a primary format, a processing unit adapted for generating secondary test data in a secondary format by transforming, by carrying out a coordinate transformation, the primary test data from the primary format into the secondary format, and a data output interface adapted for providing the secondary test data in the secondary format for storing the secondary test data in a plurality of storage units.01-14-2010
20100011251Medical Equipment Monitoring Method and System - A system and method to facilitate device monitoring and servicing is provided. In one embodiment, a system may include a medical device having at least one component, and monitoring circuitry configured to measure operational data of the component. The system can also include a data processing system configured to analyze the operational data and to output a report based on such analysis. The analysis, in turn, may include applying a transform to the operational data and comparing one or more actual coefficient and threshold coefficient characteristics.01-14-2010
20130173962Test Execution Spanning Cloud and Local Devices - A test system for a managed cloud computing environment may have a management system that may recruit devices in the cloud and outside the cloud to perform a test on a cloud based application. Each device may execute an agent that connects the device to several cloud services for messaging, data collection, and executable code storage. The management system may identify and gather the devices, then cause the devices to execute a test by sending commands through the messaging service. The devices may access executable code for the specific tasks of a test through the code storage service, and as the devices complete tasks for the test, the devices may publish results in the data collection service. The test system enables any type of scenario to be implemented, including operations that can only be performed inside and outside the managed cloud environment.07-04-2013
20120254664AUTOMATIC TEST SYSTEM FOR DIGITAL DISPLAY SYSTEMS - The present invention relates to an automatic test system for a digital display system, which digital display system comprises display electronics configured to output a digital video stream, and a display screen connected to the display electronics to receive the digital video stream generated thereby and to display at least one image based on the received digital video stream. The automatic test system is designed to be connected to the digital display system to receive the digital video stream generated by the display electronics, and is configured to: reconstruct in memory an image based on the received digital video stream; compute a signature of the reconstructed-in-memory image; and test the digital display system by comparing the computed signature with a reference signature so as to thereby check whether the reconstructed-in-memory image completely matches an expected good display behaviour, wherein said reference signature is indicative of said expected good display behaviour.10-04-2012
20120254662AUTOMATED TEST SYSTEM AND AUTOMATED TEST METHOD - The invention provides an automated test method for testing a server. In one embodiment, the server comprises a plurality of sensors, a preboot Dynamic System Analyzer (pDSA), and a Baseborad Management Controller (BMC). First, a connection is built with the server via a network. A remote control program is then used to display a user interface of the pDSA on a screen. A keyboard-mouse automation program is then used to control a keyboard to perform a series of keyboard control operations and control a mouse to perform a series of mouse control operations for simulating user instructions. The remote control program is then used to send the keyboard control operations and the mouse control operations to the server via the network, thereby controlling the pDSA to perform testing of the sensors of the server to generate a test log.10-04-2012
20120185729TYPE AND RANGE PROPAGATION THROUGH DATA-FLOW MODELS - Systems and methods for type and range propagation through data flow models are provided. In one embodiment, a test generating system for processing data flow diagrams, the system comprises: a processor programmed to perform a test generation process; and at least one memory device coupled to the processor, the at least one memory device including a data flow diagram. The test generation process computes range information and data type information for outputs of one or more functional blocks defined by the data flow diagram by applying transformations to input range information for inputs of each of the one or more functional blocks. The transformations are at least in part performed by applying specific mathematical and functional effects that are pre-defined for each of the one or more functional blocks based on block type.07-19-2012
20120084604Automation system for testing and measurement of system and device parameters, and control and automation of systems - A system and apparatus which allows for superior testing and measurement, as well as control and automation capabilities. This invention comprises a modular foundational system for automation that provides essential building blocks for a variety of test, measurement and internal/external control demands. The essentials include IEEE-488 communications capability which matches the caliber of large test stand, thus providing a configurable system that possesses great capabilities in test, measurement and automation, without prohibitive cost and complexities for the user. The platform described herein is also well suited for portable applications as the system does not occupy a significant amount of space.04-05-2012
20120221895SYSTEMS AND METHODS FOR COMPETITIVE STIMULUS-RESPONSE TEST SCORING - Systems and methods for competitively scoring a stimulus-response test are disclosed. Competitive scoring may be based upon: i) a combination of response time and response type (e.g., false start, coincident false start, fast, slow, lapse, timeout, etc.); ii) response time and response latency correction data (e.g., a latency correction parameter corresponding to the test-taker's test system); and iii) a composite score metric comprising any function, rule of categorization, classification system, scoring system and/or the like that can be applied to at least two stimulus-response rounds of one or more test takers to determine a score for each test-taker.08-30-2012
20120221896GENERATION OF REALISTIC FILE CONTENT CHANGES FOR DEDUPLICATION TESTING - Data to be processed through deduplication product testing is arranged into a single, continuous stream. At least one of a plurality of random modifications are applied to the arranged data in a self-similar pattern exhibiting scale invariance. A plurality of randomly sized subsets of the arranged data modified with the self-similar pattern is mapped into each of a plurality of randomly sized deduplication test files.08-30-2012
20120260130NON-VOLATILE RANDOM ACCESS MEMORY TEST SYSTEM AND METHOD - A computer and method test a non-volatile random access memory (NVRAM) of a basic input and output system (BIOS) chip of a motherboard under a diagnostic mode and a stress mode. The computer sets parameters of the diagnostic mode and parameters of the stress mode in a basic input and output system (BIOS) chip of the motherboard. The computer initializes the diagnostic mode according to the parameters of the diagnostic mode and the stress mode according to the parameters of the stress mode. The computer tests the NVRAM of the BIOS chip under the diagnostic mode and the stress mode.10-11-2012
20120260129SOFTWARE TESTING SUPPORTING HIGH REUSE OF TEST DATA - A software testing system and method provides full reuse of software tests and associated test data in a centralized shared repository, including enabling the full reuse of test assets including test actions, test scenarios, test data; and automation scripts. Reusable test components consisting of test steps and the type of test data needed by those test steps, are managed and maintained. These components are assembled into reusable components with no binding of test data until execution time, thereby treating the test data as a reusable asset. A reusable test is initially defined using only an indication of a type or category of data, and not bound to the actual data itself, until it is assembled into an executable immediately prior to automated or manual test execution.10-11-2012
20090019312System and Method for Providing an Instrumentation Service Using Dye Injection and Filtering in a SIP Application Server Environment - An instrumentation service is described that uses dye injection and filtering in a Session Initiation Protocol (SIP) application server environment. The instrumentation service can provide a flexible mechanism for selectively adding diagnostic code to the SIP application server and the various applications running on it. It can allow flexible selection of locations in the server and application code, at which instrumentation code can be added. The process of adding diagnostic code can be deferred to the time of running the server at the deployment site. The instrumentation service further allows flexible selection of diagnostic actions, which can be executed at selected locations. In various embodiments, the execution of diagnostic code can be dynamically enabled or disabled while the server is running. Also, the behavior of diagnostic code executed at such locations can be dynamically changed while the server is running.01-15-2009
20110131450USING SYNCHRONIZED EVENT TYPES FOR TESTING AN APPLICATION - Embodiments are described for using synchronized event types in testing an application configured to be executed on multiple types of networked devices. The method can include playing a macro containing recorded application events to be applied to the application for testing. The recorded application events can be stored in a macro queue during playback. Further, order independent events can be identified in the macro queue, which precede an order dependent event. This enables identified order independent events to be removed. In addition, an order dependent event in the macro queue can be removed after order independent events preceding the order dependent events are removed. Then the order dependent event from the macro queue can be played after the order dependent event has been removed from the macro queue.06-02-2011
20120324289METHOD AND APPARATUS FOR TESTING DATA WAREHOUSES - Disclosed is a method of qualifying a change to software modules in a data warehouse comprising a database storing a plurality of data sets and said plurality of warehouse software modules, the method comprising determining if a change has been made to any of the software modules; selecting the software modules which are affiliated with the change to construct a reduced schedule of software modules; identifying the tests which are affiliated with the change to thereby identify a reduced set of tests; executing the reduced schedule of warehouse software; running the reduced set of tests; and if no warehouse software execution errors arise and no warehouse test execution errors or failures arise, qualifying the change to the one or more software modules as a success.12-20-2012
20120324288COMPUTING DEVICE AND METHOD FOR TESTING REDUNDANT ARRAY OF INDEPENDENT DISKS DEVICE - A computing device and method tests a redundant array of independent disks (RAID) device. The computing device controls a power supply device to cut off power of the RAID device, and controls the power supply device to provide the power to the RAID device after a predetermined time. The computing device reads an original test file from the RAID device and determines if the read file is identical to the original test file stored in the computing device. The computing device displays a test result of the RAID device on a display device of the computing device.12-20-2012
20120089871TEST SYSTEM - A test system includes at least one tested end and a testing end. The testing end establishes a connection with the tested end. A plurality of predetermined hardware model numbers and a plurality of predetermined hardware configuration files corresponding to the predetermined hardware model numbers are stored at the testing end. The testing end determines if a tested hardware model number of the tested end is one of the predetermined hardware model numbers. When the tested hardware model number is one of the predetermined hardware model numbers, a tested hardware configuration file corresponding to the tested hardware model number is obtained from the predetermined hardware configuration files. The testing end generates at least one test item for the tested end in accordance with the tested hardware configuration file. The testing end performs the at least one test item on the tested end.04-12-2012
20120331346TEST APPARATUS AND TEST METHOD - A test apparatus that tests a device under test outputting a data signal and a clock signal indicating a timing at which the data signal is to be sampled, the test apparatus comprising a buffer section that buffers the data signal; a pattern generating section that, for each test period of the test apparatus, generates a control signal and an expected value of the data signal; a reading control section that, for each test period, reads the data signal from the buffer section on a condition that the control signal instructs the reading control section to read data from the buffer section; and a judging section that compares the data signal read by the reading control section to the expected value generated by the pattern generating section.12-27-2012
20110276830TEST MODULE AND TEST METHOD - There is provided a test module comprising a random number generator that generates a pseudo random pattern and includes a controller that generates a register selection signal based on a control instruction stored on an instruction memory, a plurality of polynomial configuration registers one of which is selected by the register selection signal, each polynomial configuration register having polynomial data stored therein, a plurality of initial value configuration registers one of which is selected by the register selection signal, each initial value configuration register having an initial value stored therein, and a random number generation shift register that loads the initial value from the selected one of the plurality of initial value configuration registers and sequentially generates the pseudo random pattern based on the polynomial data stored in the selected one of the plurality of polynomial configuration registers.11-10-2011
20120331345MEMORY TESTING SYSTEM AND METHOD OF COMPUTING DEVICE - In a memory testing method for testing a memory module of a computing device, an operating voltage of the memory module is adjusted to a first voltage or a second voltage. A predetermined data set is written into the memory module after the operating voltage of the memory module is adjusted, and the written data set is read out from the memory module, to accomplish a data writing and reading process of the memory module. A register value that presents how many memory errors have occurred during the data writing and reading process is acquired from an ECC register of the memory module, to determine whether the memory module is stable during the adjusting of the operating voltage according to the register value.12-27-2012
20130173961MEMORY-LEAK IDENTIFICATION - A memory-leak source in a data structure can be identified by counting insertions into the data structure and deletions from the data structure for locations in the execution path of a computer program. These insertion and deletion values can be used to identify at least one location as a memory-leak source that corresponds to an imbalance between insertions and deletions during the execution of the computer program.07-04-2013
20130179734Test Case Arrangment and Execution - Systems and methods for generating and traversing test cases trees are provided. A test case tree indicates an order of execution for multiple test cases, where setup and tear down or equivalent steps are not required before and after execution of each test case in the tree. The tree may allow for generation of virtual test cases to encompass multiple test cases which ordinarily would have mutually exclusive execution requirements.07-11-2013
20120254663SEMICONDUCTOR MEMORY DEVICE AND INFORMATION PROCESSING APPARATUS INCLUDING THE SAME - A semiconductor memory device is disclosed that includes an ODT circuit configured to be connected to a bus which transmits a data signal or a data strobe signal between a memory block and an input-output terminal; a first switch configured to be inserted into the bus between the memory block and the ODT circuit; a mode controller configured to switch off the first switch during a test of the memory block; and an oscillator configured to be connected to the ODT circuit, wherein a test signal is supplied to the ODT circuit from the oscillator during the test of the memory block.10-04-2012
20120254661METHOD AND SYSTEM FOR UPDATING DEVICE MANAGEMENT APPLICATION METER READ LOGIC - The disclosure relates to a computerized method and system for automatically updating a device management application with meter retrieval logic that is customized to the device mix in a managed environment. The management application would interrogate the environment and make intelligent decisions on what meter logic to implement. The management application would self adapt and retrieve the correct meter logic as the environment changes. This adaptation is not tied to product names or other identification methods, rather using rules associated with queries and responses the meter read logic is altered to the device mix. The method would first try submitting small test jobs and seeing if the known meter read logics produced the correct meter increment. If this does not confirm, the system then interprets the query of the private portion of the MIB or the web server to determine where the correct increment is located.10-04-2012
20130103986SYSTEMS AND METHODS FOR FUNCTIONAL TESTING USING LEVERAGED DYNAMIC LINKED LIBRARIES - A method for functional testing of a power device with an associated software control system includes referencing a dynamic linked library (DLL) file belonging to a software package via a method of a class; instantiating an object of the class in functional testing software; and including a call to the method of the object in the functional testing software, wherein the call to the method executes a function of the referenced DLL, such that the referenced DLL comprises an implementation of the class.04-25-2013
20130103985METHOD FOR SIMULTANEOUSLY PERFORMING DIAGNOSING AND IMAGE DOWNLOADING OF A CUSTOM-CONFIGURED COMPUTER AND COMPUTER SYSTEM THEREOF - A method for simultaneously performing diagnosing and image downloading of a custom-configured computer is disclosed. The method includes receiving a shipping image, extracting the shipping image into a hard disk drive, partitioning a portion in a unused storage space of the hard disk drive, installing a test operating system in the portion of the hard disk drive, deleting all data corresponding to the shipping image of the hard disk drive, writing storage data of the hard disk drive into a shipping hard disk drive of at least one custom-configured computer, writing data corresponding to the shipping image in a network server into the shipping hard disk drive during the test operating system performs diagnosing of the custom-configured computer, and writing a master boot record corresponding to the shipping image into the shipping hard disk drive.04-25-2013
20130132774AUTOMATED TESTING OF APPLICATIONS IN CLOUD COMPUTER SYSTEMS - A system and method for performing automated testing of an application in a cloud environment. A controller initializes an manages a number of virtual machines (VM), each VM including a test engine. The controller retrieves configuration data, determines a number of VMs to deploy, and initializes the VMs. The controller manages each VM by providing test commands and monitoring the results. Each VM receives and executes the test commands. The system may be used to test interactive applications or non-interactive applications.05-23-2013
20100281302Memory Having an ECC System - An error correction code system for a memory is provided. The memory is provided with a parity array that is directly accessible. An embodiment of the error correction code system includes writing and reading test data directly to the parity array. The data read from the parity array is compared with the test data written to the parity array to detect errors.11-04-2010
20110239047Circuit operation verification system and verification environment creation method - A circuit operation verification system has: a computer; a programmable logic device in which a device under test is configured; and a test bench section configured to perform operation verification of the device under test. The test bench section has: a software section that is implemented by the computer executing software; and a hardware section configured in the programmable logic device together with the device under test. The hardware section has a hardware function that generates a test pattern and inputs the test pattern to the device under test to perform the operation verification. The hardware function is controllable by changing a control parameter, and the software section variably sets the control parameter.09-29-2011
20130151905Testing A Network Using Randomly Distributed Commands - Methods and test systems for testing a network. A test system may emulate a plurality of users, each emulated user executing a user activity. Each emulated user activity may include one or more commands. At least some emulated user activities may include a command randomly selected from a predefined command pool in accordance with an associated probability distribution. The test system may report a result of emulating the plurality of users.06-13-2013
20100318849RUNTIME BEHAVIOR ALTERATION USING BEHAVIOR INJECTION HARNESS - Behavior Request is passed by a behavior injection harness specifying a particular behavior point, component, configuration or machine state, iteration (or sequence) to execute, product-independent atomic operation or to send data to be consumed by product code. Behavior requests can be configured and passed to a product process during runtime to change the state of a thread without affecting rest of deployment or configuration.12-16-2010
20120284566END TO END EMAIL MONITOR - A disclosed example method to monitor an email system involves sending a test email to an email server. The email server is to automatically forward the test email to a plurality of email accounts of corresponding domains different from one another and different from the email system. When the test email does not arrive at the plurality of email accounts within a time period, a notification identifying the email server is generated. Other test emails are distinguished from the test email based on checksum values in subject fields of the test email and the other test emails. The other test emails correspond to different ones of a plurality of other email systems being tested for operability. Each checksum uniquely identifies a respective one of the test emails and a respective one of the email systems.11-08-2012
20120284565File System for a Stage Lighting Array System - A file system for a stage lighting system that maintains the different files associated with the stage lighting system. Each of the files that can represent an effect are maintained within the system within a configuration file. The configuration file can be updated on each start of the system so that the system can maintain information indicative of current configuration files. A test mode can also be entered in which a pre-formed show can be tested against the current state of the configuration files.11-08-2012
20130159772Verifying Speculative Multithreading In An Application - Verifying speculative multithreading in an application executing in a computing system, including: executing one or more test instructions serially thereby producing a serial result, including insuring that all data dependencies among the test instructions are satisfied; executing the test instructions speculatively in a plurality of threads thereby producing a speculative result; and determining whether a speculative multithreading error exists including: comparing the serial result to the speculative result and, if the serial result does not match the speculative result, determining that a speculative multithreading error exists.06-20-2013
20130159773INFORMATION PROCESSING APPARATUS AND OPERATION STATUS MONITORING METHOD - An information processing apparatus includes a plurality of controller modules capable of performing communications with each other, and a memory included in each controller module to be stored with status information reflecting a status of an error occurring during the communications with other controller modules with respect to the controller module of a communication partner apparatus and/or the controller module of the self-apparatus, wherein, when determining whether or not a fault occurs in a certain controller module in the plurality of controller modules, the controller module different from a determination target controller module determines, based on status information of the determination target controller module that is stored on the memories of two or more controller modules different from the determination target controller module, whether the fault occurs in the determination target controller module.06-20-2013
20110314334AUTOMATED REGRESSION FAILURE MANAGEMENT SYSTEM - In a first embodiment of the present invention, a method for performing regression testing on a simulated hardware is provided, the method comprising: scanning a defect database for fixed signatures; retrieving all tests in a failing instance database that correspond to the fixed signatures from the defect database; running one or more of the retrieved tests; determining if any of the retrieved tests failed during running; and for any retrieved test that failed during running, refiling the failed retrieved tests in the failing instance database and placing one or more generalized signatures for the failed retrieved tests in the defect database.12-22-2011
20130191688TROUBLESHOOTING ROUTING TOPOLOGY BASED ON A REFERENCE TOPOLOGY - In one embodiment, a computing device (e.g., border router or network management server) transmits a discovery message into a computer network, such as in response to a given trigger. In response to the discovery message, the device receives a unicast reply from each node of a plurality of nodes in the computer network, each reply having a neighbor list of a corresponding node and a selected parent node for the corresponding node. Based on the neighbor lists from the replies and a routing protocol shared by each of the plurality of nodes in the computer network, the device may create a reference topology for the computer network, and based on the selected parent nodes from the replies, may also determine a current topology of the computer network. Accordingly, the device may then compare the current topology to the reference topology to detect anomalies in the current topology.07-25-2013
20130198569METHOD OF EMBEDDING CONFIGURATION DATA IN A NON-CONFIGURATION DOCUMENT - Embodiments are directed to a method of embedding configuration files in a document generated by a system, with the configuration file including settings associated with the generation of the document. A particular embodiment is directed to the embedding of configuration files of a testing system in a report document generated by the testing system. The configuration file includes system settings and external settings in association with the test results documented in the report document. For example, a testing system can generate a PDF report document associated with a test performed, and embed configuration files into the PDF report document. The embedding of configurations files in the PDF document can be done by using standard embedding mechanisms already available in the PDF file format and supported by most PDF viewing tools. The embedding of the configuration file can be performed automatically when the report document is generated.08-01-2013
20130198568System And Method For Test Case Generation Using Action Keywords - In an exemplary embodiment, a system includes a memory and a processor communicatively coupled to the memory. The processor is operable to receive a first indication that a first action keyword is selected from a plurality of action keywords and determine whether a first object requirement is associated with the first action keyword. The processor is further operable to retrieve a plurality of action objects and receive a second indication that a first action object is selected. The processor is also operable to receive a third indication that a second action keyword is selected and determine whether a first input parameter is associated with the second action keyword. The processor may also be operable to request a first user input, receive the first user input, generate a test case file comprising the first action keyword and the second action keyword, and associate the test case file with an application.08-01-2013
20130198567System And Method For Test Case Generation Using Components - In an exemplary embodiment, a system includes a memory and a processor communicatively coupled to the memory. The processor is operable to receive a first indication that a first component is selected from a plurality of components and receive a second indication that a second component is selected from the plurality of components. The processor is further operable to determine a first instruction associated with the first component, wherein the first instruction corresponds to first computer logic for executing the first at least one test action, and determine a second instruction associated with the second component, wherein the second instruction corresponds to second computer logic for executing the second at least one test action. The processor is also operable to generate a test case file comprising the first instruction and the second instruction and associate the test case file with an application under test.08-01-2013
20090210748METHODS AND SYSTEMS TO TEST AIRLINE INFORMATION SYSTEMS - Methods and systems to simulated a plurality of airline information systems (AISs) to test an AIS under test (AISUT), including to send and receive messages between the simulated AISs, and to send messages to and receive messages from the AISUT, in accordance with communication parameters associated with the corresponding AISs and AISUT. The AISUT and/or the simulated AISs may be stimulated to cause interaction with the AISUT, and resultant messages and information may be recorded. Stimulation may include controlling a web browser to interact with a web application of the AISUT. AISs may be represented as travel system objects, which may be associated with corresponding AIS-specific message handling and reporting parameters. Message processing logic may be configured to process messages, such as booking request messages, directed to a plurality of the simulated AISs, and the travel systems and the message processing logic may be modifiable independent of one another.08-20-2009
20120072773Panel Driving Circuit That Generates Panel Test Pattern and Panel Test Method Thereof - A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.03-22-2012
20120072772METHOD FOR DETECTING A FAILURE IN A SAS/SATA TOPOLOGY - A method for detecting a failure in a serial topology. The method may comprise sending a predetermined pattern to a plurality of devices communicatively connected to an initiator in a serial topology; receiving a return result from each of the plurality of devices in response to the predetermined pattern; recognizing a problem associated with a particular device among the plurality of devices, the problem being recognized based on the return result from the particular device; sending a plurality of test patterns to the particular device; receiving a plurality of test results from the particular device in response to the plurality of test patterns; and determining a cause of the problem based on the plurality of test results, the cause of the problem being at least one of: a cable failure and a device failure.03-22-2012
20130091383Serialized Error Injection Into a Function Under Test - Method, system, and computer program product embodiments for triggering error injection into a function under test using a serialization resource are provided. A test process invokes the function under test immediately after relinquishing exclusive control of the serialization resource. An error-injection process injects the error into the running function after gaining exclusive control of the serialization resource from the test process. The error-injection process may add a delay to inject the error. If the processes are repeated, the error-injection process may vary the delay, perhaps randomly, over a specified time window to thoroughly exercise the function's error recovery routine.04-11-2013
20130091382Modeling Test Space for System behavior with Optional Variable combinations - A method for modeling a test space is provided. The method comprises defining a coverage model including: one or more variables, wherein respective values for the variables are assigned, and one or more definitions for value combinations for said variables with assigned values, wherein at least one of said value combinations is defined as optional, and zero or more other said value combinations are defined as forbidden or mandatory for purpose of generating test scenarios to test a system for which the coverage model is defined.04-11-2013
20130212435Integrated Fuzzing - Integrated fuzzing techniques are described. A fuzzing system may employ a container configured as a separate component that can host different target pages to implement fuzzing for an application. A hosted target file is loaded as a subcomponent of the container and parsed to recognize functionality of the application invoked by the file. In at least some embodiments, this involves building a document object model (DOM) for a browser page and determining DOM interfaces of a browser to call based on the page DOM. The container then operates to systematically invoke the recognized functionality to cause and detect failures. Additionally, the container may operate to perform iterative fuzzing with multiple test files in an automation mode. Log files may be created to describe the testing and enable both self-contained replaying of failures and coverage analysis for multiple test runs.08-15-2013

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