Class / Patent application number | Description | Number of patent applications / Date published |
714031000 | Additional processor for in-system fault locating (e.g., distributed diagnosis program) | 28 |
20080244314 | FAILURE INFORMATION DELIVERY SYSTEM, FAILURE MANAGEMENT SERVER, MOBILE OBJECT COMMUNICATION APPARATUS, FAILURE INFORMATION DELIVERY METHOD, AND PROGRAM - Upon detecting existence of characteristic information of a failure, of which search is requested, a mobile terminal device | 10-02-2008 |
20080256391 | Apparatus to Use Fabric Initialization to Test Functionality of all Inter-Chip Paths Between Processors in System - A method, apparatus, and program for systematically testing the functionality of all connections in a multi-tiered bus system that connects a large number of processors. Each bus controller is instructed to send a test version of a snoop request to all of the other processors and to wait for the replies. If a connection is bad, the port associated with that connection will time out. Detection of a time-out will cause the initialization process to be halted until the problem can be isolated and resolved. | 10-16-2008 |
20080263401 | COMPUTER APPLICATION PERFORMANCE OPTIMIZATION SYSTEM - A complex user-facing computer application often has run-time dependencies on other computer applications. The other computer applications may, in turn, have run-time dependencies on still other applications. A supporting application might run on multiple hosts and a particular host might be chosen by a higher-level application in order to meet requirements such load balancing or reliability. In order to facilitate intelligent choices by higher-level applications in the system, each server in the system is responsible for generating a performance capability or health score that reflects the health of local components and the health of all servers on which the given server has a direct run-time dependency. A particular server's generated health score is advertised to any other server that has a direct run-time dependency on the particular server. Decisions about which of alternative lower-level servers to use in a servicing a client request are made using a routing or hop-at-a-time approach. | 10-23-2008 |
20090044056 | MAINTENANCE MANAGEMENT SYSTEM, DATABASE SERVER, MAINTENANCE MANAGEMENT PROGRAM, AND MAINTENANCE MANAGEMENT METHOD - A maintenance management system according to the present invention has an electronic device and a database server. In one embodiment of the invention, the electronic device further includes: (1) a log generating unit for collecting states of components and generating a log when a failure is detected during execution of a process; (2) a DB inquiry unit for transmitting the log to the database server and making an inquiry about whether firmware capable of solving the failure exists; and (3) an updating process unit for obtaining firmware capable of solving the failure from the database server and updating firmware in the electronic device with the obtained firmware. In addition, the database server further includes: a storing unit for storing a database having version information of firmware and failure correction information; and an inquiry responding unit for identifying when firmware for solving the failure exists. | 02-12-2009 |
20090106591 | SYSTEM AND METHOD FOR ON-BOARD DIAGNOSTICS OF MEMORY MODULES - A memory hub includes an on-board diagnostic engine through which diagnostic testing and evaluation of the memory system can be performed. The memory hub includes a link interface for receiving memory requests for access to memory devices of the memory system and a memory device interface coupled to the memory devices for coupling memory requests to the memory devices. A memory hub diagnostic engine is coupled through a switch to the link interface and the memory device interface to perform diagnostic testing of the memory system. The diagnostic engine includes a maintenance port that provides access to results of the diagnostic testing and through which diagnostic testing commands can be received. | 04-23-2009 |
20090210747 | FAULT ISOLATION SYSTEM AND METHOD - A mechanism for isolating failures in a digital system is provided. In one embodiment, a fault table is defined for each unit in the system. Related faults are ordered within the table to reflect the time-order in which the faults would be activated during operation of the associated unit. When multiple related faults are reported for a given unit in the system, the fault that is first located when a linear search of the corresponding fault table is conducted is considered the source of the failure within the unit. If faults are reported for multiple units, the source of the failure for the system is identified using at least one of primary and second priority values assigned to the faults, timestamps obtained when the faults are reported, and an order in which the faults are logged. | 08-20-2009 |
20090240985 | METHOD AND SYSTEM FOR MONITORING A COMPUTING DEVICE - In general, in one aspect, the invention relates to a method for monitoring a computing device, that includes receiving, by a data collector, a plurality of system messages from a system controller, wherein the data collector is wired to a serial port component of the system controller, wherein the system controller is factory preconfigured to automatically send the plurality of system messages via the serial port when the data collector is connected to the serial port, wherein the computing device comprises the system controller, and wherein the data collector is independent of the computing device. The method further includes storing data from the plurality of system messages on the data collector, receiving, by the data collector, a data transmit request, and wirelessly transmitting, by the data collector, the data to a field receiver. | 09-24-2009 |
20090259889 | TEST DEVICE AND METHOD FOR HIERARCHICAL TEST ARCHITECTURE - A test device for a hierarchical test architecture is disclosed. The architecture includes cores for plural test layers, a top-level data register, and a top-level test controller. Cores for each test layer are hierarchical test circuits. The top-level test controller retrieves plural control signals, controls the top-level data register based on first type control signals in the control signals, and controls each core based on second type control signals in the control signals. | 10-15-2009 |
20100229042 | METHOD AND APPARATUS FOR SYSTEM TESTING USING MULTIPLE PROCESSORS - An apparatus is provided for performing testing of at least a portion of a system under test via a Test Access Port (TAP) configured to access the system under test. The apparatus includes a first processor for executing instructions adapted for controlling testing of at least a portion of the system under test via the TAP, and a second processor for supporting an interface to the TAP. The first processor is configured for detecting, during execution of the test instructions, TAP-related instructions associated with control of the TAP, and propagating the TAP-related instructions toward the second processor. The second processor is configured for receiving the TAP-related instructions detected by the first processor and processing the TAP-related instructions. The first processor is configured for performing at least one task contemporaneously with processing of the TAP-related instructions by the second processor. An associated method also is provided. | 09-09-2010 |
20110029814 | TEST SYSTEM AND TEST METHOD THEREOF - A test system and a test method thereof. The test system includes an electronic device and a test device. The electronic device includes a plurality of output interfaces and provides a corresponding test signal via the output interfaces according to a group of operation commands. The test device includes a transforming unit, a multiplexer unit, a processor unit and a plurality of test interfaces which are respectively coupled to the output interfaces. The transforming unit transforms the test signals received via the test interfaces. The multiplexer unit selects the transformed test signals. The processor unit controls the multiplexer unit to select one of the transformed test signals, and determines whether the transformed test signal being selected conforms a predetermine condition for generating a test result signal. The processor unit controls the communication unit to transmit the test result signal to the electronic device according to the test result signal. | 02-03-2011 |
20110055632 | Wireless Diagnostic System - Results of field testing of portions of a distributed system such as a Broadband Communications System from a testing device to a controller which downloads programmed test protocols and sequences thereof to the separate testing device over a wired or wireless link and thereafter can be used to control the testing device as well as display test results and provide analysis of the test results and suggest procedures to technical personnel. The controller then can transmit the test data to a central facility or distribution hub in substantially real-time together with work performance data where full technical analysis can be performed. The test data and results of analysis can then be distributed as desired such as to a management analysis facility to support improvement of efficiency of the system and the operation thereof. | 03-03-2011 |
20110083042 | Touch Control Device and Controller, Testing Method and System of the Same - A testing method for testing a touch control device is disclosed. In a controller of the touch control device, a processor executes an operating firmware to realize a touch control function. The testing method includes a host testing device outputting a test requirement command to the controller, the controller outputting data corresponding to an operating stage selected from a plurality of operating stages of executing the operating firmware to the host testing device according to the test requirement command, and the host testing device determining an operating status of the touch device according to data provided by the touch control device. | 04-07-2011 |
20110231706 | System for Verifying Multimedia Players - Disclosed is a system for verifying a multimedia player. The system includes a multimedia player, a verification mechanism, a serial number generator, an audio and video data unit and a test mechanism. The multimedia player includes a communication interface and a storage unit. The verification mechanism includes a communication interface connected to the communication interface of the multimedia player. The serial number generator is connected to the communication interface of the verification mechanism. The audio and video data unit is connected to the communication interface of the verification mechanism. The test mechanism is connected to the communication interface of the multimedia player. | 09-22-2011 |
20110246828 | Memory Checkpointing Using A Co-Located Processor and Service Processor - A system and method is shown that includes a processor operatively connected to a memory, the processor to include a memory controller to control access to the memory. The system and method also includes a service processor, co-located on a common board and operatively connected to the processor and the memory, the service processor to include an additional memory controller to control access to the memory as part of a checkpoint regime. | 10-06-2011 |
20120096315 | MICRO CONTROLLER, DRIVING METHOD THEREOF AND DISPLAY DEVICE USING THE SAME - A micro controller includes an input and output unit having a reset terminal, a plurality of input terminals, and a test enable terminal, a test mode setting unit which allocates a first input terminal of the plurality of input terminals to a test clock terminal and allocates the remaining N input terminals to L test terminals, in response to a signal output from the input and output unit, and a processor which controls the input and output unit and the test mode setting unit. The test mode setting unit includes M flip-flops which receives a test clock signal from the first input terminal, a test signal from the N input terminals, and a test enable signal from the test enable terminal, and a decoder which decodes a signal output from the M flip-flops and determines whether or not to allocate the N input terminals to the L test terminals. | 04-19-2012 |
20120284564 | Topology Independent Network-Based Automation Infrastructure - An automation process verifies that a test bed includes a set of devices specified by at least one script which are to be executed by the automation process on the test bed. The test bed is locked and the set of devices is allocated to the automation process. Performance data collection and logging for the set of devices is started and the at least one script is executed on the set of devices. After executing the at least one script, the set of devices is de-allocated and the test bed is unlocked. A notification is generated indicating that the at least one script has been executed. | 11-08-2012 |
20130238934 | TEST METHOD FOR DISTRIBUTED PROCESSING SYSTEM AND DISTRIBUTED PROCESSING SYSTEM - A program on a plurality of processing units executes test input data. In the case where an error occurs so that processing of the program is not completed normally, it is determined that a test performed by using the input data failed. Meanwhile, in the case where an error does not occur so that processing of the program is completed normally, if the same feature pattern as that of the input data is stored in a storing unit which stores feature patterns of the executed input data, it is determined that the test performed by using the input data succeeded, while if the feature pattern is not stored in the storing unit, the result of the test performed by using the input data is judged based on the result of comparing the expected data with result data of the program. | 09-12-2013 |
20130339791 | DATA POLLING METHOD AND DIGITAL INSTRUMENTATION AND CONTROL SYSTEM FOR ATOMIC POWER PLANT USING THE METHOD - The CPU includes: a data transmission instruction output processor; a failure detection signal input processor to which a failure detection signal is input from a failure detection processor for detecting a failure of an input unit; a data storage memory for, each time an input data update processor of the input unit updates data, storing the updated data; and a CPU operation processor for obtaining input data from the data storage memory and obtaining a detection signal from the failure detection signal input processor to perform operation processing. The CPU operation processor obtains periodic data as of an amount of time given by the following expression ago: | 12-19-2013 |
20140089736 | DISTRIBUTED SYSTEM, SERVER COMPUTER, DISTRIBUTED MANAGEMENT SERVER, AND FAILURE PREVENTION METHOD - A distributed system according to an exemplary embodiment includes first and second servers capable of executing the same application, wherein when a failure occurs in the application in the first server, the first server generates failure information identifying a cause of the failure in the application, and the second server performs failure prevention processing which is determined based on the failure information and intended to prevent a failure in the application. | 03-27-2014 |
20140215271 | ALLOCATING TEST CAPACITY FROM CLOUD SYSTEMS - Allocating test capacity from cloud systems can include identifying a product to be tested. Allocating test capacity from cloud systems can include automatically allocating a test capacity during runtime in response to the identification, the test capacity being provided by a test controller coupled to a cloud system. | 07-31-2014 |
20140223236 | DEVICE FOR TESTING A GRAPHICS CARD - A device for testing a graphics card is presented. The device includes a core test apparatus. The core test apparatus includes a processor configured to perform a test operation on a graphics card and a power interface for transferring electric energy to the core test apparatus. Using the device for testing a graphics card provided by the present invention makes a graphics card test easier and more efficient. | 08-07-2014 |
20140250328 | TEST DEVICE AND METHOD - A test device is provided for testing a device under test (DUT) having a control interface compliant with a standard selected from a plurality of standards each supporting a common set of management data input/output (MDIO) and non-MDIO control signals. The test device includes a test interface and an integrated control interface. The integrated control interface adapts to the standard with which the control interface of the DUT complies, so that the integrated control interface directly and fully controls the DUT via at least the common set of MDIO and non-MDIO control signals. The integrated control interface exchanges control signals selected from the common set of MDIO and non-MDIO control signals with the control interface of the DUT to monitor the DUT and thereby obtain status information about the DUT. | 09-04-2014 |
20140289560 | APPARATUS AND METHOD FOR SPECIFYING A FAILURE PART IN A COMMUNICATION NETWORK - A monitoring device specifies a failure part in a first device group including a plurality of information processing devices and a relay device relaying access of the plurality of information processing devices. The monitoring device includes a determination unit and a test controller. The determination unit determines whether one or more destination addresses of information transmitted from the relay device to outside of the first device group, include an address of a storage device included in a second device group connected to the first device group through the relay device, where the storage device is a destination of access of at least one of the plurality of information processing devices. The test controller causes one of the plurality of information processing devices to execute a communication test with respect to the address of the storage device. | 09-25-2014 |
20140351643 | SMART TERMINAL FUZZING APPARATUS AND METHOD USING MULTI-NODE STRUCTURE - The present invention relates to a smart terminal fuzzing apparatus and method using a multi-node structure. The smart terminal fuzzing apparatus includes a fuzzing command management unit for managing fuzzing instructions corresponding to performance of fuzzing. An algorithm management unit creates fuzzing commands based on the fuzzing instructions, and distributes the fuzzing commands to a plurality of fuzzing nodes connected to a fuzzing client depending on a distribution algorithm. A fuzzing client management unit performs control such that fuzzing is performed by the plurality of fuzzing nodes in compliance with the fuzzing commands through the fuzzing client. A log management unit receives results of performance of fuzzing from the plurality of fuzzing nodes and manages the fuzzing results. | 11-27-2014 |
20140359360 | METHOD AND APPARATUS FOR A REMOTE MODULAR TEST SYSTEM - Certain embodiments generally relate to equipment under test measurements and reports, such as, but not limited to methods and apparatuses for a remote modular test system. For example, the method may include determining a test strategy (TS) file based on input from cloud-based equipment under test questionnaire and a cloud-based standards library. The method may also include reading the TS via a system controller. The method may further include configuring test hardware, for example, analyzers and power meters via a test RF system interface based on the read TS. The method may also include sequentially executing the TS based on the configuring. The method may further include generating a test document comprising result data. The method may also include uploading and processing the generated test document in the cloud. The method may further include grouping and compiling the generated test document in a predetermined layout. | 12-04-2014 |
20150012779 | Method for Fault Recognition in a System of Systems - A method for fault recognition in a distributed real-time computer system comprising fault containment units (FCUs), which has a global timebase, wherein the fault containment units communicate by means of messages via at least one message distribution unit, wherein a commitment time is associated with a message formed by a fault containment unit, and wherein a message distribution unit that receives a message relays the message to one or more fault containment units operating in parallel, and wherein a processing fault containment unit (VFCU) does not transmit or use any of its results that are influenced by one or more of the received messages to the environment of the processing fault containment unit before the commitment times associated with the received messages. | 01-08-2015 |
20150089290 | DERIVATION OF GENERALIZED TEST CASES - A first computer receives one or more pre-defined equivalence classes, wherein a pre-defined equivalence class comprises of one or more substantially equivalent values. The first computer receives a plurality of messages transmitted between a second computer and a third computer, wherein each message has at least one parameter and each parameter has at least one corresponding value. The first computer determines one or more parameters have one or more values that match one or more values of a pre-defined equivalence class. The first computer creates one or more value driven equivalence classes, wherein each value driven equivalence class comprises of one or more parameters and wherein each of the one or more parameters in each value driven equivalence class has the same corresponding value. The first computer creates a generalized test case, wherein the generalized test case includes at least the one or more value driven equivalence classes. | 03-26-2015 |
20160253252 | TESTING FRONT END MODULES, TESTING METHODS AND MODULAR TESTING SYSTEMS FOR TESTING ELECTRONIC EQUIPMENT | 09-01-2016 |