Class / Patent application number | Description | Number of patent applications / Date published |
714022000 | With power supply status monitoring | 16 |
20080244311 | System and Method for Thresholding System Power Loss Notifications in a Data Processing System Based on Vital Product Data - A system and method for thresholding system power loss notifications in a data processing system are provided. Power loss detection modules are provided in a data processing system having one or more data processing devices, such as blades in an IBM BladeCenter® chassis. The power loss detection modules detect the type of infrastructure of the data processing system, a position of a corresponding data processing device within the data processing system, and a capability of the data processing system to provide power during a power loss scenario. The detection module detects various inputs identifying these types of data processing system and power system characteristics and provides logic for defining a set of behaviors during a power loss scenario, e.g., behaviors for sending system notifications of imminent power loss. The detection of the various inputs and the defining of a set of behaviors may be performed statically and/or dynamically. | 10-02-2008 |
20080301497 | Testing Apparatus, System, and Method for Testing at Least One Device with a Connection Interface - A system, a testing apparatus, and a method for testing at least one device with a connection interface are provided. The system comprises a host, a testing apparatus, and a power supply. The testing apparatus further comprises a microprocessor and at least one current limit module. The host sending a test signal. The power supply provides a voltage to the testing apparatus. The at least one current limit module of the testing apparatus, which is electrically connected to the microprocessor, the at least one device, and the power supply, provides the voltage to the at least one device. When the current passing through the at least one device is greater than the predetermined value, the at least one current limit module of the testing apparatus stops providing the voltage to the at least one device and sends an over current signal to the host via the microprocessor. | 12-04-2008 |
20100169710 | DELTA CHECKPOINTS FOR A NON-VOLATILE MEMORY INDIRECTION TABLE - According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event. | 07-01-2010 |
20110276827 | DELTA CHECKPOINTS FOR A NON-VOLATILE MEMORY INDIRECTION TABLE - According to some embodiments, delta checkpoints are provided for a non-volatile memory indirection table to facilitate a recovery process after a power loss event. | 11-10-2011 |
20120072771 | Fast, Non-Write-Cycle-Limited Persistent Memory for Secure Containers - Techniques for providing fast, non-write-cycle-limited persistent memory within secure containers, while maintaining the security of the secure containers, are described herein. The secure containers may reside within respective computing devices (e.g., desktop computers, laptop computers, etc.) and may include both volatile storage (e.g., Random Access Memory (RAM), etc.) and non-volatile storage (NVRAM, etc.). In addition, the secure containers may couple to auxiliary power supplies that are located externally thereto and that power the secure containers at least temporarily in the event of a power failure. These auxiliary power supplies may be implemented as short-term power sources, such as capacitors, batteries, or any other suitable power supplies. | 03-22-2012 |
20120151262 | STORAGE APPARATUS AND METHOD OF DETECTING POWER FAILURE IN STORAGE APPARATUS - A storage apparatus includes a drive unit device including a plurality of storage drives, a drive interface unit and a power supply unit, the storage drives being configured to provide a physical storage area for creating a logical storage area to be used by an external apparatus, the drive interface unit being configured to input and output data to and from the storage drives, the power supply unit being configured to supply operation power to the storage drives and the drive interface unit, a storage controller including a plurality of processing units and a drive control interface unit, the processing units being configured to perform a data input/output process via the drive interface unit, the data input/output process including a process of writing data from the external apparatus into the storage drives and a process of reading data out of the storage drives, the drive control interface unit being configured to issue a command to the drive interface unit in response to a request from each of the processing units, a failure existence/non-existence recording part configured to record, for every attempt of each of the plurality of the processing units to perform the data input/output process via a plurality of data paths which are communication paths for performing data transfer to and from the drive interface unit of the drive unit device, whether the relevant data input/output process was successful for each of the data paths, and a failure detection unit configured to perform a power failure detection process which, in a case where one of the plurality of processing units has determined that the data input/output process with the drive interface unit has not been performed successfully, determines whether a result of the data input/output process performed by each of the other processing units has been recorded in the failure existence/non-existence recording part within a predetermined period of time after an abnormality of the relevant data input/output process has been recorded in the failure existence/non-existence recording part, and, in a case where the first processing unit which has detected the abnormality in the data input/output process has determined that the data input/output process abnormality is recorded in the failure existence/non-existence recording part for all the data paths, provides an instruction to stop the data input/output processes to the drive unit device in which the data input/output process abnormality has been detected and other drive unit devices coupled downstream of the relevant drive unit device. | 06-14-2012 |
20120210169 | POWER FAILURE MANAGEMENT IN COMPONENTS OF STORAGE AREA NETWORK - A storage area network (SAN) is provided with redundancy and recovery mechanism. A primary storage switch performs dynamic address translation between logical storage addresses received from host devices and physical addresses of SAN storage arrays. When power failure in the primary storage switch is detected, metadata associated with the dynamic address translation operation is sent to a secondary storage switch via a network connection to provide the dynamic address translation in lieu of the primary storage switch. A storage array experiencing power failure similarly sends cached data to another storage array via a network connection so that the other storage array can substitute the failed storage array. During the power failure, a data backup module in the primary storage switch or the storage array is powered by a temporary power source. | 08-16-2012 |
20140115390 | POWER FAILURE MANAGEMENT IN COMPONENTS OF STORAGE AREA NETWORK - A storage area network (SAN) is provided with redundancy and recovery mechanism. A primary storage switch performs dynamic address translation between logical storage addresses received from host devices and physical addresses of SAN storage arrays. When power failure in the primary storage switch is detected, metadata associated with the dynamic address translation operation is sent to a secondary storage switch via a network connection to provide the dynamic address translation in lieu of the primary storage switch. A storage array experiencing power failure similarly sends cached data to another storage array via a network connection so that the other storage array can substitute the failed storage array. During the power failure, a data backup module in the primary storage switch or the storage array is powered by a temporary power source. | 04-24-2014 |
20140223231 | SOLID STATE DRIVE MANAGEMENT IN POWER LOSS RECOVERY - Embodiments of the present disclosure describe devices, methods, computer-readable media and systems configurations for solid state drive management in power loss recovery. Other embodiments may be described and/or claimed. | 08-07-2014 |
20140223232 | MOBILE TERMINAL AND METHOD FOR MANAGING THE FILE SYSTEM THEREOF - A mobile terminal and a method for managing a file system thereof are provided. The method of managing a file system of a mobile terminal having a battery cover and a battery cover coupling unit includes sensing an interruption of contact at a portion of a contact area between the battery cover and the battery cover coupling unit, generating a metadata list including metadata on data to be synchronized from among data cached in a volatile memory, after the sensing of the interruption of contact at the preset portion, sensing an interruption of contact at another portion of the contact area between the battery cover and the battery cover coupling unit after the previous sensing, and storing the metadata of the metadata list in a non-volatile memory, if the interval between the sensing operations is less than or equal to a threshold value. | 08-07-2014 |
20140250327 | NETWORK POWERED DEVICE - Example embodiments disclosed herein relate to determining whether power is supplied at a power level to a network powered device. A network connector can be used to provide power and communications to the network powered device. The network powered device can represent itself to power sourcing equipment as a device using power at the power level. An indicator indicates whether power is supplied at the power level. | 09-04-2014 |
20150052397 | MEMORY SYSTEM AND CONTROLLING METHOD OF MEMORY SYSTEM - According to one embodiment, when being notified of an interruption of an external electric power supply, a second processor performs a saving operation for storing management information and data stored in a first volatile memory to a first non-volatile memory, and records a progress log, indicating a progress of the saving operation, into a second volatile memory. The first processor periodically checks whether the progress log is recorded in the second volatile memory or not, and when the progress log is recorded in the second volatile memory, the first processor stores the progress log into the second non-volatile memory. | 02-19-2015 |
20150100824 | Power Sequencing and Data Hardening Architecture - The various implementations described herein include systems, methods and/or devices used to enable power sequencing and a data hardening module in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is lower than an under-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is lower than the under-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device. | 04-09-2015 |
20150149825 | Power Fail Latching Based on Monitoring Multiple Power Supply Voltages in a Storage Device - The various embodiments described herein include systems, methods and/or devices used to enable power fail latching based on monitoring multiple power supply voltages in a storage device. In one aspect, the method includes: (1) determining whether a first power supply voltage provided to the storage device is out of range for a first time period, (2) determining whether a second power supply voltage provided to the storage device is out of range for a second time period, and (3) in accordance with a determination that at least one of the first power supply voltage is out of range for the first time period and the second power supply voltage is out of range for the second time period, latching a power fail condition. | 05-28-2015 |
20160062814 | ERROR RESPONSE CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND DATA TRANSFER CONTROL METHOD - In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit section changing from a first power consumption state to a second power consumption state in which power consumption is lower than power consumption in the first power consumption state. A switching circuit unit transmits the error signal to the first circuit section in place of a response signal that is responsive to the command and transmitted from the second circuit section to the first circuit section. | 03-03-2016 |
20160077916 | SYSTEM AND METHOD FOR SYSTEM-ON-A-CHIP SUBSYSTEM EXTERNAL ACCESS DETECTION AND RECOVERY - Systems and methods for external access detection and recovery in a subsystem of a system-on-a-chip (SoC) in a portable computing device (PCD) are presented. In operation, a subsystem of the SoC is operated in an internal mode independently of the SoC while the SoC is in a low power state, such as a non-functional or zero power state or mode. The subsystem comprises a processor in communication with a memory, a sensor, and a monitor module. The monitor module detects when the processor of the subsystem requests access to a component external to the subsystem. In response to this detected request, the SoC is caused to enter into a full power state or mode, and the subsystem is caused to exit the internal mode of operation. | 03-17-2016 |