Class / Patent application number | Description | Number of patent applications / Date published |
713330000 | Power sequencing | 81 |
20080201595 | INTELLIGENT POWER CONTROL - An intelligent power control system for intelligently controlling startup and shutdown sequences of IT equipment to reduce peak power requirements is provided. The intelligent power control system sends an indication to power up to a power module connected to an electronic device. The system monitors the power consumption of the electronic device during startup, and determines when the electronic device has reached a peak level of power consumption. The system then powers up other devices based on the power consumption characteristics of each preceding device. The system may use similar techniques when shutting down devices or transitioning devices from a low-power state to a normal power state. Thus, the intelligent power control system establishes an order and timing for powering up or down electronic devices that improves the power consumption characteristics of the electronic devices and reduces the power requirements of the electronic devices allowing smaller, lighter, and less expensive power supplies and battery backup systems to be used. | 08-21-2008 |
20080244296 | COMPUTER SYSTEM FAULT DETECTION - A computer system is disclosed. The computer system includes a core processor, a power supply including a first output in power communication with the core processor, and a power switch in signal communication with the power supply for controlling a state of the first output. The computer system also includes a service processor in signal communication with the sub-system and power communication with a second output of the power supply and a back up power supply. In response to activation of the power switch and a fault of the second output, the service processor uses the back up power supply and a reduced power mode to detect the fault of the second output and generate a signal representative thereof to be displayed upon a light emitting diode display. | 10-02-2008 |
20080276110 | DISTRIBUTED POWER MANAGEMENT - A power management bus for controlling power over multiple device subsystems includes a master power bus controller which transmits power management information to control one or more power resources through a transmit interface. The transmitted information is received at one or more receive interfaces. A broadcast message can be transmitted to control multiple power resources by subsystem, resource group and resource type. A single address message can be transmitted to control a single power resource. A power down can be initiated at any of the receive interfaces. | 11-06-2008 |
20080294923 | SYSTEM AND METHOD FOR INTERFACING AN ELECTRONIC DEVICE WITH A HOST SYSTEM - The invention relates to a system and method for controlling interfacing parameters for a device when connected to a host is provided. The method comprises: monitoring for an initial connection by the device to the host; then, while the device is establishing the connection with the host, utilizing a communication bus controller contained in a microprocessor in the device to process communications with the host at a first data transmission rate; and after a predetermined condition, re-establishing the connection with the host using a second bus controller in the device that processes the communications at a second transmission rate that is higher the first data transmission rate. | 11-27-2008 |
20080313483 | Method and System for Power Management - The present invention relates to power management and, in particular, to a method and system for power management of computers and other mobile devices. The power management of the invention would enable meeting the present day demands of effective power management in smaller and cheaper computing devices including mobile computing devices such as palm top computers, smart phones, note book computers and the like. Importantly, the power management of the invention is directed to managing power resources and power states of power manageable computing system and peripheral devices/gadgets for its more efficient and cost effective application/use. | 12-18-2008 |
20090044034 | Power Control and Status Circuitry for Communicating Power on Reset Control and Status Via a Single Electrode - A system and method providing, via a single output electrode of an integrated circuit having internal circuitry, a status signal having time multiplexed states indicative of a power on reset condition for external circuitry following enablement of operations of portions of the internal circuitry, and further indicative of subsequent operation statuses of the internal circuitry portions. | 02-12-2009 |
20090070613 | Power supply sequencing distributed among multiple devices with linked operation - A system and method is provided to accomplish distributed power sequencing function of a large electronics system with minimum number of signals in the sequencing network without compromising the flexibility and expandability. In one embodiment of the invention, the power sequencing function is accomplished with two signals of the sequencing network: power_on/power_off signal and SEQ_LINK signal. The power_on/power_off signal controls whether the sequencing is in power_on mode for turning on power to multiple devices in a predetermined sequence or power_off mode for for turning off power to multiple devices in a reverse sequence. The SEQ_LINK signal controls when the sequence counters, located in each participating device, are allowed to count to the subsequent state. Each sequencing logic circuit of these participating devices responds to a predetermined sequence position to enable the power on or power off of the power supply it controls. | 03-12-2009 |
20090083564 | ELECTRONIC CIRCUIT AND ELECTRONIC DEVICE - An electronic circuit according to the present invention has one or more circuit sections which operate according to a variable power supply voltage and a variable clock frequency. In the electronic circuit, active information related to load and/or processing time which changes in real time from a control processing section included in the circuit section is output and, based on the active information, a voltage/frequency setting section which sets values of a power supply voltage and clock frequency is provided. The electronic circuit further includes a voltage controller which controls the power supply voltage to be supplied to the circuit section based on the voltage value set by the voltage/frequency setting section and a clock frequency controller which controls the clock frequency to be supplied to the circuit section based on the frequency value set by the voltage/frequency setting section. | 03-26-2009 |
20090125744 | Structure for a System and Method of Predicting Power Events in an Intermittent Power Environment and Dispatching Computational Operations of an Integrated Circuit Accordingly - A design structure for a system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation. | 05-14-2009 |
20090150702 | CONTROLLING AUXILIARY POWER TO LOGIC DEVICES - Various example implementations are disclosed. According to one example implementation, a system may include multiple logic devices, a power input, and a logic controller. The logic devices may each be configured to assert a request for auxiliary power to a logic controller. The power input may be configured to provide the auxiliary power to one or more of the logic devices. The logic controller may be configured to poll the logic devices by polling less than all of the logic devices at a time to determine whether the logic devices assert the request for the auxiliary power. | 06-11-2009 |
20090172452 | System and Method of Leakage Control in an Asynchronous System - Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage. | 07-02-2009 |
20090204837 | Power control system and method - An efficient and effective power control system method are described with expedited recovery from a reduced power state. In one embodiment, a present invention power control system includes performing a reduced power detection process for detecting a reduced power state, wherein the reduced power state is associated with an expedited recovery; performing a reduced power state entry process; performing a recovery detection process for detecting a recover indication event; and performing an expedited recovery process in accordance with detection of a recovery indication event. The reduced power state entry process comprises saving an expedited recovery information in registers of an always on domain and putting an external memory in self refresh mode to preserve a system context while a chip is turned off. The expedited recovery process comprises determining whether to proceed with the expedited recovery process; initializing memory controller registers and directing memory controller to exit self refresh; validating system context recovered from memory using keys stored in an always on domain; jumping to recovery instructions in memory; restoring operating system information and returning to operating system control. | 08-13-2009 |
20090210735 | APPARATUS, SYSTEM, AND METHOD FOR CONTROLLING POWER SEQUENCE IN A BLADE CENTER ENVIRONMENT - An apparatus, system, and method are disclosed for controlling power sequence in a blade center environment. A blade center environment has many devices requiring power. A relationship component module creates a topology of interdependent relationships of the devices. A monitor component module monitors commands to regulate power for devices. A validating module validates that the commands do not violate the interdependent relationships defined in the topology and returns a failure message if the command is not validated. | 08-20-2009 |
20090217072 | AUTOMATED ELECTRICAL POWER SAVINGS IN VIRTUALIZATION ENVIRONMENTS - Methods and apparatus, including computer program products, are provided for shutting down a host, such as a computer, server, and the like, to enable power savings. In one aspect, there is provided a computer-implemented method. The computer-implemented method includes determining whether to shutdown an application at a virtual machine. The determination is made using information from the application. The virtual machine and application operate on a host. A power management mechanism of the host may be initiated to enable a power savings when compared to not shutting down the host. Related apparatus, systems, methods, and articles are also described. | 08-27-2009 |
20090292936 | MICROCOMPUTER HAVING CPU AND PWM TIMER - A microcomputer includes: a CPU executing a predetermined calculation process; and a PWM timer generating a PWM pulse. The PWM timer includes a RAM for storing a duty value of the PWM pulse and a PWM controller for generating the PWM pulse. The PWM controller includes a PWM counter for counting up from a predetermined value as an initial value. The PWM pulse has an unit waveform, which is generated based on comparison between the duty value of the RAM and an output value of the PWM counter. The RAM outputs a new duty value at every comparison without functioning the CPU so that the duty value of the PWM pulse is changed in chronological order. | 11-26-2009 |
20090292937 | PROGRAMMABLE SYSTEM ON A CHIP - A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another. | 11-26-2009 |
20090300398 | CONTROL STRUCTURE FOR A POWER SUPPLY CLUSTER - A control structure for a power supply cluster which has a primary power supply and a secondary power supply that are independently linked to AC power and transform the AC power to DC power to supply electric power required by an electronic device in a computer equipment. A switch unit is provided to be linked to the primary power supply and the secondary power supply to get a start signal from the primary power supply and transfer to the secondary power supply. Electric power of the primary power supply also is transferred to the electronic device to present a first power supply status. A judgment unit also is provided to be linked to the primary power supply and the switch unit to get the start signal and defer sending a switch signal to the switch unit so that the electronic device can get electric power from the secondary power supply and present a second power supply status. Thereby the electronic device can continuously get the electric power after the primary power supply is started to improve the shortcoming of a conventional power supply cluster that is not started concurrently and results in poor system matching, and requires an additional transmission line even if concurrent start can be accomplished. | 12-03-2009 |
20090307514 | System and Method for Managing Power Supply Units - Systems and methods for power management in an information handling system are disclosed. A method may include determining a power requirement of resources configured to receive power from a plurality of power supply units including one or more online power supply units, one or more redundant power supply units, and one or more standby power supply units. The method may also include determining a power capacity of the one or more online power supply units. The method may additionally include determining if the power capacity of the one or more online power supply units exceeds the power requirement of the resources. The method may further include transitioning at least one of the power supply units based on such determining steps. | 12-10-2009 |
20090327782 | DEVICE POWER MANAGEMENT USING NETWORK CONNECTIONS - Embodiments provide a process and system for automatic management of networked devices based on the state of the network connection. The process automatically manages the power state of a networked computerized device according to a trigger event that corresponds to the state of an attached network connection. The network connection of an attached networked device is monitored for a pre-defined trigger event. Once a trigger event has been observed, the power state of the attached network device is managed to correspond to the trigger event. | 12-31-2009 |
20100037077 | Multiple-node system power utilization management - A multiple-node system having a number of nodes has its power utilization managed. A node power cap of a node specifies a maximum power that the node is individually able to utilize. A system-wide power cap specifies a maximum power that the multiple-node system is able to utilize overall. In response to determining that a node power cap of a selected node is to be increased, where a total of the node power caps of all the nodes is equal to the system-wide power cap, the node power caps of one or more nodes are reduced so that the total of the node power caps of all the nodes is less than the system-wide power cap. The node power cap of the selected node is then increased such that the total of the node power caps of all the nodes is equal to or less than the system-wide power cap. | 02-11-2010 |
20100058091 | System and Method for Managing Information Handling System Power Supply Capacity Utilization - An information handling system having plural processing modules, such as an information handling system blade chassis having plural information handling system blades, allocates power by determining an actual load sharing power loss associated with plural power supplies and applying the actual load sharing power loss to determine how much power to allocate to the information handling system modules. A chassis manager determines actual load sharing power loss by retrieving power information from plural power supplies. The actual load sharing power loss replaces a worst-case load sharing power loss assumed value to increase the amount power available for allocation to the information handling system modules. | 03-04-2010 |
20100083021 | Voltage stabilization for clock signal frequency locking - A processor, system, and method are disclosed. In an embodiment, the processor includes a first site and a second site. There is a link to transmit a voltage stabilization signal from the second site to the first site. In the first site voltage correction logic can dynamically modify a voltage supplied to the first site and second site. In the second site there is logic to assert the voltage stabilization signal. After asserting the voltage stabilization signal, the second site is granted at least a window of time in which the supplied voltage to the second site does not change. | 04-01-2010 |
20100100756 | Power Supply Wear Leveling in a Multiple-PSU Information Handling System - In some embodiments, a method for power supply wear leveling in an information handling system including multiple power supply units (PSUs) is provided. The method includes maintaining each of multiple PSUs in one of multiple different operational states, automatically determining an accumulated on-time for each of the multiple PSUs, ranking the multiple PSUs based on the accumulated on-time determined for each PSU, and automatically changing the operational state of at least one of the PSUs based at least on the ranking of the multiple PSUs. | 04-22-2010 |
20100106994 | METHOD, APPARATUS, AND SYSTEM FOR ADAPTING POWER CONSUMPTION - A method, apparatus, and system are disclosed for adapting power consumption. A recording module records a usage record for each component within a computer at scheduled audit times. The usage record comprises a usage level, an application list, a time stamp, a network access point, a computation category, a time category, and a location category. A scenario module creates a plurality of usage scenarios. Each usage scenario comprises a unique combination of a specified computation category, a specified time category, and a specified location category. A profile module creates a power setting profile for each usage scenario. Each power setting profile specifies a target power status for each component of the computer. A scenario detection module detects a first usage scenario. An adjustment module sets a power status of each component to the first usage scenario target power status for the component. | 04-29-2010 |
20100180139 | Power Outage Operation Of A Cable Modem - A method, system and computer program product for operation of a cable modem in response to Alternating Current (AC) power outage is described herein. When a loss of AC power is detected, the cable modem is switched to battery backup mode of operation using a single upstream and a single downstream channel. This switch occurs prior to receiving instructions from a cable modem termination system to use a single upstream and a single downstream channel. The cable modem notifies the cable modem termination system of the switch to battery backup mode of operation. | 07-15-2010 |
20100211811 | CIRCUIT FOR CONTROLLING TIME SEQUENCE - A circuit for controlling time sequence of a motherboard to supply power for a motherboard component includes a control circuit, a switch circuit, and a power conversion circuit. The control circuit is configured for receiving a startup signal during turning on the motherboard. The startup signal is configured to turn off the control circuit to delay a first voltage signal received by the first power receiving terminal for a period of time before outputting a new voltage signal. The switch circuit is configured for being turned off under the control of the new voltage signal. The power conversion circuit is configured for converting a second voltage signal into a supply voltage in response to the switch circuit being turned off, to provide the supply voltage to the motherboard component. | 08-19-2010 |
20100250991 | VARIABLE POWER SYSTEMS FOR COMPUTERS - Arrangements which provide a degree of flexible power allocation among multiple power rails in computer systems, in a manner to permit the sharing and exchange of power across multiple rails. The rails involved in such sharing could be of similar or dissimilar voltage. By way of an advantageous refinement, a “shopping cart” approach for system configuration is permitted, based on subsystem or component power capability. | 09-30-2010 |
20100275051 | POWER OK DISTRIBUTION FOR MULTI-VOLTAGE CHIPS - A method and apparatus for powering up an integrated circuit (IC). An IC includes a plurality of power domains each coupled to receive power from one of a plurality of power sources. Each power domain includes a power-sensing unit. A power-sensing unit in a first one of the plurality of power domains is coupled to receive a first power ok signal from an upstream power domain, and is configured to assert a second power ok signal to be provided to a second power domain. A power-sensing unit in the second power domain is coupled to detect the presence of voltage in the first power domain, and to receive the first power ok signal. When the power-sensing unit in the second power domain has both sensed the presence of power in the first power domain and received the second power ok signal, a third power ok signal is asserted. | 10-28-2010 |
20100306566 | SYSTEMS AND METHODS FOR POWER MANAGEMENT IN MANAGED NETWORK HAVING HARDWARE-BASED AND VIRTUAL RESOURCES - Embodiments relate to systems and methods for power management in a managed network having hardware-based and virtual resources. A network management platform can host a power management engine to configure and manage the power operations of a mixed set of hardware-implemented and virtual machines. The virtual machines can be instantiated, for instance, via a mainframe platform and/or a cloud computing environment. The power management engine can maintain a power management settings indicating power management rules or preferences for the managed network. The power management settings can contain rules or commands, for instance, to sequence the power-on or power-off order between different hardware-implemented or virtual machines, based for instance on dependency orders or predetermined schedules. | 12-02-2010 |
20100306567 | METHOD FOR OPERATION OF A FIELD DEVICE IN A MATCHED-POWER MODE - A method for operating a field device of process automation technology, wherein the field device features a fieldbus communication interface, to which a wireless adapter is connected. The field device can be supplied with electrical power by the wireless adapter via the fieldbus communication interface; and an electrical current flowing over the fieldbus communication interface is not limited, so that it can freely adjust corresponding to a respective power requirement. | 12-02-2010 |
20100325463 | Method and System for Optimized Power Management for a Network Device Supporting PCI-E and Energy Efficient Ethernet - Aspects of a method and system for optimized power management for a network device supporting PCI-E and energy efficient Ethernet are provided. In this regard, in a network interface controller that supports energy efficient Ethernet, a PCI-E core may be transitioned from a low power PCI-E state to a full power PCI-E state when a PHY core in the network interface controller initiates transition from a low power mode to a full power mode and before the PHY core receives an Ethernet packet. In another embodiment, the PHY core in the network interface controller may be transitioned from a low power mode to a full power mode when the PCI-E core initiates transition from a low power PCI-E state to a full power PCI-E state, and before the PCI-E core receives a command to send an Ethernet packet. | 12-23-2010 |
20100325464 | COMPUTER SYSTEM WITH DELAY CIRCUIT - A computer system includes a power supply capable of generating a power good signal, a delay circuit configured to delay the power good signal, a Super I/O chip configured to receive the delayed power good signal; and a front side bus coupled with a terminal voltage signal. A delay time between the delayed power good signal and the terminal voltage signal is not less than a pre-set time limit. | 12-23-2010 |
20110047398 | POWER SUPPLY UNIT, PROCESSING SYSTEM, AND ID ASSIGNMENT METHOD - A power supply unit includes a communication unit and a control unit. The communication unit is capable of performing communication with a first processing unit group constituted of a plurality of processing units connected thereto. The control unit controls powers to the plurality of processing units through the communication so that the powers are turned on in an order corresponding to an order of connection and assigns, to the plurality of processing units, respectively, IDs of numbers corresponding to the order of turning-on of the powers each time the power is turned on. | 02-24-2011 |
20110087913 | TECHNIQUES FOR MANAGING LOWER POWER STATES FOR DATA LINKS - Techniques for managing lower power states for data links are described. An apparatus may comprise a memory unit to store a device connection manager for a controller of a bi-directional serial link connected to a device. The apparatus may comprise a processor operative to execute the device connection manager, the device connection manager operative to read a register of the controller storing information indicating an interface of the controller for the bi-directional serial link is operating in a lower power management state, send a control directive on a periodic basis for the interface to transition to a temporary active state, and receive an interrupt from the interface indicating the device is disconnected from the bi-directional serial link during a temporary active state. Other embodiments are described and claimed. | 04-14-2011 |
20110145618 | Reducing Current Draw Of A Plurality Of Solid State Drives At Computer Startup - Reducing current draw of solid state drives from a shared power supply of a computer at computer startup, each SSD including computer memory, a capacitor, a disk controller, and a charge controller, the disk controller configured to enable the charge controller to charge the capacitor upon receiving a charge command, the SSDs organized into startup groups characterized by a position in a predefined startup order. Upon startup of the computer, beginning with a first startup group in the predefined startup order and until the last startup group in the predefined startup order has received a charge command, embodiments include, sending, by a storage device initiator, a charge command to a startup group to initiate charging of the capacitor of each solid state drive in the startup group and waiting a predefined period of time before sending another charge command to a next startup group in the predefined startup order. | 06-16-2011 |
20110214000 | METHOD FOR REDUCING THE ENERGY CONSUMPTION OF AN ELECTRONIC TERMINAL, CORRESPONDING TERMINAL AND COMPUTER PROGRAM - A method and apparatus are provided for reducing the energy consumption of an electronic terminal. The method implements a step of modifying the timeout-before-standby duration for said terminal after an action performed by and/or on said terminal at a current instant, depending on the membership of the current instant in a given temporal category, from among at least two predefined temporal categories. | 09-01-2011 |
20110283130 | Power control manager - An automatically configurable power control unit (PCU) is described that can be configured and used to satisfy requirements of different power domain of an integrated circuit. When implemented the PCU is automatically configured into a power control manager (PCM) along with other PCU's used with additional power domains in the integrated circuit. The PCM dispatches power on and off commands to each PCU contained within the PCM, schedules power on and off sequences amongst a plurality of PCU controlled by the PCM, blocks inappropriate power mode commands and monitors the state of each power domain coupled to the various PCU controlled by the PCM. | 11-17-2011 |
20110296224 | NETWORKABLE ELECTRICAL POWER DISTRIBUTION PLUGSTRIP WITH CURRENT DISPLAY AND METHOD OF USE - A power management device can include a power management device housing, a power input associated with the power management device housing, and a plurality of power outputs associated with the power management device housing. At least certain power outputs can be connectable to one or more electrical loads external to the power management device housing and to the power input. In some embodiments, a communications bus can be associated with the power management device housing and one or more power control sections can also be associated with the power management device housing. In some embodiments, one or more power control sections can communicate with the communications bus and with one or more corresponding power outputs among the plurality of power outputs. In some embodiments, a power information display can communicate with the communications bus. If desired, a power information determining section can be associated with the power management device housing and in communication with the communications bus. The power information determining section may communicate power-related information to the power information display. | 12-01-2011 |
20110320845 | POWER SUPPLY CONTROL APPARATUS, IMAGE PROCESSING APPARATUS, STORAGE MEDIUM STORING POWER SUPPLY CONTROL PROGRAM - A power supply control apparatus that includes an instruction component, an execution component and a power supply control component is provided. The power supply control component is equipped with at least two measurement functions that have different measurement durations for cases in which the duration until interrupting the power supply to device(s) is measured, wherein measurement is activated with a first measurement function of relatively long measurement duration at a completion time of prior image processing, and measurement is activated with a second measurement function of relatively short measurement duration for device(s) to which power is being supplied at the time of completion of the prior image processing but which are not required in later image processing. | 12-29-2011 |
20120117408 | SWITCHING DEVICE, A SWITCHING DEVICE CONTROL METHOD AND A SWITCHING DEVICE CONTROL PROGRAM - A switching device is comprising connectors and switching part, which is connected via the connectors to a working power supply unit, a redundant power supply unit, a battery unit and a power supply output terminal, and, in an initial state, connects the power supply output terminal and the working power supply unit, and connects the battery unit and the redundant power supply unit is connected, and in a spare state, cuts a connection between the battery unit and the redundant power supply unit, and connects the power supply output terminal and the redundant power supply unit. | 05-10-2012 |
20120179929 | POWER SUPPLY SYSTEM - A power supply system includes a power supply unit, a number of electrical loads and a sequence circuit. The power supply unit provides power for the electrical loads through the sequence circuit. When any one of the electrical loads fails the sequence circuit will record the failure, shut down and lock the power supply unit to prevent the power supply unit from powering the electrical loads. | 07-12-2012 |
20120179930 | MOTHERBOARD HAVING TIME DELAY CIRCUIT FOR DELAYING PSON SIGNAL - A motherboard includes a motherboard power supply connector and a time delay circuit. The motherboard power supply connector connects a power supply unit. The motherboard power supply connector has a power supply on pin and a power good pin. The power good pin is configured for receiving a power good signal from the power supply unit. The time delay circuit has an input terminal and an output terminal. The input terminal is configured for receiving a power supply on signal. The output terminal is connected to the power supply on pin and is configured for sending the power supply on signal to the power supply on pin after a time delay determined by the time delay circuit. | 07-12-2012 |
20120185720 | POWER SUPPLY START-UP MECHANISM, APPARATUS, AND METHOD FOR CONTROLLING ACTIVATION OF POWER SUPPLY CIRCUITS - A power supply start-up sequencing mechanism for controlling activation of a plurality of power supply circuits with a predetermined timing is disclosed. The mechanism comprises a time value generator arranged to provide a time value signal; and for each of the power supply circuits, a logic circuit arranged to receive the time value signal and from the received signal provide an activation signal to the respective power supply circuit, wherein the respective logic circuit is associated with a start timing value for the respective power supply circuit such that the activation signal is provided when the associated start timing value coincides with the received time value signal. An apparatus comprising such a mechanism, and a method for controlling activation of a plurality of power supply circuits are also disclosed. | 07-19-2012 |
20120198261 | CONTROLLING POWER SEQUENCE IN A BLADE CENTER ENVIRONMENT - For controlling power sequence in a blade center environment, a relationship component module creates a topology of interdependent relationships of devices in the blade center environment. The devices include server blades, storage blades, and switch modules. A sequence module defines a sequence of the devices in the blade center environment to power off and on based on the topology of interdependent relationships. The sequence includes an order of a first independent blade server, each dependent storage blade of the first independent blade server, and a second independent blade server. A monitor component module monitors a command from an Advanced Management Module (AMM) to regulate power for the devices in the blade center environment. The AMM regulates power within the blade center. A validation module validates that the command does not violate the interdependent relationships and the sequence of devices or else blocks the command if the command is not validated. | 08-02-2012 |
20130024712 | Device and Method for Operating Memory Cards - Embodiments in accordance with the present invention provide devices and methods for operating two memory cards. In one embodiment, an electronic device includes a host controller, a first socket in communication with the host controller, for receiving a first memory card and a second socket, and a second socket in communication with the host controller, for receiving a second memory card. The physical pin arrangement of the second socket is in an order reversed from the physical pin arrangement of the first socket. The host controller transmits power to the first memory card and cuts off power to the second memory card during a first time period, and cuts off power to the first memory card and transmits power to the second memory card during a second time period. The first socket and the second socket transmit and receive same set of data signals. | 01-24-2013 |
20130132757 | POWER-ON CONTROLLING METHOD AND SYSTEM THEREOF - A power-on controlling method and system are provided. The system includes a power management unit, a voltage regulating module and a power controller. After booting a computer system, the power controller controls the power managing unit to selectively execute a discontinuous mode or a continuous mode according to a selection command, so as to control the voltage regulating module to regulate a system voltage supplied for electric elements in the computer system, thus finishing the system initialization action, and improving the flexibility in monitoring the power of computer system. | 05-23-2013 |
20130145195 | SYSTEM AND METHOD OF MANAGING POWER AT A PORTABLE COMPUTING DEVICE AND A PORTABLE COMPUTING DEVICE DOCKING STATION - A method of managing power distribution between a portable computing device (PCD) and a PCD docking station is disclosed and may include determining that the PCD is docked with the PCD docking station, switching a power supply to the PCD from a PCD battery to a PCD docking station battery, and powering the PCD and the PCD docking station from the PCD docking station battery. Further, the method may include determining whether a PCD battery power equals a charge condition and charging the PCD battery when the PCD battery power equals the charge condition. The method may also include monitoring a PCD docking station battery power, determining whether the PCD docking station battery power equals a warning condition, and transmitting a first warning when the PCD docking station battery power equals the warning condition. | 06-06-2013 |
20130159754 | APPARATUS FOR POWERING AN ELECTRICAL CONSUMER VIA A DATA CONNECTION - The invention relates to an apparatus ( | 06-20-2013 |
20130191674 | POWER INPUT UTILIZATION SYSTEM - A power input utilization system includes a plurality of components and a plurality of power input connectors. A power utilization engine is coupled between the plurality of power input connectors and the plurality of components. The detect a power input to the plurality of power input connectors and determine a power input characteristic for the power input. The power utilization engine is also operable to use the power input characteristic to determine a plurality of operation characteristics for the plurality of components. The power utilization engine is also operable to operate the plurality of components using on the power input and the plurality of operation characteristics. | 07-25-2013 |
20130254578 | COMPUTING DEVICE AND METHOD FOR MANAGING SERVERS IN DATA CENTER - In a method for managing servers in a data center, an peripheral BMC list of each candidate BMC is updated, when any candidate BMC receives a data packet from an peripheral BMC. A master BMC is determined from all of the candidate BMCs, and the master BMC sends starting instructions to each peripheral BMC at a specified time interval, according to a preset start sequence. Power supply devices corresponding to the master BMC and all the candidate BMCs are powered on after all of the power supply devices corresponding to the peripheral BMCs have been powered on, and all of the servers in the data center are started in this manner | 09-26-2013 |
20130290763 | INFORMATION PROCESSING SYSTEM, MANAGEMENT APPARATUS, AND MANAGEMENT METHOD OF INFORMATION PROCESSING APPARATUS - An information processing apparatus executes a processing sequence including a plurality of processing steps. A management apparatus makes the information processing apparatus execute the processing steps in predetermined order, and thereby manages execution of the processing sequence. The management apparatus takes over execution management of the processing sequence from a first management apparatus. At this time, an information acquisition unit of the management apparatus acquires state information indicating a progress state of the processing sequence from the information processing apparatus. A control unit of the management apparatus makes the information processing apparatus continue execution of an unexecuted processing step of the processing sequence based on the state information acquired by the information acquisition unit. | 10-31-2013 |
20140013145 | DEBUG ARCHITECTURE - Roughly described, a method of powering down a portion of an integrated circuit chip, the portion of the integrated circuit chip comprising a plurality of peripheral circuits, each peripheral circuit being connected to a respective debug unit, the method comprising: prior to power down, extracting from each debug unit configuration information of that debug unit; storing the configuration information of the debug units in a memory on the integrated circuit chip during power down of the portion of the integrated circuit chip; and on power up, restoring the configuration information of each debug unit to that debug unit prior resuming operation of that debug unit and the peripheral circuit connected to that debug unit. | 01-09-2014 |
20140047261 | DATA STORAGE POWER MANAGEMENT - Embodiments of the present disclosure are directed to, among other things, managing power of one or more data storage devices. In some examples, a storage service may obtain a schedule associated with enabling different storage devices at different times. The storage service may also identify a request of a batch of requests for accessing the storage devices. In some cases, the storage service may also determine which storage device to activate based at least in part on the schedule and/or the request. Further, the storage service may manage power of a storage device based at least in part on the determination of which storage device to activate. | 02-13-2014 |
20140164811 | SEQUENTIAL POWER UP OF DEVICES IN A COMPUTING CLUSTER BASED ON DEVICE FUNCTION - A computer program product includes computer usable program code embodied on a tangible computer usable storage medium for: identifying a plurality of power distribution units (PDUs) disposed in a rack, wherein each PDU receives power from a main power source, and wherein each PDU includes a circuit breaker; identifying a plurality of devices disposed in the rack, wherein each device receives power from one of the PDUs, and wherein the plurality of devices are selected from server nodes, network switches and external data storage devices; and powering on, for each of the PDU, the plurality of devices that are connected to the PDU in a sequence to prevent an inrush current from tripping the circuit breaker within the PDU, wherein the sequence powers on the devices identified as network switches and external data storage devices prior to powering on the devices identified as server nodes. | 06-12-2014 |
20140164812 | SEQUENTIAL POWER UP OF DEVICES IN A COMPUTING CLUSTER BASED ON DEVICE FUNCTION - A method of powering on a plurality of devices includes identifying a plurality of power distribution units disposed in a rack, wherein each power distribution units is connected to receive power from a main power source, and wherein each power distribution unit includes a circuit breaker. The method further includes identifying a plurality of devices disposed in the rack, wherein each device is connected to receive power from one of the power distribution units, and wherein the plurality of devices are selected from server nodes, network switches and external data storage devices. For each of the power distribution units, the plurality of devices that are connected to the power distribution unit are powered on in a sequence to prevent an inrush current from tripping the circuit breaker within the power distribution unit. The sequence powers on the devices identified as network switches and external data storage devices prior to powering on the devices identified as server nodes. | 06-12-2014 |
20140164813 | SEQUENTIAL POWER UP OF DEVICES IN A COMPUTING CLUSTER BASED ON RELATIVE COMMONALITY - A method of powering on a plurality of devices includes identifying a plurality of power distribution units (PDUs) disposed in a rack, wherein each PDU receives power from a main power source and includes a circuit breaker. A plurality of devices disposed in the rack are identified, wherein each device receives power from one of the PDUs, and wherein the plurality of devices are server nodes, network switches or external data storage devices. Vital product data (VPD) is obtained from a service processor in each device, wherein the VPD identifies the device by a model identification code. For each PDU, the plurality of devices connected to the PDU are powered on in a sequence to prevent an inrush current from tripping the circuit breaker within the PDU, wherein the sequence powers on devices in order of ascending commonality of the model identification code. | 06-12-2014 |
20140173316 | COMPUTER MAINBOARD - A delay circuit for power sequencing in a computer includes an oscillator; an input pin; a counter; a register; and a comparing controller. The counter detects a voltage of the input pin when each clock signal arrives, resets a number counted by the counter when the voltage of the input pin is detected at logic-low electrical level, and adds a predetermined number when the voltage of the input pin is detected at logic-high electrical level. The controller compares the total number counted by the counter with a preset number, and outputs a control signal when the numbers match. The control signal controls a connected logic circuit to work according to a power sequence. | 06-19-2014 |
20140189412 | TIME SEQUENCE CIRCUIT FOR POWER SUPPLY UNIT - A time sequencing circuit for a power supply unit to ensure the correct sequencing of system voltages for a computer from a power supply unit includes first to fifth resistors, an electronic switch, first to third comparators, and a capacitor. Each of the first to third comparators includes an inverting input terminal, a non-inverting input terminal, and an output terminal When the power supply unit outputs all required voltages, the power supply unit outputs a high-voltage level indicating power good and the computer can start up power good signal. If one of the voltages is not outputted, the power supply unit outputs a low-voltage level good signal until any non-output of voltage is cured. | 07-03-2014 |
20140258760 | Controlling Operating Voltage Of A Processor - In an embodiment, a processor includes a core domain with a plurality of cores and a power controller having a first logic to receive a first request to increase an operating voltage of a first core of the core domain to a second voltage, to instruct a voltage regulator to increase the operating voltage to an interim voltage, and to thereafter instruct the voltage regulator to increase the operating voltage to the second voltage. Other embodiments are described and claimed. | 09-11-2014 |
20140258761 | ASYNCHRONOUS MANAGEMENT OF ACCESS REQUESTS TO CONTROL POWER CONSUMPTION - Systems and methods are disclosed for asynchronous management of access requests to control power consumption. In some cases, by asynchronously managing power within a system, multiple dies of a NVM can simultaneously draw current in order to match the power demand. In particular, an arbiter of the system can receive multiple requests to draw current, where each request may be associated with a different die of the NVM. In some embodiments, the arbiter can determine the servicing order using the time of arrival of the request (e.g., a first-in, first-out scheme). In other embodiments, the arbiter can simultaneously service multiple requests so long as the servicing of the multiple requests does not exceed a power budget. | 09-11-2014 |
20140281640 | INTELLIGENT FRONT PANEL - The front panel includes intelligence for controlling power, reset and power down functions for a storage enclosure having multiple servers, service processors, and enclosure management devices. The front panel may display information pertaining to system power state, disk activity, Ethernet activity, and other information. The front panel may implement sequencing rules for changes in power state. The front panel provides information for multiple servers and other devices through a single panel. | 09-18-2014 |
20140281641 | METHOD AND APPARATUS FOR CONTROLLED RESET SEQUENCES WITHOUT PARALLEL FUSES AND PLL'S - A system, semiconductor device and method for providing a controlled system reset sequence with lower power consumption without dependency on fuses, PLL's and external XTAL's. A method to simplify a boot sequence by using a ring oscillator that compensates for voltage and temperature variations while also removing the dependency on parallel fuses, PLL's and external XTAL's. | 09-18-2014 |
20140344609 | DYNAMIC ALLOCATION OF POWER BUDGET FOR A SYSTEM HAVING NON-VOLATILE MEMORY - Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory). | 11-20-2014 |
20140359336 | SERVER AND POWER CHIP DETECTING METHOD - A power chip detecting device, applied in a server, includes a power chip, a power sequence control module, a base management controller, a GPIO module, and a signal detecting module. The power sequence control module sends an initial power enable signal to the power chip after the server is switched on, and the power sequence control module receives an initial power good signal from the power chip after the power chip receives the initial power enable signal. The signal detecting module sends a time abnormal result to the GPIO module after determining that time difference between sending out of the initial power enable signal and the initial power good signal is less than a reference value. The GPIO module sends the time abnormal result to the base management controller. | 12-04-2014 |
20140380079 | OPERATION MANAGEMENT DEVICE, OPERATION MANAGEMENT METHOD, AND RECORDING MEDIUM - An operation management device that comprises: a memory configured to store, for a plurality of nodes that each operate on one computer out of a plurality of computers included in a computer system and for a plurality of nodes capable of moving between the plurality of computers, operation suspension sequence data of the plurality of nodes, and data of operation suspension times needed for operation suspension of each of the plurality of nodes; and a processor configured to execute a procedure, the procedure comprising: from a timing earlier than suspending operation of the computer system and a timing earlier than a total sum of the operation suspension times of the plurality of nodes or greater, suspending operation of the plurality of nodes in an operation suspension sequence indicated by the operation suspension sequence data. | 12-25-2014 |
20150012772 | METHOD AND APPARATUS FOR ADJUSTING CONNECTION SPEED OF USB DEVICE - A method for adjusting connection speed of a USB device includes determining connection speed of the USB device connected to the electronic device, recognizing whether an enhancement event for the connection speed of the USB device is generated, and enhance the connection speed of the USB device when the enhancement event occurs. An electronic device includes the at least one processor configured to determine a connection speed of the USB device connected to the electronic device, recognize whether an enhancement event for the connection speed of the USB device occurs, and enhance the connection speed of the USB device when the restoration event occurs. | 01-08-2015 |
20150074441 | POWER CONTROL DEVICE AND POWER CONSUMING DEVICE - A power control device | 03-12-2015 |
20150149806 | Hard Power Fail Architecture - The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device. | 05-28-2015 |
20150309549 | POWER DISTRIBUTION DETERMINATION APPARATUS, CONTROL METHOD, AND STORAGE MEDIUM - A supply information acquisition unit acquires supply information indicating supply energy from a power supply unit. A demand information acquisition unit acquires demand information indicating a demand energy from a power receiving unit and accepting conditions. A first matching unit performs first matching for determining the power supply unit that supplies power to each power receiving unit so as to fulfill accepting conditions of each power receiving unit. A surplus power supply unit determination unit determines a surplus power supply unit, which is the power supply unit having a surplus supply energy. An arbitrary power receiving unit determination unit determines an arbitrary power receiving unit, which is the power receiving unit in which a demand energy is not fulfilled. | 10-29-2015 |
20150309559 | VOLTAGE REGULATOR STRESS REDUCING SYSTEM - According to one exemplary embodiment, a method for reducing electrical component stress from power cycling is provided. The method may include receiving an indication associated with power cycling an electronic apparatus. The method may also include identifying, based on the received indication, a first one or more groups of electrical components that will not be powered off during the power cycling of the electronic apparatus. The method may further include identifying, based on the received indication, a second one or more groups of electrical components that will be powered off during the power cycling of the electronic apparatus. The method may finally include powering off the second one or more groups of electrical components. | 10-29-2015 |
20150346788 | CONTROL DEVICE, DC-DC CONVERTER, SWITCHING POWER SUPPLY APPARATUS, AND INFORMATION PROCESSING APPARATUS - A control device includes a processor that executes a process including generating a driving signal that drives a switching device, so that an output voltage of a converter circuit that performs a step-down conversion on input power by driving the switching device matches a target value, and modifying the target value so that as an output current of the converter circuit becomes lower the output voltage becomes closer to an upper limit value of the output voltage. | 12-03-2015 |
20150370295 | METHODS AND SYSTEMS FOR IMPLEMENTING ADAPTIVE FET DRIVE VOLTAGE OPTIMIZATION FOR POWER STAGES OF MULTI-PHASE VOLTAGE REGULATOR CIRCUITS - Methods and systems are disclosed that may be employed to implement adaptive FET drive voltage optimization for voltage regulator (VR) integrated power stages (IPstages) that have different MOSFET RDS(on) characteristics to improve VR efficiency and current-sense accuracy. | 12-24-2015 |
20160034010 | ELECTRONIC DEVICE HAVING A PROGRAMMED ELECTRICAL CHARACTERISTIC - An electronic device that generates a programmed electrical characteristic is described. During operation, the electronic device generates a programmed electrical characteristic associated with a predefined identifier that specifies information about the electronic device (such as a type, a model, a brand, an operating condition of the electronic device, and/or a unique identifier of the electronic device). For example, an integrated circuit in the electronic device may have a varying power consumption based on the predefined identifier. In particular, the programmed electrical characteristic may be associated with execution of a program module by a processor, such as initialization of firmware by the processor. The resulting modulated waveform may be detected and analyzed by another electronic device to determine the predefined identifier and, thus, a device profile (with the specified information) for the electronic device. | 02-04-2016 |
20160048186 | ELECTRICAL DISTRIBUTION SYSTEM FOR AN AIRCRAFT - Electrical distribution system for an aircraft comprising at least one electrical supply path comprising at least one power unit capable of opening or closing the connection between at least one electrical energy source and at least one device of the aircraft. The system comprises protection cards ( | 02-18-2016 |
20160048187 | ADAPTIVE MICROPROCESSOR POWER RAMP CONTROL - Embodiments of the invention provide adaptive power ramp control (APRC) in microprocessors. One implementation of the APRC can compute a present core power and a present power ramp condition in the microprocessor, for example, to determine whether the present power is in a particular predefined control zone and whether the present power ramp is greater than a predefined threshold for that control zone. Those determinations can indicate a likelihood of an imminent, undesirable power ramp condition and can inform entry into a control mode. The APRC can generate an appropriate stall control signal in response to its present control mode, and the stall control signal can stall operation of at least one functional unit of the microprocessor according to a predefined stall pattern. This can effectively combat the imminent power ramp condition by reducing the power usage of the microprocessor. | 02-18-2016 |
20160124487 | STORAGE DEVICE AND METHOD FOR PROCESSING POWER DISABLE SIGNAL - A storage device for connection with a host device via an interface bus, includes a storage unit and a storage controller configured to control access to the storage unit and receive a power disable signal from the host device. The storage controller includes a plurality of processing units, each of which receives an interrupt signal to initiate power disable processing, in response to assertion of the power disable signal. | 05-05-2016 |
20160147271 | POWERING NODES - Techniques for powering nodes are provided. In one aspect, a management processor may receive an indication to power up a first node. The management processor may determine a first set of nodes that are to be powered up prior to powering up the first node. A subset of the first set of nodes that are not already powered up may be determined. The subset of nodes may be powered up prior to powering up the first node. The first node may then be powered up. | 05-26-2016 |
20160188467 | SYSTEM AND METHOD FOR PERFORMING SYSTEM MEMORY SAVE IN TIERED/CAHCHED STORAGE - In accordance with the present disclosure, a system and method for performing a system memory save in tiered or cached storage during transition to a decreased power state is disclosed. As disclosed herein, the system incorporating aspects of the present invention may include a solid-state drive, volatile memory, and at least one alternate storage media. Upon transition to a decreased power state, at least some of the data in the solid-state drive may be transferred to the at least one alternate storage media. After the SSD data is transferred, data stored in volatile system memory, such as a system context, may be transferred to the SSD memory. With the system context saved in SSD memory, power to the volatile system memory may be turned off. | 06-30-2016 |
20160378167 | SYSTEMS AND METHODS OF POWER-SAFE CONTROL PANEL INSTALLATION - Systems and methods of power-safe control panel installation are provided. Some systems can include a control panel that includes a programmable processor and executable control software stored on a non-transitory computer readable medium, wherein the programmable processor and the executable control software can transmit a signal to selectively remove power from at least one portion of the control panel. | 12-29-2016 |
20170235352 | METHODS AND SYSTEMS FOR MEMORY INITIALIZATION OF AN INTEGRATED CIRCUIT | 08-17-2017 |
20190146695 | MEMORY DEVICE AND METHOD OF CONTROLLING POWER OF THE SAME | 05-16-2019 |