Class / Patent application number | Description | Number of patent applications / Date published |
710029000 | Flow controlling | 37 |
20080270640 | METHOD AND APPARATUS FOR ADAPTIVE IN-OPERATOR LOAD SHEDDING - One embodiment of the present method and apparatus adaptive in-operator load shedding includes receiving at least two data streams (each comprising a plurality of tuples, or data items) into respective sliding windows of memory. A throttling fraction is then calculated based on input rates associated with the data streams and on currently available processing resources. Tuples are then selected for processing from the data streams in accordance with the throttling fraction, where the selected tuples represent a subset of all tuples contained within the sliding window. | 10-30-2008 |
20090037616 | TRANSACTION FLOW CONTROL IN PCI EXPRESS FABRIC - A computer-executed method for controlling transaction flow in a network comprises communicating transaction packets among a plurality of devices in a network fabric and subdividing a memory into a plurality of memory segments for storing received transaction cycles according to transaction packet type comprising posted, non-posted, and completion cycles. A plurality of transaction cycles are received in the memory segment plurality at a target device and transaction cycle priority is allocated according to transaction packet type wherein posted cycles have highest priority. Cycles are retrieved from the memory segment plurality in an order determined by priority. | 02-05-2009 |
20090063727 | STREAM DATA CONTROL SERVER, STREAM DATA CONTROL METHOD, AND STREAM DATA CONTROLLING PROGRAM - A stream data control server includes: a processable flow rate managing unit which manages a processable flow rate corresponding to an amount of data per unit time, which can be processed in each of storage units serving as storing destinations; a classified data flow rate managing unit which manages a data flow rate corresponding to an amount of data processed per unit time for each class of data to which a data priority is attached; and a storing destination control unit which controls the storing destinations of respective data based upon the processable flow rate of each of the storage units and the data flow rate for each class in such a manner that the data having higher data priorities are stored in the storage units having higher priorities within a range of the processable flow rate of each of the storage units. | 03-05-2009 |
20090077274 | Multi-Priority Communication in a Differential Serial Communication Link - A circuit includes a high priority circuit and a non-high priority circuit. The high priority circuit is operative to communicate high priority information to a single path of a differential serial communication link. The non-high priority circuit communicates non-high priority information to the single path. The high priority information is communicated prior to the non-high priority information. In one example, the circuit includes a flow control distributor operatively coupled to the high priority circuit and the non-high priority circuit. The flow control distributor distributes a total number of flow control credits into high priority credits and non-high priority credits. The flow control distributor controls communication of the high priority information based on the high priority credits. The flow control distributor controls communication of the non-high priority information based on the non-high priority credits. | 03-19-2009 |
20090138629 | Utilizing Programmable Channels for Allocation of Buffer Space and Transaction Control in Data Communications - A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip. | 05-28-2009 |
20090172214 | USB HOST CONTROLLER - In some embodiments, a USB host controller interface interfaces with a USB device at a device level by presenting a pipe of the USB device as a work queue to system software. Other embodiments are described and claimed. | 07-02-2009 |
20090210579 | OPEN EXCHANGE LIMITING IN AN I/O PROCESSING SYSTEM - A computer program product, an apparatus, and a method for limiting a number of open exchanges at a channel subsystem of an I/O processing system using data from a control unit. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method that includes sending a command message to the control unit, and receiving a transport response information unit message in response. The method further includes extracting a maximum control unit exchange parameter from the transport response information unit message, and determining a limit value for a maximum number of open exchanges between the channel subsystem and the control unit as a function of the extracted maximum control unit exchange parameter. The method additionally includes applying the limit value to prevent opening of a new exchange. | 08-20-2009 |
20090240848 | Method and Device for the Transfer of a Data Flow a Data Source to a Data Sink - In the transfer of AV data flows, especially in a network environment, a delayed transition from one operating mode to the other operating mode will be possible when changing the operating mode from e.g. normal replay to fast forward search. This is due to the fact that—in the transfer from data source to data sink different buffer memory stages must be passed before the transferred data finally come to decoding. When the request for changing the operating mode comes, the data already present in the buffer memories must first be processed before the actually requested new data come to be decoded. For the solution of the problem described, it is suggested according to the invention that—after the request of changing the operating mode—the undesirable data in the buffer memories are quickly eliminated through suitable measures so that the desired data can then be decoded faster. To do that, an identifier for the new operating mode is inserted in the data flow on the part of the data source device. The decoder driver of the decoder in the data sink device will search for the inserted identifier in the data flow and reject all data packets which are not combined with this identifier. Thus, the buffer memory stages are discharged fast and a smooth transition with the change of operating mode will be realized. | 09-24-2009 |
20090313400 | DYNAMIC STABILIZATION FOR A STREAM PROCESSING SYSTEM - Disclosed are a method, upstream processing node, and computer readable medium for dynamically stabilizing a stream processing system. The method includes receiving at least one computing resource allocation target. The method further includes determining that an input data flow rate of at least one upstream processing element varies. The computing resource is dynamically allocated to the upstream processing element in response to the input rate of the upstream processing element varying. Data flow is dynamically controlled between the upstream processing element and at least one downstream processing element. | 12-17-2009 |
20090319701 | Simple Flow Control Protocol Over RDMA - A method and system for directing data transfers between applications residing on different computers or devices using a simplified flow control protocol. The protocol eliminates the need for and use of flow control modes and supports all possible data transfer mechanisms. The protocol also allows source and sink applications to independently set their own local memory threshold over which data transfers are made using remote direct memory access (RDMA) or zero-copy transfers. Through adjusting its threshold value or size, a sink or receiving application or component adapts its behavior to the behavior of a sending or source application or component. | 12-24-2009 |
20100017545 | Method for Empirically Determining a Qualified Bandwidth of File Storage for a Shared Filed System - A method for preventing oversubscription to a file storage by multiple processes, whether such processes are operating on one node with directly attached storage or on several nodes of a computing cluster sharing a storage area network. Processes or nodes issue requests for bandwidth reservations to a controller daemon. The controller daemon maintains records of all existing bandwidth reservations and ensures that new reservations are granted only if a qualified bandwidth of the file storage will not be exceeded. The qualified bandwidth is empirically determined to take into account installation specific hardware configurations, workloads, and quality of service requirements. In conjunction with suitable enabled client kernels the controller daemon serves to encapsulate all I/O activity including non-reserved I/O activity to the file storage by issuing non-guaranteed bandwidth leases for use by each node in servicing non-guaranteed process I/O activity, such leases being revokable by the controller daemon in order to service new guaranteed bandwidth reservation requests. | 01-21-2010 |
20100082851 | BALANCING USAGE OF HARDWARE DEVICES AMONG CLIENTS - Techniques are disclosed for managing the flow of IO jobs from a client to a hardware device such that resource starvation is reduced without significantly impacting throughput. Each flow can be assigned an amount of time that a hardware device can deplete completing IO jobs from the client. When the allocated amount of time is used IO jobs associated with the client can be stored in a queue until the client obtains more time. | 04-01-2010 |
20100082852 | Querying a device for information - In one embodiment, the present invention includes a method for receiving in a processor complex a first write request from a peripheral device, obtaining information of the processor complex responsive to the first write request, and transmitting a second write request from the processor complex to the peripheral device including the information. Other embodiments are described and claimed. | 04-01-2010 |
20100106866 | FLOW CONSISTENT DYNAMIC LOAD BALANCING - A device provides a flow table. The device receives a data unit, determines a data flow associated with the data unit, determines whether the flow table includes an entry corresponding to the data flow, determines a current utilization of a group of output ports of the device, selects an output port, of the group of output ports, for the data flow based on the current utilization of the group of output ports when the flow table does not store an entry corresponding to the data flow, and stores the data unit in a queue associated with the selected output port. | 04-29-2010 |
20100138567 | APPARATUS, SYSTEM, AND METHOD FOR TRANSPARENT ETHERNET LINK PAIRING - A solution for reducing latency in a host computing device communicating with network-attached devices over a network. The host includes two network adapters that each support bidirectional communications with the host. The solution includes a dual module that represents the two network adapters as a single logical interface to both the host and the network-attached devices. An inbound module directs inbound data sent to the interface by the devices through one of the network adapters, while an outbound module directs outbound data sent to the interface by the host through the other. In one embodiment, the outbound module is responsible for intercepting data sent to the interface and sending it through the network adapter dedicated to outbound communications. The solution also includes a mode module to enable the latency reduction apparatus, and a collapse module that enables bidirectional communications through the remaining network adapter if a network adapter fails. | 06-03-2010 |
20100169516 | SPLIT TRANSACTION PROTOCOL FOR A BUS SYSTEM - A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction. | 07-01-2010 |
20100241769 | INTERFACE DEVICE AND METHOD FOR COMMAND PROCESSING - Embodiments of the present invention provide an interface device and method for command processing for commands requiring data flow in both directions on a Fiber Channel or other data transport protocol exchange. The commands can include proprietary commands, SCSI linked commands or other commands known in the art. According to one embodiment, and interface device can assign a command a data flow direction indicator. When a reply to the command is received, the interface device can determine if the reply is expected or unexpected based on the data flow direction specified by the data flow direction indicator. If the reply is unexpected, the interface device can determine whether to process the reply. According to one embodiment, the data flow direction indicator can be the exchange identification. | 09-23-2010 |
20100250793 | ADJUSTING ACCESS OF NON-VOLATILE SEMICONDUCTOR MEMORY BASED ON ACCESS TIME - A non-volatile semiconductor memory is disclosed comprising a first memory device and control circuitry operable to issue an access command to the first memory device. A command status is requested from the first memory device after a status delay. When the command status indicates the first memory device has completed the command, a first access time of the memory device is measured. An access sequence of the first memory device is then modified in response to the access time. | 09-30-2010 |
20100281189 | METHOD FOR ENHANCING DATA TRANSMISSION EFFICIENCY - A method for enhancing data transmission efficiency in a data transmission system having a host, a subsystem and a transmission interface, utilized for the host to transmit and receive a data from a memory of the subsystem via the transmission interface includes steps of the host outputting a query command to the subsystem via the transmission interface for querying available memory utilization of the subsystem; the subsystem outputting a return message to the host via the transmission interface for indicating the available memory utilization according to the query command; and controlling data transmission from the host to the subsystem according to the return message. | 11-04-2010 |
20100312925 | Load reduced memory module - A memory module includes a plurality of data connectors provided along a long side of a module substrate, a plurality of memory chips and a plurality of data register buffers mounted on the module substrate, a data line that connects the data connectors and the data register buffers, and data lines that connect the data register buffers and the memory chips. Each of the data register buffers and a plurality of data connectors and a plurality of memory chips corresponding to the data register buffer are arranged side by side in a direction of a short side of the module substrate. According to the present invention, because each line length of the data lines is considerably shortened, it is possible to realize a considerably high data transfer rate. | 12-09-2010 |
20100325318 | DATA STREAM FLOW CONTROLLER AND COMPUTING SYSTEM ARCHITECTURE COMPRISING SUCH A FLOW CONTROLLER - A data stream flow-controller controls a transfer of data between a data processing device and an interconnection network. The flow controller includes interfaces for interfacing the controller on the network side and on the processing device side, a configurable storage for buffering queues of data in the controller before transfer to destination, and a programmable controller to control the storage to define queue parameters. | 12-23-2010 |
20110055436 | DEVICE TO DEVICE FLOW CONTROL - The present disclosure includes methods, devices, and systems for device to device flow control. In one or more embodiments, a system configured for device to device flow control includes a host and a chain of devices, including one or more memory device, coupled to each other and configured to communicate with the host device through a same host port. In one or more embodiments, at least one device in the chain is configured to regulate the flow of data by sending a token in downstream data packets, the token allowing devices downstream from the respective at least one device to send an upstream data packet to the respective at least one device. | 03-03-2011 |
20120072620 | TERMINAL AND WIRELESS COMMUNICATION METHOD THEREOF - There are provided a terminal capable of selecting a suitable wireless module among a plurality of wireless modules depending on a situation and providing an optimal image even in a state in which a display unit is separated from a main body by performing wireless communication, and a wireless communication method thereof. To enable this, the terminal includes a main body generating and transmitting image data in response to an external input; a display unit mountable on or demountable from the main body, receiving the image data from the main body and displaying an image corresponding to the image data; and a wireless communication unit provided in each of the main body and the display unit, switching a wireless communication frequency band on the basis of a transmission rate of the image data and transmitting the image data to the display unit. | 03-22-2012 |
20120124251 | HIERARCHICAL BUFFER SYSTEM ENABLING PRECISE DATA DELIVERY THROUGH AN ASYNCHRONOUS BOUNDARY - The present invention provides a system and method for controlling data entries in a hierarchical buffer system. The system includes an integrated circuit device with a memory core, a high speed upstream data bus, and a plurality of 1st tier buffers that receive data from the memory. The system further includes a 2 | 05-17-2012 |
20120210025 | DEVICE TO DEVICE FLOW CONTROL - The present disclosure includes methods, devices, and systems for device to device flow control. In one or more embodiments, a system configured for device to device flow control includes a host and a chain of devices, including one or more memory device, coupled to each other and configured to communicate with the host device through a same host port. In one or more embodiments, at least one device in the chain is configured to regulate the flow of data by sending a token in downstream data packets, the token allowing devices downstream from the respective at least one device to send an upstream data packet to the respective at least one device. | 08-16-2012 |
20120239830 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING SYSTEM, AND DEVICE LINKAGE METHOD - An information processing apparatus includes a user interface unit configured to receive a function execution request for processes, the function execution request containing designations of an input function and an output function; a search and linkage unit configured to acquire pieces of specifications information indicating functions of an input device and an output device from the respective devices, and generate, based on the pieces of specifications information, a linkage flow indicating an execution sequence and a combination of an input device and an output device which respectively have an input function and an output function designated in the function execution request, the devices executing the functions, respectively, in linkage with each other; and a flow executing unit configured to send process requests to the input device and the output device designated in the linkage flow, respectively. | 09-20-2012 |
20130007311 | PLC/WIRELESS DEVICE COORDINATED WIRELESS TRANSMISSIONS - A Power Line Communications (PLC) device includes a PLC interface, a wireless interface, a processing module, and memory. The PLC device communicates with a second PLC device via the PLC interface to establish a wireless transmission timing base, communicates with the second PLC device via the power mains to coordinate simultaneous wireless data transmissions to a client device from the PLC device and the second PLC device, wirelessly transmits data to the client device based upon the wireless transmission timing base and the coordination with the second PLC device. In combination the PLC devices' simultaneous wireless data transmissions may be Multiple Input Multiple Output (MIMO) transmissions, diversity transmissions, and/or beam formed transmissions. In another operation, the PLC device characterizes its surroundings based upon concurrent directional transmission and receipt of wireless transmissions by the PLC device. | 01-03-2013 |
20130031282 | DYNAMIC STABILIZATION FOR A STREAM PROCESSING SYSTEM - Disclosed are a method and a computer program storage product for dynamically stabilizing a stream processing system. The method includes receiving at least one computing resource allocation target. A plurality of downstream processing elements and an upstream processing element are associated with at least one input buffer. Each of the downstream processing elements consumes data packets produced by the upstream processing element received on an output stream associated with the upstream processing element. A fastest input rate among each downstream processing element in the plurality of downstream processing elements is identified. An output rate of the upstream processing element is set to the fastest input rate that has been determined for the plurality of downstream processing elements. | 01-31-2013 |
20130111080 | USING HOST TRANSFER RATES TO SELECT A RECORDING MEDIUM TRANSFER RATE FOR TRANSFERRING DATA TO A RECORDING MEDIUM | 05-02-2013 |
20130117474 | GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO IMPLEMENT FLOW CONTROL - An enhanced general input/output communication architecture, protocol and related methods are presented. | 05-09-2013 |
20130185466 | APPLICATION OF ALTERNATE ALIGN PRIMITIVES DURING SAS RATE MATCHING TO IMPROVE CONTINUOUS ADAPTATION - The present invention is directed to a method which allows for substitution of standard SAS ALIGN primitives with an alternative, more spectrally pure set of SAS ALIGN primitives that allows for enhanced continuous adaptation performance. Two consenting SAS devices which are connected to each other may negotiate for and start communicating using the alternate set of ALIGN primitives, which may allow for improved jitter tolerance and reduced bit error rate. | 07-18-2013 |
20130232285 | CONTROL METHOD OF FLOW CONTROL SCHEME AND CONTROL MODULE THEREOF - A control method of flow control scheme and a control module thereof are provided. The provided control method includes setting a value of the transaction packets and outputting data to an external device according to the value of the transaction packets. When a not-ready transaction packet is received, the value of the transaction packets is reduced and the data is transmitted according to the value of the transaction packets. | 09-05-2013 |
20140032795 | INPUT/OUTPUT PROCESSING - The present disclosure provides an electronic device that includes a lower device configured to process local input/output communications between the electronic device and a host, wherein the lower device is stateless. The electronic device also includes a memory comprising a data flow identifier used to associate a data flow resource of the host with a data flow resource corresponding to the lower device. A data packet sent from the lower device to the host includes the data flow identifier. | 01-30-2014 |
20140032796 | INPUT/OUTPUT PROCESSING - The present disclosure provides a system for processing local input/output. The system includes a processor coupled to a host memory through a memory controller. The system also includes an upper device communicatively coupled to the memory controller. The upper device includes one or more transmit/receive work queues. The system also includes a lower device communicatively coupled to the upper device, wherein the lower device is stateless. Data packets passed between the upper device and the lower include a data flow identifier used to identify data flow resources of the upper device and the lower device corresponding to the data packet. | 01-30-2014 |
20140173143 | Data Processing Method and Apparatus - The present invention relates to the field of communications technologies and discloses a data processing method and apparatus to obtain a DPD non-linear distortion compensation coefficient under a QPSK mode. The embodiments of the present invention receive a first data flow, and perform interpolation into the first data flow to obtain a second data flow; receive a third data flow, and calculate a data flow signal quality difference between the third data flow and the second data flow; and obtain a DPD non-linear distortion compensation coefficient according to the data flow signal quality difference and the third data flow or the second data flow. The embodiments of the present invention are applicable to the scenarios of obtaining a DPD non-linear distortion compensation coefficient in QPSK mode. | 06-19-2014 |
20140297902 | TECHNIQUES FOR RATE GOVERNING OF A DISPLAY DATA STREAM - Techniques for rate governing of a display data stream are described. In one embodiment, for example, an apparatus may comprise a processor circuit and a graphics management module comprising a differential analyzer. In some embodiments, the graphics management module may be operative on the processor circuit to determine a target display data transmission rate for one or more displays, determine, by the differential analyzer, an actual display data transmission rate for one or more display data packets based on the target display data transmission rate, transmit the one or more display data packets based on the actual display data transmission rate, and accumulate a difference between the actual display data transmission rate and the target display data transmission rate for the one or more display data packets. Other embodiments are described and claimed. | 10-02-2014 |
20150032915 | STORAGE SYSTEM INCLUDING DATA TRANSFER SPEED MANAGER AND METHOD FOR CHANGING DATA TRANSFER SPEED THEREOF - A storage system according to an exemplary embodiment of the inventive concept includes a host and a storage device. The host includes a link speed table having data transfer speed information for an application. A data transfer speed manager is configured to calculate a predetermined transfer speed based on the data transfer speed information for the application. A device driver is configured to control an operation of the storage device. A host controller is configured to change a data transfer speed of an interface based on the predetermined transfer speed provided through the device driver. | 01-29-2015 |