Class / Patent application number | Description | Number of patent applications / Date published |
708405000 | Discrete Fourier Transform (i.e., DFT) | 14 |
20080228845 | APPARATUS FOR CALCULATING AN N-POINT DISCRETE FOURIER TRANSFORM BY UTILIZING COOLEY-TUKEY ALGORITHM - An apparatus for calculating an N-point Discrete Fourier Transforms (DFTs) and/or Inverse DFTs (IDFTs) using the Cooley-Tukey algorithm is provided. The N-point DFT/IDFT is achieved by calculating a plurality of N | 09-18-2008 |
20080243983 | Residual Fourier-Padding Interpolation for Instrumentation and Measurement - A technique for interpolating a series of samples includes constructing a mathematical model of the series that describes its large signal behavior. The model is subtracted from the original series to yield a residue. A discrete Fourier transform (DFT) is taken of the residue, and the DFT is zero-padded. An inverse DFT of the padded result yields an interpolated residue, which is then added back to the mathematical model to construct an interpolated version of the series of samples. Using this technique, accurate interpolation can generally be attained even when the series of samples is not coherently sampled. | 10-02-2008 |
20080256160 | Reduction of Digital Filter Delay - An apparatus for reducing a digital filter delay includes means for determining the magnitude response of a desired filter. Means form the real cepstrum of this magnitude response. Means transform the real cepstrum into a complex cepstrum of a corresponding minimum-phase filter having the same magnitude response as the desired filter. A filter applies a smoothly decaying shaping window to the complex cepstrum. Means transform the shaped complex cepstrum into an estimated minimum-phase filter. | 10-16-2008 |
20080281894 | Digital architecture for DFT/IDFT hardware - Embodiments of the present invention can provide circuits and systems for computing a discrete Fourier transform (DFT) or an inverse discrete Fourier transform (IDFT). An embodiment includes an input circuit, an intermediate circuit, an output circuit, and an accumulator circuit. The input circuit can receive a set of input values, and can use a first set of degenerate rotators to generate a first set of intermediate values. The intermediate circuit can receive the first set of intermediate values, and can use a set of CORDICs (coordinate rotation digital computers) to generate a second set of intermediate values. The output circuit can receive the second set of intermediate values, and can use a second set of degenerate rotators to generate a third set of intermediate values. The accumulator circuit can receive the third set of intermediate values, and can use a set of accumulators to generate a set of output values. | 11-13-2008 |
20080294709 | Processing geometric data using spectral analysis - In one embodiment, the present invention includes a method for receiving vertex data corresponding to a surface of an image, performing a discrete Fourier transform (DFT) on the vertex data to obtain a frequency response, zero padding the frequency response to obtain zero padded frequency response data, and performing an inverse DFT (IDFT) on the zero padded frequency response data to obtain modified vertex data including the vertex data and additional vertex data corresponding to the surface. Other embodiments are described and claimed. | 11-27-2008 |
20090313314 | TECHNIQUES FOR PERFORMING DISCRETE FOURIER TRANSFORMS ON RADIX-2 PLATFORMS - A technique for performing a discrete Fourier transform (DFT) includes storing, in a single-port memory, multiple signal points. A first group of consecutive ones of the multiple signal points are fetched (from a first line of the single-port memory) to a first input register associated with a processor that includes multiple arithmetic units (AUs) that are each configured to perform multiply accumulate (MAC) operations. A second group of consecutive ones of the multiple signal points are then fetched (from a second line of the single-port memory) to a second input register associated with the processor. Selected pairs of the multiple signal points are then loaded (one from each of the first and second input registers for each pair) into the multiple arithmetic units during an initial butterfly stage. Radix-2 butterfly operations are then performed on the selected pairs of the multiple signal points (using the multiple AUs) to provide respective output elements. | 12-17-2009 |
20100106760 | ORTHOGONAL TRANSFORM APPARATUS AND INTEGRATED CIRCUIT - To implement processing for plural orthogonal transforms having different transform bases and implement a response to processing in new coding standards, using one orthogonal transform unit, with regard to orthogonal transform which is a basic process in still picture and moving picture coding. | 04-29-2010 |
20100161700 | Apparatus for Calculating an N-Point Discrete Fourier Transform - Described embodiments provide an apparatus for calculating an N-point discrete Fourier transform of an input signal having multiple sample values. The apparatus includes at least one input configured to receive the sample values and a counter to count sample periods. Also included are at least two parallel multipliers to multiply each sample value, with each of the multipliers having a corresponding multiplication factor. There is at least one multiplexer to select one of the at least two parallel multipliers. An adder sums the scaled sample values and an accumulator accumulates the summed sample values. N is an integer and the at least two parallel multipliers are selectable based upon the value of N and the value of the sample period count. | 06-24-2010 |
20110185001 | Signal Processing Method and Data Processing Method and Apparatus - The present invention discloses a signal processing method and a data processing method and apparatus. A time-domain to frequency-domain signal processing method includes: pre-processing time-domain data; pre-rotating the pre-processed data by using a rotation factor a·W | 07-28-2011 |
20120254274 | Index Generation Scheme for Prime Factor Algorithm Based Mixed Radix Discrete Fourier Transform (DFT) - In one embodiment, a processor performs a method of generating pipelined data read indexes and data write indexes for a Prime Factor Algorithm (PFA) Discrete Fourier Transform (DFT) without look-up tables. The processor is adapted to factorize an ‘N’ point PFA DFT into one or more mutually prime factors and zero or more non-prime factors, calculate a 0th column index for an ith row (Xi0), calculate an IndCor when the value of Xi0 equals zero and when a row number (i) does not equal zero, calculate Xij, generate the data read indexes, perform a DFT kernel computation on Lk point for the mutually prime factors and the non-prime factors, and generate the data write indexes for the mutually prime factors and the non-prime factors. Xij represents ith row and jth column of 2D input Buffer and enables a selection of a linear index from the 2D input buffer. | 10-04-2012 |
20130159369 | APPARATUS AND METHOD FOR PERFORMING DISCRETE FOURIER TRANSFORM - A Discrete Fourier Transform (DFT) apparatus is provided. The DFT apparatus includes a first delay, a second delay, an operator, and a multiplier. The first delay delays one sampling data by N-sample in a time axis when the one sampling data is input. The second delay delays an output value of a frequency component for a previous sampling data by 1-sample. The operator performs an operation based on the input one sampling data, the one sampling data delayed by the N-sample in the time axis, and the 1-sample delayed output value of the frequency component for the previous sampling data. The multiplier multiplies an output value from the operator by a twiddle factor | 06-20-2013 |
20130173680 | Fixed-Coefficient Variable Prime Length Recursive Discrete Fourier Transform System - A fixed-coefficient variable prime length recursive discrete Fourier transform system includes a pre-processing device, a real-part computation device, an imaginary-part computation device and a post-processing device. The pre-processing device receives N digital input signals and performs order permutation operation to generate first and second temporal signals, wherein N is a prime number. The real-part computation device receives the real part of the first and second temporal signals and performs discrete cosine/sine transform to generate third and fourth temporal signals. The imaginary-part computation device receives the imaginary part of the first and second temporal signals and performs discrete cosine/sine transform to generate fifth and sixth temporal signals. The post-processing device receives the third, fourth, fifth and sixth temporal signals to perform order permutation and addition operations for generating N digital output signals, wherein the N digital output signals are the discrete Fourier transform of the N digital signals. | 07-04-2013 |
20130212143 | METHOD FOR OBTAINING INFORMATION ON THE PHASE OF A ROTATING SYSTEM BASED ON DETERMINATION OF THE FUNDAMENTAL COMPONENT OF AN INCOMING SIGNAL PROVIDED BY A SENSOR DRIVEN BY A PERIODIC MODULATION FUNCTION AND DEVICE FOR CONTROLLING A ROTATING SYSTEM - Phase information of a rotation system is obtained by a) reading the present output value Sk, (k=0, . . . , N−1) of the sensor at a sequence of N points of time during a first period of a periodic modulation function (PHA, PHB, PHC, PHD), b) storing read output values Sk or a value derived from this output value at least temporarily in a memory, c) extracting information on the phase of the rotating system, wherein said information is extracted based on evaluation of a function of the type, wherein=and, and d) sampling and storing sequentially further output values Sk, k=N, N+1, . . . of the sensor at corresponding points of time in the following periods of the periodic modulation function (PHA, PHB, PHC, PHD). Each reading information on the phase of the rotating system based on the function is extracted and a controller device ( | 08-15-2013 |
20160078001 | EVENT-BASED SPATIAL TRANSFORMATION - A method for computing a spatial Fourier transform for an event-based system includes receiving an asynchronous event output stream including one or more events from a sensor. The method further includes computing a discrete Fourier transform (DFT) matrix based on dimensions of the sensor. The method also includes computing an output based on the DFT matrix and applying the output to an event processor. | 03-17-2016 |