Class / Patent application number | Description | Number of patent applications / Date published |
708252000 | Linear feedback shift register | 22 |
20080281892 | Method and Apparatus for Generating Pseudo Random Numbers - The present invention proposes a methodology implementable in form of a hardware or software module for generating a pseudo random number. The pseudo random number corresponds to a pseudo random sequence of bits, which form the pseudo random number. A plurality of m polynomials is provided. The polynomials are derived from an original polynomial, which defines a feedback function of a linear feedback shift register capable for generating the pseudo random number. The polynomials are functions of n bits, which serve as initial bits and seed bits, respectively. Then, the polynomials are applied on the initial bits for generating the pseudo random number, which comprises at least m bits resulting from the m polynomials. Due to the fact that the polynomials are independent from each other, i.e. the initial bits serve as input values to the polynomials, the polynomials can be applied substantially simultaneously or in any other sequence. | 11-13-2008 |
20080320067 | METHOD AND SYSTEM FOR CONSTANT AMPLITUDE RANDOM SEQUENCE CONSTRUCTION - Aspects of a method and system for constant amplitude random sequence construction may include generating one or more real signal components via a random number generator, wherein each of the generated one or more real signal components may be subjected to an amplitude constraint. One or more corresponding imaginary signal components may be generated, each of which may be derived from a relationship between the generated one or more real signal components and the amplitude constraint. At least the generated one or more real signal components and the generated one or more corresponding imaginary signal components may be combined to generate a complex constant amplitude signal. The one or more real signal components may be generated according to a probability distribution in the random number generator. | 12-25-2008 |
20090006513 | DEVICE AND METHOD FOR GENERATING A RANDOM NUMBER - A method and a device are provided, in particular a transponder, for generating a random number by a linear feedback shift register, wherein a first seed is generated by means of a first automaton, a second seed is generated by means of a second automaton, the first and second automata operate using different functional principles, so that the first and second seeds have different properties, and the shift register is reloaded with the first and/or second seed. | 01-01-2009 |
20090138535 | Novel Binary and n-State Linear Feedback Shift Registers (LFSRs) - N-state with n equal or greater than 2 modified Linear Feedback Shift Registers (mLFSRs) having a non-reversible n-state switching function have been disclosed. An mLFSR can also contain a device that implements an n-state logic function of which one input is provided with a signal external to the mLFSR. The mLFSR can be in Fibonacci or in Galois configurations. N-state scramblers and corresponding descramblers applying an mLFSR are provided. N-state coding boxes apply non-reversible switching functions connected to n-state scrambling or descrambling functions. Sequence generators and detectors are also disclosed. | 05-28-2009 |
20090204656 | PSEUDO RANDOM NUMBER GENERATOR AND METHOD FOR GENERATING A PSEUDO RANDOM NUMBER BIT SEQUENCE - A pseudo random number generator including a plurality of non-singular feedback shift registers each configured to output a bit-sequence. At least a first of the plurality of non-singular feedback shift registers has one or more first cycles of a length less than or equal to two, and a second of the plurality of non-singular feedback shift registers has one or more second cycles of a length less than or equal to two, and the one or more first cycles encompass a first set of one or more of shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . and the one or more second cycles encompass a second set of one or more of the shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . with the first and the second set being disjoint. | 08-13-2009 |
20090271463 | PSEUDORANDOM NUMBER GENERATOR AND DATA COMMUNICATION APPARATUS - The present invention is directed to improve leak analysis resistance by improving randomness of a pseudorandom number. A pseudorandom number generator as a representative embodiment of the invention includes a shift resistor obtained by coupling a plurality of flip flop circuits and can generate a pseudorandom number by shifting signals by the shift register synchronously with a clock signal. A shift amount changing circuit capable of changing a shift amount in the shift register in accordance with a control signal supplied from the outside of the pseudorandom number generator is provided. By changing the shift amount in the shift register in accordance with a control signal supplied from the outside of the pseudorandom number generator by the shift amount changing circuit, it becomes difficult to make outputs of the pseudorandom number generator the same. By using such a pseudorandom number generator, leak analysis resistance can be improved. | 10-29-2009 |
20090327381 | TRUE RANDOM NUMBER GENERATOR - The present invention relates to an apparatus for generating a true random number comprising: (a) one or more decoupled oscillator(s), for generating a first set of one or more random bit(s); (b) one or more clock sampler(s), for generating a second set of one or more random bit(s); (c) a logic gate for logically combining said first set of one or more random bit(s) and said second set of one or more random bit(s) into a single true random bit; (d) a synchronizing circuit for synchronizing said single true random bit to the clock domain of said apparatus; (e) an LFSR, synchronized with said clock domain, which receives said synchronized single true random bit, and logically combines at least one of its internal bit(s) with said synchronized single true random bit for generating a true random number represented by the internal bits of said LFSR; and (f) an output bus for communicating said true random number from said LFSR. | 12-31-2009 |
20090327382 | PSEUDO-RANDOM NUMBER GENERATION DEVICE, STREAM ENCRYPTION DEVICE AND PROGRAM - A pseudo-random number generation device having a resistance against attack methods that use the number of operations of an LFSR, a stream encryption device, and a program are provided. The stream encryption device has: means (delay means | 12-31-2009 |
20100287224 | Pseudo-random bit sequence generator - The present invention discloses a pseudo-random bit sequence (PRBS) generator which outputs the entire datapath, or entire pseudo-random bit sequence, over one single clock cycle. This is accomplished by removing redundancy, or any redundant exclusive-or gates from linear feedback shift registers; using logic to identify the critical path and optimal shift for the critical path; and dividing the datapath into several pipeline stages to increase the clock rate (i.e., transmission speed). | 11-11-2010 |
20110066670 | COMBINATION OF VALUES FROM A PSEUDO-RANDOM SOURCE - Values generated by at least one pseudo-random source (PRS) are recombined to form one or more recombined values. The method involves using analog, digital, or hybrid manipulation techniques to transform characteristics of PRS, including but not limited to statistical characteristics, and input/output characteristics. In some examples, the recombination method provides a way to de-bias output bits from PRS without appreciable increase in self noise. In some examples, the recombined result passes NIST's Statistical Tests for Randomness even if underlying PRS natively does not. In some examples, the recombination method provides a way to make a PRS challengeable, even if the underlying PRS is not natively challengeable. In some examples, recombination is used to allow single PRS to have multiple outputs, and in some cases multi-dimensional (orthogonal) outputs. In some examples, a multi-modal system is created via recombination using multiple PRS. In some examples, post recombined result exhibit super error characteristics (prior to application of any error correction codes) compared to native PRS output. In some examples, the recombined values are applied to security applications, for instance authentication and/or cryptographic functions, which may provide improved characteristics (e.g., cryptographic strength) in view of a de-biased output which in some examples also passes NIST's Statistical Tests. | 03-17-2011 |
20120089656 | RANDOM NUMBER GENERATOR CIRCUIT AND CRYPTOGRAPHIC CIRCUIT - A random number generator circuit includes: an element generating and outputting physical random numbers; a digitizing circuit digitizing the physical random numbers to output a random number sequence tested by a testing circuit; and an error correcting code circuit including a shift register having the random number sequence input thereto, a multiplier multiplying the stored random number sequence by an error-correcting-code generating matrix, and a selector switch outputting one of an output of the shift register and an output of the multiplier in accordance with a test result obtained by the testing circuit. The error correcting code circuit outputs the output of the multiplier as a corrected random number sequence from the selector switch when the result of a test conducted by the testing circuit indicates a rejection. The testing circuit tests the corrected random number sequence when the result of the test indicates a rejection. | 04-12-2012 |
20120303691 | EXECUTION UNIT WITH INLINE PSEUDORANDOM NUMBER GENERATOR - A circuit arrangement and method couple a hardware-based pseudorandom number generator (PRNG) to an execution unit in such a manner that pseudorandom numbers generated by the PRNG may be selectively output to the execution unit for use as an operand during the execution of instructions by the execution unit. A PRNG may be coupled to an input of an operand multiplexer that outputs to an operand input of an execution unit so that operands provided by instructions supplied to the execution unit are selectively overridden with pseudorandom numbers generated by the PRNG. Furthermore, overridden operands provided by instructions supplied to the execution unit may be used as seed values for the PRNG. | 11-29-2012 |
20130018934 | METHODS FOR OPERATING CONTROLLERSAANM Kim; Yong JuneAACI SeoulAACO KRAAGP Kim; Yong June Seoul KRAANM Chung; Jung SooAACI SeoulAACO KRAAGP Chung; Jung Soo Seoul KRAANM Kong; Jun JinAACI Yongin-siAACO KRAAGP Kong; Jun Jin Yongin-si KRAANM Son; HongrakAACI Anyang-siAACO KRAAGP Son; Hongrak Anyang-si KR - A method for operating a controller may include storing a pseudo noise (PN) sequence provided from a PN sequence generator in an i-th area of a seed table and cyclically shifting the PN sequence from the i-th area to an (i+1)-th area in the table to form the table. The table may include row and column areas. A method for operating a controller may include receiving a sequence from a sequence generator, splitting the sequence into seed units, storing split sequences in a j-th area of the seed table, and forming the table including the seed units corresponding to the split sequences stored in the j-th area. A method for operating a controller may include storing a sequence provided from a sequence generator in a seed table that includes a plurality of areas and cyclically shifting the sequence in the table until a seed is formed in each area. | 01-17-2013 |
20130073598 | Entropy source with magneto-resistive element for random number generator - An entropy source and a random number (RN) generator are disclosed. In one aspect, a low-energy entropy source includes a magneto-resistive (MR) element and a sensing circuit. The MR element is applied a static current and has a variable resistance determined based on magnetization of the MR element. The sensing circuit senses the resistance of the MR element and provides random values based on the sensed resistance of the MR element. In another aspect, a RN generator includes an entropy source and a post-processing module. The entropy source includes at least one MR element and provides first random values based on the at least one MR element. The post-processing module receives and processes the first random values (e.g., based on a cryptographic hash function, an error detection code, a stream cipher algorithm, etc.) and provides second random values having improved randomness characteristics. | 03-21-2013 |
20140019502 | RANDOM BIT STREAM GENERATOR WITH ENHACED BACKWARD SECRECY - A random bit stream generator includes a plurality of feedback shift registers configured to store a plurality of bit values that represent an internal state of the random bit stream generator. Each feedback shift register includes a register input and a register output. The random bit stream generator further includes a Boolean output function configured to receive the plurality of register outputs from the plurality of feedback registers, to perform a first Boolean combination of the plurality of register outputs, and to provide a corresponding output bit, wherein a plurality of successive output bits forms a random bit stream. A feedback loop is configured to perform a second Boolean combination of the output bit with at least one register feedback bit of at least one of the feedback shift registers, so that the register input of the at least one feedback shift register is a function of the output bit. | 01-16-2014 |
20140032623 | Methods and Systems for Determining Characteristics of a Sequence of n-state Symbols - Maximum length properties of n-state sequences of n-state symbols with n=2 or n>2 are tested. Checkwords are generated from p consecutive n-state symbols in a sequence of n-state symbols which may overlap by (p−1) n-state symbols. If a sequence has n | 01-30-2014 |
20140067891 | PSEUDO RANDOM NUMBER GENERATOR AND METHOD FOR PROVIDING A PSEUDO RANDOM SEQUENCE - In various embodiments, a pseudo random number generator is provided. The pseudo random number generator may include: a pair of shift registers, wherein a first shift register in the pair is a linear shift register and a second shift register in the pair is a nonlinear shift register, wherein the linear shift register is configured to receive a first output sequence from the nonlinear shift register, and to take the first output sequence as a basis for providing a second output sequence; wherein the pseudo random number generator is configured to take the second output sequence as a basis for providing a pseudo random sequence. | 03-06-2014 |
20140237012 | PSEUDORANDOM NUMBER GENERATING CIRCUIT AND METHOD - A pseudorandom number generating circuit includes: a first generator including a shift register and configured to generate a first pseudorandom number, the shift register including registers, the first pseudorandom number having a plurality of bits corresponding to the registers; a second generator configured to generate a second pseudorandom number; and a selector configured to select a bit that is to be output from the plurality of bits by using the second pseudorandom number. | 08-21-2014 |
20140237013 | PSEUDO-RANDOM BIT SEQUENCE GENERATOR - The present invention discloses a pseudo-random bit sequence (PRBS) generator which outputs the entire datapath, or entire pseudo-random bit sequence, over one single clock cycle. This is accomplished by removing redundancy, or any redundant exclusive-or gates from linear feedback shift registers; using logic to identify the critical path and optimal shift for the critical path; and dividing the datapath into several pipeline stages to increase the clock rate (i.e., transmission speed). | 08-21-2014 |
20140324934 | RANDOM NUMBER GENERATOR - The random number generator comprises a linear feedback shift register ( | 10-30-2014 |
20150032787 | Apparatus and Method for Detecting Integrity Violation - An apparatus for detecting integrity violation includes a feedback shift register including a plurality of registers connected in series, and a feedback function unit connected between an output of a number of the registers and an input of at least one of the registers. The apparatus further includes an integrity violation detector adapted to determine as to whether a sequence of values at an input or output of at least one of the registers, or a logic combination thereof, is a non-constant sequence or a constant sequence. The apparatus is further adapted to output an indication that the feedback shift register is in an integral state if the sequence of values is a non-constant sequence, or to output an indication that the feedback shift register is subjected to an integrity violation if the sequence of values is a constant sequence. | 01-29-2015 |
20150331671 | GENERATING PSEUDO-RANDOM NUMBERS USING CELLULAR AUTOMATA - A method for using cellular automata to generate quality pseudo-random numbers, which may be used in cryptographic and other applications. A cellular automaton is a decentralized computing model that enables the performance of complex computations with the help of only local information. In general, cellular automata comprise a plurality of identical basic memory building blocks that are discrete in time and space, where the structure evolves over time according to a local transition rule. Cellular automata can be used in information security as an alternative for classic Feedback Shift Registers (FSRs) for pseudo-random sequence generation. The outputs of a pair of linear FSRs (LFSRs) act as continuous inputs to the two boundaries of a one-dimensional or two-dimensional elementary cellular automata. | 11-19-2015 |