| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 702069000 | Signal quality (e.g., timing jitter, distortion, signal-to-noise ratio) | 39 |
| 20090248336 | ANALYZER FOR SIGNAL ANOMALIES - A signal analyzer includes a divergence detector for detecting periodic interference in a signal, an information detector for detecting a random event in the signal, and output circuitry for providing compensation for the periodic interference and the random event. | 10-01-2009 |
| 20090119044 | DIGITAL SIGNAL PROCESSING IN OPTICAL SYSTEMS USED FOR RANGING APPLICATIONS - Methods and apparatuses for reducing the response time along with increasing the probability of ranging of optical rangefinders that digitize the signal waveforms obtained from the pulse echoes returned from various types of objects to be ranged, the pulse echoes being too weak to allow successful ranging from a single waveform or the objects being possibly in motion during the capture of the pulse echoes. In a first embodiment of the invention, the response time at close range of a digital optical rangefinder is reduced by using a signal averaging process wherein the number of data to be averaged varies with the distance according to a predetermined function. In a second embodiment of the invention, the probability of ranging objects in motion along the line of sight of a digital optical rangefinder is increased and the object velocity measured by performing a range shift of each acquired signal waveform prior to averaging. In a third embodiment of the invention, the signal waveforms acquired in the line of sight of a digital optical rangefinder are scanned over a predetermined zone and range shifted and averaged to allow for early detection and ranging of objects that enter in the zone. | 05-07-2009 |
| 20090271133 | CLOCK JITTER MEASUREMENT CIRCUIT AND INTEGRATED CIRCUIT HAVING THE SAME - Provided is a measurement circuit for measuring a jitter of a clock signal. Delay elements delay the clock signal into delayed clock signal. Latches latch the delayed clock signals to indicate whether transition edges of the clock signal is within a window value which is corresponding to delays of the delay elements. Based on the latch result from the latches, a finite state machine generates control signals for controlling the delay elements. If the latch result indicates that the transition edges of the clock signal is not within the window value, the control signals adjust the delays of the delay elements and the window value. The jitter of the clock signal is measured based on the delays of the delay elements and the window value. | 10-29-2009 |
| 20120226458 | SFP - DIAGNOSTIC - A small form-factor pluggable (SFP) unit having signal diagnostic capabilities comprises one or more diagnostic measurement points. At least one of the one or more diagnostic measurement points provides a signal diagnostic measurement for diagnostic of the SFP unit. | 09-06-2012 |
| 20090018786 | Interferometric iterative technique with bandwidth and numerical-aperture dependency - An interferometric intensity equation includes parameters that depend on bandwidth and numerical aperture. An error function based on the difference between actual intensities produced by interferometry and the intensities predicted by the equation is minimized iteratively with respect to the parameters. The scan positions (i.e., the step sizes between frames) that minimized the error function are then used to calculate the phase for each pixel, from which the height can also be calculated in conventional manner. As a result, the phase map generated by the procedure is corrected to a degree of precision significantly better than previously possible. | 01-15-2009 |
| 20100017158 | GENERATING WORST CASE BIT PATTERNS FOR SIMULTANEOUS SWITCHING NOISE (SSN) IN DIGITAL SYSTEMS - A methodology to determine a bit pattern that may excite a worse case or near worse case simultaneous switching noise on a memory or input/output (IO) interface of a digital system is provided. This methodology involves determining an impedance profile of the IO interface of the digital system. The amplitude response of signal X | 01-21-2010 |
| 20110295536 | CLOCK JITTER ANALYZING METHOD AND APPARATUS - There is provided a method for analyzing a jitter of a clock flowing in a clock path inside a semiconductor integrated circuit. Elements, which belong to any clock domains except for a selected clock domain among operation scenario information, are brought into a halting state, to create a domain operation scenario. Using the domain operation scenario, a power-supply noise analysis is performed on a clock used in the selected clock domain for a period of one to several cycles, to obtain a domain power-supply noise waveform. The obtained waveform is repeatedly connected, to create a cyclic waveform. Part of the cyclic waveform is halted, to obtain a processed domain power-supply noise waveform. The processed domain power-supply noise waveform obtained with respect to each clock domain is superimposed, to create a power-supply noise waveform. Based on the created waveform, a jitter of the clock flowing in the clock path is calculated. | 12-01-2011 |
| 20120072151 | ENERGY DETECTION METHOD AND AN ENERGY DETECTION CIRCUIT USING THE SAME - An energy detection method is provided. The method obtains an initial time point of an input signal with reference to a digital signal corresponding to the input signal. An i | 03-22-2012 |
| 20120296590 | EVALUATING HIGH FREQUENCY TIME DOMAIN IN EMBEDDED DEVICE PROBING - A method and associated system for evaluating a high-frequency signal (S | 11-22-2012 |
| 20090281751 | JITTER MEASUREMENT APPARATUS, JITTER MEASUREMENT METHOD, RECORDING MEDIA, COMMUNICATION SYSTEM AND TEST APPARATUS - Provided is a jitter measurement apparatus, including a sampling section that samples a signal under measurement having a cycle T, a waveform reconfiguring section that shapes a reconfigured waveform having the cycle T by rearranging ordinal ranks of sample values sampled by the sampling section, a distribution generating section that generates a timing distribution of edges in the reconfigured waveform, and a statistical value calculating section that calculates a statistical value of the timing distribution. The sampling section may sample the signal under measurement having the cycle T a certain number of times N while the signal under measurement repeats for M cycles, where M and N are coprime. | 11-12-2009 |
| 20080228417 | CHANGING POINT DETECTING CIRCUIT, JITTER MEASURING APPARATUS AND TEST APPARATUS - A changing point detection circuit is provided that detects timing of changing points at which a logic value of a signal under measurement changes and includes a multi-strobe circuit generating a logic value data string obtained by detecting a logic value of the signal under measurement according to a plurality of strobes, each strobe having a different phase; a changing point detecting section detecting in which strobe the logic value changes based on the logic value data string; an edge designation storage section storing in advance information concerning whether an edge-type of the changing point to be detected is a rising edge or a falling edge of the signal under measurement; a selecting section selecting the changing point corresponding to the edge-type stored by the edge designation storage section from among the changing points detected by the changing point detecting section; and a strobe place storage section storing information concerning which strobe the changing point selected by the selecting section corresponds to. | 09-18-2008 |
| 20080319691 | Periodic Jitter (PJ) Measurement Methodology - Methodologies are disclosed for analyzing periodic jitter is a signal pattern using a continuous time interval analyzer. Sampled signal patterns may be correlated using time interval error calculations to determine start and stop sequences within sampled blocks of signal data while sampling synchronization may be achieved based on time interval calculations or pattern interval error calculations. | 12-25-2008 |
| 20090063071 | SYSTEM, METHOD, AND APPARATUS FOR DISTORTION ANALYSIS - A system, method, and apparatus for distortion analysis is provided. A method in accordance with at least one embodiment of the present disclosure may include receiving a clock frequency at a direct digital synthesizer (DDS) and generating at least one stream of phase numbers via said DDS. The method may further include generating a digital sine wave using, at least in part, said clock frequency and said at least one stream of phase numbers. Of course, additional implementations are also within the scope of the present disclosure. | 03-05-2009 |
| 20090138222 | S/N Ratio Measuring Method in Eddy Current Testing on Internal Surface of Pipe or Tube - A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: | 05-28-2009 |
| 20090088996 | Jitter measuring system and method - The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first signal and a second signal; and a converter for converting a phase different between the first signal and the second signal into a relevant digital code; wherein the phase difference between the first signal and the second signal is an amplification of jitter. | 04-02-2009 |
| 20090112498 | USING SENSOR SPECTRAL ENERGY TO DETECT AND/OR ISOLATE SENSOR FAULTS - A method of detecting and/or isolating a fault of a sensor in a system in substantially real time or in non-real time (e.g., using off-line analysis). A spectral energy of a signal of the sensor is determined over a predetermined range of frequencies within a window of samples of the signal. The determined spectral energy is evaluated for consistency with a substantially current state of the system. | 04-30-2009 |
| 20090112499 | DEVICE FOR JITTER MEASUREMENT AND METHOD THEREOF - The device for jitter measurement and a method thereof are provided. The device for jitter measure includes a signal retrieving module, a signal amplifying module, an edge detecting module, and a time-to-digital converting module. The signal retrieving module receives a signal-under-test, and retrieves a first pulse signal having a pulse width equal to a period of the signal-under-test. The signal amplifying module amplifies the pulse width of the first pulse signal and thereby generates a second pulse signal. The edge detecting module detects a rising edge and a falling edge of the second pulse signal, and generates a first indication signal and a second indication signal according to the respective detected results. The time-to-digital converting module converts the pulse width of the second pulse signal existed in time domain to a digital signal according to the first indication signal and the second indication signal. | 04-30-2009 |
| 20090105977 | TEST APPARATUS, SKEW MEASURING APPARATUS, DEVICE AND BOARD - There is provided a test apparatus for testing a device under test, which includes a plurality of drivers which output signals to the device under test, an output control section which controls the plurality of drivers to output a plurality of signals respectively, a calculating section which calculates skews of the plurality of signals output from the plurality of drivers respectively, based on a combination signal obtained by combining the plurality of signals, and an adjusting section which adjusts the timings to output signals to be output from the plurality of drivers, based on the skews. | 04-23-2009 |
| 20110035169 | JITTER CALCULATING DEVICE, JITTER CALCULATING METHOD AND JITTER CALCULATING PROGRAM - A path of a signal extends from an initial point through first and second cells to an end point. The signal is supplied as a first signal to the first cell and outputted therefrom as a second signal. The signal is supplied as a third signal to the second cell and outputted therefrom as a fourth signal. First delay amounts of the signal in the first cell and a transition time of the second signal are calculated based on a transition time of the first signal and a voltage supplied to the first cell. Second delay amounts of the signal in the second cell and a transition time of the fourth signal are calculated similarly. Here, the transition time of the second signal is set to be a transition time of the third signal. Jitter values in the end point are calculated based on the first and second amounts. | 02-10-2011 |
| 20100030503 | SYSTEM AND CIRCUIT FOR DETERMINING DATA SIGNAL JITTER VIA ASYNCHRONOUS SAMPLING - A system and circuit for determining data signal jitter via asynchronous sampling provides a low cost and production-integrable mechanism for measuring data signal jitter. The data signal is edge-detected and sampled by a sampling clock of unrelated frequency the sampled values are collected in a histogram according to a folding of the samples around a timebase. The timebase is determined by sweeping to detect a minimum jitter for the folded data. The histogram for the correct estimated timebase period is representative of the probability density function of the location of data signal edges and the jitter characteristics are determined by the width and shape of the density function peaks. Frequency drift can be corrected by adjusting the timebase used to fold the data across the sample set. | 02-04-2010 |
| 20100036632 | SYSTEM AND METHOD FOR EVALUATING HIGH FREQUENCY TIME DOMAIN IN EMBEDDED DEVICE PROBING - A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known. | 02-11-2010 |
| 20090048796 | TEST APPARATUS - A test apparatus for testing a device under test includes a multi-strobe generating section that generates a plurality of strobe signals with different phases in each of cycles of an output signal output from the device under test, a plurality of timing comparing sections that obtain a value of the output signal respectively at timings of the plurality of strobe signals, a transition detecting section that generates transition data identifying one of the plurality of strobe signals which is positioned at a transition of the output signal, based on the values of the output signal which are respectively obtained at the timings of the plurality of strobe signals, a transition memory that sequentially stores thereon the transition data input thereto, a selecting section that selects, in association with each of the cycles of the output signal, whether to input the transition data output from the transition detecting section into the transition memory, and a calculating section that calculates jitter of the output signal based on the transition data stored on the transition memory. | 02-19-2009 |
| 20100057389 | EVALUATING APPARATUS, A RECORDING MEDIUM STORING AN EVALUATING PROGRAM, AND METHOD FOR DESIGNING SIGNAL TRANSMISSION SYSTEM - A signal transmission evaluating apparatus acquires cross talk ratio and type categorized by a relationship between the first transmission path and the second transmission path for each of the pins of the second transmission path. The apparatus computes an occupation ratio of the crosstalk for each of the types with respect to all of the crosstalk supplied to the first transmission path in the connector, and computes a noise source output in the second transmission path on the basis of the occupation ratio for each of the types of crosstalk. And the apparatus computes first transmission path loss and second transmission path loss on the basis of the occupation ratio for each of the types of crosstalk, and computes an amount of received noise of the first transmission path on the basis of the noise source output and the first transmission path loss and the second transmission path loss. | 03-04-2010 |
| 20100063761 | Clock Jitter Analysis - A tool and a method analyze variations in signal timing, especially timing in a clock signal, commonly known as “clock Jitter.” The tool and method provide advantages over conventional analysis approaches, such as comprehensive coverage of all clocks in a design, taking into account all signal coupling effects, ease of use, ability to automatically identify individual jitter sources, and efficient use of computing resources. | 03-11-2010 |
| 20090198461 | Systems and Methods for Testing and Diagnosing Delay Faults and For Parametric Testing in Digital Circuits - Delay-fault testing and parametric analysis systems and methods utilizing one or more variable delay time-base generators. In embodiments of the delay-fault testing systems, short-delay logic paths are provided with additional scan-chain memory elements and logic that, in conjunction with the one or more variable-delay time-base generators, provides the effect of over-clocking without the need to over-clock. Related methods provide such effective over-clocking. In embodiments of parametric analysis systems, test point sampling elements and analysis circuitry are clocked as a function of the output of the one or more variable-delay time-base generators to provide various parametric analysis functionality. Related methods address this functionality. | 08-06-2009 |
| 20080221813 | Jitter-Based Calibration Procedure With Improved Resolution For Optical Disc Drives - An optical disc drive apparatus ( | 09-11-2008 |
| 20110125437 | METHOD AND DEVICE FOR ANALYZING THE BEHAVIOR OF A POWER SUPPLY IN A CIRCUIT - A method for testing an integrated circuit, comprising performing a series of at least three tests, each comprising: selecting two nodes among at least three nodes for taking a clock signal from an integrated circuit, taking two clock signals at the two selected taking nodes during a test duration, detecting and counting events appearing in a jitter signal between the two clock signals taken, during the test duration, and determining from numbers of events counted a test result proportional to a sum of jitter variances of the two clock signals taken, and at the end of the series of tests, determining by a matrix calculation the jitter variance of each clock signal taken. | 05-26-2011 |
| 20120310573 | METHOD TO ESTIMATE A SIGNAL TO INTERFERENCE PLUS NOISE RATIO BASED ON SELECTION OF THE SAMPLES AND CORRESPONDING PROCESSING SYSTEM - A method to estimate a signal to interference plus noise ratio (SINR) based on selection of the samples and corresponding processing system is provided. The method estimates SINR of an incident signal on a time interval. Samples of the incident signal are received during a time interval. Then, the SINR of the received samples is determined using an average calculation and a variance calculation that includes only a selected set of samples from the received samples. Additionally, the average calculation and/or said variance calculation may be performed by using only the selected set of samples. | 12-06-2012 |
| 20110191047 | Wavelet Denoising for Time-Domain Network Analysis - A method and apparatus are provided for the removal of significant broadband noise from waveforms acquired for time domain network analysis. | 08-04-2011 |
| 20100030504 | DATA MEASUREMENT METHODS AND SYSTEMS - Methods are described for measuring data in a test setup including an impedance tuner. In an exemplary embodiment, the data is data for measuring noise parameters. The data is measured versus a sweep parameter for one tuner state at a time. | 02-04-2010 |
| 20100023290 | Quantum Resonance Interferometry for Detecting Signals - A computer-implemented method for signal analysis includes receiving a first signal, receiving a second signal, coupling the first signal with a first function generated from a first quantum mechanical system to generate a first tunneling rate, coupling the second signal with a second function generated from a second quantum mechanical system to generate a second tunneling rate, coupling the first tunneling rate with a third function generated from a third quantum mechanical system, coupling the second tunneling rate with the third function, obtaining a third tunneling rate, and upon determining that the third tunneling rate is greater than a threshold, identifying that the second signal corresponds to the first signal. | 01-28-2010 |
| 20100023289 | MEASURING APPARATUS, MEASURING METHOD AND TEST APPARATUS - Provided is a measurement apparatus comprising a first timing detecting section that detects first change timings of a signal under measurement; a second timing detecting section that detects second change timings of the signal under measurement; a buffer section that buffers data indicating the first change timings detected by the first timing detecting section and data indicating the second change timings detected by the second timing detecting section; and a calculating section that acquires, from the buffer section, the data indicating the first change timings and the data indicating the second change timings, calculates a temporal relationship between the first change timings and the second change timings, and outputs the temporal relationship. | 01-28-2010 |
| 20100324850 | Static Noise Margin Estimation - In a particular embodiment, a method is disclosed that estimates a total static noise margin of a bit cell of a memory. The method includes determining a correlation coefficient of a left static noise margin of the bit cell as compared to a right static noise margin of the bit cell and estimating a total static noise margin of the bit cell by evaluating an analytical function based on the correlation coefficient. | 12-23-2010 |
| 20090105978 | EMULATION AND DEBUG INTERFACES FOR TESTING AN INTEGRATED CIRCUIT WITH AN ASYNCHRONOUS MICROCONTROLLER - A method of testing a data transmission and reception system comprises sending a test signal from a transmitter ( | 04-23-2009 |
| 20110238349 | EVALUATING HIGH FREQUENCY TIME DOMAIN IN EMBEDDED DEVICE PROBING - A system and associated method for evaluating a high-frequency signal at a point of interest on a signal path from a remote signal at a remote pickup point on the signal path. The point of interest is located on a device under test that is coupled to test equipment via the signal path. The high-frequency signal at the point of interest is calculated from the remote signal at the remote pickup point with an inverse transfer function that eliminates degradation effects on the high-frequency signal that is transferred through the signal path. The inverse transfer function may be calculated from measurements acquired in a test signal transfer through a reference path that simulates electrical properties of the signal path, or configured to a predetermined function if electrical properties of the signal path are known. | 09-29-2011 |
| 20120278019 | APPARATUS AND METHOD FOR COMPUTING COUPLING NOISE VOLTAGE OCCURRING IN FLASH MEMORY DEVICE - An apparatus for computing a coupling noise voltage occurring in a plurality of cells arranged on a plurality of word lines and a plurality of bit lines in a flash memory device includes: a coupling ratio computing unit and a coupling voltage computing unit. The coupling ratio computing unit can compute coupling ratios between a cell and neighboring cells wherein each of the coupling ratios have a value such that the difference between two coupling noise voltage values is minimized. The coupling voltage computing unit computes the coupling noise voltage value occurring in the cell using the computed coupling ratios. | 11-01-2012 |
| 20100185407 | EVALUATION APPARATUS, EVALUATION METHOD, PROGRAM, RECORDING MEDIUM AND ELECTRONIC DEVICE - Provided is an evaluation apparatus that evaluates a characteristic of a propagation apparatus propagating a signal, comprising an output signal measuring section that measures a probability density function expressing a probability density distribution of jitter of an output signal passed by the propagation apparatus; an isolating section that isolates at least one of a random component of a jitter component and a deterministic component of the jitter component in the jitter of the output signal, from the probability density function of the jitter of the output signal; and an evaluating section that evaluates the characteristic of the propagation apparatus based on the jitter component isolated by the isolating section. | 07-22-2010 |
| 20090281750 | METHOD AND APPARATUS FOR IMPROVING NOISE ANALYSIS PERFORMANCE - Method and apparatus for improving performance of noise analysis using a threshold based combination of noise estimation and simulation. The method includes classifying a circuit into one of four defined groups, determining if an input noise is small enough to skip simulation, estimating an output noise wave, scaling down a generated wave by a scaling factor depending on the circuit type, and determining if the estimated output noise is small enough to propagate or instead requires simulation. | 11-12-2009 |
| 20130018613 | ATE TO DETECT SIGNAL CHARACTERISTICS OF A DUTAANM Chow; Ka Ho ColinAACI BrightonAAST MAAACO USAAGP Chow; Ka Ho Colin Brighton MA US - Automatic test equipment (ATE) includes: a circuit to split a stimulus signal, which contains both deterministic and random (noise floor) spectra contents, from a device under test (DUT) into a first signal and a second signal; a first channel to receive the first signal, where the first channel adds a first noise floor to the first signal to produce a first channel signal; a second channel to receive the second signal, where the second channel adds a second noise floor to the second signal to produce a second channel signal, the first noise floor, the second noise floor and the DUT noise floor all being mutually uncorrelated; and processing logic to: estimate a first power of the deterministic stimulus signal, and estimate a second total power based on the first channel signal and the second channel signal. | 01-17-2013 |
