Class / Patent application number | Description | Number of patent applications / Date published |
438800000 | MISCELLANEOUS | 14 |
20080220622 | Substrate processing pallet with cooling - A substrate processing pallet can cool a substrate. A substrate processing pallet can include a base member; an interface pad attachable to the base member, the interface pad having substantially the same coefficient of thermal expansion as the base member and adapted to facilitate cooling of the substrate; and a surface of the base member having features for aligning a substrate on the interface pad. A substrate processing pallet can also include a base member; an interface pad attachable to the base member; an electrostatic chuck for gripping the substrate during processing; an energy storage system for storing energy to sustain the electrostatic chuck at sufficient charge to sustain grip the substrate during processing; and a conduit for transporting gas to a backside of the substrate to facilitate cooling of the substrate. | 09-11-2008 |
20090023302 | PROTECTIVE INSERTS TO LINE HOLES IN PARTS FOR SEMICONDUCTOR PROCESS EQUIPMENT - Inserts are used to line openings in parts that form a semiconductor processing reactor. In some embodiments, the reactor parts delimit a reaction chamber. The reactor parts may be formed of graphite. A layer of silicon carbide is deposited on surfaces of the openings in the reactor parts and the inserts are placed in the openings. The inserts are provided with a hole, which can accept another reactor part such as a thermocouple. The insert protects the walls of the opening from abrasion caused by insertion of the other reactor part into the opening. | 01-22-2009 |
20090023303 | METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A sealed type container accommodating a semiconductor substrate is positioned to a load port of a semiconductor manufacturing apparatus. The semiconductor substrate is taken out of the container. An ionizer is used for static-charge-eliminating the semiconductor substrates before and after process treatment in a transport area between the load port and a treatment section. The static-charge-eliminated semiconductor substrate is accommodated in the container positioned to the load port. Thus, it is possible to decrease foreign materials adhering to the semiconductor substrate and errors in handling the semiconductor substrate. | 01-22-2009 |
20090075491 | Method for curing a dielectric film - A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to ultraviolet (UV) radiation. Following the UV exposure, the dielectric film is exposed to IR radiation. | 03-19-2009 |
20090149035 | METHOD FOR MANUFACTURING OF A CRYSTAL OSCILLATOR - A method of manufacturing a crystal oscillator, in which method semiconductor components and the crystal or another resonator ( | 06-11-2009 |
20100081295 | PROCESS MODEL EVALUATION METHOD, PROCESS MODEL GENERATION METHOD AND PROCESS MODEL EVALUATION PROGRAM - According to an aspect of the present invention, there is provided a method for evaluating a process model, the method including: acquiring, for each of given patterns, a dimensional difference amount between: a first pattern that is formed by actually applying a process onto a corresponding one of the given patterns; and a second pattern that is calculated by applying a process model modeling the process to the corresponding one of the given patterns; and evaluating the process model based on an evaluation index, the evaluation index being based on the number of the patterns at which the dimensional difference amount is equal to or less than a threshold value. | 04-01-2010 |
20100151697 | Magnetic processing of operating electronic materials - The electronic properties (such as electron mobility, resistivity, etc.) of an electronic material in operation in an electronic device or electronic circuit can be modified/enhanced when subjected to dynamic or stationary magnetic fields with current flowing through the electronic material. Heating or cooling of the electronic material further enhances the electronic properties. | 06-17-2010 |
20120088374 | HBT and Field Effect Transistor Integration - Methods and systems for fabricating an integrated BiFET using two separate growth procedures are disclosed. Performance of the method fabricates the FET portion of the BiFET in a first fabrication environment. Performance of the method fabricates the HBT portion of the BiFET in a second fabrication environment. By separating the fabrication of the FET portion and the HBT portion in two or more separate reactors, the optimum device performance can be achieved for both devices. | 04-12-2012 |
20140134852 | METHOD AND APPARATUS FOR FORMING DIELECTRIC FILM OF LOW-DIELECTRIC CONSTANT AND METHOD FOR DETACHING POROGEN - A method for forming a porous low-k film having an Si—O structure includes irradiating infrared light upon a film including a material having an Si—O structure, and irradiating ultraviolet light upon the film including the material having the Si—O structure such that a porous low-k film including the material having the Si—O structure is formed. The irradiating of the infrared light has an irradiation period of infrared light which is set shorter than an irradiation period of ultraviolet light in the irradiating of the ultraviolet light. | 05-15-2014 |
20140273539 | METHODS FOR CONFORMAL TREATMENT OF DIELECTRIC FILMS WITH LOW THERMAL BUDGET - Embodiments of methods for treating dielectric layers are provided herein. In some embodiments, a method of treating a dielectric layer disposed on a substrate supported in a process chamber includes: (a) exposing the dielectric layer to an active radical species formed in a plasma for a first period of time; (b) heating the dielectric layer to a peak temperature of about 900 degrees Celsius to about 1200 degrees Celsius; and (c) maintaining the peak temperature for a second period of time of about 1 second to about 20 seconds. | 09-18-2014 |
20160020132 | Apparatus And Methods For Wafer Chucking On A Susceptor For ALD - Described are apparatus and methods for processing a semiconductor wafer so that the wafer remains in place during processing. The wafer is subjected to a pressure differential between the top surface and bottom surface so that sufficient force prevents the wafer from moving during processing, the pressure differential generated by applying a decreased pressure to the back side of the wafer. | 01-21-2016 |
20160130720 | BISMUTH-DOPED SEMI-INSULATING GROUP III NITRIDE WAFER AND ITS PRODUCTION METHOD - The present invention discloses a semi-insulating wafer of Ga | 05-12-2016 |
20160254227 | SEMICONDUCTOR DEVICE SECURITY | 09-01-2016 |
20220135914 | CLEANING AGENT COMPOSITION AND CLEANING METHOD - A cleaning agent composition for use in removal of an adhesive residue, the composition containing a quaternary ammonium salt and a solvent, wherein the solvent consists of an organic solvent, and the organic solvent includes an N,N,N′,N′-tetra(hydrocarbyl)urea. | 05-05-2022 |