| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438798000 | Ionized irradiation (e.g., corpuscular or plasma treatment, etc.) | 25 |
| 20100151696 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND HEAT TREATMENT APPARATUS - A manufacturing method for a semiconductor device, includes, forming an element region on a front surface of a semiconductor substrate, performing a first heat treatment by irradiating first irradiation light having a first irradiation energy density onto the front surface of the semiconductor substrate with a pulse width of 0.1 to 100 msec at the temperature of 1000° C. or less; and performing a second heat treatment by irradiating second irradiation light having a second irradiation energy density onto the surface of the semiconductor substrate with a pulse width of 0.1 to 100 msec at the temperature higher than the temperature in the first heat treatment. | 06-17-2010 |
| 20100112825 | Methods and apparatus for producing semiconductor on insulator structures using directed exfoliation - Methods and apparatus provide for forming a semiconductor-on-insulator (SOI) structure, including subjecting a implantation surface of a donor semiconductor wafer to an ion implantation step to create a weakened slice in cross-section defining an exfoliation layer of the donor semiconductor wafer; and subjecting the donor semiconductor wafer to a spatial variation step, either before, during or after the ion implantation step, such that at least one parameter of the weakened slice varies spatially across the weakened slice in at least one of X- and Y-axial directions. | 05-06-2010 |
| 20120244724 | ION IMPLANTATION METHOD - An ion implantation method includes generating C | 09-27-2012 |
| 20130034970 | PLASMA PROCESSING METHOD - A method for forming a fluorocarbon layer using a plasma reaction process includes the step of applying a microwave power and an RF bias. The microwave power and the RF bias are applied under a pressure ranging from 20 mTorr to 60 mTorr. | 02-07-2013 |
| 20090156019 | Substrate processing apparatus and method - A substrate processing apparatus is used for radiating UV rays onto a target film formed on a target surface of a substrate to perform a curing process of the target film. The apparatus includes a hot plate configured to heat the substrate to a predetermined temperature, a plurality of support pins disposed on the hot plate to support the substrate, and a UV radiating device configured to radiate UV rays onto the target surface of the substrate supported on the support pins. The support pins are preset to provide a predetermined thermal conductivity to conduct heat of the substrate to the hot plate. The hot plate is preset to have a predetermined thermal capacity sufficient to absorb heat conducted through the support pins. | 06-18-2009 |
| 20130029498 | METHOD FOR REDUCING DIELECTRIC CONSTANT OF FILM USING DIRECT PLASMA OF HYDROGEN - A method for reducing a dielectric constant of a film includes (i) forming a dielectric film on a substrate; (ii) treating a surface of the film without film formation, and (III) curing the film. Step (i) includes providing a dielectric film containing a porous matrix and a porogen on a substrate, step (ii) includes, prior to or subsequent to step (iii), treating the dielectric film with charged species of hydrogen generated by capacitively-coupled plasma without film deposition to reduce a dielectric constant of the dielectric film, and step (iii) includes UV-curing the dielectric film to remove at least partially the porogen from the film. | 01-31-2013 |
| 20130072035 | THERMAL PLATE WITH PLANAR THERMAL ZONES FOR SEMICONDUCTOR PROCESSING - A thermal plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar thermal zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar thermal zone uses at least one Peltier device as a thermoelectric element. A substrate support assembly in which the thermal plate is incorporated includes an electrostatic clamping electrode layer and a temperature controlled base plate. Methods for manufacturing the thermal plate include bonding together ceramic or polymer sheets having planar thermal zones, positive, negative and common lines and vias. | 03-21-2013 |
| 20090011615 | Advanced Processing Technique and System for Preserving Tungsten in a Device Structure - Removing photoresist from a workpiece is described when a region of tungsten is exposed. A plasma is generated from a gas input consisting essentially of hydrogen gas and oxygen gas in a predetermined ratio. The plasma causes the photoresist to be removed from the workpiece while the region of tungsten is left substantially unmodified. The ratio of the hydrogen to oxygen can be adjusted to a particular value which causes the photoresist to be removed at about a maximum removal rate that corresponds to a minimum tungsten loss rate of about zero. Polysilicon oxidation in the presence of tungsten is described with little or no tungsten loss. | 01-08-2009 |
| 20090149034 | SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor module, adhesion between an insulating base material and an insulator provided on the insulating base material, for example a sealing resin of the semiconductor element, is to be improved. | 06-11-2009 |
| 20100015818 | Method for Producing a Stop Zone in a Semiconductor Body and Semiconductor Component Having a Stop Zone - A method for producing a buried stop zone in a semiconductor body and a semiconductor component having a stop zone, the method including providing a semiconductor body having a first and a second side and a basic doping of a first conduction type. The method further includes irradiating the semiconductor body via one of the sides with protons, as a result of which protons are introduced into a first region of the semiconductor body situated at a distance from the irradiation side. The method also includes carrying out a thermal process in which the semiconductor body is heated to a predetermined temperature for a predetermined time duration, the temperature and the duration being chosen such that hydrogen-induced donors are generated both in the first region and in a second region adjacent to the first region in the direction of the irradiation side. | 01-21-2010 |
| 20100159712 | Method of determining a target mesa configuration of an electrostatic chuck - A method of modifying the heat transfer coefficient profile of an electrostatic chuck by configuring the areal density of a mesa configuration of an insulating layer of the chuck is provided. A method of modifying the capacitance profile of an electrostatic chuck by adjustment or initial fabrication of the height of a mesa configuration of an insulating layer of the chuck is further provided. The heat transfer coefficient at a given site can be measured by use of a heat flux probe, whereas the capacitance at a given site can be measured by use of a capacitance probe. The probes are placed on the insulating surface of the chuck and may include a plurality of mesas in a single measurement. A plurality of measurements made across the chuck provide a heat transfer coefficient profile or a capacitance profile, from which a target mesa areal density and a target mesa height are determined. The target density and height are achieved mechanically; the target density by mechanically adjusting the areal density of existing mesas; and the target height by creating or deepening low areas surrounding planned or existing mesas, respectively. This can be accomplished using any of known techniques for controlled material removal such as laser machining or grit blast machining on an X-Y table. | 06-24-2010 |
| 20080214021 | METHOD OF CRYSTALLIZING SEMICONDUCTOR FILM AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - It is an object of the present invention to align the plane orientations of crystal grains of a semiconductor film crystallized by irradiation with a linear laser beam with a width of less than or equal to 5 μm. By performing irradiation with the linear laser beam condensed by an aspheric cylindrical lens or a gradient index lens to completely melt the semiconductor film and scanning the linear laser beam, the completely melted semiconductor film is made to grow laterally. Because the linear beam is very narrow, the width of the semiconductor which is in a liquid state is also narrow, so the occurrence of turbulent flow in the liquid semiconductor is suppressed. Therefore, growth directions of adjacent crystal grains do not become disordered due to turbulent flow and are unformalized, and thus the plane orientations of the laterally grown crystal grains can be aligned. | 09-04-2008 |
| 20100197147 | SINGLE-SHOT SEMICONDUCTOR PROCESSING SYSTEM AND METHOD HAVING VARIOUS IRRADIATION PATTERNS - High throughput systems and processes for recrystallizing thin film semiconductors that have been deposited at low temperatures on a substrate are provided. A thin film semiconductor workpiece is irradiated with a laser beam to melt and recrystallize target areas of the surface exposed to the laser beam. The laser beam is shaped into one or more beamlets using patterning masks. The mask patterns have suitable dimensions and orientations to pattern the laser beam radiation so that the areas targeted by the beamlets have dimensions and orientations that are conducive to semiconductor recrystallization. The workpiece is mechanically translated along linear paths relative to the laser beam to process the entire surface of the work piece at high speeds. Position sensitive triggering of a laser can be used generate laser beam pulses to melt and recrystallize semiconductor material at precise locations on the surface of the workpiece while it is translated on a motorized stage. | 08-05-2010 |
| 20110086518 | POST CHROMIUM ALLOY PLASMA ETCH ASHING PROCESS - A method for ashing hardened resist from a photoresist patterned chromium alloy post etch using a plasma ashing chemistry which contains no gaseous source of hydrogen and contains a gaseous source of oxygen and a gaseous source of nitrogen with an oxygen to nitrogen atomic ratio of at least 5. | 04-14-2011 |
| 20090258507 | Substrate Treatment Device and Substrate Treatment Method - In order to solve the problem of contamination caused by static electricity on the surface of a substrate after plasma treatment, the invention provides a substrate treatment device comprising a standby chamber in which is arranged a transfer device for loading a substrate out of/into a cassette rack accommodating a substrate, said substrate treatment device capable of retaining said substrate transferred by the transfer device in a boat and loading, by way of a boat elevator, the boat into/out of a treatment furnace capable of applying plasma treatment to said substrate, wherein a static eliminator for eliminating static electricity of said substrate is arranged in said standby chamber. | 10-15-2009 |
| 20110053384 | METHOD FOR MANUFACTURING SOI SUBSTRATE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - An object is to provide a method for manufacturing an SOI substrate including a semiconductor film with high planarity and high crystallinity. After a single crystal semiconductor film is formed over an insulating film by a separation step, a natural oxide film existing on a surface of the semiconductor film is removed and the semiconductor film is irradiated with first laser light and second laser light under an inert gas atmosphere or a reduced-pressure atmosphere. The number of shots of the first laser light that is emitted to an arbitrary point in the semiconductor film is greater than or equal to 7, preferably greater than or equal to 10 and less than or equal to 100. The number of shots of the second laser light that is emitted to an arbitrary point in the semiconductor film is greater than 0 and less than or equal to 2. | 03-03-2011 |
| 20100190356 | Reflectors, substrate processing apparatuses and methods for the same - A substrate processing apparatus may include a processing chamber including a plasma generating unit arranged in an upper region thereof. A grid system, which may extract ions from plasma formed by the plasma generating unit and may accelerate the ions to have substantially uniform directivity. The grid system may be positioned below the plasma generating unit. A reflector may be arranged below the grid system and may include parallel reflecting plates for converting the ions accelerated from the grid system into neutral beams. | 07-29-2010 |
| 20120058649 | PLASMA PROCESSING APPARATUS AND METHOD THEREOF - In a plasma torch unit, copper rods forming a coil as a whole are disposed inside copper rod inserting holes formed in a quartz block so that the quartz block is cooled by water flowing inside the copper rod inserting holes and cooling water pipes. A plasma ejection port is formed on the lowermost portion of the torch unit. While a gas is being supplied into a space inside an elongated chamber, high-frequency power is supplied to the copper rods to generate plasma in the space inside the elongated chamber so that the plasma is applied to a substrate. | 03-08-2012 |
| 20100009551 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A p-n junction is formed at the interface of a low-concentration n-type impurity layer and a p-type diffusion region in the vicinity of the upper major surface of an n-type semiconductor substrate of a semiconductor device. A mask composed of an absorber is placed on the upper major surface of the semiconductor device, and electron beams are radiated. Thereafter, heat treatment is conducted. As a result, the peak of the crystal lattice defect densities is present in the vicinity of the upper major surface of the n-type semiconductor substrate, and the crystal lattice defect densities are decreasingly distributed toward the lower major surface. Thereby, a semiconductor device that can minimize the variation of the breakdown voltage characteristics of the p-n junction of the diode, and can control the optimum carrier lifetime can be obtained. | 01-14-2010 |
| 20100009550 | METHOD AND APPARATUS FOR MODIFYING INTEGRATED CIRCUIT BY LASER - [PROBLEMS] To provide a method and an apparatus for cutting a conductive link of a redundant circuit in a semiconductor circuit. | 01-14-2010 |
| 20120083136 | METHOD AND SYSTEM FOR MODIFYING PATTERNED PHOTORESIST USING MULTI-STEP ION IMPLANTATION - A method of reducing the roughness profile in a plurality of patterned resist features. Each patterned resist feature includes a first sidewall and a second sidewall opposite the first sidewall, wherein each patterned resist feature comprises a mid frequency line width roughness and a low frequency linewidth roughness. A plurality of ion exposure cycles are performed, wherein each ion exposure cycle comprises providing ions at a tilt angle of about five degrees or larger upon the first sidewall, and providing ions at a tilt angle of about five degrees or larger upon the second sidewall. Upon the performing of the plurality of ion exposure cycles the mid frequency and low frequency linewidth roughness are reduced. | 04-05-2012 |
| 20120258607 | E-Beam Enhanced Decoupled Source for Semiconductor Processing - A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes a plurality of power delivery components defined to deliver power to the plurality of fluid transmission pathways, so as to generate supplemental plasma within the plurality of fluid transmission pathways. The plurality of fluid transmission pathways are defined to supply reactive constituents of the supplemental plasma to the processing chamber. | 10-11-2012 |
| 20120258606 | E-Beam Enhanced Decoupled Source for Semiconductor Processing - A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electron injection device for injecting electrons into the processing chamber to control an electron energy distribution within the processing chamber so as to in turn control an ion-to-radical density ratio within the processing chamber. In one embodiment, an electron beam source is defined to transmit an electron beam through the processing chamber above and across the substrate support. | 10-11-2012 |
| 20080248656 | METHODS FOR STRIPPING PHOTORESIST AND/OR CLEANING METAL REGIONS - Methods are provided for cleaning metal regions overlying semiconductor substrates. A method for removing material from a metal region comprises heating the metal region, forming a plasma from a gas comprising hydrogen and carbon dioxide, and exposing the metal region to the plasma. | 10-09-2008 |
| 20090093135 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD FOR CURING MATERIAL WITH UV LIGHT - Low dielectric constant materials are cured in a process chamber during semiconductor processing. The low dielectric constant materials are cured by irradiation with UV light. The atmosphere in the process chamber has an O | 04-09-2009 |
