Class / Patent application number | Description | Number of patent applications / Date published |
438655000 | Silicide | 40 |
20080268635 | PROCESS FOR FORMING COBALT AND COBALT SILICIDE MATERIALS IN COPPER CONTACT APPLICATIONS - Embodiments of the invention described herein generally provide methods for forming cobalt silicide layers and metallic cobalt layers by using various deposition processes and annealing processes. In one embodiment, a method for forming a cobalt silicide material on a substrate is provided which includes treating the substrate with at least one preclean process to expose a silicon-containing surface, depositing a cobalt silicide material over the silicon-containing surface, and depositing a copper material over the cobalt silicide material. In another embodiment, a metallic cobalt material may be deposited over the cobalt silicide material prior to depositing the copper material. In one example, the copper material may be formed by depositing a copper seed layer and a copper bulk layer on the substrate. The copper seed layer may be deposited by a PVD process and the copper bulk layer may be deposited by an ECP process or an electroless deposition process. | 10-30-2008 |
20080268636 | DEPOSITION METHODS FOR BARRIER AND TUNGSTEN MATERIALS - Embodiments as described herein provide a method for depositing barrier layers and tungsten materials on substrates. In one embodiment, a method for depositing materials is provided which includes forming a barrier layer on a substrate, wherein the barrier layer contains a cobalt silicide layer and a metallic cobalt layer, exposing the barrier layer to a soak gas containing a reducing gas during a soak process, and forming a tungsten material over the barrier layer. In one example, the barrier layer may be formed by depositing a cobalt-containing material on a dielectric surface of the substrate and annealing the substrate to form the cobalt silicide layer from a lower portion of the cobalt-containing material and the metallic cobalt layer from an upper portion of the cobalt-containing material. | 10-30-2008 |
20090004850 | PROCESS FOR FORMING COBALT AND COBALT SILICIDE MATERIALS IN TUNGSTEN CONTACT APPLICATIONS - Embodiments of the invention described herein generally provide methods for forming cobalt silicide layers and metallic cobalt layers by using various deposition processes and annealing processes. In one embodiment, a method for forming a metallic silicide containing material on a substrate is provided which includes forming a metallic silicide material over a silicon-containing surface during a vapor deposition process by sequentially depositing a plurality of metallic silicide layers and silyl layers on the substrate, depositing a metallic capping layer over the metallic silicide material, heating the substrate during an annealing process, and depositing a metallic contact material over the barrier material. In one example, the metallic silicide layers and the metallic capping layer both contain cobalt. The cobalt silicide material may contain a silicon/cobalt atomic ratio of about 1.9 or greater, such as greater than about 2.0, or about 2.2 or greater. | 01-01-2009 |
20090081866 | VAPOR DEPOSITION OF TUNGSTEN MATERIALS - Embodiments of the invention provide an improved process for depositing tungsten-containing materials. The process utilizes soak processes and vapor deposition processes to provide tungsten films having significantly improved surface uniformity while increasing the production level throughput. In one embodiment, a method is provided which includes depositing a tungsten silicide layer on the substrate by exposing the substrate to a continuous flow of a silicon precursor while also exposing the substrate to intermittent pulses of a tungsten precursor. The method further provides that the substrate is exposed to the silicon and tungsten precursors which have a silicon/tungsten precursor flow rate ratio of greater than 1, for example, about 2, about 3, or greater. Subsequently, the method provides depositing a tungsten nitride layer on the tungsten suicide layer, depositing a tungsten nucleation layer on the tungsten nitride layer, and depositing a tungsten bulk layer on the tungsten nucleation layer. | 03-26-2009 |
20090087983 | ALUMINUM CONTACT INTEGRATION ON COBALT SILICIDE JUNCTION - Embodiments herein provide methods for forming an aluminum contact on a cobalt silicide junction. In one embodiment, a method for forming materials on a substrate is provided which includes forming a cobalt silicide layer on a silicon-containing surface of the substrate during a silicidation process, forming a fluorinated sublimation film on the cobalt silicide layer during a plasma process, heating the substrate to a sublimation temperature to remove the fluorinated sublimation film, depositing a titanium-containing nucleation layer over the cobalt silicide layer, and depositing an aluminum-containing material over the titanium-containing nucleation layer. In one example, the method further provides forming the cobalt silicide layer by depositing a cobalt-containing layer on the silicon-containing surface, heating the substrate during a rapid thermal annealing (RTA) process, etching away any remaining portions of the cobalt-containing layer from the substrate, and subsequently heating the substrate during another RTA process. | 04-02-2009 |
20090170311 | METHOD FOR FABRICATING CONTACT IN SEMICONDUCTOR DEVICE - A method for fabricating a contact in a semiconductor device includes forming an insulating film having a contact hole over a bottom film, forming a thin metal film in the exposed portion of the bottom film by supplying a reaction gas containing a metal component to a surface of the bottom film exposed by the contact hole, forming a metal silicide film by performing an annealing process on the thin metal film, and forming a metal film over the metal silicide film to fill the contact hole. | 07-02-2009 |
20090233439 | Method of forming an ohmic layer and method of forming a metal wiring of a semiconductor device using the same - A metal organic precursor represented by a formula of R | 09-17-2009 |
20090269923 | ADHESION AND ELECTROMIGRATION IMPROVEMENT BETWEEN DIELECTRIC AND CONDUCTIVE LAYERS - A method and apparatus for processing a substrate is provided. The method of processing a substrate includes providing a substrate comprising a conductive material, performing a pre-treatment process on the conductive material, flowing a silicon based compound on the conductive material to form a silicide layer, performing a post treatment process on the silicide layer, and depositing a barrier dielectric layer on the substrate. | 10-29-2009 |
20090286393 | METHOD OF FORMING AN ELECTRONIC DEVICE USING A SEPARATION TECHNIQUE - A method of forming an electronic device can include forming a patterned layer adjacent to a side of a substrate including a semiconductor material. The method can also include separating a semiconductor layer and the patterned layer from the substrate, wherein the semiconductor layer is a portion of the substrate. | 11-19-2009 |
20090305500 | Contact Clean by Remote Plasma and Repair of Silicide Surface - Method for recovering treated metal silicide surfaces or layers are provided. In at least one embodiment, a substrate having an at least partially oxidized metal silicide surface disposed thereon is cleaned to remove the oxidized regions to provide an altered metal silicide surface. The altered metal silicide surface is then exposed to one or more silicon-containing compounds at conditions sufficient to recover the metal silicide surface. | 12-10-2009 |
20100035429 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A fabricating method of a polysilicon layer is disclosed which can be applied for fabricating a semiconductor device such as a SRAM and so on. The method for fabricating the semiconductor device includes the steps of: forming a transistor included in the semiconductor device on a semi conductor substrate forming an insulating layer on the transistor; forming contact holes, through which a region of the transistor is exposed, by selectively removing the insulating layer forming a silicon layer in the contact holes forming a metal layer on the insulating layer and the silicon layer; forming a metal suicide layer through heat treatment of the silicon layer and the metal layer; removing the metal layer; forming an amorphous silicon layer on the insulating layer and the metal suicide layer; and forming a polysilicon layer through heat treatment of the amorphous silicon layer | 02-11-2010 |
20100167532 | METHOD OF HIGH ASPECT RATIO PLUG FILL - A method of plug fill for high aspect ratio plugs wherein a nucleation layer is formed at a bottom of a via and not on the sidewalls. The plug fill is in the direction from bottom to top of the via and not inwards from the sidewalls. The resulting plug is voidless and seamless. | 07-01-2010 |
20100167533 | METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer. | 07-01-2010 |
20100216305 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device, includes forming a dielectric film above a substrate; forming an opening in the dielectric film; forming a ruthenium (Ru) film at least on a bottom surface of the opening; and filling in the opening with a tungsten (W) film in which the Ru film is formed, according to a chemical vapor deposition (CVD) method by hydrogen (H | 08-26-2010 |
20100267232 | Transitional Interface Between Metal and Dielectric in Interconnect Structures - An integrated circuit structure and methods for forming the same are provided. The integrated circuit structure includes a semiconductor substrate; a dielectric layer over the semiconductor substrate; an opening in the dielectric layer; a conductive line in the opening; a metal alloy layer overlying the conductive line; a first metal silicide layer overlying the metal alloy layer; and a second metal silicide layer different from the first metal silicide layer on the first metal silicide layer. The metal alloy layer and the first and the second metal silicide layers are substantially vertically aligned to the conductive line. | 10-21-2010 |
20100304563 | MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS - A metal oxide semiconductor field effect transistor (MOSFET) structure that includes multiple and distinct self-aligned silicide contacts and methods of fabricating the same are provided. The MOSFET structure includes at least one metal oxide semiconductor field effect transistor having a gate conductor including a gate edge located on a surface of a Si-containing substrate; a first inner silicide having an edge that is substantially aligned to the gate edge of the at least one metal oxide semiconductor field effect transistor; and a second outer silicide located adjacent to the first inner silicide. In accordance with the present invention, the second outer silicide has second thickness is greater than the first thickness of the first inner silicide. Moreover, the second outer silicide has a resistivity that is lower than the resistivity of the first inner silicide. | 12-02-2010 |
20110065274 | ENHANCED METHOD OF FORMING NICKEL SILICIDES - Silicon containing substrates are coated with nickel. The nickel is coated with a protective layer and the combination is heated to a sufficient temperature to form nickel silicide. The nickel silicide formation may be performed in oxygen containing environments. | 03-17-2011 |
20110086509 | PROCESS FOR FORMING COBALT AND COBALT SILICIDE MATERIALS IN TUNGSTEN CONTACT APPLICATIONS - Embodiments of the invention generally provide methods for forming cobalt silicide. In one embodiment, a method for forming a cobalt silicide material includes exposing a substrate having a silicon-containing material to either a wet etch solution or a pre-clean plasma during a first step and then to a hydrogen plasma during a second step of a pre-clean process. The method further includes depositing a cobalt metal layer on the silicon-containing material by a CVD process, heating the substrate to form a first cobalt silicide layer comprising CoSi at the interface of the cobalt metal layer and the silicon-containing material during a first annealing process, removing any unreacted cobalt metal from the substrate during an etch process, and heating the substrate to form a second cobalt silicide layer comprising CoSi | 04-14-2011 |
20110086510 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF - A semiconductor device relating to the present invention has multiple gate electrodes arranged on a semiconductor substrate at a narrow spacing and an interlayer insulating film covering the gate electrodes. The interlayer insulating film consists of a hygroscopic insulating film filling gate electrode spacing with a thinner thickness on the gate electrodes than the film thickness on the flat surface of the semiconductor substrate and low-hygroscopic insulating film formed on the hygroscopic insulating film. This structure enables suppressing an increase of contact resistance due to H | 04-14-2011 |
20110306204 | FABRICATING METHOD OF SEMICONDUCTOR DEVICE - A fabricating method of a semiconductor device includes forming an interlayer insulation layer on a substrate, the interlayer insulation layer including a storage node contact plug, forming an etch stop layer on the interlayer insulation layer, the etch stop layer including a silicon layer or a silicon germanium layer, forming a molding insulation layer on the etch stop layer, forming a hole in the molding insulation layer by selectively etching the molding insulation layer until a portion of the etch stop layer is exposed, forming a first conductive layer conformally on an inner surface of the hole and on a top surface of the molding insulation layer, and forming a metal silicide pattern in a predetermined area of the etch stop layer exposed by the molding insulation layer by annealing the first conductive layer and the etch stop layer. | 12-15-2011 |
20120309191 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In the manufacturing steps of a power-type semiconductor device, after grinding the back surface of the semiconductor wafer, when a metal film is deposited by sputtering deposition over the back surface of the wafer in a preheated state, the wafer is contained in an annular susceptor, and processed. A radial vertical cross section of the annular shape of the susceptor has a first upper surface closer to a horizontal surface for holding a peripheral portion of the top surface of the semiconductor wafer against gravity, and a second upper surface continued to and located outside the first upper surface and closer to a vertical surface for holding a side surface of the semiconductor wafer against lateral displacement. | 12-06-2012 |
20130012020 | USE OF EPITAXIAL NI SILICIDE - An epitaxial Ni silicide film that is substantially non-agglomerated at high temperatures, and a method for forming the epitaxial Ni silicide film, is provided. The Ni silicide film of the present disclosure is especially useful in the formation of ETSOI (extremely thin silicon-on-insulator) Schottky junction source/drain FETs. The resulting epitaxial Ni silicide film exhibits improved thermal stability and does not agglomerate at high temperatures. | 01-10-2013 |
20130072014 | Method for Forming Contact in an Integrated Circuit - A method for forming an integrated circuit system includes providing an integrated circuit device; and forming an integrated contact over the integrated circuit device including: providing a via over the integrated circuit device; forming a selective metal in the via; forming at least one nanotube over the selective metal; and forming a cap over the nanotubes. | 03-21-2013 |
20130109173 | METHODS FOR REMOVING SILICON NITRIDE SPACER, FORMING TRANSISTOR AND FORMING SEMICONDUCTOR DEVICES | 05-02-2013 |
20130130496 | SEMICONDUCTOR APPARATUS - A method for fabricating a semiconductor apparatus including providing a first silicon substrate having a first contact, wherein providing the first silicon substrate comprises forming a silicide layer between the first silicon substrate and a first metal layer. The method further includes providing a second silicon substrate having a second contact comprising a second metal layer and placing the first contact in contact with the second contact. The method further includes heating the first and second metal layers to form a metallic alloy, whereby the metallic alloy bonds the first contact to the second contact. | 05-23-2013 |
20130189837 | SELECTIVE FORMATION OF METALLIC FILMS ON METALLIC SURFACES - Metallic layers can be selectively deposited on surfaces of a substrate relative to a second surface of the substrate. In preferred embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In preferred embodiments, a first precursor forms a layer or adsorbed species on the first surface and is subsequently reacted or converted to form a metallic layer. Preferably the deposition temperature is selected such that a selectivity of above about 90% is achieved. | 07-25-2013 |
20130267090 | METHOD TO CONTROL METAL SEMICONDUCTOR MICRO-STRUCTURE - A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm. | 10-10-2013 |
20130267091 | Process to remove Ni and Pt residues for NiPtSi application using Chlorine gas - The invention discloses a method for cleaning residues from a semiconductor substrate during a nickel platinum silicidation process. Post silicidation residues of nickel and platinum may not be removed adequately just by an aqua regia solution (comprising a mixture of nitric acid and hydrochloric acid). Therefore, embodiments of the invention provide a multi-step residue cleaning, comprising exposing the substrate to an aqua regia solution, followed by an exposure to a chlorine gas or a solution comprising dissolved chlorine gas, which may further react with remaining platinum residues, rendering it more soluble in aqueous solution and thereby dissolving it from the surface of the substrate. | 10-10-2013 |
20140073130 | FORMING NICKEL-PLATINUM ALLOY SELF-ALIGNED SILICIDE CONTACTS - A method of performing a silicide contact process comprises a forming a nickel-platinum alloy (NiPt) layer over a semiconductor device structure; performing a first rapid thermal anneal (RTA) so as to react portions of the NiPt layer in contact with semiconductor regions of the semiconductor device structure, thereby forming metal rich silicide regions; performing a first wet etch to remove at least a nickel constituent of unreacted portions of the NiPt layer; performing a second wet etch using a dilute Aqua Regia treatment comprising nitric acid (HNO | 03-13-2014 |
20140154881 | METHOD OF MANUFACTURING METAL SILICIDE AND SEMICONDUCTOR STRUCTURE USING THE SAME - A method of manufacturing a metal silicide is disclosed below. A substrate having a first region and a second region is provided. A silicon layer is formed on the substrate. A planarization process is performed to make the silicon layer having a planar surface. A part of the silicon layer is removed to form a plurality of first gates on the first region and to form a plurality of second gates on the second region. The height of the first gates is greater than the height of the second gates, and top surfaces of the first gates and the second gates have the same height level. A dielectric layer covering the first gates and the second gates is formed and exposes the top surfaces of the first gates and the second gates. A metal silicide is formed on the top surfaces of the first gates and the second gates. | 06-05-2014 |
20140287582 | METHOD OF MANUFACTURING METAL SILICIDE LAYER - According to one embodiment, a method of manufacturing a metal silicide layer, the method includes forming a metal layer including impurities on a silicon layer by a vapor deposition method using a gas of a metal and a gas of the impurities, and forming a metal silicide layer including the impurities by chemically reacting the metal layer with the silicon layer. A thickness and a composition of the metal silicide layer are controlled by an amount of the impurities in the metal layer. | 09-25-2014 |
20140335690 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes: a contact hole formed over a structure including a conductive pattern; a contact plug formed in the contact hole; a first metal silicide film surrounding the contact plug; and a second metal silicide film formed over the contact plug. | 11-13-2014 |
20150056801 | SEMICONDUCTOR DEVICE WITH AIR GAP - A method of fabricating a semiconductor device may include forming isolation structures that include openings, over a substrate; forming sacrificial spacers on sidewalks of the openings; forming, on the sacrificial spacers, first conductive patterns that are recessed in the openings; removing the sacrificial spacers, and defining air gaps; forming a liner layer that caps the first conductive patterns and the air gaps; forming second conductive patterns through silicidation of the liner layer; and forming third conductive patterns over the second conductive patterns. | 02-26-2015 |
20150064901 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - According to one embodiment, a method for producing a semiconductor device includes forming a base film above a semiconductor substrate, forming a core above the base film, forming a side wall film on a side face of the core, and replacing at least part of the side wall film with a metal film by performing plating processing. | 03-05-2015 |
20150318371 | SELF-ALIGNED LINER FORMED ON METAL SEMICONDUCTOR ALLOY CONTACTS - Metal semiconductor alloy contacts are provided on each of a source region and a drain region which are present in a semiconductor substrate. A transition metal is then deposited on each of the metal semiconductor alloy contacts, and during the deposition of the transition metal, the deposited transition metal reacts preferably, but not necessarily always, in-situ with a portion of each the metal semiconductor alloy contacts forming a transition metal-metal semiconductor alloy liner atop each metal semiconductor alloy contact. Each transition metal-metal semiconductor alloy liner that is provided has outer edges that are vertically coincident with outer edges of each metal semiconductor alloy contact. The transition metal-metal semiconductor alloy liner is more etch resistant as compared to the underlying metal semiconductor alloy. As such, the transition metal-metal semiconductor alloy liner can serve as an effective etch stop layer during any subsequently performed etch process. | 11-05-2015 |
20160020106 | MASK AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A mask may be used in a process for manufacturing a semiconductor device. The semiconductor device may include a source line, a first drain contact terminal, and a second drain contact terminal. The mask may include the following elements: a source-line corresponding light-transmitting portion, which corresponds to the source line; a first-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the first drain contact terminal; a second-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the second drain contact terminal; and a first light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion, the first-drain-contact-terminal corresponding light-transmitting portion, and the second-drain-contact-terminal corresponding light-transmitting portion. | 01-21-2016 |
20160064270 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING AIR GAP SPACERS - A spacer covering a sidewall of a contact plug includes a relatively more damaged first portion and a relatively less damaged second portion. An interface of the first and second portions of the spacer is spaced apart from a metal suicide layer of the contact plug. Thus reliability of the semiconductor device may be improved. Related fabrication methods are also described. | 03-03-2016 |
20160172202 | INTEGRATED CIRCUITS WITH BACKSIDE METALIZATION AND PRODUCTION METHOD THEREOF | 06-16-2016 |
20160172304 | SEMICONDUCTOR DEVICE INCLUDING AIR GAPS AND METHOD OF FABRICATING THE SAME | 06-16-2016 |
20160197003 | SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD OF FABRICATING THE SAME | 07-07-2016 |