Class / Patent application number | Description | Number of patent applications / Date published |
438397000 | Including selectively removing material to undercut and expose storage node layer | 18 |
20080206950 | Methods of forming a plurality of capacitors - A method of forming a plurality of capacitors includes an insulative material received over a capacitor array area and a circuitry area. The array area comprises a plurality of capacitor electrode openings within the insulative material received over individual capacitor storage node locations. The intervening area comprises a trench. Conductive metal nitride-comprising material is formed within the openings and against a sidewall portion of the trench to less than completely fill the trench. Inner sidewalls of the conductive material within the trench are annealed in a nitrogen-comprising atmosphere. The insulative material within the array area is etched with a liquid etching solution effective to expose outer sidewall portions of the conductive material within the array area. The conductive material within the array area is incorporated into a plurality of capacitors. | 08-28-2008 |
20080242042 | METHOD FOR FABRICATING A CAPACITOR IN A SEMICONDUCTOR DEVICE - A method for fabricating a capacitor in a semiconductor device includes forming a sacrificial layer and a support layer on a substrate. A plurality of openings are formed by etching the support layer and the sacrificial layer. An electrode is formed in inner walls of the openings including sidewalls of the support layer patterned through etching. A portion of the patterned support layer is removed, and the sacrificial layer is also removed. | 10-02-2008 |
20080261373 | Method of fabricating semconductor device - A method of fabricating a semiconductor device includes forming a buffer insulating film over a semiconductor substrate including a conductive pattern. The buffer insulating film is etched using a storage node mask to form a buffer insulating pattern exposing the conductive pattern. The buffer insulating pattern defines a region wider than a storage node region. An etch stop film is formed over the conductive pattern and the buffer insulating pattern. An interlayer insulating film is formed over the etch stop film. The interlayer insulating film is etched using the storage node mask to expose the etch stop film. The exposed etch stop film is etched to form the storage node region exposing conductive pattern. A lower storage node is formed over the storage node region. | 10-23-2008 |
20080305608 | Method for fabricating semiconductor device - A method for fabricating a semiconductor device, the method includes forming an etch stop layer and an insulation layer over a substrate having a first region and a second region, selectively removing the insulation layer and the etch stop layer in the first region to expose parts of the substrate, thereby forming at least two electrode regions on the exposed substrate and a resultant structure, forming a conductive layer over the resultant structure, removing the conductive layer in the second region, removing the insulation layer in the first region and the second region by using wet chemicals, and removing parts of the conductive layer, which formed between the at least two electrode regions in the first region, to form cylinder type electrodes in the first region. | 12-11-2008 |
20090023265 | ETCHING SOLUTION FOR REMOVAL OF OXIDE FILM, METHOD FOR PREPARING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R | 01-22-2009 |
20090209080 | Methods of Forming Pluralities of Capacitors - The invention includes methods of forming pluralities of capacitors. In one implementation, a method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes within a capacitor array area over a substrate. The capacitor electrodes comprise outer lateral sidewalls. The plurality of capacitor electrodes is supported at least in part with a retaining structure which engages the outer lateral sidewalls. The retaining structure is formed at least in part by etching a layer of material which is not masked anywhere within the capacitor array area to form said retaining structure. The plurality of capacitor electrodes is incorporated into a plurality of capacitors. Other aspects and implementations are contemplated. | 08-20-2009 |
20100041204 | Methods Of Making Capacitors, DRAM Arrays and Electronic Systems - Some embodiments include methods of making stud-type capacitors utilizing carbon-containing support material. Openings may be formed through the carbon-containing support material to electrical nodes, and subsequently conductive material may be grown within the openings. The carbon-containing support material may then be removed, and the conductive material utilized as stud-type storage nodes of stud-type capacitors. The stud-type capacitors may be incorporated into DRAM, and the DRAM may be utilized in electronic systems. | 02-18-2010 |
20100047992 | METHOD OF FABRICATING STORAGE NODE WITH SUPPORTED STRUCTURE OF STACKED CAPACITOR - A method of fabricating a storage node with a supported structure is provided. A dielectric stacked comprising an etch stop layer, a first dielectric layer, a support layer and a second dielectric layer is formed on a substrate. An opening is etched into the dielectric stacked. A conductive layer is formed on the second dielectric layer and inside the opening. The conductive layer directly above the second dielectric layer is removed to form columnar node structure. The second dielectric layer is then removed. A spacer layer is deposited on the support layer and the columnar node structure. A tilt-angle implant is performed to implant dopants into the spacer layer. The undoped spacer layer is removed to form a hard mask. The support layer not covered by the hard mask is etched away to expose the first dielectric layer. The first dielectric layer and the hard mask are removed. | 02-25-2010 |
20100159668 | METHOD FOR MANUFACTURING RESERVOIR CAPACITOR OF SEMICONDUCTOR DEVICE - A method for manufacturing a reservoir capacitor of a semiconductor device reduces the resistance of the reservoir capacitor to secure reliability of the semiconductor device. The method comprises: forming a dummy pattern having a lattice structure over a transistor; forming a first interlayer insulating film over the resulting structure including the dummy pattern; etching the first interlayer insulating film to form a line-structured storage node contact region between the lattice structures; and filling a conductive layer in the line-structured storage node contact region to form a line-structured storage node contact. | 06-24-2010 |
20100267215 | Semiconductor device including an improved capacitor and method for manufacturing the same - In a semiconductor device according to embodiments of the invention, a capacitor includes a storage electrode having a cylindrical storage conductive layer pattern and connecting members formed on the upper portion of the cylindrical storage conductive layer pattern. The connecting member connects to an adjacent connecting member of another storage electrode. A dielectric layer and a plate electrode are successively formed on the storage electrode. All of the capacitors are connected by one another by forming cylindrical storage electrodes so that the storage electrode does not fall down when the capacitors have an extremely large aspect ratio. Thus, the capacitance of the capacitors may be improved to the desired level. A semiconductor device that includes these capacitors may have improved reliability and the throughput of a semiconductor manufacturing process may be increased. | 10-21-2010 |
20110129982 | Method for Forming a Capacitor of a Semiconductor Memory Device - A semiconductor device that is capable of preventing a storage node bunker defect or a defect due to loss of a barrier layer, and a method for forming a capacitor thereof. The semiconductor memory device includes a contact hole formed in an interlayer dielectric layer on a semiconductor substrate; a barrier layer formed on the bottom of the contact hole; a first storage node contact formed of a conductive layer that fills the rest of the contact hole; a second storage node contact formed on the result formed with the first storage node contact so as to be shifted by a given distance from the first storage node contact; an insulation layer formed between the second storage node contacts; a storage electrode connected with the second storage node contact and isolated on a per cell basis; and dielectric layer and plate electrode for covering the storage electrode. | 06-02-2011 |
20110165756 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes a guard ring surrounding a memory cell region; a peripheral circuit region outside of the guard ring; a supporting film formed on the guard ring and on the peripheral circuit region; and a contact plug formed in the peripheral circuit region. The guard ring and the contact plug are completely filled with the same conductive material. | 07-07-2011 |
20110312152 | Methods of Fabricating Integrated Circuit Devices Using Selective Etching Techniques that Account for Etching Distance Variations - Methods of fabricating integrated circuit devices include forming an integrated circuit capacitor on a substrate. This integrated circuit capacitor includes a lower capacitor electrode, a capacitor dielectric region on the lower capacitor electrode and an upper capacitor electrode on the capacitor dielectric region. The upper capacitor electrode has a smaller surface area relative to the lower capacitor electrode. An interlayer insulating layer is formed on the integrated circuit capacitor. This interlayer insulating layer is polished to have a planarized surface thereon that is spaced from an upper surface of the upper capacitor electrode by a first distance and spaced from an upper surface of the lower capacitor electrode by a second distance greater than the first distance. A step is performed to selectively etch first and second via holes of unequal size in the interlayer insulating layer to expose the upper surface of the lower capacitor electrode and the upper surface of the upper capacitor electrode, respectively. This etching step is performed using an etching process that concurrently etches portions of the interlayer insulating layer associated with the first via hole at a faster rate than portions of the interlayer insulating layer associated with the second via hole, which is larger than the first via hole. | 12-22-2011 |
20120322225 | Method of Forming Conductive Contacts on a Semiconductor Device with Embedded Memory and the Resulting Device - A method is disclosed that includes forming a conductive logic contact in a logic area of a semiconductor device, forming a bit line contact and a capacitor contact in a memory array of the semiconductor device, and performing at least one first common process to form a first metallization layer comprising a first conductive line in the logic area that is conductively coupled to the conductive logic contact and a bit line in the memory array that is conductively coupled to the bit line contact. The method further includes performing at least one second common process to form a second metallization layer comprising a first conductive structure conductively coupled to the first conductive line in the logic area and a second conductive structure in the memory array that that is conductively coupled to the capacitor contact. | 12-20-2012 |
20140162430 | Methods for Forming Semiconductor Constructions, and Methods for Selectively Etching Silicon Nitride Relative to Conductive Material - The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Cl | 06-12-2014 |
20140256112 | Semiconductor Devices and Methods of Fabricating the Same - Provided are semiconductor devices and methods of fabricating the same. The methods may include forming a molding layer on a semiconductor substrate. A storage electrode passing through the molding layer is formed. A part of the storage electrode is exposed by partially etching the molding layer. A sacrificial oxide layer is formed by oxidizing the exposed part of the storage electrode. The partially-etched molding layer and the sacrificial oxide layer are removed. A capacitor dielectric layer is formed on the substrate of which the molding layer and the sacrificial oxide layer are removed. A plate electrode is formed on the capacitor dielectric layers. | 09-11-2014 |
20150126016 | Methods of Forming Capacitors - A method of forming capacitors includes forming support material over a substrate. A first capacitor electrode is formed within individual openings in the support material. A first etching is conducted only partially into the support material using a liquid etching fluid to expose an elevationally outer portion of sidewalls of individual of the first capacitor electrodes. A second etching is conducted into the support material using a dry etching fluid to expose an elevationally inner portion of the sidewalls of the individual first capacitor electrodes. A capacitor dielectric is formed over the outer and inner portions of the sidewalls of the first capacitor electrodes. A second capacitor electrode is formed over the capacitor dielectric. | 05-07-2015 |
20160104764 | METHOD FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE - A method for fabricating a capacitor of a semiconductor device includes forming a mold layer over a substrate, forming a plurality of preliminary openings by selectively etching the mold layer, forming a plurality of openings where each opening is formed to have a given linewidth by forming a sacrificial layer on sidewalls of the preliminary openings, and forming a plurality of storage nodes in the plurality of openings. | 04-14-2016 |