Class / Patent application number | Description | Number of patent applications / Date published |
438075000 | Charge transfer device (e.g., CCD, etc.) | 20 |
20080248607 | SOLID STATE IMAGE PICKUP DEVICE AND ITS MANUFACTURE METHOD - A solid state image pickup device is provided which includes: charge accumulation regions disposed in a semiconductor substrate in a matrix shape; a plurality of vertical transfer channels formed in the semiconductor substrate each in a close proximity to each column of the charge accumulation regions; vertical transfer electrodes formed above the vertical transfer channels; a channel protective impurity layer formed just under the vertical transfer channel and surrounding the charge accumulation region; one or more pixel separation impurity layers formed under the channel protective impurity layer and at a position facing the channel protective impurity layer; an overflow barrier region having a peak position of an impurity concentration at a position deeper than the pixel separation impurity layer, the peak position of the impurity concentration being at a depth of 3 μm or deeper from a surface of the semiconductor substrate; and a horizontal CCD for transferring signal charges transferred from the vertical transfer channels in a horizontal direction. | 10-09-2008 |
20090075419 | SOLID-STATE IMAGING DEVICE AND MANUFACTURING METHOD FOR THE SAME - A solid-state imaging device includes a semiconductor substrate including: a plurality of light-receptive portions that are arranged one-dimensionally or two-dimensionally; a vertical transfer portion that transfers signal electric charge read out from the light-receptive portions in a vertical direction; a horizontal transfer portion that transfers the signal electric charge transferred by the vertical transfer portion in a horizontal direction; a barrier region adjacent to the horizontal transfer portion, the barrier region letting only surplus electric charge of the horizontal transfer portion pass therethough; a drain region adjacent to the barrier region, into which the surplus electric charge passing through the barrier region is discharged; and an insulation film adjacent to the drain region. A portion of the drain region is located beneath the insulation film. | 03-19-2009 |
20090258456 | Method for manufacturing a solid-state image capturing apparatus, and electronic information device - A method for manufacturing a solid-state image capturing apparatus including a pixel array constituted of a plurality of pixels, is provided, where each of the plurality of pixels includes a photoelectric conversion section, the method comprising the steps of: forming an impurity diffusion area in a surface area of a semiconductor substrate; and forming a plurality of different impurity diffusion areas in the surface area of the semiconductor substrate, other than the impurity diffusion area constituting the photoelectric conversion section. | 10-15-2009 |
20090298221 | IMAGE SENSOR CLOCKING METHOD - A method for reducing dark current within a charge-coupled device, the method includes each gate phase n having a capacitance C | 12-03-2009 |
20090311823 | SOLID-STATE IMAGE PICKUP DEVICE AND MANUFACTURING METHOD THEREOF - A solid-state image pickup device is provided in which a pixel forming region | 12-17-2009 |
20090317936 | Solid state imaging device, method of producing the same and camera relating to same - A solid state imaging device improving and stabilizing imaging characteristic by optimizing a location of a positive hole accumulation layer to an electrode at the periphery of a light receiving portion, and having light receiving portions formed on a substrate and electrodes formed on the substrate at the periphery of the light receiving portion, each electrode including at least a first electrode to which a positive voltage is applied and a second electrode to which only 0 volt or a negative polarity voltage is applied, each light receiving portion having a signal charge accumulation region formed on the substrate and a positive hole accumulation region formed in a surface layer portion of the signal charge accumulation region, each positive hole accumulation region arranged at a distance from the first electrode and arranged so as. to overlap the second electrode, and method of producing the same and a camera. | 12-24-2009 |
20100055825 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A method for manufacturing a semiconductor device that includes a semiconductor substrate, the method comprises: a first irradiation step of irradiating a first irradiated region with a focused ion beam so as to selectively remove a first portion corresponding to the first irradiated region of the wiring pattern, the first irradiated region being positioned on an inner side of a short defect portion of the wiring pattern in a direction along a plane parallel to the principal surface; and a second irradiation step of, after the first irradiation step, irradiating a second irradiated region with a focused ion beam so as to remove a second portion corresponding to the second irradiated region of the wiring pattern, the second irradiated region including a region that is positioned on an outer side of the short defect portion in the direction along the plane parallel to the principal surface. | 03-04-2010 |
20100178725 | SOLID STATE IMAGE PICKUP DEVICE - P type semiconductor well regions | 07-15-2010 |
20110136292 | FABRICATING METHOD OF COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) IMAGE SENSOR - A method of fabricating a complementary metal-oxide-semiconductor (CMOS) image sensor is provided. First, an isolation structure is formed in a substrate with a photo-sensitive region and a transistor device region in the substrate. The transistor device region includes at least a region for forming a transfer transistor. A dielectric layer and a conductive layer are sequentially formed on the substrate. An ion implantation process is performed to implant a dopant into the substrate below the position for forming a gate of the transfer transistor and in the photo-sensitive region through the conductive layer and the dielectric layer. The conductive layer and the dielectric layer are patterned to at least form the gate structure of the transfer transistor on the transistor device region. Thereafter, a photo diode is formed in the substrate in the photo-sensitive region. | 06-09-2011 |
20110143488 | SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD FOR THE SAME, AND IMAGING APPARATUS - A solid-state imaging device having a light-receiving section that photoelectrically converts incident light includes an insulating film formed on a light-receiving surface of the light-receiving section and a film and having negative fixed charges formed on the insulating film. A hole accumulation layer is formed on a light-receiving surface side of the light-receiving section. A peripheral circuit section in which peripheral circuits are formed is provided on a side of the light-receiving section. The insulating film is formed between a surface of the peripheral circuit section and the film having negative fixed charges such that a distance from the surface of the peripheral circuit section to the film having negative fixed charges is larger than a distance from a surface of the light-receiving section to the film having negative fixed charges. | 06-16-2011 |
20110177650 | CMOS IMAGE SENSOR WITH SELF-ALIGNED PHOTODIODE IMPLANTS - An example method of forming a pinned photodiode includes applying a photoresist mask to a semiconductor layer at a location where a transfer gate will subsequently be formed. First dopant ions are then implanted at a first angle to form a first dopant region under an edge of the photoresist mask. Next, a photoresist mask is etched such that a thickness of the photoresist mask is reduced to form a trimmed photoresist mask. Second dopant ions are then implanted at a second angle to form a second dopant region, wherein the second dopant ions are shadowed by the trimmed photoresist mask to exclude the second dopant ions from a region partially above the first dopant region and adjacent to an edge of the trimmed photoresist mask. | 07-21-2011 |
20110207260 | METHOD OF PRODUCING A SOLID-STATE IMAGE SENSING DEVICE INCLUDING SOLID-STATE IMAGE SENSOR HAVING A PILAR-SHAPED SEMICONDUCTOR LAYER - It is an object to provide a CCD solid-state image sensor, in which an area of a read channel is reduced and a rate of a surface area of a light receiving portion (photodiode) to an area of one pixel is increased. There is provided a solid-state image sensor, including: a first conductive type semiconductor layer; a first conductive type pillar-shaped semiconductor layer formed on the first conductive type semiconductor layer; a second conductive type photoelectric conversion region formed on the top of the first conductive type pillar-shaped semiconductor layer, an electric charge amount of the photoelectric conversion region being changed by light; and a high-concentrated impurity region of the first conductive type formed on a surface of the second conductive type photoelectric conversion region, the impurity region being spaced apart from a top end of the first conductive type pillar-shaped semiconductor layer by a predetermined distance, wherein a transfer electrode is formed on the side of the first conductive type pillar-shaped semiconductor layer via a gate insulating film, a second conductive type CCD channel region is formed below the transfer electrode, and a read channel is formed in a region between the second conductive type photoelectric conversion region and the second conductive type CCD channel region. | 08-25-2011 |
20120028402 | CCD SENSORS WITH MULTIPLE CONTACT PATTERNS - A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations. | 02-02-2012 |
20120115270 | SOLID-STATE IMAGE PICKUP DEVICE AND METHOD OF MANUFACTURING SAME - Disclosed herein is a solid-state image pickup device including: a photoelectric conversion section configured to convert incident light into a signal charge; a transfer transistor configured to read the signal charge from the photoelectric conversion section and transfer the signal charge; and an amplifying transistor configured to amplify the signal charge read by the transfer transistor, wherein a compressive stress film having a compressive stress is formed on the amplifying transistor. | 05-10-2012 |
20120122267 | CONTINUOUS LARGE AREA IMAGING AND DISPLAY ARRAYS USING READOUT ARRAYS FABRICATED IN SILICON-ON-GLASS SUBSTRATES - A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles. | 05-17-2012 |
20120231573 | BACK SIDE ILLUMINATION IMAGE SENSOR AND A PROCESS THEREOF - A process and structure of a backside illumination (BSI) image sensor are disclosed. An n-type doped region is formed in a substrate, and a transfer gate is formed on top of the semiconductor substrate. A p-type doped region is formed in the n-type doped region either using the transfer gate as a mask or is non-self aligned formed. | 09-13-2012 |
20130217174 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - An exposure mask according to an embodiment of the invention includes a first transmission region where a plurality of dots through which light is shielded or transmitted are arrayed into a matrix form having rows and columns and a second transmission region where a plurality of dots through which the light is shielded or transmitted are arrayed into a matrix form having rows and columns and is disposed adjacent to the first transmission region. | 08-22-2013 |
438076000 | Majority signal carrier (e.g., buried or bulk channel, peristaltic, etc.) | 1 |
20090269876 | SOLID-STATE IMAGING DEVICE, PRODUCTION METHOD AND DRIVE METHOD THEREOF, AND CAMERA - A solid-state imaging device capable of reducing an eclipse (blocking) of an incident light at a circumferential portion of a light receiving portion and realizing a larger angle of view and high-speed driving. A single-layer transfer electrode configuration of forming first transfer electrodes and second transfer electrodes by one polysilicon layer is adopted. Two shunt wirings extending in a horizontal direction are formed on the first transfer electrodes connected in a horizontal direction and, for example, four-phase transfer pulses are supplied to first transfer electrodes and second transfer electrodes on transfer channels through low-resistance shunt wirings extending in the horizontal direction. | 10-29-2009 |
438078000 | Having structure to improve output signal (e.g., exposure control structure, etc.) | 2 |
20120028403 | CCD SENSORS WITH MULTIPLE CONTACT PATTERNS - A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations. | 02-02-2012 |
20160099286 | SEMICONDUCTOR DEVICE INCLUDING IMAGE PICK UP DEVICE - The performance of a semiconductor device is improved by preventing 1/f noise from being generated in a peripheral transistor, in the case where the occupation area of photodiodes, which are included in each of a plurality of pixels that form an image pickup device, is expanded. In the semiconductor device, the gate electrode of an amplification transistor is formed by both a gate electrode part over an active region and a large width part that covers the boundary between the active region and an element isolation region and the active region near the boundary and that has a gate length larger than that of the gate electrode part. | 04-07-2016 |