| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438008000 | Chemical etching | 71 |
| 20130034918 | MONITORING APPARATUS AND METHOD FOR IN-SITU MEASUREMENT OF WAFER THICKNESSES FOR MONITORING THE THINNING OF SEMICONDUCTOR WAFERS AND THINNING APPARATUS COMPRISING A WET ETCHING APPARATUS AND A MONITORING APPARATUS - According to the invention, a monitoring device ( | 02-07-2013 |
| 20130029436 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A hard mask made of a material in which the pattern precision is degraded by oxidation, a protective film, which protects the hard mask film from oxidation, a first mask film and a first organic film are sequentially stacked. The first organic film is processed into a first pattern, and the first mask film is firstly etched using the patterned the first organic film as a mask. After the first organic film is removed, a second organic film is formed. The second organic film is processed into a second pattern. The first mask film is secondary etched using the patterned second organic film as a mask so that the surface of the first mask film is exposed but the surface of the protective film is not exposed, thereby selectively patterning only the first mask film. After that, when removing the residual second organic film by ashing, it is possible to ensure the function of the protective film that protects the hard mask film from oxidation. | 01-31-2013 |
| 20090305439 | METHOD FOR CORRECTING MASK PATTERN AND METHOD FOR MANUFACTURING ACCELERATION SENSOR AND ANGULAR VELOCITY SENSOR BY USING THE METHOD FOR CORRECTING THE MASK PATTERN - A method for correcting a mask pattern used for dry-etching an object with higher accuracy, and for manufacturing an acceleration sensor and an angular velocity sensor. The object is first etched by a dry-etching process using an uncorrected reference mask pattern. Then, distribution of the size of expansion of a tapered portion formed in a surface of the object is measured. Thereafter, the measured distribution is approximated by using a quadratic curve (Y=AX | 12-10-2009 |
| 20130065328 | FOCUS CONTROL METHOD FOR PHOTOLITHOGRAPHY - A method comprises providing a semiconductor substrate having at least one layer of a material over the substrate. A sound is applied to the substrate, such that a sound wave is reflected by a top surface of the layer of material The sound wave is detected using a sensor. A topography of the top surface is determined based on the detected sound wave. The determined topography is used to control an immersion lithography process. | 03-14-2013 |
| 20080305564 | MANUFACTURING APPARATUS FOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE - A manufacturing apparatus for a semiconductor device, treating a SiN film formed on a wafer with phosphoric acid solution, including a processing bath to store phosphoric acid solution provided for treatment of the wafer, a control unit for calculating integrated SiN etching amount of the phosphoric acid solation, determining necessity of quality adjustment of the phosphoric acid solution, based on correlation between the integrated SiN etching amount calculated and etching selectivity to oxide film, and calculating a quality adjustment amount of the phosphoric acid solution as needed, and also including a mechanism to adjust the quality of the phosphoric acid solution based on the quality adjustment amount calculated. | 12-11-2008 |
| 20080299681 | MULTI-STEP DEPOSITION CONTROL - For providing control of two-step or a multi-step deposition process, a method and a corresponding deposition system is provided comprising providing a deposition process having at least two sub-processes employing different sets of process parameters, wherein each set of process parameters comprises at least one process parameter. The method comprises controllably generating an actual value for at least one first process parameter by taking into account at least one previous value of the respective first process parameter, wherein each first process parameter is a process parameter of said at least two sets of process parameters. | 12-04-2008 |
| 20130130409 | ETCH RATE DETECTION FOR REFLECTIVE MULTI-MATERIAL LAYERS ETCHING - A method and apparatus for etching a photomask substrate with enhanced process monitoring, for example, by providing for optical monitoring at different regions of the photomask to obtain desired etch rate or thickness loss is provided. In one embodiment, the method includes performing an etching process on a reflective multi-material layer that includes at least one molybdenum layer and one silicon layer through a patterned mask, directing radiation having a wavelength from about 170 nm and about 800 nm to an area of the multi-material layer uncovered by the patterned mask, collecting an optical signal reflected from the area uncovered by the patterned mask, analyzing a waveform obtained from the reflected optical signal, and determining a first endpoint of the etching process when an intensity of the reflected optical signal is between about 60 percent and about 90 percent less than an initial reflected optical signal. | 05-23-2013 |
| 20080241973 | METHOD OF CORRECTING A MASK PATTERN AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - The method of manufacturing a semiconductor device has deciding an amount of a correction of a mask pattern for a size of an active region of a semiconductor substrate, correcting the mask pattern on the basis of the decided amount of the correction, and exposing a resist film by using an exposure mask having the corrected mask pattern. | 10-02-2008 |
| 20090239314 | Methods of Manufacturing a Semiconductor Device - Methods of manufacturing a semiconductor device and an apparatus for the manufacturing of semiconductor devices are provided. An embodiment regards providing a process which changes the volume of at least one layer of a semiconductor substrate or of at least one layer deposited on the semiconductor substrate, and measuring a change in volume of such at least one layer using fluorescence. In another embodiment, a change in volume of such at least one layer is measured using reflection of electromagnetic waves. | 09-24-2009 |
| 20120009690 | IN-SITU SPECTROMETRY - The present disclosure provides a system for in-situ spectrometry. The system includes a wafer-cleaning machine that cleans a surface of a semiconductor wafer using a cleaning solution. The system also includes a spectrometry machine that is coupled to the wafer-cleaning machine. The spectrometry machine receives a portion of the cleaning solution from the wafer-cleaning machine. The portion of the cleaning solution collects particles from the wafer during the cleaning. The spectrometry machine is operable to analyze a particle composition of a portion of the wafer based on the portion of the cleaning solution, while the wafer remains in the wafer-cleaning machine during the particle composition analysis. | 01-12-2012 |
| 20090053835 | VACUUM APPARATUS INCLUDING A PARTICLE MONITORING UNIT, PARTICLE MONITORING METHOD AND PROGRAM, AND WINDOW MEMBER FOR USE IN THE PARTICLE MONITORING - A semiconductor manufacturing apparatus includes a processing chamber for performing a manufacturing processing on a wafer. A gas supply line for introducing a purge gas is connected to an upper portion of the processing chamber, a valve being installed on the gas supply line. A rough pumping line with a valve is connected to a lower portion of the processing chamber. Installed on the rough pumping line are a dry pump for exhausting a gas in the processing chamber and a particle monitoring unit for monitoring particles between the valve and the dry pump. In the semiconductor manufacturing apparatus, after the valve is opened, the purge gas is supplied to apply physical vibration due to shock wave in the processing chamber so that deposits are detached therefrom to be monitored as particles. | 02-26-2009 |
| 20090087929 | METHOD AND SYSTEM FOR IMPROVING WET CHEMICAL BATH PROCESS STABILITY AND PRODUCTIVITY IN SEMICONDUCTOR MANUFACTURING - A chemical processing bath and system used in semiconductor manufacturing utilizes a dynamic spiking model that essentially constantly monitors chemical concentration in the processing bath and adds fresh chemical on a regular basis to maintain chemical concentrations at desirable levels. Etch rates and etch selectivities are maintained at desirable levels and contamination from undesirable precipitation is avoided. The system and method automatically compare concentration levels to a plurality of control limits associated with various technologies and identify the technology or technologies that may undergo processing. | 04-02-2009 |
| 20110195528 | POLISHING SYSTEM WITH IN-LINE AND IN-SITU METROLOGY - A computer-implemented method for process control in chemical mechanical polishing in which an initial pre-polishing thickness of a substrate is measured at a metrology station, a parameter of an endpoint algorithm is determined from the initial thickness of the substrate, a substrates is polished at a polishing station, and polishing stops when an endpoint criterion is detected using the endpoint algorithm. | 08-11-2011 |
| 20080305563 | Method and system for controlling copper chemical mechanical polish uniformity - A system and method for controlling resistivity uniformity in a Copper trench structure by controlling the CMP process is provided. A preferred embodiment comprises a system and a method in which a plurality of CMP process recipes may be created comprising at least a slurry arm position. A set of metrological data for at least one layer of the semiconductor substrate may be estimated, and an optimum CMP process recipe may be selected based on the set of metrological data. The optimum CMP process recipe may be implemented on the semiconductor substrate. | 12-11-2008 |
| 20090162951 | Enhanced Endpoint Detection In Non-Volatile Memory Fabrication Processes - A method of fabricating non-volatile memory is provided for memory cells employing a charge storage element with multiple charge storage regions. A first charge storage layer is formed over a tunnel dielectric layer at both a memory array region and an endpoint region of a semiconductor substrate. The first charge storage layer is removed from the endpoint region to expose the tunnel dielectric region. A second charge storage layer is formed over the first charge storage layer at the memory array region and over the tunnel dielectric layer at the endpoint region. When etching the second charge storage layer to form the stem regions of the memory cells, the tunnel dielectric layer provides a detectable endpoint signal to indicate that etching for the second charge storage layer is complete. | 06-25-2009 |
| 20100216259 | WET PROCESSING SYSTEM, WET PROCESSING METHOD AND STORAGE MEDIUM - A wet processing system detects a globule of a process solution in a drippy or dripping state from the tip of any one of process solution pouring nozzles being moved to a pouring position for pouring the process solution onto a substrate by obtaining image data on the process solution pouring nozzle, and takes proper measures to prevent the process solution from dripping. A wet processing system | 08-26-2010 |
| 20080227224 | Method of manufacturing semiconductor device and control system - When a multi-layer structure is formed by forming the interconnect trenches or via holes having different patterns in a plurality of insulating films, an anti-reflective film and an upper resist film are stacked in this order over an insulating interlayer, and the anti-reflective film is etched through the upper resist film used as a mask, wherein the anti-reflective film is etched while varying a value of at least one etching condition correlative to Δ(L | 09-18-2008 |
| 20090068767 | TUNING VIA FACET WITH MINIMAL RIE LAG - A method for designing an etch recipe is provided. An etch is performed, comprising providing an etch gas with a set halogen to carbon ratio, forming a plasma from the etch gas, and etching trenches over via. Via faceting is measured. The halogen to carbon ratio is reset according to the measured via faceting, where the halogen to carbon ratio is increased if too much faceting is measured and the halogen to carbon ratio is decreased if too little faceting is measured. The previous steps are repeated until a desired amount of faceting is obtained. | 03-12-2009 |
| 20110014726 | METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURE - A method for forming a shallow trench isolation (STI) structure with a predetermined target height is provided. A substrate having a pad oxide layer formed on the substrate is provided. A nitride-containing layer with a thickness is formed on the pad oxide. A STI structure is formed and extends through the nitride-containing layer, the pad oxide layer, into the substrate. The thickness of the nitride-containing layer is measured to calculate the height of STI structure according to a correlation between the thickness of the nitride-containing layer and the height of STI structure. A thickness of the top portion STI structure to be removed is determined according to the difference between the height of the STI structure and the predetermined target height and is removed in a first etching process. The nitride-containing layer is removed without etching the STI structure or the pad oxide layer in a second etching process. | 01-20-2011 |
| 20110212548 | METHOD FOR SEMICONDUCTOR GATE HARDMASK REMOVAL AND DECOUPLING OF IMPLANTS - A method is provided for fabricating a semiconductor device having implanted source/drain regions and a gate region, the gate region having been masked by the gate hardmask during source/drain implantation, the gate region having a polysilicon gate layered on a metal layered on a high-K dielectric layer. The gate region and the source/drain regions may be covered with a self planarizing spin on film. The film may be blanket etched back to uncover the gate hardmask while maintaining an etched back self planarizing spin on film on the implanted source/drain regions. The gate hardmask may be etched back while the etched back film remains in place to protect the implanted source/drain regions. The gate region may be low energy implanted to lower sheet resistance of the polysilicon layer. The etched back film may be then removed. | 09-01-2011 |
| 20090311808 | METHOD FOR PRODUCING SEMICONDUCTOR WAFER - A semiconductor wafer is produced by a method comprising a slicing step, an one-side polishing step and a chemical treating step, in which the kerf loss is reduced and the flatness is improved. | 12-17-2009 |
| 20110151594 | METHOD AND SYSTEM FOR CONTROLLED ISOTROPIC ETCHING ON A PLURALITY OF ETCH SYSTEMS - A method for forming identical isotropic etch patterns in an etch system is disclosed. The method comprises providing a wafer paddle, a wafer, a plurality of identical etch systems, utilizing identical etch recipes within each of the plurality of etch systems, providing a fixed temperature stability time FTST for each system so that the heat transfer from the paddle to the wafer is constant, wherein the FTST is the same on each of the plurality of etch systems; and utilizing the plurality of identical etch systems to produce identical etches on each of the wafers based upon the FTST, wherein a five-second preheat step in the etch process is not utilized. | 06-23-2011 |
| 20120202301 | METHOD OF FORMING MASK PATTERN - A disclosed method of forming a mask pattern includes forming a first resist film on a film to be etched, opening portions on the first resist film at a predetermined pitch, a first film on the first resist film so as to cover sidewalls of the first opening portions, a second resist film, second opening portions alternately arranged with the first opening portions on the second resist film, and a second film on the second resist film so as to cover sidewalls of the second opening portions, and removing a part of the second film so that the second film is left as first sidewall portions, a part of the first resist film using the first sidewall portions as a mask to form third opening portions, and a part of the first film while leaving the first film as second sidewall portions to form fourth opening portions. | 08-09-2012 |
| 20080248598 | METHOD AND APPARATUS FOR DETERMINING CHARACTERISTICS OF A STRESSED MATERIAL USING SCATTEROMETRY - A method includes illuminating at least a portion of a first grid including a first plurality of stressed material regions formed at least partially in a semiconducting material. Light reflected from the illuminated portion of the first grid is measured to generate a first reflection profile. A characteristic of the first plurality of stressed material regions is determined based on the first reflection profile. A test structure includes a first plurality of stressed material regions recessed with respect to a surface of a semiconductor layer and defining a first grid. A first plurality of exposed portions of the semiconductor layer is disposed between each of the first plurality of stressed material regions. | 10-09-2008 |
| 20080268554 | FABRICATION METHOD FOR SEMICONDUCTOR DEVICE, EXPOSURE METHOD, PATTERN CORRECTION METHOD AND SEMICONDUCTOR DEVICE - Disclosed herein is a fabrication method for a semiconductor device, including a lithography step of connecting a plurality of mask patterns to each other to form a pattern image of an area greater than the size of the mask patterns. The lithography step includes the steps of: assuring an overlapping exposure region to be exposed in an overlapping relationship by both of two mask patterns to be connected to each other, carrying out exposure transfer of the pattern portions of the two mask patterns to the overlapping exposure region to form a first measurement mark and a second measurement mark in the overlapping exposure region, and carrying out positional displacement measurement of pattern connection by the two mask patterns based on a manner of combination of main marks and sub marks of the measurement marks formed in the overlapping exposure region. | 10-30-2008 |
| 20110256644 | MASKS FOR MICROLITHOGRAPHY AND METHODS OF MAKING AND USING SUCH MASKS - Masks for microlithography apparatus, methods for making such masks, and methods for exposing photosensitive materials to form arrays of microfeatures on semiconductor wafers using such masks. In one embodiment, a method of making a mask comprises forming a mask layer on a substrate and identifying a first opening in the mask layer corresponding to a first feature site at which an intensity of the radiation at a focal zone is less than the intensity of the radiation at the focal zone for a second feature site corresponding to a second opening in the mask. The second opening is adjacent or at least proximate the first opening. The method can further include forming a first surface at the first opening and a second surface at the second opening such that radiation passing through the second opening constructively interferes with radiation passing through the first opening at the focal zone. | 10-20-2011 |
| 20090176320 | METHOD FOR FABRICATION OF FLOATING GATE IN SEMICONDUCTOR DEVICE - A method for manufacturing a floating gate includes: forming a tunnel oxide film on a semiconductor substrate; forming a polysilicon layer on a surface of the tunnel oxide film; forming a photosensitive film pattern on a surface of the polysilicon layer; depositing a by-product on the photosensitive film to generate a by-product mask; and using the by-product mask as an etching mask to etch the polysilicon layer, completing fabrication of the floating gate. The polysilicon layer may be etched by a simplified process using a by-product mask so as to fabricate the floating gate, the etch rate of the polysilicon layer may be increased to improve productivity, poly bridge problems may be eliminated, and total amount of a gas used in etching the polysilicon layer may be reduced, resulting in an increase in hardware margin and a decrease in the amount of the gas used in this method. | 07-09-2009 |
| 20090197353 | METHOD OF MANUFACTURING MATERIAL TO BE ETCHED - A method is provided, of manufacturing a material to be etched that can more preferably prevent a region to be etched from remaining as an un-etched region and reduce deviation of etched/un-etched regions. | 08-06-2009 |
| 20100029020 | SUBSTRATE PROCESSING CONTROL METHOD AND STORAGE MEDIUM - In a substrate processing control method, a first process acquires a first-reflectance-spectrum of a beam reflected from the first-fine-structure and a second-reflectance-spectrum of a beam reflected from the second-fine-structure for each of varying-pattern-dimensions of the first-fine-structure when the pattern-dimension of the first-fine-structure is varied. A second process acquires reference-spectrum-data for each of the varying-pattern-dimensions of the first-fine-structure by overlapping the first-reflectance-spectrum with the second-reflectance-spectrum. A third process actually measures beams reflected from the first and the second-fine-structure, respectively, after irradiating light beam on to the substrate and acquiring reflectance-spectrums of the actual-measured beams as actual-measured spectrum data. A fourth process compares the actual-measured spectrum data with the respective reference-spectrum data and acquiring, as the measured pattern-dimension, one of the varying-pattern-dimensions corresponding to reference-spectrum data that is closely matches with the actual-measured spectrum data. A final process ends the processing of the substrate if the measured pattern-dimension reaches a value. | 02-04-2010 |
| 20090142859 | PLASMA CONTROL USING DUAL CATHODE FREQUENCY MIXING - Methods for processing a substrate in a processing chamber using dual RF frequencies are provided herein. In some embodiments, a method of processing a substrate includes forming a plasma of a polymer forming chemistry to etch a feature into a substrate disposed on a substrate support in a process chamber while depositing a polymer on at least portions of the feature being etched. A low frequency and a high frequency RF signal are applied to an electrode disposed in the substrate support. The method further includes controlling the level of polymer formation on the substrate, wherein controlling the level of polymer formation comprises adjusting a power ratio of the high frequency to the low frequency RF signal. | 06-04-2009 |
| 20110318849 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - The semiconductor device of the present invention includes a first insulating film on a substrate having a first region and a second region, a light shielding film formed in the first region and an interconnect film formed in the second region in the first insulating film and a second insulating film having a first concave portion above the light shielding film in the first region and an interconnect hole having a via hole and a second concave portion in the second region in the second insulating film on the first insulating film, wherein an area of the light shielding film is overlapping an area of the first plurality of concave portions. | 12-29-2011 |
| 20120003759 | ENDPOINT CONTROL DURING CHEMICAL MECHANICAL POLISHING BY DETECTING INTERFACE BETWEEN DIFFERENT LAYERS THROUGH SELECTIVITY CHANGE - Embodiments described herein relate to methods of detecting an endpoint for a target substrate during chemical mechanical polishing process. In one embodiment, the method includes polishing one or more target substrates at a first film removal rate to provide reference spectra, polishing one or more target substrates at a second film removal rate to provide current spectra of the one or more target substrates, wherein the second film removal rate is different from the first film removal rate, identifying an interface transition between different layers formed on the one or more target substrates using a sequence of endpoint values obtained based on the reference spectra collected during polishing of the one or more reference substrates, and comparing each current spectrum obtained from current spectra of the one or more target substrates to the reference spectra to obtain the sequence of endpoint values. After identifying the interface transition between different layers formed on the one or more target substrates, the one or more target substrates is optionally overpolished to past a target polishing thickness. | 01-05-2012 |
| 20080233662 | Advanced Process Control for Semiconductor Processing - An advanced process control (APC) method for semiconductor fabrication is provided. A first substrate and a second substrate are provided. The first substrate and the second substrate include a dielectric layer. A first etch process parameter for the first substrate is determined. A trench is etched in the dielectric layer of the first substrate using the first etch process parameter. At least one aspect of the etched trench of the first substrate is measured. A second etch process parameter for the second substrate is determined using the measured aspect of the etched trench of the first substrate. A planarization process parameter for the first substrate is determined also using the measured aspect of the etched trench of the first substrate. | 09-25-2008 |
| 20120028377 | USING OPTICAL METROLOGY FOR WITHIN WAFER FEED FORWARD PROCESS CONTROL - A method of controlling the polishing of a substrate includes polishing a substrate on a first platen using a first set of parameters, obtaining first and second sequences of measured spectra from first and second regions of the substrate with an in-situ optical monitoring system, generating first and second sequences of values from the first and second sequences of measured spectra, fitting first and second linear functions to the first and second sequences of values, determining a difference between the first linear function and the second linear function, adjusting at least one parameter of a second set of parameters based on the difference, and polishing the substrate on a second platen using the adjusted parameter. | 02-02-2012 |
| 20120122249 | DOPANT MARKER FOR PRECISE RECESS CONTROL - A semiconductor device is formed by implanting recess markers in a material during deposition and using the recess markers during etching of the material for precise in-situ removal rate definition and removal homogeneity-over-radius definition. An embodiment includes depositing a layer of material on a substrate, implanting first and second dopants in the material at first and second predetermined times during deposition of the material, etching the material, detecting the depths of the first and second dopants during etching, calculating the removal rate of the material in situ from the depths of the first and second dopants, and determining from the removal rate a stop position for etching. Embodiments further include depositing a layer of material on a substrate, laterally implanting a first dopant and a second dopant in the material at a predetermined depth during deposition of the material, etching the material, detecting the positions and intensities of the first and second dopants during etching, and calculating lateral homogeneity of the material in situ from the intensities of the first and second dopants. Embodiments further include in situ corrective action for the removal process based on the determined removal rate and lateral homogeneity. | 05-17-2012 |
| 20110183444 | METHOD FOR ELECTRON BEAM INDUCED ETCHING - The invention relates to a method for electron beam induced etching of a material ( | 07-28-2011 |
| 20120264237 | METHODS FOR DESIGNING, FABRICATING, AND PREDICTING SHAPE FORMATIONS IN A MATERIAL - A method for designing, fabricating, and predicting a desired structure in and/or on a host material through defining etch masks and etching the host material is provided. The desired structure can be micro- or nanoscale structures, such as suspended nanowires and corresponding supporting pillars, and can be defined one layer at a time. Arbitrary desired structures can also be defined and obtained through etching. Further, given the desired structure, a starting structure can be predicted where etching of the starting structure yields the desired structure. | 10-18-2012 |
| 20080299682 | METHOD FOR REMOVING POLY SILICON - Methods for removing poly silicon. In one example embodiment, a method for removing poly silicon that is formed on a silicon wafer includes the steps of growing the poly silicon as a silicon oxide through a thermal oxidation process and removing the silicon oxide using an etching solution. | 12-04-2008 |
| 20120094401 | METHODS OF PROCESSING AND INSPECTING SEMICONDUCTOR SUBSTRATES - A method of inspecting a semiconductor substrate having a back surface and including at least one piece of metal embedded in the substrate comprises directing measuring light towards the back surface of the substrate and detecting a portion of the measuring light received back from the substrate. The method also includes determining a distance between the piece of metal and the back surface based upon the detected measuring light received back from the substrate. | 04-19-2012 |
| 20110275168 | SINGLE STEP CMP FOR POLISHING THREE OR MORE LAYER FILM STACKS - A one-step CMP process for polishing three or more layer film stacks on a wafer having a multilayer film stack thereon including a silicon nitride (SiNx) layer on its semiconductor surface, and a silicon oxide layer on the SiNx layer, wherein trench access vias extend through the silicon oxide layer and SiNx layer to trenches formed into the semiconductor surface, and wherein a polysilicon layer fills the trench access vias, fills the trenches, and is on the silicon oxide layer. CMP polishes the multilayer film stack with a slurry including slurry particles including at least one of silica and ceria. The CMP provides a removal rate (RR) for the polysilicon layer>a RR for the silicon oxide layer>a RR for the SiNx layer. The CMP process is continued to remove the polysilicon layer, silicon oxide layer and a portion of the SiNx layer to stop on the SiNx layer. Optical endpointing during CMP can provide a predetermined remaining thickness range for the SiNx layer. | 11-10-2011 |
| 20120282713 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE - A target space ratio of a monitor pattern on a substrate for inspection is determined to be different from a ratio of 1:1. A range of space ratios in a library is determined to include the target space ratio and not include a space ratio of 1:1. The monitor pattern is formed on a film to be processed by performing predetermined processes on the substrate for inspection. Sizes of the monitor pattern are measured. The sizes of the monitor pattern are converted into sizes of a pattern of the film to be processed having a space ratio of 1:1, and processing conditions of the predetermined processes are compensated for based on the sizes of the converted pattern of the film to be processed. After that, the predetermined processes are performed on a wafer under the compensated conditions to form a pattern having a space ratio of 1:1 on the film to be processed. | 11-08-2012 |
| 20120282712 | DOPANT MARKER FOR PRECISE RECESS CONTROL - Recess markers are implanted in a material during deposition and used during etching of the material for in-situ removal rate and removal homogeneity-over-radius definitions. An embodiment includes depositing a material on a substrate, implanting two dopants at two predetermined times, respectively, during deposition of the material, etching the material, detecting depths of the two dopants during etching, calculating the removal rate of the material in situ from the depths of the two dopants, and determining from the removal rate an etching stop position. Embodiments further include laterally implanting two dopants in a material at a predetermined depth during deposition, etching the material, detecting the positions and intensities of the two dopants during etching, and calculating lateral homogeneity of the material in situ from intensities of the dopants. Embodiments further include in situ corrective action for the removal process based on the determined removal rate and lateral homogeneity. | 11-08-2012 |
| 20130011938 | METHOD FOR MANUFACTURING THROUGH-SILICON VIA - A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current. | 01-10-2013 |
| 20100129939 | USING OPTICAL METROLOGY FOR WITHIN WAFER FEED FORWARD PROCESS CONTROL - A method of controlling the polishing of a substrate includes polishing a substrate on a first platen using a first set of parameters, obtaining first and second sequences of measured spectra from first and second regions of the substrate with an in-situ optical monitoring system, generating first and second sequences of values from the first and second sequences of measured spectra, fitting first and second linear functions to the first and second sequences of values, determining a difference between the first linear function and the second linear function, adjusting at least one parameter of a second set of parameters based on the difference, and polishing the substrate on a second platen using the adjusted parameter. | 05-27-2010 |
| 438009000 | Plasma etching | 27 |
| 20110177625 | METHOD AND APPARATUS FOR IDENTIFYING THE CHEMICAL COMPOSITION OF A GAS - Embodiments of the present invention relate to the analysis of the components of one or more gases, for example a gas mixture sampled from a semiconductor manufacturing process such as plasma etching or plasma enhanced chemical vapor deposition (PECVD). Particular embodiments provide sufficient power to a plasma of the sample, to dissociate a large number of the molecules and molecular fragments into individual atoms. With sufficient power (typically a power density of between | 07-21-2011 |
| 20080311687 | Method and Apparatus for Optimizing a Gate Channel - The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures. | 12-18-2008 |
| 20110207245 | STAGE, SUBSTRATE PROCESSING APPARATUS, PLASMA PROCESSING APPARATUS, CONTROL METHOD FOR STAGE, CONTROL METHOD FOR PLASMA PROCESSING APPARATUS, AND STORAGE MEDIA - A stage onto which is electrostatically attracted a substrate to be processed in a substrate processing apparatus, which enables the semiconductor device yield to be improved. A temperature measuring apparatus | 08-25-2011 |
| 20130052757 | METHODS FOR OPTIMIZING A PLASMA PROCESS - Methods for optimizing a plasma process are provided. The method may include obtaining a measurement spectrum from a plasma reaction in a chamber, calculating a normalized measurement standard and a normalized measurement spectrum of the measurement spectrum, comparing the normalized measurement spectrum with a normalized reference spectrum, and comparing the normalized measurement standard with a normalized reference standard to determine whether to change a process parameter of the plasma process or clean the chamber when the normalized measurement spectrum and the normalized reference spectrum are mismatched. | 02-28-2013 |
| 20130071955 | PLASMA ETCHING METHOD - A method for processing a substrate to form a desired pattern by an etching process after forming a mask pattern over the substrate includes the steps of: forming two layers over the substrate; measuring a width of the mask pattern or an etched pattern of one of the two layers; and adjusting a flow rate of any one of HBr and other gases, used in the etching process, based on the measured width. The two layers may include a silicon nitride layer and an organic dielectric layer. | 03-21-2013 |
| 20090068768 | QUANTIFICATION OF HYDROPHOBIC AND HYDROPHILIC PROPERTIES OF MATERIALS - A non-destructive and simple analytical method is provided which allows in situ monitoring of plasma damage during the plasma processing such as resist stripping. If a low-k film is damaged during plasma processing, one of the reaction products is water, which is remained adsorbed onto the low-k film (into pores), if the temperature is lower than 100-150 C. A plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules forming electronically excited oxygen atoms is used to detect the adsorbed water. The excited oxygen is detected from optical emission at 777 nm. Therefore, the higher the adsorbed water concentration (higher damage), a more intensive (oxygen) signal is detected. Therefore, intensity of oxygen signal is a measure of plasma damage in the previous strip step. The proposed analytical method can be performed in-situ immediately after plasma processing and most preferred the optical emission of oxygen radicals is monitored during the de-chucking step in the plasma chamber. | 03-12-2009 |
| 20100009470 | WITHIN-SEQUENCE METROLOGY BASED PROCESS TUNING FOR ADAPTIVE SELF-ALIGNED DOUBLE PATTERNING - An apparatus for adaptive self-aligned dual patterning and method thereof. The method includes providing a substrate to a processing platform configured to perform an etch process and a deposition process and a metrology unit configured for in-vacuo critical dimension (CD) measurement. The in-vacuo CD measurement is utilized for feedforward adaptive control of the process sequence processing platform or for feedback and feedforward adaptive control of chamber process parameters. In one aspect, a first layer of a multi-layered masking stack is etched to form a template mask, an in-vacuo CD measurement of the template mask is made, and a spacer is formed, adjacent to the template mask, to a width that is dependent on the CD measurement of the template mask. | 01-14-2010 |
| 20100087017 | METHOD OF PRODUCING SEMICONDUCTOR DEVICE - It is intended to produce a semiconductor device with a stable gate length, using an end-point detection process based on monitoring a plasma emission intensity during dry etching for setting a gate length. A semiconductor device production method of the present invention comprises the steps of forming a first dielectric or gate conductive film to allow a pillar-shaped semiconductor layer to be buried therein; flattening the first dielectric or gate conductive film while detecting an end-point using a stopper formed on top of the pillar-shaped semiconductor layer; forming a second dielectric or gate conductive film; etching the second dielectric or gate conductive film and calculating an etching rate during the etching; and detecting an end-point of etching of the first dielectric or gate conductive film, based on the etching rate of the second dielectric or gate conductive film during etching-back of the second dielectric or gate conductive film, to control an etching amount of the first dielectric or gate conductive film. | 04-08-2010 |
| 20080206901 | PULSED-PLASMA SYSTEM WITH PULSED REACTION GAS REPLENISH FOR ETCHING SEMICONDUCTOR STRUCTURES - A pulsed plasma system with pulsed reaction gas replenish for etching semiconductor structures is described. In an embodiment, a portion of a sample is removed by applying a pulsed plasma etch process. The pulsed plasma etch process comprises a plurality of duty cycles, wherein each duty cycle represents the combination of an ON state and an OFF state of a plasma. The plasma is generated from a reaction gas, wherein the reaction gas is replenished during the OFF state of the plasma, but not during the ON state. In another embodiment, a first portion of a sample is removed by applying a continuous plasma etch process. The continuous plasma etch process is then terminated and a second portion of the sample is removed by applying a pulsed plasma etch process having pulsed reaction gas replenish. | 08-28-2008 |
| 20090286333 | ETCHING METHOD AND ETCHING APPARATUS OF SEMICONDUCTOR WAFER - A method of etching a semiconductor wafer is provided. The method comprises the steps of: jetting a mixed gas including hydrogen fluoride and ozone onto a surface of a semiconductor wafer; monitoring the surface of the semiconductor wafer; analyzing the surface of the semiconductor wafer; and adjusting at least one of the hydrogen fluoride concentration and the ozone concentration in the mixed gas based on a result of the analysis. | 11-19-2009 |
| 20110269252 | METHOD FOR POSITIONING SPACERS FOR PITCH MULTIPLICATION - Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed. | 11-03-2011 |
| 20090162952 | APPARATUS AND METHOD FOR CONTROLLING EDGE PERFORMANCE IN AN INDUCTIVELY COUPLED PLASMA CHAMBER - The present invention generally provides methods and apparatus for controlling edge performance during process. One embodiment of the present invention provides an apparatus comprising a chamber body defining a process volume, a gas inlet configured to flow a process gas into the process volume, and a supporting pedestal disposed in the process volume. The supporting pedestal comprises a top plate having a substrate supporting surface configured to receive and support the substrate on a backside, and an edge surface configured to circumscribe the substrate along an outer edge of the substrate, and a height difference between a top surface of the substrate and the edge surface is used to control exposure of an edge region of the substrate to the process gas. | 06-25-2009 |
| 20090029489 | Endpoint Detection Device For Realizing Real-Time Control Of Plasma Reactor, Plasma Reactor With Endpoint Detection Device, And Endpoint Detection Method - An endpoint detection device, a plasma reactor with the endpoint detection device, and an endpoint detection method are provided. The endpoint detection device includes an OES data operation unit, a data selector, a product generator, an SVM, and an endpoint determiner. The OES data operation unit processes reference OES data by normalization and PCA. The data selector selects part of the linear reference loading vectors and selects part of the selected linear reference loading vectors. The product generator outputs at least one reference product value. The SVM performs regression and outputs a prediction product value. The endpoint determiner detects a process wafer etch or deposition endpoint and outputs a detection signal. | 01-29-2009 |
| 20090081815 | Method and Apparatus for Spacer-Optimization (S-O) - The invention can provide a method of processing a substrate using S-O processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures. | 03-26-2009 |
| 20110143462 | ADJUSTING SUBSTRATE TEMPERATURE TO IMPROVE CD UNIFORMITY - A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for. | 06-16-2011 |
| 20080261335 | ENDPOINT DETECTION FOR PHOTOMASK ETCHING - Apparatus and method for endpoint detection are provided for photomask etching. The apparatus provides a plasma etch chamber with a substrate support member. The substrate support member has at least two optical components disposed therein for use in endpoint detection. Enhanced process monitoring for photomask etching are achieved by the use of various optical measurement techniques for monitoring at different locations of the photomask. | 10-23-2008 |
| 20090253222 | Etching process state judgment method and system therefor - An etching process state judgment method comprising: a spectral data obtaining step, in which an optical emission spectrum distribution is obtained by monitoring optical emission during an etching process of a plurality of wafers; a peak detection step, in which peaks are detected from the optical emission spectrum distribution at a specific time point during the etching process, to obtain peak characteristics; a common peak identifying step, in which peaks common to the wafers are identified among the peaks detected in the peak detection step; and a state detection step, in which the characteristics are compared regarding the common peaks, to detect a state of each wafer in the etching process. | 10-08-2009 |
| 20080227225 | Method and apparatus for manufacturing a semiconductor device - The present invention relates to a method of manufacturing a semiconductor device wherein etching is performed on films on a wafer using a plasma treatment apparatus. In the manufacturing method according to the present invention, a change in the difference between the emission intensities of a first wavelength component and a second wavelength component in plasma is monitored during etching. If the amount of change in the difference per unit time exceeds a predetermined threshold a given number of times in a row, then the flow rate of oxygen introduced to the plasma treatment apparatus is increased or, if the amount of change exceeding the predetermined threshold has not been seen, then the oxygen flow rate is set back to the original value thereof. This series of actions is repeated all the time during a set period of time. | 09-18-2008 |
| 20100055807 | PLASMA ASHING APPARATUS AND ENDPOINT DETECTION PROCESS - A plasma ashing apparatus for removing organic matter from a substrate including a low k dielectric, comprising a first gas source; a plasma generating component in fluid communication with the first gas source; a process chamber in fluid communication with the plasma generating component; an exhaust conduit in fluid communication with the process chamber; wherein the exhaust conduit comprises an inlet for a second gas source and an afterburner assembly coupled to the exhaust conduit, wherein the inlet is disposed intermediate to the process chamber and an afterburner assembly, and wherein the afterburner assembly comprises means for generating a plasma within the exhaust conduit with or without introduction of a gas from the second gas source; and an optical emission spectroscopy device coupled to the exhaust conduit comprising collection optics focused within a plasma discharge region of the afterburner assembly. An endpoint detection process for an oxygen free and nitrogen free plasma process comprises monitoring an optical emission signal of an afterburner excited species in an exhaust conduit of the plasma asher apparatus. The process and apparatus can be used with carbon and/or hydrogen containing low k dielectric materials. | 03-04-2010 |
| 20080206900 | PULSED-PLASMA SYSTEM FOR ETCHING SEMICONDUCTOR STRUCTURES - A pulsed plasma system for etching semiconductor structures is described. In one embodiment, a portion of a sample is removed by applying a pulsed plasma process, wherein the pulsed plasma process comprises a plurality of duty cycles. The ON state of a duty cycle is of a duration sufficiently short to substantially inhibit micro-loading in a reaction region adjacent to the sample, while the OFF state of the duty cycle is of a duration sufficiently long to substantially enable removal of a set of etch by-products from the reaction region. In another embodiment, a first portion of a sample is removed by applying a continuous plasma process. The continuous plasma process is then terminated and a second portion of the sample is removed by applying a pulsed plasma process. | 08-28-2008 |
| 20090280581 | Detection of arcing events in wafer plasma processing through monitoring of trace gas concentrations - A method of detecting substrate arcing in a semiconductor plasma processing apparatus is provided. A substrate is placed on a substrate support in a reaction chamber of a plasma processing apparatus. Process gas is introduced into the reaction chamber. A plasma is generated from the process gas and the substrate is processed with the plasma. Intensities of real-time spectrometry signals of selected gas species produced in the reaction chamber during plasma processing are monitored. The selected gas species are generated by a substrate arcing event. The arcing event is detected when the intensities are above a threshold value. | 11-12-2009 |
| 20120208302 | METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE - There is provided a method for manufacturing a SiC semiconductor device achieving improved performance. The method for manufacturing the SiC semiconductor device includes the following steps. That is, a SiC semiconductor is prepared which has a first surface having at least a portion into which impurities are implanted. By cleaning the first surface of the SiC semiconductor, a second surface is formed. On the second surface, a Si-containing film is formed. By oxidizing the Si-containing film, an oxide film constituting the SiC semiconductor device is formed. | 08-16-2012 |
| 20110039355 | Plasma Generation Controlled by Gravity-Induced Gas-Diffusion Separation (GIGDS) Techniques - The invention can provide apparatus and methods of processing a substrate using plasma generation by gravity-induced gas-diffusion separation techniques. By adding or using gases including inert and process gases with different gravities (i.e., ratio between the molecular weight of a gaseous constituent and a reference molecular weight), a two-zone or multiple-zone plasma can be formed, in which one kind of gas can be highly constrained near a plasma generation region and another kind of gas can be largely separated from the aforementioned gas due to differential gravity induced diffusion and is constrained more closer to a wafer process region than the aforementioned gas. | 02-17-2011 |
| 20090061540 | Plasma process detecting sensor - The present invention provides a plasma process detecting sensor. In the plasma process detecting sensor, a hole diameter of an insulating film is spread with almost no spread of a hole diameter of an upper electrode. Therefore, when the plasma process detecting sensor is exposed to a plasma, positive ions incident onto the bottom of a contact hole are hard to collide with an inner wall surface of a hole main body of the insulating film. As a result, the inner wall surface of the hole main body of the insulating film is hard to undergo damage, and the generation of a defect level that assists electric conduction can be suppressed. It is thus possible to suppress age deterioration of a sensor function during the measurement of a charge-up under an environment of a plasma etching condition. | 03-05-2009 |
| 20120322170 | PINHOLE INSPECTION METHOD OF INSULATOR LAYER - A pinhole inspection method of an insulator layer, wherein the pinhole inspection method comprises steps as following: A dry etching process is firstly performed to remove a contiguous layer adjacent to the insulator layer. Subsequently an etching endpoint is determined and the dry etching process is then stopped in accordance with a second electron energy variation triggered by the dry etching process. Afterward, a cross-sectional morphology or topography of the insulator layer is inspected. | 12-20-2012 |
| 20120288969 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MANUFACTURING APPARATUS - An etching apparatus includes a process unit and a control unit. Emission intensity of plasma inside the process unit is obtained by an OES detector, a nonlinear regression analysis is performed by an etching control device to determine a regression formula. The nonlinear regression analysis is performed by using the emission intensity of the plasma obtained until a first time when the emission intensity of the plasma passes a peak, and a second time to be an etching end point is calculated by using the regression formula. The etching end point is calculated as a time when the emission intensity decreases for a predetermined value from the first time. The etching apparatus finishes an etching when the process reaches the etching end point. It is thereby possible to control the etching end point with high-accuracy. | 11-15-2012 |
| 20130023067 | Methods for Improving Integrated Photonic Device Uniformity - A method is described for improving the uniformity over a predetermined substrate area of a spectral response of photonic devices fabricated in a thin device layer. The method includes (i) establishing an initial device layer thickness map for the predetermined area, (ii) establishing a linewidth map for the predetermined area, and (iii) establishing an etch depth map for the predetermined area. The method further includes, based on the initial device layer thickness map, the linewidth map and the etch depth map, calculating an optimal device layer thickness map and a corresponding thickness correction map for the predetermined substrate area taking into account photonic device design data. Still further, the method includes performing a location specific corrective etch process in accordance with the thickness correction map. | 01-24-2013 |
