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Inspection of semiconductor device or printed circuit board

Subclass of:

382 - Image analysis

382100000 - APPLICATIONS

382141000 - Manufacturing or product inspection

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
382149000 Fault or defect detection 191
382151000 Alignment, registration, or position determination 34
382147000 Inspecting printed circuit boards 17
382146000 Measuring external leads 4
20090232386Pattern matching processing system and computer readable medium - The pattern matching processing system includes: a recognition pattern-storage unit which stores a first image data obtained by picking up an image of at least a portion of a lead frame or a substrate of a first object and the second image data obtained by picking up an image of at least a portion of a lead frame of a second object that is different from the first object, respectively, and also stores one of the first image data and the second image data as an ordinary recognition pattern, and the other as an auxiliary recognition pattern; and a recognition unit, which recognizes input image data by a first pattern matching with the ordinary recognition pattern stored in the recognition pattern-storage unit, and also carries out the second pattern matching with the auxiliary recognition pattern when an error is caused in the first pattern matching.09-17-2009
20090010525METHOD AND APPARATUS FOR DETECTING POSITIONS OF ELECTRODE PADS - A method for detecting positions of a plurality of electrode pads of semiconductor chips formed on a semiconductor wafer includes: setting an imaging target region greater than a semiconductor chip on the semiconductor wafer; performing split imaging so as to entirely cover the imaging target region; and detecting positions of electrode pads of the semiconductor chip by processing images obtained by the split imaging. The split imaging is performed by using an imaging device which enlarges and images a region smaller than the imaging target region by one imaging.01-08-2009
20080232673METHOD FOR MANUFACTURING ELECTRONIC DEVICE - A method for manufacturing an electronic device is provided. The method includes: pressure-bonding a plurality of terminals of an electronic component to a plurality of electrodes formed on a surface of a transparent substrate, respectively, via an anisotropic conductive film to mount the electronic component on the transparent substrate; obtaining an image of the electrodes by imaging the transparent substrate with the electronic component mounted thereon from backside of the transparent substrate; measuring the number of indentations for each said electrode using the image of the electrode, the indentation being formed when the electrode is pressed by a conductive particle in the anisotropic conductive film; calculating an average and a standard deviation of the number of indentations per electrode throughout the transparent substrate; and calculating a probability that the number of indentations per electrode is less than a reference value on basis of the average and the standard deviation.09-25-2008
20100246935ANALYSIS OF LEADED COMPONENTS - A system to facilitate analysis of component leads is provided and includes a device to form a picture of the leads, from which an image is extracted, to apportion the image and to perform first and second scans of the portions, and a processor, including a memory unit having a set of computer-readable executable instructions stored thereon, which, when executed, cause the processor to receive data of each scan, to establish a rule, based on the data of the first scan of any one portion, governing when to judge that the data of the second scan of the one portion indicates a defect, to determine rule compliance for each of the second scans, to judge that any one second scan in a non-compliance state indicates a defect, and to report a location of the defect. A display unit displays the report to a user.09-30-2010
382148000 At plural magnifications or resolutions 2
20090196489HIGH RESOLUTION EDGE INSPECTION - Systems and methods of inspection for a substrate. At least two images of a selected portion of the substrate edge are captured using an optical imaging system, and each characterized by a discrete focal distance setting of the optical imaging system. A composite image of the substrate edge is formed from the at least two images. Defect(s) are identified in the composite image. Some optical systems can include at least one optical element having an optical power and a focusing mechanism for modifying a focal distance of the optical system.08-06-2009
20080310704SCANNING ELECTRON MICROSCOPE AND METHOD OF IMAGING AN OBJECT BY USING THE SCANNING ELECTRON MICROSCOPE - A scanning electron microscope capable of modifying the focal position of a condenser lens with high speed and high reproducibility in order that low-magnification images are obtained at large depths of focus and that high-magnification images are obtained at high resolution. The microscope has a specimen-holding portion, an electron beam source, a condenser lens for converging the electron beam, an objective lens for focusing the converged beam into a very small spot onto a specimen, scan coils, a detector for detecting a specimen signal emanating from the specimen, and a display portion for displaying the detected specimen signal as an image. An axisymmetric electrode is disposed within the magnetic field produced by the condenser lens. A voltage is applied to the electrode.12-18-2008
Entries
DocumentTitleDate
20110176718APPARATUS FOR EVALUATING DEGRADATION OF PATTERN FEATURES - A measurement tool apparatus for evaluating degradation of pattern features in a semiconductor device manufacturing process. The measurement tool apparatus detects variations in the patterns from SEM images thereof and extracts pattern edge points along the circumference of each pattern. The measurement tool apparatus compares the pattern edge points to corresponding edge points of an ideal shape so as to determine deviation of the patterns. Metrics are derived from analysis of the deviations. The measurement tool apparatus uses the metrics in calculating an index representative of the geometry of edge spokes of the pattern, an indicator of the orientation of the edge spokes, and/or anticipated effects of the edge spokes on device performance.07-21-2011
20130028506METHOD AND SYSTEM FOR VISUALIZATION OF SEMICONDUCTOR WAFER INSPECTION DATA ACQUIRED IN A PHOTOVOLTAIC CELL PRODUCTION PROCESS - A system for providing visualization of semiconductor wafer inspection data acquired during in a photovoltaic cell production process includes a display device, a user interface device, and a computer control system configured for: receiving one or more inspection data sets acquired from each of a plurality of semiconductor wafers using a plurality of wafer process tools of a photovoltaic cell production line; generating an aggregated hierarchical wafer data gallery utilizing the received one or more inspection data sets; and displaying at least a portion of the aggregated hierarchical wafer data gallery in the gallery display area of the display device.01-31-2013
20090196487METHOD AND SYSTEM FOR EVALUATING A VARIATION IN A PARAMETER OF A PATTERN - A method and system are presented for evaluating a variation of a parameter of a pattern, the method includes: processing data indicative of an aerial intensity image of at least a portion of a patterned article, and determining values of a certain functional of the aerial image intensity for predetermined regions within said at least portion of the patterned article, said values of the aerial image intensity functional being indicative of a variation of at least one parameter of the pattern within said at least portion of the patterned article or of a variation of at least one parameter of a pattern manufactured by utilizing the patterned article.08-06-2009
20090297018Image reconstruction with incomplete fourier-space magnitude data combined with real-space information - Image reconstruction is based on phase retrieval by combining incomplete Fourier-space magnitude data with real-space information. Phase retrieval is performed based on the Fourier-space magnitude data, where the real-space information is expressed in a form suitable to use as a phase retrieval constraint, preferably using a wavelet-space representation. The use of incomplete Fourier-space magnitude data advantageously reduces the amount of data required compared to approaches that need comprehensive Fourier-space magnitude data. The real space information can be regarded as partial information of the image being reconstructed. Depending on the application, more or less real space information may be available.12-03-2009
20090202138INSPECTION APPARATUS - The present invention provides an inspection apparatus having a high throughput and high sensitivity with respect to a number of various manufacturing processes and defects of interest in inspection of a specimen such as a semiconductor wafer on which a pattern is formed. The apparatus illuminates with light the specimen having the pattern formed thereon, forms an image of the specimen on an image sensor through a reflective optics, and determines the existence/nonexistence of a defect. The reflective optics has a conjugate pair of Fourier transform optics. An aberration of the reflective optics is corrected off-axis. The reflective optics has a field of view in non-straight-line slit form on the specimen surface. Also, the optics is of a reflection type, includes a conjugate pair of Fourier transform optics and has a field of view in non-straight-line slit form. An optimum wavelength band is selected according to the specimen (FIG. 08-13-2009
20090185740CALCULATING IMAGE INTENSITY OF MASK BY DECOMPOSING MANHATTAN POLYGON BASED ON PARALLEL EDGE - A method, system, computer program product and table lookup system for calculating image intensity for a mask used in integrated circuit processing are disclosed. A method may comprise: decomposing a Manhattan polygon of the mask into decomposed areas based on parallel edges of the Manhattan polygon along only one dimension; determining a convolution of each decomposed area based on a table lookup; determining a sum of coherent systems contribution of the Manhattan polygon based on the convolutions of the decomposed areas; and outputting the determined sum of coherent system contribution for analyzing the mask.07-23-2009
20120177282METHODS AND SYSTEMS FOR IMPROVED LOCALIZED FEATURE QUANTIFICATION IN SURFACE METROLOGY TOOLS - A method for enabling more accurate measurements of localized features on wafers is disclosed. The method includes: 07-12-2012
20100074514WAFER CONTAINING CASSETTE INSPECTION DEVICE AND METHOD - To provide a wafer containing cassette inspection device capable of expressing external view attributes such as shapes of respective inspection object portions of water containing cassettes of different types under the same condition without changing imaging conditions for each of the types. A wafer containing cassette inspection device includes an imaging device (03-25-2010
20100104173Method And Apparatus For Inspecting A Pattern Formed On A Substrate - A pattern inspection method and apparatus in which a deep ultraviolet light or an ultraviolet light is irradiated onto a specimen on which a pattern is formed, an image of the specimen which is irradiated with the deep ultraviolet light or the ultraviolet light is formed and the formed image is detected with a rear-surface irradiation type image sensor, which is sensitive to wavelengths of no greater than 400 nmm. A signal outputted from the image sensor is processed so as to detect a defect of the specimen by converting an analog image signal outputted from the image sensor to a digital image signal with an A/D converter, and a display displays information of the defect detected.04-29-2010
20120183200METHODS AND APPARATUS FOR DETECTING MULTIPLE OBJECTS - A method for determining physical placement data for a plurality of wafers is disclosed. The method includes obtaining raw CCD array data from a linear CCD array by clocking data from pixels of the linear CCD array into memory cells of the memory device and ascertaining pixel transition data to determine whether at least one of an upper edge error, a lower edge error, a wafer thickness error, and transition-per-slot error exists. If an error is found, the method includes generating an error signal.07-19-2012
20090324056POLARIZATION IMAGING - A system and method for inspection a substrate for various defects is herein disclosed. Polarizing filters are used to improve the contrast of polarization dependent defects such as defocus and exposure defects, while retaining the same sensitivity to polarization independent defects, such as pits, voids, cracks, chips and particles.12-31-2009
20130071007IC LAYOUT PATTERN MATCHING AND CLASSIFICATION SYSTEM AND METHOD - A system and method for restricting the number of layout patterns by pattern identification, matching and classification, includes decomposing the pattern windows into a low frequency component and a high frequency component using a wavelet analysis for an integrated circuit layout having a plurality of pattern windows. Using the low frequency component as an approximation, a plurality of moments is computed for each pattern window. The pattern windows are classified using a distance computation for respective moments of the pattern windows by comparing the distance computation to an error value to determine similarities between the pattern windows.03-21-2013
20090080761Simultaneous wafer ID reading - The present invention discloses apparatuses and methods for simultaneous viewing and reading top and bottom images from a workpiece. The present ID reader can comprise an enclosure covering a top and bottom section of the workpiece with optical elements to guide the light from the workpiece images to a camera. The optical element can be disposed to receive images from a high angle with respect to the surface of the workpiece. The present ID reader can further comprise a light source assembly to illuminate the image. The light source assembly can utilize a coaxial light path with the images, preferably for bright field illumination. The light source assembly can also utilize a non-coaxial light path, preferably for dark field illumination. In an embodiment, the simultaneous images reaching the camera are separate into two distinct images on two different sections of the camera. In another embodiment, the simultaneous images reaching the camera are superimposed into one image on the camera.03-26-2009
20090268958 DUAL-PURPOSE PERTURBATION ENGINE FOR AUTOMATICALLY PROCESSING PATTERN-CLIP-BASED MANUFACTURING HOTSPOTS - One embodiment of the present invention provides a system that automatically processes manufacturing hotspot information. During operation, the system receives a pattern clip associated with a manufacturing hotspot in a layout, wherein the pattern clip comprises a set of polygons in proximity to the manufacturing hotspot's location. Next, the system determines if the pattern clip matches a known manufacturing hotspot configuration. If the pattern clip does not match a known manufacturing hotspot configuration, the system then performs a perturbation process on the pattern clip to determine a set of correction recommendations to eliminate the manufacturing hotspot. By performing the perturbation process, the system additionally determines ranges of perturbation to the set of polygons wherein the perturbed pattern clip does not eliminate the manufacturing hotspot. Subsequently, the system stores the set of correction recommendations and the ranges of perturbation into a manufacturing hotspot database.10-29-2009
20090238443PATTERN MEASUREMENT METHODS AND PATTERN MEASUREMENT EQUIPMENT - An object of the present invention is to provide methods and equipment capable of providing highly accurate matching using a template including multiple patterns even when the shapes of some patterns of the template are different from corresponding ones of a SEM image, and when the template and the SEM image have a magnification error. Proposed, as a technique for achieving the object, is a method for performing matching by selectively using some of multiple patterns provided in a predetermined region of design data, and equipment for implementing the method. Moreover, proposed, as another technique for achieving the object, is a method for performing first matching by using multiple patterns provided in a predetermined region of design data and thereafter performing second matching by using some of the multiple patterns provided in the predetermined region, and equipment for implementing the method.09-24-2009
20090238442MACHINE VISION SYSTEM FOR THREE-DIMENSIONAL METROLOGY AND INSPECTION IN THE SEMICONDUCTOR INDUSTRY - The system 09-24-2009
20090232385PATTERN MEASURING METHOD AND PATTERN MEASURING DEVICE - An object of the present invention is to provide a sample measuring method and a sample measuring device suitable for evaluation of inclination of a pattern edge. To achieve the object, a method and a device for forming a plurality of contours of a pattern edge and evaluating the dimension between the contours are proposed below. Forming a plurality of contours allows evaluation of the degree of inclination of an edge portion of a pattern. Further, displaying evaluation values indicative of the degree of the inclination of the edge portion in an in-plane distribution form makes identifying the cause of taper formation easier.09-17-2009
20110038527IMAGE PATTERN MATCHING SYSTEMS AND METHODS FOR WAFER ALIGNMENT - A computer-implemented image pattern matching method for wafer alignment is provided, for determining an overall similarity value and an overall geometry relationship between a target wafer image and a model wafer image. The method includes: determining a plurality of model patterns in the model wafer image; searching the target wafer image to identify a plurality of target patterns, thereby generating a plurality of matches each including a respective target pattern and model pattern; selecting, using multiple threshold values, ones of the plurality of matches according to a plurality of similarity values; and determining, using a predetermined algorithm and the selected ones of the matches, the overall similarity value and the overall geometry relationship between the target wafer image and the model wafer image.02-17-2011
20100034456Semiconductor apparatus and method of inspection the same - A semiconductor apparatus has a light-receiving element. The light-receiving element has a photodiode unit having a shield film for removing noise, at least two test pads, and a shield film pseudo pattern which is formed by the same membranous type as the shield film and connected to the two test pads. The photodiode unit and the shield film pseudo pattern are integrated in one semiconductor chip. A resistance value of the shield film pseudo pattern is measured using the test pads connected to the shield film pseudo pattern. CMR of a photocoupler can be evaluated according to the correlation relationship between the measurement result and the sheet resistance of the shield film.02-11-2010
20090316979DEVICE FOR CHARACTERIZING UNIQUE OBJECTS - An examination method of a unique object including: forming a coherent radiation beam using a coherent source, illuminating the object by the coherent radiation beam, focussed using a focussing mechanism positioned directly in contact with the object or in a very close position to the object, and forming, using a detection mechanism, the optical Fourier transform image of the light diffracted by the object.12-24-2009
20090304259System for Specifying Equipment Causing Failure - A first defect distribution superimposed image is formed by superimposing defect distributions on individual substrates processed by a causal equipment unit candidate on one another. Second defect distribution superimposed images are formed by superimposing, on one another, defect distributions on individual substrates processed by equipment units other than the causal equipment unit candidate in one same step as that executed by the causal equipment unit candidate. The first defect distribution superimposed image and the second defect distribution superimposed images are displayed in contrast on one display screen.12-10-2009
20110299760DEFECT OBSERVATION METHOD AND DEFECT OBSERVATION APPARATUS - Provided is a defect observation apparatus capable of analyzing a structure such as an arrangement and a vertical relationship of a circuit pattern formed by using design information of a sample, creating a non-defective product image from a defect image based on the analysis results, and detecting a defect by comparative inspection. The defect observation apparatus is provided with a computing unit 12-08-2011
20090202141VISUAL INSPECTION METHOD AND VISUAL INSPECTION APPARATUS - In a visual inspection method and apparatus, a picture processing unit converts an original picture, obtained by taking a photograph of a BGA illuminated by a ring illuminator from above, by using a camera, and labels a binary picture obtained by this binary conversion. Then, it forms a circumscribing rectangle circumscribing an outer circumference of a labeling picture obtained by the labeling, and inverts a labeling picture within the formed rectangle, and removes a portion of a region formed by the outer circumference and the circumscribing rectangle in a picture obtained by the inversion, and then generates an inspection picture by adding a picture obtained by the removal to the labeling picture, and accordingly judges a pass or rejection of the inspection target sample based on the generated inspection picture. Thus, the inspection can be carried out at a high accuracy irrespectively of a low cost.08-13-2009
20090136118Electronic Device Handling Apparatus - An electronic device handling apparatus for conducting a test of electric characteristics of electronic devices by conveying the electronic devices to sockets of a contact portion and bringing them electrically connected to the sockets: wherein standard image data as image data of sockets to be standard is stored in advance, and inspection image data as image data of sockets as inspection objects is obtained by taking an image by the image pickup device, standard image data is read from a memory device and a defect of a socket as inspection objects is detected by comparing the standard image data with the inspection image data.05-28-2009
20090310848Characterizing Thermomechanical Properties of an Organic Substrate Using Finite Element Analysis - A method for characterizing thermomechanical properties of an organic substrate is provided. The method includes the steps of: receiving an image of the organic substrate, the image including a geometric description of the plurality of circuit layers of the substrate; selecting a given one of the plurality of circuit layers for processing; converting the image to a two-dimensional finite element model (FEM) image of the given one of the circuit layers; determining at least one of a coefficient of thermal expansion (CTE), modulus and Poisson's ratio of the FEM image of the given one of the circuit layers; repeating the steps of selecting a given one of the plurality of circuit layers, converting the image to a two-dimensional FEM image, and determining at least one of a CTE, modulus and Poisson's ratio of the FEM image for all of the plurality of circuit layers corresponding to at least a portion of the organic substrate; and constructing a three-dimensional representation of at least a portion of the organic substrate including the plurality of circuit layers as a function of at least one of the CTE, modulus and Poisson's ratio of each of the plurality of circuit layers.12-17-2009
20100086196METHOD AND APPARATUS FOR DETERMINING AN OPTICAL THRESHOLD AND A RESIST BIAS - One embodiment of the present invention provides techniques and systems for determining modeling parameters for a photolithography process. During operation, the system can receive a layout. Next, the system can determine an iso-focal pattern in the layout. The system can then determine multiple aerial-image-intensity values in proximity to the iso-focal pattern by convolving the layout with multiple optical models, wherein the multiple optical models model the photolithography process's optical system under different focus conditions. Next, the system can determine a location in proximity to the iso-focal pattern where the aerial-image-intensity values are substantially insensitive to focus variations. The system can then use the location and the associated aerial-image-intensity values to determine an optical threshold and a resist bias. The optical threshold and the resist bias can then be used for modeling the photolithography process.04-08-2010
20100086197WAFER EDGE INSPECTION AND METROLOGY - Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.04-08-2010
20130216121PATTERN MEASURING METHOD, PATTERN MEASURING APPARATUS, AND PROGRAM USING SAME - In measuring pattern with large process fluctuation, correct measurement cannot be carried out if noises, such as pattern that is not the subject to be measured, and dirt, are present in periphery of pattern to be measured in previously registered measurement region. Among the image data of sample, predetermined region aligned by pattern matching is set as region not to be measured that is excluded from subjects of pattern measurement. For example, in measuring pattern with large process fluctuation, only region including pattern with small process fluctuation is used in pattern matching, while in measuring the pattern, predetermined region, which was used in pattern matching and aligned, is set as region not to be measured. Stable pattern measurement can be easily carried out with respect to pattern with large process fluctuation, without being affected by region where measurement region and region not to be measured overlap with each other.08-22-2013
20120106826PATTERN SHAPE EVALUATION METHOD AND PATTERN SHAPE EVALUATION APPARATUS - An image of the joint portion of circuit patterns manufactured using a design pattern for double patterning is read out. Target boundary lines and evaluation regions are set on the image. In the evaluation regions, image processing is performed along the directions of the target boundary lines. Furthermore, binarization processing is performed. A decision is made based on an image obtained in this way as to whether the patterns have defects.05-03-2012
20090202139PATTERN GENERATING APPARATUS AND PATTERN SHAPE EVALUATING APPARATUS - Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.08-13-2009
20090202137METHOD AND APPARATUS FOR IMAGE GENERATION - The present invention provides a technique to generate an accurate connected image even in a monotonous pattern using design data as constrained conditions. A reference position is roughly determined through matching between the design data and image data, matching between neighboring images is performed using the amount of mismatch from the design data as a searching range and a connected image is generated at high speed and accurately. The image generation method of the present invention is an image generation method for inspecting an electronic device pattern using a scanning electron microscope and is constructed of a design data file that stores design data describing layout information of an electronic device pattern by inputting the data, a plurality of divided pieces of image data obtained by imaging the electronic device pattern at different imaging positions, and image connecting means for connecting the plurality of divided pieces of image data into one image using the plurality of divided pieces of image data and the design data of a file of the design data (see FIG. 08-13-2009
20090110262EVALUATION OBJECT PATTERN DETERMINING APPARATUS, EVALUATION OBJECT PATTERN DETERMINING METHOD, EVALUATION OBJECT PATTERN DETERMINING PROGRAM AND PATTERN EVALUATING SYSTEM - There is provided an evaluation object pattern determining apparatus capable of determining local patterns to be evaluated. The apparatus is for use in a pattern evaluating system storing patterns of a LSI chip as CAD data, picking out coordinates of local patterns whose process margin is small from the CAD data by way of simulation and assisting observation of the local patterns produced in a fabrication line. The apparatus includes a risk level map creating section for creating risk level maps in which risk areas are disposed. The risk area is assigned with a risk level obtained by digitizing that the risk area is an area whose process margin is smaller than other areas. The apparatus also includes a superimposition processing section for superimposing the coordinates of the local patterns with the risk level map to pick out the coordinates of the local patterns located within the risk area.04-30-2009
20110170765DEFECT INSPECTION METHOD AND APPARATUS - Arrangements for inspecting a specimen on which plural patterns are formed; capturing a first image of a first area; capturing a second image of a second area in which patterns which are essentially the same with the patterns formed in the first area; creating data relating to corresponding pixels of the first and second images, for each pixel; determining a threshold for each pixel for detecting defects directly in accordance with the first and second images; and detecting defects on the specimen by processing the first and second images by using the threshold for each pixel and information of a scattered diagram of brightness of the first and second images, wherein the threshold is determined by using information of brightness of a local region of at least one of the first and second images, with the local region including an aimed pixel and peripheral pixels of the aimed pixel.07-14-2011
20090274361MACHINE VISION TECHNIQUE FOR MANUFACTURING SEMICONDUCTOR WAFERS - A vision system is provided to determine a positional relationship between a photovoltaic device wafer on a platen and a printing element, such as a printing screen, on a remote side of the photovoltaic device wafer from the platen. A source emits ultraviolet light along a path that is transverse to a longitudinal axis of an aperture through the platen, and a diffuser panel is located along that path. A reflector directs the light from the diffuser panel toward the aperture. A video camera is located along the longitudinal axis of the aperture and produces an image using light received from the platen aperture, wherein some of that received light was reflected by the wafer. A band-pass filter is placed in front of the camera to block ambient light. The use of diffused ultraviolet light enhances contrast in the image between the wafer and the printing element.11-05-2009
20090297019METHODS AND SYSTEMS FOR UTILIZING DESIGN DATA IN COMBINATION WITH INSPECTION DATA - Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.12-03-2009
20090279775METHOD OF INSPECTING MOUNTING STATES OF ELECTRONIC COMPONENTS - An image information of a substrate on which a plurality of electronic components are to be mounted is obtained. Next, the image information is binarized by using a predetermined threshold value, so that binary data are acquired. Then, a tentative presence region recognized as corresponding to the electronic component is acquired on the basis of the binary data. Further, a new threshold value is set by changing the predetermined threshold value. Next, new binary data are acquired by using the new threshold value. Thereby, a new tentative presence region is acquired. Then, the new tentative presence region is combined with the just preceding tentative presence region. Then, a new threshold value is set. A series of above described steps are repeated until all detection results of individual chips indicating whether or not each of the plurality of chips is mounted at a predetermined position, are prepared.11-12-2009
20090290782METHOD AND A SYSTEM FOR ESTABLISHING AN INSPECTION-RECIPE - A method and a system for establishing a wafer testing recipe are disclosed. According to the present invention the system is comprised of a camera for acquiring images of a number of dice from a produced wafer; and a dedicated software that operative for using at least part of the images and composes a reference-image to be used as testing reference of a typical die image; defining on the reference-image single and/or repeatable elements of a die pattern as a “zone of interest; determining the Detection-Policy for each of the zone of interest or for a group of similar zones of interest and determining the algorithm that will be used by each of the Detection-Policy; determining the parameters of each of the Detection-Policy's algorithms; determining the Reporting-policy by defining a set of specific names of defect classes that could be used during inspection of a specific lot of wafers; determining the Inspection-policy defining behavior of inspection system as a set of pre-defined logical rules; and creating a “wafer testing recipe” by integrating of the testing reference of a typical die image, the defined zones of interest, the determined Detection-Policies, the parameters of the determined Detection-Policies' algorithms, the determined Reporting-Policies and the determined Inspection-Policies.11-26-2009
20100061621Method and device for generating digital still pictures of wafer-shaped elements during a production process - A method and device generate digital still pictures of wafer-shaped elements, such as wafers or solar cells, which are transported in series on a conveyor belt during a production process. The device has a camera taking pictures of the wafer-shaped elements in sections step-by-step, in particular continuously taking digital pictures line-by-line (linear scanning) transverse to the transport direction, and then sampling the recorded image data. The device also includes a hardware-based image data processing unit, e.g. FPGA, for detecting edges of the wafer-shaped elements that indicate a beginning or an end of each of the wafer-shaped elements. The edge detection is for controlling the generation of the digital still pictures for visual inspection to find defective areas of the elements.03-11-2010
20100061620PROBE MARK INSPECTION - Probe mark inspection involves a recipe based on unique image characteristics or combinations of unique image characteristics. Result images are correlated with a reference created to determine which image characteristic or combination of image characteristics provides an improved contrast.03-11-2010
20080279444COMPUTER-IMPLEMENTED METHODS, COMPUTER-READABLE MEDIA, AND SYSTEMS FOR IDENTIFYING ONE OR MORE OPTICAL MODES OF AN INSPECTION SYSTEM AS CANDIDATES FOR USE IN INSPECTION OF A LAYER OF A WAFER - Computer-implemented methods, computer-readable media, and systems for identifying one or more optical modes of an inspection system as candidates for use in inspection of a layer of a wafer are provided. One method includes determining one or more characteristics of images of the layer of the wafer acquired using the inspection system and different optical modes available on the inspection system. The method also includes identifying a first portion of the different optical modes as not candidates for use in the inspection of the layer of the wafer based on the one or more characteristics of the images. In addition, the method includes generating output by eliminating the first portion of the different optical modes from the different optical modes at which the images were acquired such that the output includes a second portion of the different optical modes indicated as the candidates for use in the inspection.11-13-2008
20100142799AUTOMATIC COMPONENT TEACHING DEVICE - There is provided an automatic part teaching device for creating part teaching data accurately indicating a form of a part regardless of its size. The automatic part teaching device includes: a cover sheet (06-10-2010
20090180681IMAGE BEARING STRUCTURE AND METHOD TO DETECT A DEFECT IN THE IMAGE BEARING STRUCTURE - An image bearing structure includes an image drum including at least one slot, a plurality of ring electrodes formed on an outer circumference of the image drum, and a control board positioned within the slot of the image drum, and connected to the plurality of ring electrodes, to detect a defect of the ring electrodes. As a result, the image bearing structure detects a defect within a short time and without requiring a separate detecting device.07-16-2009
20090080762Appearance for inspection method - To be provided is an appearance inspection method of acquiring an accurate data regarding a chipping of a semiconductor chip generated by a dicing step. It includes: acquiring the image data of the semiconductor chip; binary-processing the image data; recognizing a chipping end 03-26-2009
20110206272SYSTEM POWER LEVELING DEVICE AND IMAGE DIAGNOSTIC SYSTEM - A system power leveling device includes a bidirectional converter connected to a system bus line providing a electric power to a load from a power source and having a first and a second switching element, a power storage device connected to the bidirectional converter, a first specifying section for specifying a power consumption of the load, a charge-discharge control section for controlling the charge and the discharge of the power storage device by controlling the bidirectional converter based on the power consumption specified at the first specifying section, and a second specifying section specifying a current or an electric power of the charge or the discharge.08-25-2011
20080317328Method of Design Analysis of Existing Integrated Circuits - The present invention involves a computationally efficient method of determining the locations of standard cells in an image of an IC layout. The initial step extracts and characterizes points of interest of the image. A coarse localization of possible standard cell locations is performed and is based on a comparison of the points of interest of an instance of an extracted standard cell and the remaining points of interest in the image. A more rigid comparison is made on the list of possible locations comprising a coarse match and a fine match. The coarse match results in a shortlist of possible locations. The fine match performs comparisons between the template and the shortlist. Further filtering is done to remove the effects of noise and texture variations and statistics on the results are generated to achieve the locations of the standard cells on the IC layout.12-25-2008
20080317327Method of Design Analysis of Existing Integrated Circuits - The present invention involves a computationally efficient method of determining the locations of standard cells in an image of an IC layout. The initial step extracts and characterizes points of interest of the image. A coarse localization of possible standard cell locations is performed and is based on a comparison of the points of interest of an instance of an extracted standard cell and the remaining points of interest in the image. A more rigid comparison is made on the list of possible locations comprising a coarse match and a fine match. The coarse match results in a shortlist of possible locations. The fine match performs comparisons between the template and the shortlist. Further filtering is done to remove the effects of noise and texture variations and statistics on the results are generated to achieve the locations of the standard cells on the IC layout.12-25-2008
20090136117METHOD AND APPARATUS FOR RESIDUE DETECTION ON A POLISHED WAFER - There is provided an automatic optical inspection tool of an apparatus for residue detection on polished wafers, including an inspection tool, an illumination source, capable of instantaneous entire wafer surface illumination, colour digital camera, encompassing the entire wafers surface without eclipse, in a duple of consecutive, properly delayed imaging shots and providing appropriate image resolution for tiny residue detection, computation means, implementing image processing and manipulation algorithms to enable residue detection and characterization, logic and command operations execution and camera control, the computation means accumulating an on-line created wafer images and wafer residue defects data base, the computation means providing for inspection tool worthiness monitoring, wafer handling and transportation means. A method of automatic optical self-contained inspection for pattern wafers' polishing residue detection is also provided.05-28-2009
20120070066CHARGED PARTICLE BEAM DEVICE AND EVALUATION METHOD USING THE CHARGED PARTICLE BEAM DEVICE - The charged particle beam device has a problem that a symmetry of equipotential distribution is disturbed near the outer edge of a specimen, an object being evaluated, causing a charged particle beam to deflect there. An electrode plate installed inside the specimen holding mechanism of electrostatic attraction type is formed of an inner and outer electrode plates arranged concentrically. The outer electrode plate is formed to have an outer diameter larger than that of the specimen. The dimensions of the electrode plates are determined so that an overlapping area of the outer electrode plate and the specimen is substantially equal to an area of the inner electrode plate. The inner electrode plate is impressed with a voltage of a positive polarity with respect to a reference voltage and of an arbitrary magnitude, and the outer electrode is impressed with a voltage of a negative polarity and of an arbitrary magnitude.03-22-2012
20120070065POLARIZATION IMAGING - Methods of monitoring critical dimensions in a semiconductor fabrication process include capturing at least one image of a first structure that has an effect on the polarization state of light reflected therefrom. For at least some of the first structure images, a value is calculated indicative of intensity of light reflected from the first structure. A critical dimension of the first structure is obtained and correlated with the calculated value. At least one image of a subsequent structure is captured. A determination is made, based at least in part on the calculated value, of a critical dimension of the subsequent structure.03-22-2012
20090252402PATTERN INSPECTION APPARATUS, PATTERN INSPECTION METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A pattern inspection method includes: acquiring an image of a pattern; performing matching of CAD data for the pattern and the image; extracting coordinates of a plurality of points on a line segment constituting a polygon figure in the CAD data, to be defined as a first coordinate group; specifying coordinates of edge points in the image corresponding to the plurality of points to be defined as a second coordinate group; calculating differences between the coordinates corresponding to each other from the first and second coordinate group, and calculating statistics each representing a degree of deviation in the matching based on the differences; correct the polygon figure when it is determined that a correction is required as a result of judgment based on the statistics; and inspecting the pattern by comparing the corrected polygon figure with the image.10-08-2009
20110229011IDENTIFICATION METHOD OF DATA POINT DISTRIBUTION AREA ON COORDINATE PLANE AND RECORDING MEDIUM - A disclosed method of identifying a data point distribution area having data points on a coordinate plane includes dividing a coordinate plane area into plural divided areas using lines; in each divided area, selecting outermost data point data as representative points, and connecting the selected representative points to define a distribution area; comparing the area with a reference area to determine an overlapping area; and determining that the distribution area is a relevant area based on the existence of the overlapping area.09-22-2011
20090103799PATTERN MATCHING METHOD IN MANUFACTURING SEMICONDUCTOR MEMORY DEVICES - A pattern matching method for use in manufacturing a semiconductor memory device increases a pattern matching rate between a GDS image and an SEM image. The pattern matching method includes extracting a scanning electron microscope (SEM) image and a graphic data system (GDS) image to perform a pattern matching; performing a two-dimensional furrier transform (FFT) for the extracted GDS image and analyzing a low spatial frequency; deciding whether or not a pattern is a repeated pattern or non-repeated pattern by using the analyzed low spatial frequency; and limiting an X/Y range for a pattern matching when the decision result is for the repeated pattern, and then performing the pattern matching between the SEM image and the GDS image.04-23-2009
20090257645METHODS AND SYSTEMS FOR DETERMINING A DEFECT CRITICALITY INDEX FOR DEFECTS ON WAFERS - Various methods and systems for determining a defect criticality index (DCI) for defects on wafers are provided. One computer-implemented method includes determining critical area information for a portion of a design for a wafer surrounding a defect detected on the wafer by an inspection system based on a location of the defect reported by the inspection system and a size of the defect reported by the inspection system. The method also includes determining a DCI for the defect based on the critical area information, a location of the defect with respect to the critical area information, and the reported size of the defect.10-15-2009
20090245621System And Method Of Providing Mask Defect Printability Analysis - A simulated wafer image of a physical mask and a defect-free reference image are used to generate a severity score for each defect, thereby giving a customer meaningful information to accurately assess the consequences of using a mask or repairing that mask. The defect severity score is calculated based on a number of factors relating to the changes in critical dimensions of the neighbor features to the defect. A common process window can also be used to provide objective information regarding defect printability. Certain other aspects of the mask relating to mask quality, such as line edge roughness and contact corner rounding, can also be quantified by using the simulated wafer image of the physical mask.10-01-2009
20090245620Inspecting method by using mark partitioning - The present invention relates to a mark partitioning inspection method. A reference image and an inspection image are respectively acquired, and a correlation in a character unit for the reference image and the inspection image is obtained, and then the correlation value is compared with a first threshold value that has been previously set. Then, when the correlation value is greater than the first threshold value, the relevant character is partitioned into a predetermined number of regions, and a correlation between the reference image and the inspection image is obtained for each of the partitioned regions, and then a difference between the maximum and minimum values of the correlation is compared with a second threshold value that has been previously set. Here, even if a low defectiveness is revealed, the mark partitioning inspection method is capable of precisely determining whether or not it is defective, by determining the inspection image to be defective if the difference between the maximum and minimum values of the correlation is greater than the second threshold value, and by determining the inspection image to be normal when the difference between the maximum and minimum values of the correlation is smaller than the second threshold value.10-01-2009
20090257644METHOD AND SYSTEM FOR EVALUATING AN OBJECT - A method, system aid a computer program product for evaluating a object; the method includes: (i) obtaining an image of an area of the object; wherein the area comprises multiple arrays of repetitive structural elements that are at least partially surrounded by at least one group of non-repetitive regions; wherein non-repetitive regions that belong to a single group of non-repetitive regions are ideally identical to each other; wherein the non-repetitive regions are arranged in a repetitive manner; and (ii) providing an evaluation result in response to a comparison between image information of a first sub-area to image information of a second sub-area that is proximate to the first sub-area; wherein the first sub-area comprises a first array of repetitive structural elements and a first non-repetitive region; wherein the second sub-area comprises a second array of repetitive structural elements and a second non-repetitive region.10-15-2009
20100150428METHOD AND APPARATUS FOR DETECTING MECHANICAL DEFECTS IN A SEMICONDUCTOR DEVICE, PARTICULARLY IN A SOLAR CELL ARRANGEMENT - A process detects defects in a semiconductor device, particularly a solar cell or solar cell arrangement, having at least one pn junction in a semiconductor layer of a semiconductor material with an indirect band junction. A voltage is applied to the at least one pn junction to operate it in the transmitting direction; and the radiation behavior of the semiconductor layer generated by the applied voltage, at least for partial ranges of the semiconductor layer, is optically detected and automatically examined for essentially one-dimensional intensity changes in order to detect mechanical defects.06-17-2010
20100150427PORTABLE WAFER INSPECTION SYSTEM - A portable wafer inspection system is applied on an inspection window of a manufacturing tool for wafers. The portable wafer inspection system comprises: a housing, a lighting unit, and an inspection unit. The housing has a receiving room therein, and a plurality of fixing members is disposed at the opening of the housing. The fixing members are used for fixing the housing on the inspection window of the manufacturing tool. The lighting unit and the inspection unit are disposed in the receiving room of the housing, wherein the inspection unit is for capturing images of the wafers. Thereby the inspection unit may be used for inspecting the wafers in the manufacturing tool through the inspection window06-17-2010
20100002931Processing image data - A method of processing image data, to obtain image data for printing a junction area connecting a circular pad having a radius R with a linear line pattern by forming ink blots having a radius r in an overlapping manner, includes: setting a base pitch P as a base distance between adjacent ink blots; arranging image data of the pad, line pattern, and junction area, which is defined by an extension of the line pattern, in an x-y coordinate system; selecting a first determination point, which corresponds to one side of the junction area; comparing a distance from a center of the pad to the first determination point with a value of (R−r+P); and storing coordinates of the first determination point as print data if the distance from the center of the pad to the first determination point is greater than or equal to the value of (R−r+P).01-07-2010
20090116726Method and system for inspecting a diced wafer - A method for inspecting a diced object that comprises multiple dies, the method includes: acquiring multiple images of multiple portions of the diced object, starting from a first portion that comprises an alignment area and continuing through adjacent portions of the diced object; assigning a die index to each die of the multiple dies of the diced object, starting from a die of the first portion and continuing through adjacent portions of the diced object; associating between dies of the diced object and a dies of a reference object in response to the assigned indexes and locations of the dies of the diced object; wherein the reference object is not diced; and comparing between a die of the diced object and another die while taking into account an association between the die of the diced object and a reference object die.05-07-2009
20100189339System and method for inspecting a wafer - A method for inspecting a wafer. The method comprises a training process for creating reference images. The training process comprises capturing a number of images of a first wafer of unknown quality, each of the number of images of the first wafer being captured at a predetermined contrast illumination and each of the number of images of the first wafer comprising a plurality of pixels. The training process also comprises determining a plurality of reference intensities for each of the plurality of pixels of each of the number of images of the first wafer, calculating a plurality of statistical parameters for the plurality of reference intensities of each of the plurality of pixels of each of the number of images of the first wafer, and selecting a plurality of reference images from the plurality of images of the first wafer based on the calculated plurality of statistical parameters. The method for inspecting the wafer further comprises capturing an image of a second wafer, the second wafer being of an unknown quality, selecting a first reference image from the plurality of reference images, and comparing the captured image of the second wafer with the first reference image to thereby determine at least one of presence and type of defect on the second wafer.07-29-2010
20100177954LOGICAL CAD NAVIGATION FOR DEVICE CHARACTERISTICS EVALUATION SYSTEM - A navigation system for easily determining defective positions is provided. In the case of CAD navigation to defective positions, logical information for indicating defective positions is created in a CAD format, instead of CAD data of physical information indicating circuit design. Specifically, by attaching marks such as rectangles, characters, or lines, to an electron microscope image with software, quick navigation is performed with required minimum information. By using created CAD data, re-navigation with the same equipment and CAD navigation to heterogeneous equipment are performed.07-15-2010
20100177953DISC WAFER INSPECTING DEVICE AND INSPECTING METHOD - [Problem] An inspecting device and an inspecting method enabling better precision inspection for a processing region formed on a surface of a semiconductor wafer or other disc wafer are provided.07-15-2010
20100239157AUTOMATED WAFER DEFECT INSPECTION SYSTEM AND A PROCESS OF PERFORMING SUCH INSPECTION - An automated defect inspection system has been invented and is used on patterned wafers, whole wafers, broken wafers, partial wafers, sawn wafers such as on film frames, JEDEC trays, Auer boats, die in gel or waffle packs, MCMs, etc., and is specifically intended and designed for second optical wafer inspection for such defects as metalization defects (such as scratches, voids, corrosion, and bridging), diffusion defects, passivation layer defects, scribing defects, glassivation defects, chips and cracks from sawing, solder bump defects, and bond pad area defects.09-23-2010
20110058730IMAGE PREPROCESSING FOR PROBE MARK INSPECTION - Digital image processing methods are applied to an image of a semiconductor interconnection pad to preprocess the image prior to an inspection or registration. An image of a semiconductor pads exhibiting spatial patterns from structure, texture or features are filtered without affecting features in the image not associated with structure or texture. The filtered image is inspected in a probe mark inspection operation.03-10-2011
20100239156METHOD AND APPARATUS FOR VISUAL INSPECTION - A visual inspection apparatus includes an image-data acquisition unit for acquiring plural pieces of image data A to C on an inspection target, image comparison units for comparing the image data A to C with each other thereby to create plural pieces of sign-affixed difference-image data D and E, the image data A to C being acquired by the image-data acquisition unit, difference-image comparison units for determining the difference between the sign-affixed difference-image data D and E created by the image comparison units, and a judgment unit for subjecting, to a threshold-value processing, difference data F between the difference-image data D and E, the difference data F being acquired by the difference-image comparison units, obtaining a detection sensitivity by enlarging the difference between an abnormal signal level of an image of an area where an abnormality exists from the visual inspection.09-23-2010
20090324055SYSTEM AND METHOD FOR GENERATING SPATIAL SIGNATURES REFERENCE TO RELATED APPLICATIONS - A system and method for spatial signature analysis, the system includes a memory unit for storing wafer defect density maps of multiple resolutions, derived from a defect map obtained by an inspection tool; an analyzer for analyzing the wafer defect density maps to identify zones of interest; and a spatial signature generator for generating spatial signatures in response relations between zones of interest of different density resolution.12-31-2009
20110026806Detecting Chip Alterations with Light Emission - An emission map of a circuit to be tested for alterations is obtained by measuring the physical circuit to be tested. An emission map of a reference circuit is obtained by measuring a physical reference circuit or by simulating the emissions expected from the reference circuit. The emission map of the circuit to be tested is compared with the emission map of the reference circuit, to determine presence of alterations in the circuit to be tested, as compared to the reference circuit.02-03-2011
20090161942Method for inspecting a surface of a wafer with regions of different detection sensitivity - The invention relates to a method for inspecting a surface of a wafer with regions of different detection sensitivity. For this purpose, an image of the selected surface of the wafer is acquired using a detector. At least one region handled with a different detection sensitivity than the rest of the wafer may be defined on the surface of the wafer by means of an input unit. The detection sensitivity set for the regions is a percentage less than the detection sensitivity for the surface of the wafer without the regions with the different detection sensitivity.06-25-2009
20090136119IMAGE PLOTTING DATA OBTAINING METHOD AND APPARATUS, AND IMAGE PLOTTING METHOD AND APPARATUS - Obtaining hypothetical image plot point trajectories in original image data corresponding to predetermined hypothetical image plotting trajectories on a substrate; obtaining and storing in advance hypothetical image plotting data corresponding to the hypothetical image plot point data trajectories from the original image data; selecting hypothetical image plot point data trajectories corresponding to the image plotting trajectory on the substrate when an image is plotted, and obtaining information indicating the area corresponding to the image plot point data trajectory in each hypothetical image plot point data trajectory indicated by the selected hypothetical image plot point data trajectories; identifying hypothetical image plotting data corresponding to the hypothetical image plotting data trajectories; obtaining partial hypothetical image plotting data based on the information indicating the area corresponding to the image plot point data trajectory; and obtaining image plotting data based on each partial hypothetical image plotting data.05-28-2009
20090046921PICK AND PLACE MACHINE WITH IMPROVED COMPONENT PICK UP INSPECTION - Embodiments of the present invention improve upon component level inspection performed by pick and place machines. Such improvements include inspecting the pick operation in pick and place machines by collecting images of the pick event inside the machine and identifying errors as they happen. By detecting and displaying this information as it generated on the machine, the operator or machine can take prompt and effective corrective actions.02-19-2009
20130136334Semiconductor Inspecting Apparatus - A semiconductor inspecting apparatus which is provided with an inspecting unit, a detecting unit, and a processing unit, which processes an image on the basis of reflection light detected by the detecting unit, and which inspects the surface of the subject to be inspected. The processing unit is provided with an image distribution control unit, which distributes the image, and an image processing unit, which processes the image distributed by the image distribution control unit. The image distribution control unit has and image buffer counter, which counts the input image quantity of the image; a distribution control table, which stores information relating to the image; and a distribution timing control circuit, which determines distribution start timing of the image on the basis of the input image quantity and the information relating to the image obtained from the distribution control table.05-30-2013
20090034831Patterned wafer defect inspection system and method - A system for inspecting semiconductor devices is provided. The system includes a region system selecting a plurality of regions from a semiconductor wafer. A golden template system generates a region golden template for each region, such as to allow a die image to be compared to golden templates from a plurality of regions. A group golden template system generates a plurality of group golden templates from the region golden templates, such as to allow the die image to be compared to golden templates from a plurality of group golden templates.02-05-2009
20090214103METHOD FOR MEASURING A PATTERN DIMENSION - In SEM image based pattern measurement using electron beam simulation, accuracy of simulation is very influential. For matching between a simulated image and an actual image, it is needed to properly model the shape and material of a target being measured and reflect them in simulated images. In the present invention, highly accurate pattern measurements are achieved by using simulated images with properly set parameters of shape and dimension having a large influence on the accuracy of matching for measurement between simulated and actual images, based on SEM images or information obtained by another measurement apparatus such as AFM.08-27-2009
20090214104PATTERN IMAGE CORRECTING APPARATUS, PATTERN INSPECTION APPARATUS, AND PATTERN IMAGE CORRECTING METHOD - The present invention provides an apparatus and method for correcting an inspection reference pattern image in order to properly inspect a pattern image of a specimen. The pattern image correcting apparatus is characterized by including: a first pattern synthesizing unit for synthesizing an assist pattern image and a pattern image to be inspected, thereby generating a pattern image to be inspected with an assist pattern; an assist pattern shift processor; a second pattern synthesizing unit for synthesizing the shifted assist pattern image and the inspection reference pattern image, thereby generating an inspection reference pattern image with an assist pattern; a model generating unit for generating a position shift model by using the pattern image to be inspected with the assist pattern and the inspection reference pattern image with the assist pattern; and a correction pattern image computing unit for correcting the inspection reference pattern image.08-27-2009
20090067702METHODS, DEVICES, AND SYSTEMS RELATED TO PIXEL ARRAYS - Methods, devices, and systems for an image sensor device are disclosed. An image sensor device comprises an array of image pixels wherein each pixel is configured for sensing light incident on the pixel. An image sensor device may further comprise a ground contact shared between at least two image pixels of the plurality. The ground contacts may be provided in an even pattern, a random pattern, or a repeating random pattern across the array. The image sensor device may further include an array of shared pixel structures comprising a plurality of pixels, wherein a ground contact may be evenly or randomly placed within each pixel structure across the array of pixel structures.03-12-2009
20090034832Device and method for scanning the whole surface of a wafer - A device and a method for scanning the whole surface of a wafer are disclosed. The wafer is deposited on a table movable in the X-coordinate direction and in the Y-coordinate direction. A camera and at least one illumination source are arranged opposite the wafer. The camera is a line camera with a detector row, wherein the length of the detector row is less than the diameter of the wafer.02-05-2009
20110081070Process and Apparatus for Image Processing and Computer-readable Medium Storing Image Processing Program - In an apparatus for image processing realized by a computer executing an image processing program: an image generation unit generates, for a radiographic image of a structure constituted by a plurality of members being stacked and including an object to be examined, a density-correction image representing an influence of a transmission density of each of the plurality of members other than the object to be examined, on the basis of structure information on the plurality of members; and a removal unit removes the influence of the transmission density of each of the plurality of members other than the object to be examined, from at least a part of the radiographic image in which images of the plurality of members overlap, by using the density-correction image generated by the image generation unit.04-07-2011
20110085725WAFER EDGE INSPECTION AND METROLOGY - Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.04-14-2011
20110085724APPLICATION STATE INSPECTING METHOD - A paste Pst applied onto a substrate Pb in a predetermined drawing pattern is imaged to acquire the image (step ST04-14-2011
20100310150FEATURE ANALYZING APPARATUS - A feature analysis apparatus which enables visual confirmation of features of an inspected object and which enables limitations on the degree of freedom of classification based on the features to made relatively smaller is provided. It acquires inspected object information of an inspected object (S12-09-2010
20090110261Apparatus and Method for Verifying Pattern of Semiconductor Device - An apparatus and method for verifying the pattern of a semiconductor device provides for automatically detecting the leaning of pattern by using a design layout and the upper and the lower SEM (Scanning Electron Microscope) image of the pattern formed according to the design layout.04-30-2009
20080267488Apparatus and method for monitoring overlapped object - An apparatus and a method for monitoring overlapped objects are disclosed. The monitoring apparatus comprises a projection device and a camera for projecting images to a target plane at different angles and shooting the pictures from the target plane. When an object is placed on the target plane, the pictures present the part of the image overlapping the surface of the object for determining whether there are overlapped objects or not.10-30-2008
20110255772Method for Screening of Multi-Junction Solar Cells - A method for screening of multi-junction solar cells to be operated in a high sun intensity and high temperature (HIHT) environment. An electroluminescence image of a homogeneous pn-junction at a predefined bias current is acquired for each of the solar cells. The spatial intensity distribution in the electroluminescence image is analyzed to determine whether there are local intensity variations that possibly dissipate power in a HIHT environment. The solar cells are sorted such that solar cells having no local intensity variations in their electroluminescence image are put into a first group and solar cells having at least one local intensity variation in their electroluminescence image are put into a second group cells for further screening. The solar cells of the first group are suitable for a HIHT environment and solar cells of the second group are assumed to be potentially critical in a HIHT environment.10-20-2011
20110255771METHOD OF DISCRIMINATING BETWEEN AN OBJECT REGION AND A GROUND REGION AND METHOD OF MEASURING THREE DIMENSIONAL SHAPE BY USING THE SAME - A method of discriminating a region and a method of measuring a three dimensional shape are disclosed. The method includes irradiating light onto a substrate having a measurement target formed thereon to capture an image by receiving light reflected by the substrate, setting up an object region in which the measurement target is disposed and a ground region corresponding to a remaining region in an inspection region of the image, irradiating a grating patterned light onto the substrate having the measurement target formed thereon to capture a patterned image by receiving the grating patterned light reflected by the substrate, and obtaining height of each position in the inspection region by using the patterned image to establish a ground height with respect to the measurement target with a height of the ground region.10-20-2011
20110164807PATTERN EVALUATION SYSTEM, PATTERN EVALUATION METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD - In accordance with an embodiment, a pattern evaluation system includes an image acquisition unit, a plurality of image processing units, and a control unit which controls the plurality of image processing units. The image acquisition unit loads a series of images of a pattern to be evaluated. The images are acquired at a first speed. The plurality of image processing units process the series of images at a second speed and then output a result of the evaluation of the pattern to be evaluated. The control unit acquires the first and second speeds, estimates the number of the image processing units which allow the time for acquiring the series of images to be substantially the same as the time for processing the series of images, and allocates the estimated image processing units to the processing of the series of images.07-07-2011
20110262027Pattern inspection method and apparatus - A color image of an inspection object is taken by an imaging means capable of taking a color image to obtain color information of an RGB color space. A gray-scale image of a color component of the RGB color space or another color space is generated, and the inspection object is detected by a pattern recognition technique. Alternatively, a binary image is generated from the generated gray-scale image, and the inspection object is detected by performing pattern recognition on the binary image. Color data of a pixel occupied by the detected inspection object is compared with color data of a non-defective inspection object which is previously prepared to judge whether or not the inspection object is defective. In addition, this judgment result is reflected in another manufacturing step through a network and product quality is improved.10-27-2011
20090208089METHOD FOR INSPECTING SURFACES - A method for inspecting surfaces 08-20-2009
20080219545METHODS FOR IDENTIFYING ARRAY AREAS IN DIES FORMED ON A WAFER AND METHODS FOR SETTING UP SUCH METHODS - Methods for identifying array areas in dies formed on a wafer and methods for setting up such methods are provided. One method for identifying array areas in dies formed on a wafer includes comparing an array pattern in a template image acquired in one of the array areas to a search area image acquired for the wafer. The method also includes determining areas in the search area image in which a pattern is formed that substantially matches the array pattern in the template image based on results of the comparing step. In addition, the method includes identifying the array areas in the dies formed on the wafer based on results of the determining step.09-11-2008
20110096980METHOD AND SYSTEM FOR EVALUATING CONTACT ELEMENTS - A method, system and a computer program product for evaluating contact elements, the method includes: acquiring images of multiple groups of contact elements, wherein each group of contact element was expected to be contacted during a test by the same group of probes so as to form multiple probe marks; and evaluating at least one characteristic of a first contact element in response to a comparison between a number of potential probe marks that appear in the image of a first contact element and a number of potential probe marks that appear in an image of a second contact element.04-28-2011
20110052040SUBSTRATE INSPECTION METHOD - A substrate inspection method is disclosed. The disclosed method includes 1) providing one or more images of one or more sample substrates; 2) identifying, from the images, two or more occurrences of a target pattern in the images; and 3) comparing the identified target-pattern occurrences against each other to determine, from the images, a presence of abnormalities in the compared target-pattern occurrences, hence determining one or more defects physically present in the target-pattern occurrences. The disclosed method may be implemented via execution of a computer program encoded in a computer readable medium, where the computer program instructs an imaging apparatus to form images of the of-interest sample substrates and instructs an image analyzing apparatus to identify and compare, from the images, the target-pattern occurrences on the sample substrates.03-03-2011
20100158345Defect And Critical Dimension Analysis Systems And Methods For A Semiconductor Lithographic Process - Apparatus and method evaluate a wafer fabrication process for forming patterns on a wafer based upon design data. Within a recipe database, two or more inspection regions are defined on the wafer for analysis. Patterns within each of the inspection regions are automatically selected based upon tendency for measurement variation resulting from variation in the fabrication process. For each inspection region, at least one image of patterns within the inspection region is captured, a reference pattern, represented by one or both of (a) one or more line segments and (b) one or more curves, is automatically generated from the design data. An inspection unit detects edges within each of the images and registers the image with the reference pattern. One or more measurements are determined from the edges for each of the selected patterns and are processed within a statistical analyzer to form statistical information associated with the fabrication process.06-24-2010
20100067778APPARATUS AND METHOD FOR PATTERN INSPECTION - A pattern inspection apparatus includes a light source, a stage configured to mount thereon a substrate with a pattern formed thereon, a first laser measuring unit configured to measure a position of the stage by using a laser beam, a sensor configured to capture a pattern image obtained from the pattern, formed on the substrate, irradiated by light from the light source, an optical system configured to focus the pattern image on the sensor, a second laser measuring unit configured to measure a position of the optical system by using a laser beam, a correction unit configured to correct a captured pattern image by using a difference between the position of the stage and the position of the optical system, and an inspection unit configured to inspect whether there is a defect of the pattern by using a corrected pattern image.03-18-2010
20100067779ALL SURFACE DATA FOR USE IN SUBSTRATE INSPECTION - A system for capturing, calibrating and concatenating all-surface inspection and metrology data is herein disclosed. Uses of such data are also disclosed.03-18-2010
20100021045Manufacturing method of printed circuit board and manufacturing apparatus for the same - The present invention relates to a method for manufacturing a printed circuit board and an apparatus for manufacturing the same; and, more particularly, to a method for manufacturing a printed circuit board and an apparatus for manufacturing the same capable of improving the degree of matching between contact holes and pads by correcting exposure position data of an exposing process for forming the pads according to positions of the contact holes.01-28-2010
20100021047AUTOMATIC DEFECT REVIEW AND CLASSIFICATION SYSTEM - The invention proposes a system that interrupts a processing associated with an ADC having low priority when an ADC processing cannot catch up with ADR by an ADC alone that is not under execution but uses an ADC for an ADR having high priority. To preferentially execute ADR/ADC having high priority, the invention employs an algorithm for serially selecting ADR/ADC in the order of higher processing capacity (in the order of greater numerical values in the expression by a DPH unit) from among ADR/ADCs that have the lowest priority, no matter whether the ADR/DC is now under execution or not.01-28-2010
20100021046PATTERN INSPECTION APPARATUS, PATTERN INSPECTION METHOD AND COMPUTER READABLE RECORDING MEDIUM - A pattern inspection apparatus includes: an inspection threshold setting unit to set a defect detection threshold to be used in inspection of an inspection pattern by referring to design information of an inspection layer which is included in a plurality of layers on a substrate and which has the inspection pattern formed thereon, and design information of an adjacent layer which is one of two layers adjacent to the inspection layer in a normal line direction of the substrate; a deviation amount calculation unit to receive an image containing the inspection layer and the adjacent layer, detect edges of the image, and calculate a deviation amount between an edge of the inspection pattern and an edge of a pattern of the adjacent layer; and a defect determination unit to determine whether there is a defect in the inspection pattern by comparing the calculated deviation amount with the defect detection threshold.01-28-2010
20100021044Image Capture and Calibratiion - Embodiments of the present invention enable image capture and validation. Certain applications of the present invention are its use in various embodiments of a system for inspection of a printed circuit board (“PCB”) substrate. In embodiments, an image capture system comprising a camera and a two-dimensional surface supporting an image may be calibrated based on configuration parameters of an image to be captured and of a simulated reference bitmap based on the image. In embodiments, the position of the image to be captured on the two-dimensional surface is determined based on calibration parameters. In embodiments, consistency of quality of captured images is maintained by validating selected characteristics of each image as it is being captured.01-28-2010
20090196488DENSITY MULTIPLICATION AND IMPROVED LITHOGRAPHY BY DIRECTED BLOCK COPOLYMER ASSEMBLY - Methods to pattern substrates with dense periodic nanostructures that combine top-down lithographic tools and self-assembling block copolymer materials are provided. According to various embodiments, the methods involve chemically patterning a substrate, depositing a block copolymer film on the chemically patterned imaging layer, and allowing the block copolymer to self-assemble in the presence of the chemically patterned substrate, thereby producing a pattern in the block copolymer film that is improved over the substrate pattern in terms feature size, shape, and uniformity, as well as regular spacing between arrays of features and between the features within each array compared to the substrate pattern. In certain embodiments, the density and total number of pattern features in the block copolymer film is also increased. High density and quality nanoimprint templates and other nanopatterned structures are also provided.08-06-2009
20100046828MEASUREMENT OF CRITICAL DIMENSIONS OF SEMICONDUCTOR WAFERS - A semiconductor wafer critical dimension measurement method comprising receiving an image of a site of the semiconductor wafer comprising a plurality of features, processing the image to measure at least one critical dimension of at least some of the features, analysing the critical dimension of each feature and determining the feature to be a non-defective feature or a defective feature, and using the critical dimension of at least some of any non-defective features as a measure of the critical dimension of features of the semiconductor wafer.02-25-2010
20110116705METHOD OF MEASURING FOCAL VARIATIONS OF A PHOTOLITHOGRAPHY APPARATUS AND A METHOD OF FABRICATING A SEMICONDUCTOR DEVICE USING THE FOCAL VARIATIONS MEASURING METHOD - Provided are a method of measuring focal variations of a photolithography apparatus and a method of fabricating a semiconductor device using the method. The method of measuring the focal variations of the photolithography apparatus includes loading a photomask and a wafer into the photolithography apparatus. The photomask has an optical pattern, and the wafer has a photoresist layer on a top surface thereof. An image of the optical pattern is transferred to the photoresist layer using ultraviolet (UV) light. The photoresist layer is baked. The photoresist layer is inspected. Inspection results of the photoresist layer are analyzed. The inspection of the photoresist layer includes irradiating light for measurement to the entire surface of the wafer. Light reflected and diffracted by the wafer is collected to form an optical image. The analysis of the inspection results of the photoresist layer includes analyzing optical information on the optical image.05-19-2011
20120121160METHOD OF CREATING TEMPLATE FOR MATCHING, AS WELL AS DEVICE FOR CREATING TEMPLATE - Disclosed is a method wherein a template for template matching is created with high accuracy and high efficiency. With respect to each individual pattern constituting a basic circuit, pattern information regarding a plurality of layers in a semiconductor device is stored in a library. On the basis of the designation of the position and the layer, pattern information regarding the designated position and layer is extracted from the pattern information stored in the library. A template is created on the basis of the extracted pattern information.05-17-2012
20120148144COMPUTING DEVICE AND IMAGE CORRECTION METHOD - A computing device reads a reference image and a real-time of a printed circuit board (PCB), determines feature points and feature information of the feature points in the reference image; and creates two 1×N matrices based on the feature points. Furthermore, a mapping matrix is determined based on the two 1×N matrices. The device determines matching points in the real-time image based on coordinates of base points in the reference image and the mapping matrix, determines a matching region the real-time image based on the matching points, and determines an angle between the matching region and an X-axis of a coordinate system. If the angle does not equal zero, the device determines that the real-time is tilted, and corrects the real-time image to obtain a corrected image by taking a center of the real-time image as a turning pivot to rotate the real-time image until the angle equals zero.06-14-2012
20120099781METHOD AND APPARATUS OF PATTERN INSPECTION AND SEMICONDUCTOR INSPECTION SYSTEM USING THE SAME - A pattern inspection apparatus can be provided, for example, in a scanning electron microscope system. When patterns of a plurality of layers are included in a SEM image, the apparatus separates the patterns according to each layer by using design data of the plurality of layers corresponding to the patterns. Consequently, the apparatus can realize inspection with use of only the pattern of a target layer to be inspected, pattern inspection differently for different layers, or detection of a positional offset between the layers.04-26-2012
20120039524METHOD FOR RECOGNIZING A STRUCTURE TO BE APPLIED TO A SUBSTRATE, WITH THE AID OF SEVERAL CAMERAS AND DEVICE THEREFORE - A method and apparatus are provided for automatic application and monitoring of a structure to be applied onto substrate. A plurality of cameras positioned around an application facility are utilized to monitor the automatic application of a structure on a substrate by means of a stereometry procedure. Three-dimensional recognition of a reference contour position results in the overlapping area to be used for gross adjustment of the application facility prior to applying the structure.02-16-2012
20110317908Method for Performing Pattern Decomposition Based on Feature Pitch - The present invention discloses a method for decomposing a target pattern containing features to be printed on a wafer, into multiple patterns, the features having a plurality of patterns within a minimum pitch for processes utilized to image the target pattern. The method includes superposing a predefined kernel over a pixel, and moving the kernel from one pixel to another, the pixels representing the sub-patterns of the target pattern. Polarity of the kernel may be reversed when the pixel has a stored intensity value that is negative.12-29-2011
20090202140PATTERN EVALUATION METHOD, COMPUTER-READABLE RECORDING MEDIUM, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A pattern evaluation method includes: acquiring data of a design pattern for an evaluation pattern to detect a first edge of the design pattern; acquiring an image of the evaluation pattern to detect a second edge of the evaluation pattern; dividing the first edge into first linear parts and first corner parts; performing matching of the first and second edges to obtain correspondence between the first and second edges; dividing the second edge into second linear parts and second corner parts based on the correspondence between the first and second edges; and evaluating the evaluation pattern based on at least one of the second linear parts and the second corner parts.08-13-2009
20120045114Authentication device, authentication method, and an information storage medium storing a program - There is provided an authentication device including an authentication information storage unit that stores authentication information acquired from an authentication pattern including a part or the entirety of a mottled pattern or a dot pattern formed over an electronic component as information for indentifying each of a plurality of electronic components, an authentication information acquiring unit that acquires a first authentication information acquired from the authentication pattern formed over a first electronic component that is an object to be authenticated, a search unit that searches whether or not the authentication information storage unit stores the first authentication information by using the first authentication information as a search key, and an output unit that outputs a search result of the search unit.02-23-2012
20120057774PATTERN GENERATING APPARATUS AND PATTERN SHAPE EVALUATING APPARATUS - Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern.03-08-2012
20100246934INSPECTION DEVICE FOR DISK-SHAPED SUBSTRATE - An inspection apparatus of a disk-shaped substrate able to precisely quantitatively inspect positions of formation of film layers formed on the surface of a disk-shaped substrate is provided, that is, an inspection apparatus of a disk-shaped substrate on which film layers are formed designed to generate captured image data expressing a captured image corresponding to a field of view based on image signals successively output from an image capturing unit capturing an image of a predetermined surface at an outer circumference part of the disk-shaped substrate and to generate film layer edge position information Y09-30-2010
20120128230DEFECT INSPECTION METHOD AND APPARATUS - An inspection method, including: illuminating a light on a wafer on which plural chips having identical patterns are formed; imaging corresponding areas of two chips formed on the wafer to obtain inspection images and reference images with an image sensor; and processing the obtained inspection image and the reference image to produce a difference image which indicates a difference between the inspection image and the reference image and detect a defect by comparing the difference image with a threshold, wherein a threshold applied to a difference image which is produced by comparing the inspection image and the reference image obtained by imaging peripheral portion of the wafer is different from a threshold applied to a difference image which is produced by comparing the inspection image and the reference image obtained by imaging central portion of the wafer.05-24-2012
20120128229IMAGING OPERATIONS FOR A WIRE BONDING SYSTEM - A method of imaging a feature of a semiconductor device is provided. The method includes the steps of: (a) imaging a first portion of a semiconductor device to form a first imaged portion; (b) imaging a subsequent portion of the semiconductor device to form a subsequent imaged portion; (c) adding the subsequent imaged portion to the first imaged portion to form a combined imaged portion; and (d) comparing the combined imaged portion to a reference image of a feature to determine a level of correlation of the combined imaged portion to the reference image.05-24-2012
20100208978METHOD OF INSPECTING MASK PATTERN AND MASK PATTERN INSPECTION APPARATUS - A inspection image data of the chip A is captured and the data representing the amount of correction of flare corresponded to the chip A is appropriately loaded from the map storage block. Next, a inspection image of the chip A′ is captured, and the data representing the amount of correction of flare corresponded to the chip A′ is loaded from the flare map storage block as the amount of shifting of the edge of the contour of the pattern. The amount of correction is converted, by a correction data generation block which is a correction data generator, into the amount of geometrical correction of pattern which provides correction data. In the comparison block, the images of the geometry of two chips are compared and corrected on the amount of correction of flare generated by a correction data generation block, to thereby judge whether defect is found or not.08-19-2010
20110182496DEFECT CHECK METHOD AND DEVICE THEREOF - A defect inspection method for inspecting a defect(s) on an object to be inspected, within a step for determining parameter includes: a step for extracting a defect candidate on the object to be inspected with using said discriminant function with determining an arbitrary parameter; and a step for automatically renewing the parameter of said discriminant function, upon basis of teaching of defect information relating to the defect candidate, which is extracted in the step for extracting the defect candidate.07-28-2011
20100189340MOUNTED COMPONENT INSPECTION APPARATUS, COMPONENT MOUNTING MACHINE COMPRISING THE MOUNTED COMPONENT INSPECTION APPARATUS, AND MOUNTED COMPONENT INSPECTION METHOD - A mounted component inspection apparatus according to the present invention includes: a component library holding inspection information; an inspection processing unit for inspecting a component under inspection using the component library; a match rate acquisition unit for acquiring a match rate indicating the degree to which the inspection information is suitable for the inspection by the inspection processing unit, on the basis of the result of the inspection by the inspection processing unit; and a judgment unit for selecting the inspection information having a higher match rate, of the inspection information before updating and the inspection information after updating. The component library can hold the inspection information before and after updating, and the inspection processing unit carries out the inspection using the inspection information before and after updating held in the component library.07-29-2010
20120076396PATTERN INSPECTION METHOD AND ITS APPARATUS - A pattern inspection method and apparatus are provided for sequentially imaging plural chips formed on a substrate to be inspected to and obtaining inspection images and reference images, calculating a position gap between the inspection images and the reference images using a recipe created in advance by using another substrate of the same kind or type as the substrate, the recipe including information for determining which pattern sections are to be selected and discarded, aligning the inspection images and the reference images using information of the position gap from the calculating step, and comparing the inspection images with the reference images aligned by the aligning step and extracting a defect candidate.03-29-2012
20120076394METHOD, APPARATUS AND PROGRAM FOR PROCESSING A CONTRAST PICTURE IMAGE OF A SEMICONDUCTOR ELEMENT - A method for processing a contrast picture image of a semiconductor element. The method comprises: a color grade number reducing processing that automatically reduces number of color grades of the contrast picture image of the semiconductor element, obtained from a device for analysis, in keeping with the contrast of the contrast picture image; an interconnect contrast extraction processing that classifies pixels contained in the contrast picture image, whose number of color grades has been reduced, in accordance with a preset contrast threshold value as reference, to extract an interconnect pattern fractionated into a plurality of number of contrasts; and a shift processing that removes noise contained in a contour portion of the interconnect pattern by shifting the contour portion; whereby an interconnect pattern contained in the contrast image of the semiconductor element obtained from the device for analysis is fractionated into a plurality of preset contrasts to be extracted.03-29-2012
20120076393CD METROLOGY SYSTEM AND METHOD OF CLASSIFYING SIMILAR STRUCTURAL ELEMENTS - A CD metrology system and method of classifying similar structural elements. The method includes: a) obtaining an image of the semiconductor structure; b) identifying sufficient numbers of structural elements belonging to first and second groups of similar structural elements, each group originating from a different manufacturing stage; c) assessing to each given structural element within the sufficient numbers of structural elements belonging to the first and second groups, one or more features indicative of a respective manufacturing stage, wherein values of the respective features are derived from the obtained image and; d) using results of the assessment for a classification decision related to manufacturing stages and, respectively, originating therefrom structural elements in the first and second groups of similar structural elements.03-29-2012
20120076395SYSTEM AND METHOD FOR AUTOMATIC ORIENTATION OF A CHIP TO THE CAD LAYOUT WITH SUB-OPTICAL RESOLUTION - A method and system for aligning a DUT image for testing. The alignment is performed by obtaining an optical image of the DUT from an optical system; obtaining a computer aided design (CAD) data having CAD layers of the DUT; constructing a CAD image of the DUT by overlaying the CAD layers; operating on the CAD image to generate a synthetic image simulating an optical image of the DUT; generating a difference image by comparing the optical image to the synthetic image; and, varying parameters of the synthetic image so as to minimize the difference image.03-29-2012
20090097737VISUAL INSPECTION APPARATUS - In a visual inspection apparatus according to the present invention, a carrier base 04-16-2009
20080205746METHOD OF INSPECTING AN IDENTIFICATION MARK, METHOD OF INSPECTING A WAFER USING THE SAME, AND APPARATUS FOR PERFORMING THE METHOD - In a method of inspecting an identification mark, an image of the identification mark on a semiconductor wafer is obtained. The identification mark may be identified using the identification mark image. A region where the identification mark is formed may be inspected using the identification mark image after the identification mark is identified.08-28-2008
20120189188COMPONENT MOUNTING SYSTEM AND MOUNTING STATE INSPECTION METHOD IN THE COMPONENT MOUNTING SYSTEM - Provided is a component mounting system and a mounting state inspection method in the component mounting system in which accurate mounting state inspection can be achieved with good operability. A board image capturing operation for image-capturing an inspection range of a board to be inspected to acquire captured image data is executed on the board before and after mounting work is executed on the board by inspection modules M07-26-2012
20110123092METHOD FOR MEASURING SEMICONDUCTOR WAFER PROFILE AND DEVICE FOR MEASURING THE SAME USED THEREFOR - Disclosed is a method for measuring a profile using a device for measuring the profile in which included are: a distance measuring means 05-26-2011
20110123091Detecting Semiconductor Substrate Anomalies - The present invention is directed to a method for detecting anomalies in a semiconductor substrate comprising the steps of providing a semiconductor substrate, making an inspection image I of the substrate, generating an image K from image I by image processing, generating image B by binarizing image K, and examining image I using image B, characterized in that generating image K comprises multiplying a high-pass convolution filtered image G(I) from image I and a first weight image W05-26-2011
20080298669DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - A data processing apparatus according to the present invention takes in a plurality of inspection, image and attribute data output from an inspection apparatus, a review SEM image, coordinate information of hot spots found by simulation, and CAD information in the hot spots, and displays these kinds of information side by side. Tuning of inspection conditions in the inspection apparatus is facilitated from a view point of the detection rate of the hot spots. In addition, it is made possible to easily implement a fixed point observation function in a conventional review SEM by outputting coordinate data which can be read by the review SEM. Cooperation among simulation data, the inspection apparatus, and the review SEM is facilitated.12-04-2008
20110002528VERIFICATION OF INTEGRATED CIRCUITS AGAINST MALICIOUS CIRCUIT INSERTIONS AND MODIFICATIONS USING NON-DESTRUCTIVE X-RAY MICROSCOPY - A method and system for verifying the integrity of integrated circuits (ICs) by detecting the presence of unauthorized circuit insertions or modifications using non-destructive x-ray microscopy is disclosed. A reference image based on a trusted IC or a trusted design file may be generated. An un-trusted IC may be received from an un-trusted foundry, which IC is manufactured in response to the trusted design file provided to the foundry. An x-ray microscope may record a plurality of sets of base images of the un-trusted IC, each set corresponding to a different viewing angle. One or more un-trusted images may be produced from the base images. The reference images may be compared with the un-trusted images to illuminate any additions or modifications in circuit elements or other parameters.01-06-2011
20110038528METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR INSPECTION DEVICE, AND PROGRAM - A manufacturing method of a semiconductor device capable of efficiently inspecting whether a metal silicide layer is sufficiently formed is provided. The manufacturing method is provided with the steps of forming a metal layer over a semiconductor layer containing silicon; forming a metal silicide layer over a surface of the semiconductor layer by heating the semiconductor layer and the metal layer; generating image data by performing color imaging of the metal silicide layer from above the metal silicide layer; calculating saturation of the metal silicide layer by processing the image data; and judging the formation amount of the metal silicide layer on the basis of the calculated saturation.02-17-2011
20100232680PATTERN DETECTION ON AN SIMD PROCESSOR - A method for detecting a pattern in an image comprising a grid of data elements processes each data element in a predetermined order. In processing one of the data elements, the following steps are carried out. It is checked (09-16-2010
20120328181PATTERN INSPECTION APPARATUS AND METHOD - A pattern inspection apparatus is used for inspecting a fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data. The pattern inspection apparatus includes a reference pattern generation device configured to generate a reference pattern represented by one or more lines, comprising one of a line segment and a curve, from the data, an image generation device configured to generate the image of the pattern to-be-inspected, a detecting device configured to detect an edge of the image of the pattern to-be-inspected, and an inspection device configured to inspect the pattern to-be-inspected by comparing the edge of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.12-27-2012
20130011043DEFECT INSPECTING DEVICE AND DEFECT INSPECTING METHOD - The present invention provides a defect inspecting device which enables an improvement in the efficiency of spatial filter settings, and at the same time enables automation of the spatial filter settings. An adjustable field of view diaphragm (01-10-2013
20110158502MAPPING VARIATIONS OF A SURFACE - A method for characterizing a surface, consisting of dividing the surface into pixels which are characterized by a parameter variation and defining blocks of the surface as respective groups of the pixels. The pixels are irradiated in multiple scans over the surface with radiation having different first polarization states. At least part of the radiation returning from the pixels is analyzed using second polarization states, to generate processed returning radiation. For each scan, block signatures of the blocks are constructed using the processed returning radiation from the group of pixels in each block. Also for each scan, a block signature variation is determined using the respective block signatures of the blocks, and, in response to the block signature variation, one of the first polarization states and at least one of the second polarization states are selected for use in subsequent examination of a test object.06-30-2011
20130022260WAFER EDGE INSPECTION AND METROLOGY - Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.01-24-2013
20080247633SYSTEM FOR GENERATING A SET OF TEST PATTERNS FOR AN OPTICAL PROXIMITY CORRECTION ALGORITHM - A system of synthesizing layout patterns to test an optical proximity correction algorithm. The method comprises the steps of: embodying Walsh patterns in a set of Walsh pattern matrices; processing groups of matrices from the set of Walsh pattern matrices to form a set of test matrices; mapping the set of test matrices to a test pattern set.10-09-2008
20080240544System for creating an inspection recipe, system for reviewing defects, method for creating an inspection recipe and method for reviewing defects - A system for creating an inspection recipe, includes an inspection target selection module selecting an inspection target; a critical area extraction module extracting corresponding critical areas for defect sizes in the inspection target; a defect density prediction module extracting corresponding defect densities predicted by defects to be detected in the inspection target for the defect sizes; a killer defect calculation module calculating corresponding numbers of killer defects in the defect sizes based on the critical areas and the defect densities; and a detection expectation calculation module calculating another numbers of the killer defects expected to be detected for prospective inspection recipes determining rates of defect detection for the defect sizes, based on the numbers of the killer defects and the rates of defect detection prescribed in the prospective inspection recipes.10-02-2008
20080232672DEVICE AND METHOD FOR EVALUATING DEFECTS IN THE EDGE AREA OF A WAFER AND USE OF THE DEVICE IN INSPECTION SYSTEM FOR WAFERS - A device for evaluating defects in the edge area of a wafer (09-25-2008
20110274341CHARGED BEAM DEVICE - In order to provide a charged beam device capable of obtaining a precise image of a sample surface pattern while improving the accuracy of automatic focus/astigmatism correction, there are provided an electron gun (11-10-2011
20130114879Method and System for Automated Defect Detection - A computer program product and method for performing automated defect detection of blades within an engine is disclosed. The method may include providing a storage medium for storing data and programs used in processing video images, providing a processing unit for processing images, receiving from a borescope an initial set of images of a plurality of members inside of a device, and using the processing unit to apply Robust Principal Component Analysis to decompose the initial set of images into a first series of low rank component images and a second series of sparse component images, wherein there are at least two images in the initial series.05-09-2013
20130101205LABEL DETECTING SYSTEM, APPARATUS AND METHOD THEREOF - The present disclosure provides a label detecting system, apparatus and a detecting label method for the label detecting system. The method includes steps whereby an image processing function for the image of the circuit board under test to obtain a binary image of the circuit board takes place, dividing the binary image of the circuit board into a number of areas and scanning the binary image of the circuit board, performing a generalization and correlation analysis between each area and the binary image of the standard label to obtain a matching value, acquiring a maximum and location information of the area associated with a maximum, comparing the maximum with two threshold values to detect a result of the determination as to the correctness of the location information of the area as compared to that of the standard label, and displaying the result.04-25-2013
20110268344Apparatus For Detecting Micro-Cracks In Wafers And Method Therefor - A method and apparatus for wafer inspection is disclosed. The method and apparatus involve directing light substantially along a first axis towards a first surface of a wafer to thereby obtain light emanating along the first axis from a second surface of the wafer, wherein the first and second surfaces of the wafer are substantially outwardly opposing and substantially extending parallel to a plane. The method and apparatus further involve directing light substantially along a second axis towards the first surface of the wafer to thereby obtain light emanating along the second axis from the second surface of the wafer, the first axis being angled away from the second axis about a reference axis extending along the plane. More specifically, the orthographic projection of the first axis on the plane is substantially parallel to the orthographic projection of the second axis on the plane, and each the orthographic projections of the first and second axes on the plane is substantially orthogonal to the reference axis.11-03-2011
20080205745METHODS FOR ACCURATE IDENTIFICATION OF AN EDGE OF A CARE AREA FOR AN ARRAY AREA FORMED ON A WAFER AND METHODS FOR BINNING DEFECTS DETECTED IN AN ARRAY AREA FORMED ON A WAFER - Methods for identifying an edge of a care area for an array area formed on a wafer and/or for binning defects detected in the array area are provided. One method for identifying an edge of a care area for an array area formed on a wafer includes determining a value for a difference image as a function of position from a position known to be inside the array area to a position known to be outside of the array area. The method also includes identifying the position that is located closest to the inside of the array area and that has the value greater than a threshold as a position of the edge of the care area.08-28-2008
20080199068Inspection System - An inspection system for inspecting web printed electronic circuitry includes a strobed illuminator, a detector, a motion encoder, and a processor. The strobed illuminator is adapted to project light through a reticle to project a pattern of light onto an area of the web. The projected light occurs in a pulse sufficiently short to essentially freeze the web motion. The system projects the pattern of light onto the area of the web in at least two different positions of the web each position corresponding to a different phase of the projected light. A detector is adapted to acquire at least two images of the area, each image corresponding to one of the at least two different phases. The motion encoder provides a position output relative to a position of the web. The processor is coupled to the encoder, the illuminator and the detector. The processor is adapted to synchronize the illuminator with the web motion to expose the area of the web. The processor co-sites the at least two images and can construct a height map image with the co-sited images.08-21-2008
20110255773CIRCUIT PATTERN INSPECTING APPARATUS, MANAGEMENT SYSTEM INCLUDING CIRCUIT PATTERN INSPECTING APPARATUS, AND METHOD FOR INSPECTING CIRCUIT PATTERN - The operation rate of a circuit pattern inspecting apparatus is prevented from deteriorating by measuring image noise of the circuit pattern inspecting apparatus and detecting the sign that the apparatus is to be in an abnormal state. Provided is the circuit pattern inspecting apparatus wherein circuit pattern abnormalities are detected by irradiating a substrate having a circuit pattern formed thereon with an electron beam and detecting generated secondary electrons or reflected electrons. The circuit pattern inspecting apparatus is provided with: an image processing section wherein an image is generated based on the signal intensities of the detected secondary electrons or those of the reflected electrons and the image is displayed for a display apparatus of the interface; and a control section which analyzes the frequency of noise included in the image.10-20-2011
20130148877SYSTEM AND METHOD FOR MEASUREMENT OF THROUGH SILICON STRUCTURES - A system and method for measurement of high aspect ratio through silicon via structures. A preferred embodiment includes a white light source and optical components adapted to provide a measurement beam which is nearly collimated with a measurement spot size of the same order of magnitude as the diameter (or effective diameter) of the TSV. These embodiments include a white light source with a variable aperture and other optical components chosen to control the angular spectrum of the incident light. In preferred embodiments the optical components include an automated XYZ stage and a system controller that are utilized to direct the illumination light so as to illuminate the top and bottom of TSV under analysis.06-13-2013
20130156293Methods and Systems For Grain Size Evaluation Of Multi-Cystalline Solar Wafers - Methods and systems for evaluation of wafers are disclosed. One example method includes illuminating a multi-crystalline wafer according to a plurality of lighting parameters, capturing a plurality of images of the multi-crystalline wafer, stacking and projecting the plurality of images to generate a composite image, analyzing the composite image to identify one or more grains of the multi-crystalline wafer, and generating a report based on the analysis of the composite image. The multi-crystalline wafer is illuminated according to a different one of the plurality of lighting parameters in at least two of the plurality of images.06-20-2013
20120020546PATTERN INSPECTION APPARATUS - According to one embodiment, a pattern inspection apparatus includes a first inspection data creation section, a first delay section, a first recognition section, a first extraction section, a first and a second level difference calculation section, a first and a second determination section, and a first logic OR calculation section. The first extraction section extracts data of a sub-resolution pattern from the first inspection data and the first delay data. The first and second level difference calculation section calculate differences between an average output level of a surrounding region for a target pixel of the extracted data from the first inspection data or the first delay data and an output level of the extracted data. The first and second determination sections determine presence or absence of a defect. The first logic OR calculation section calculates logic OR of determination results of the first and second determination sections.01-26-2012
20130195346METHOD AND APPARATUS FOR MONITORING CROSS-SECTIONAL SHAPE OF A PATTERN FORMED ON A SEMICONDUCTOR DEVICE - To enable SEM-based management of a cross-sectional shape or manufacturing process parameters of a semiconductor device pattern to be measured, the association between the shape or parameters and SEM image characteristic quantities effective for estimating the shape or parameters is saved as learning data. The image characteristic quantities are collated with learning data to estimate the shape or to monitor the process parameters. Accuracy and reliability is achievable by calculating three kinds of reliability (reliability of the image characteristic quantities, reliability of estimation engines, and reliability of estimating results) based on the distribution of the image characteristic quantities and then judging whether additional learning is necessary, or selecting and adjusting image characteristic quantities and estimation engine based on the reliability.08-01-2013
20090041332METHODS FOR GENERATING A STANDARD REFERENCE DIE FOR USE IN A DIE TO STANDARD REFERENCE DIE INSPECTION AND METHODS FOR INSPECTING A WAFER - Methods for generating a standard reference die for use in a die to standard reference die inspection and methods for inspecting a wafer are provided. One computer-implemented method for generating a standard reference die for use in a die to standard reference die inspection includes acquiring output of an inspection system for a centrally located die on a wafer and one or more dies located on the wafer. The method also includes combining the output for the centrally located die and the one or more dies based on within die positions of the output. In addition, the method includes generating the standard reference die based on results of the combining step.02-12-2009
20130202186METHOD AND SYSTEM FOR MEASURING CRITICAL DIMENSION AND MONITORING FABRICATION UNIFORMITY - A method for measuring critical dimension (CD) includes steps of: scanning at least one area of interest of a die to obtain at least one scanned image; aligning the scanned image to at least one designed layout pattern to identify a plurality of borders within the scanned image; and averaging distances each measured from the border or the plurality of borders of a pattern associated with a specific type of CD corresponding to the designed layout pattern to obtain a value of CD of the die. The value of critical dimensions of dies can be obtained from the scanned image with lower resolution which is obtained by relatively higher scanning speed, so the above-mentioned method can obtain value of CD for every die within entire wafer to monitor the uniformity of the semiconductor manufacturing process within an acceptable inspection time.08-08-2013
20130208973METHOD AND SYSTEM FOR OPTIMIZING OPTICAL INSPECTION OF PATTERNED STRUCTURES - A system and method are presented for use in inspection of patterned structures. The system comprises: data input utility for receiving first type of data indicative of image data on at least a part of the patterned structure, and data processing and analyzing utility configured and operable for analyzing the image data, and determining a geometrical model for at least one feature of a pattern in said structure, and using said geometrical model for determining an optical model for second type of data indicative of optical measurements on a patterned structure.08-15-2013

Patent applications in class Inspection of semiconductor device or printed circuit board

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