Entries |
Document | Title | Date |
20080212715 | Method and apparatus for baseline wander compensation in Ethernet application - An embodiment of the proposed invention is primarily applied to compensate the BLW in communication systems using THPs in their transmitters, especially suitable for the 10GBase-T Ethernet application. The present apparatus includes an additional decision device (slicer) used to generate DC offset information (error signal) and an extra modulus unit after our BLW compensator to reconvert compensated symbols to correct 16-PAM signals. In addition, the estimated error signals in our method are generated from the difference between the input of the BLW compensator and the output of the decision device. These error signals are then weighted to alleviate the impact of erroneous DC offset information on the performance of the BLW compensator. Therefore, a more direct and accurate DC offset information can be derived to improve the inaccurate BLW estimation in previous works. | 09-04-2008 |
20080292022 | Radio Receiver Including a Delay-Locked Loop (DLL) for Phase Adjustment - A method, algorithm, architecture, circuits, and/or systems for using a delay-locked loop (DLL) for phase adjustment in a direct conversion radio receiver are disclosed. In one embodiment, a receiver circuit can include: (i) a voltage-controlled oscillator (VCO) for providing a reference clock; (ii) a delay element that can receive the reference clock and provide a delay adjustment signal; (iii) a first channel for receiving a radio signal and providing a recovered radio signal from the radio signal and the delay adjustment signal, where the first channel includes a first mixer and a first filter; and (iv) a second channel for receiving the radio signal and a phase adjustment signal derived from the delay adjustment signal and for providing a delay control signal to the delay element from the radio signal and the phase adjustment signal, where the second channel includes a second mixer and a second filter. | 11-27-2008 |
20090046812 | Method and Data Receiver Apparatus for Implementing Memory Read Data Eye Stretcher - A method and data receiver apparatus implement a high speed, such as double data rate (DDR), memory read data eye stretcher. Altering the reference level is performed to increase the size of the data eye. Knowledge of the previous data state is used to adjust the reference level for the current data being latched so that the data eye is maximized. | 02-19-2009 |
20090046813 | Method and Data Receiver Apparatus for Implementing Memory Read Data Eye Stretcher - A method and data receiver apparatus implement a high speed, such as double data rate (DDR), memory read data eye stretcher and a design structure on which the subject circuit resides is provided. Altering the reference level is performed to increase the size of the data eye. Knowledge of the previous data state is used to adjust the reference level for the current data being latched so that the data eye is maximized. | 02-19-2009 |
20090074110 | Methods and systems for detecting defects in serial link transceivers - Methods and systems for detecting defects in serial link transceivers. Defect detection includes detecting open circuits in one or more of the transmission lines, detecting short circuits between one or more of the transmission lines and a power supply, detecting short circuits between the transmission lines, or detecting short circuits across optional AC-couplings in the transmission lines. The detection can include direct or indirect detection of voltage or current. | 03-19-2009 |
20090110116 | METHOD AND APPARATUS FOR TRAINING THE REFERENCE VOLTAGE LEVEL AND DATA SAMPLE TIMING IN A RECEIVER - Methods and apparatuses for calculating the location of an optimal sampling point for a receiver system are disclosed. In brief, a first method comprises determining a maximum voltage margin and a maximum timing margin of a received signal, and from these margins, determining an optimal sampling point, which includes a reference voltage level (Vref) and a relative sample phase. The location of the optimal sampling point is based on the locations of the sampling point of the maximum voltage margin and the sampling point of the maximum timing margin. A second method comprises establishing an initial sampling point, and then successively refining each of the voltage and timing components of the sampling point until an optimal sampling point is reached. | 04-30-2009 |
20090122918 | Methods for Compensating for I/Q Imbalance in OFDM Systems - The present invention relates to methods for demodulating orthogonal frequency division multiplexing (OFDM) modulated signals. In particular, this invention relates to methods for in-phase (I) and quadrature phase (Q) imbalance compensation in OFDM systems. For example, the present invention relates to methods for calculating an IQ imbalance compensated signal from a received signal, comprising the steps of: removing DC from the received signal; calculating an autocorrelation matrix of IQ signal vector of the received signal; estimating IQ imbalance compensation values, K | 05-14-2009 |
20090135954 | DYNAMIC THRESHOLD DETECTOR - A burst detector featuring a dynamic threshold that is calculated according to the detection efficiency while operating in a noisy environment. In one embodiment, signals from various directions are multiplied by appropriate weights, wherein the weights are a function of the FAR, the throughput, and/or various modem indications. | 05-28-2009 |
20090135955 | RADIO FREQUENCY CONTROL FOR COMMUNICATION SYSTEMS - An electronic device capable of performing automatic frequency control (AFC) to maintain frequency and timing without good received bursts, in which an oscillation unit and a baseband processing unit are provided. Wherein, the baseband processing unit computes a compensation adjustment according to a prediction model and stored information regarding a previous digital value adjustment when detecting that the baseband processing unit is incapable of controlling the oscillation unit according to received bursts from the remote communication unit, and adjusts the oscillation unit according to the determined compensation adjustment. | 05-28-2009 |
20090161796 | System for Processing Common Gain Values - A method includes receiving data elements representative of constellation points of a modulated signal. Each data element includes a gain. The method also includes identifying a common gain value among the received data elements, and adjusting the data elements to include the common gain value. | 06-25-2009 |
20090202021 | FREQUENCY OFFSET COMPENSATION FOR DETECTING RANDOM ACCESS CHANNEL PREFIX - An exemplary method of communicating includes shifting a constant-amplitude zero autocorrelation (CAZAC) root sequence to a shifted CAZAC sequence. The CAZAC root sequence is used by a source of a received communication. The shifted CAZAC sequence is used for detecting a preamble of the received communication. | 08-13-2009 |
20100189195 | Methods and systems for detecting defects in serial link transceivers - Methods and systems for detecting defects in serial link transceivers. Defect detection includes detecting open circuits in one or more of the transmission lines, detecting short circuits between one or more of the transmission lines and a power supply, detecting short circuits between the transmission lines, or detecting short circuits across optional AC-couplings in the transmission lines. The detection can include direct or indirect detection of voltage or current. | 07-29-2010 |
20100220817 | Data Slicer with Multi-Mode Threshold Generator - In an embodiment, set forth by way of example and not limitation, a data slicer includes a signal input node, a comparator having a first input of a first polarity, a second input of a second polarity which is the opposite of the first polarity, and an output coupled to a data out node, the first input of the comparator being coupled to the signal input node, and a multi-mode threshold generator including a first threshold generator and second threshold generator, whereby the first threshold generator is selected firstly and the second threshold generator is selected secondly. | 09-02-2010 |
20100272217 | Power Consumption Control Methods Applied to Communication Systems, and Related Devices - A power consumption control method applied to a communication system adjusts the power consumption of a portion of circuit in the communication system according to a transmission distance between the communication system and another communication system. Another power consumption control method applied to a communication system adjusts the power consumption of a portion of circuit in the communication system according to a signal index of the communication system. | 10-28-2010 |
20110013728 | DC COMPENSATION - An apparatus comprising an analog filter, an analog to digital converter coupled to said analog filter; and a digital filter coupled to said analog to digital converter; wherein the apparatus is configured such that distortion introduced into a filtered signal by said analog filter is substantially compensated by said digital filter. | 01-20-2011 |
20110085621 | RECEIVER - A receiver includes: a first amplifier for amplifying an input signal and outputting an output signal; a clock generator for generating a clock signal corresponding to a period of the output signal; a judger for outputting a first logical value or a second logical value in accordance with a phase lead or phase lag which has been occurred at a crossing point of the positive-phase signal and the negative-phase signal of the output signal upon rising or falling the clock signal; a detector for outputting a difference value between a time for which the judgment signal has the first logical value and a time for which the judgment signal has the second logical value; and an adjustor for adjusting reference voltages of a positive-phase signal and a negative-phase signal of the input signal in accordance with the difference value output from the detector. | 04-14-2011 |
20110110465 | FSK RECEIVER - In an FSK receiver according to the present invention, a correction operation for a DC offset component is performed based on a maximum value and a minimum value of a demodulation signal. If a difference between the maximum and minimum values is less than a predetermined threshold value TH | 05-12-2011 |
20110116577 | SEMICONDUCTOR DEVICE WIRELESS COMMUNICATION UNIT AND METHOD FOR RECEIVING A SIGNAL - A semiconductor device comprising receiver circuitry arranged to receive a dual carrier RF signal comprising a first wanted component and a second wanted component. The receiver circuitry is arranged to down convert the received dual carrier RF signal to create a Very Low Intermediate Frequency, VLIF signal whereby the first wanted component of the received dual carrier signal is subsequently located at a positive VLIF offset with respect to DC, zero hertz, and the second wanted component of the received dual carrier signal is subsequently located at a negative VLIF offset with respect to DC. The semiconductor device further comprises a signal processing logic module arranged to receive the VLIF signal and to separate the first and second wanted components of the received signal. | 05-19-2011 |
20110176638 | Method and Apparatus for Adjusting a Symbol Decision Threshold at a Receiver in a Communication Network - A method and apparatus for adjusting a symbol decision threshold at a receiver in a communication network enables the receiver to be adapted to more correctly receive symbols as transmitted by a transmitter. In one embodiment, a received bit imbalance is detected by a receiver prior to error correction and after error correction to determine whether an error component of the received signal contains larger numbers of ones or larger numbers of zeros. Where the transmitter scrambles the signal prior to transmission, the receiver will also scramble the signal after error correction and prior to counting the number of zeros or ones. Any imbalance between the number of transmitted and received ones or zeros is used as feedback to adjust threshold values used by detectors to fine tune the manner in which the receiver interprets incoming signals. | 07-21-2011 |
20110176639 | RADIO BASE STATION - The radio base station of the present invention detects desired sampling points, which are sampling points having reception levels higher than or equivalent to a predetermined threshold, to calculate a ratio of the desired sampling points to the entirety of sampling points contained in a desired bandwidth, the total number of sampling points being equivalent to the number of carriers in one cycle of the frequency band of the reception signal. Further, so as to calculate a gain to be applied in the amplification of signal level to a predetermined target level, the radio station uses as a gain a value obtained by dividing the target level by a product, the product being obtained by performing multiplication of an average value of levels of the signal components within the desired frequency band and an reciprocal of the ratio calculated. | 07-21-2011 |
20110188610 | SIGNAL PROCESSING DEVICE, METHOD AND RECEIVING DEVICE - A signal processing device includes: a first correlator that sequentially multiplies a first receive signal including a pattern in a receive signal and a first reference pattern signal including a complex conjugate of a first partial signal of the first receive signal at a sampling timing to generate a first correlation voltage; a second correlator that sequentially multiplies the first receive signal and a second reference pattern signal including a complex conjugate of a second partial signal, which is behind the first partial signal, at a sampling timing to generate a second correlation voltage; and a phase difference generation circuit that generates a first phase difference between the first partial signal and the second partial signal based on a first correlation peak voltage obtained when the first correlation voltage has a peak value and a second correlation peak voltage obtained when the second correlation voltage has a peak value. | 08-04-2011 |
20110274215 | Method and Apparatus for Training the Reference Voltage Level and Data Sample Timing in a Receiver - Methods and apparatuses for calculating the location of an optimal sampling point for a receiver system are disclosed. In brief, a first method comprises determining a maximum voltage margin and a maximum timing margin of a received signal, and from these margins, determining an optimal sampling point, which includes a reference voltage level (Vref) and a relative sample phase. The location of the optimal sampling point is based on the locations of the sampling point of the maximum voltage margin and the sampling point of the maximum timing margin. A second method comprises establishing an initial sampling point, and then successively refining each of the voltage and timing components of the sampling point until an optimal sampling point is reached. | 11-10-2011 |
20120002758 | SUBCARRIER FREQUENCY ACQUISITION AND COMPLEX DEROTATION TO BASEBAND - A method for demodulating a radio frequency signal according to one embodiment includes receiving digital signals derived from a radio frequency signal; converting the digital signals to baseband signals; generating a frequency error signal using the baseband signals during an acquisition period; and shifting a frequency of the digital signals towards zero frequency error during the acquisition period using the frequency error signal, with the proviso that the digital signals are not phase locked during the shifting. Such methodology may also be implemented as a system using logic for performing the various operations. Additional systems and methods are also presented. | 01-05-2012 |
20120082267 | SYSTEM AND A METHOD OF REGULATING A SLICER FOR A COMMUNICATION RECEIVER - The invention is directed to a system and method of regulating a slicer for a communication receiver. A zero-crossing accumulator receives a slicer output from the slicer and accordingly determines a zero-crossing length of the slicer output. A threshold decision unit regulates at least one threshold value of the slicer according to the zero-crossing length. | 04-05-2012 |
20130202061 | REFERENCE VOLTAGE GENERATION IN A SINGLE-ENDED RECEIVER - As single-ended signaling is implemented in higher-speed communications, accurate and consistent reading of the data signal becomes increasingly challenging. In particular, single-ended links can be limited by insufficient timing margins for sampling a received input signal. A single ended receiver provides for improved timing margins by adjusting a reference voltage used to sample the input signal. A calibration pattern is provided to the receiver as the input signal, and the reference voltage is adjusted toward a median value of the signal. As a result, the receiver provides for reading received single-ended data in a manner enabling accurate data transfer at higher speeds. | 08-08-2013 |
20130259162 | Direct Feedback Equalization with Dynamic Referencing - A receiver circuit includes a first slicer coupled to receive data signals from a signal path and a reference voltage from a reference voltage path that is separate from the signal path. The first slicer is configured output a logic value based on a comparison between a voltage of the data signal and the reference voltage. The receiver circuit further includes a reference voltage generator configured to generate the reference voltage. The reference voltage generator is configured to dynamically generate the reference voltage based on logic values of previously received signals during operation in a first mode. During operation in a second mode, the reference voltage generator is configured to generate and provide the reference voltage as a static voltage. | 10-03-2013 |
20140044220 | Reference Voltage Generator for Single-Ended Communication Systems - An improved reference voltage (Vref) generator for a single-ended receiver in a communication system is disclosed. The Vref generator in one example comprises a cascoded current source for providing a current, I, to a resistor, Rb, to produce the Vref voltage (I*Rb). Because the current source isolates Vref from a first of two power supplies, Vref will vary only with the second power supply coupled to Rb. As such, the improved Vref generator is useful in systems employing signaling referenced to that second supply but having decoupled first supplies. For example, in a communication system in which the second supply (E.g. Vssq) is common to both devices, but the first supply (Vddq) is not, the disclosed Vref generator produces a value for Vref that tracks Vssq but not the first supply. This improves the sensing of Vssq-referenced signals in such a system. | 02-13-2014 |
20140072079 | DC BALANCE OFFSET ADJUSTABLE CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A mechanism is provided for dynamically adjusting DC offset at the time of deviation from DC balance ½ (DC level) in a data pattern including long-period consecutive bits generating DC offset in a section of data. A receiver circuit unit of an LSI having a serializer/deserializer arrangement for performing high-speed serial transmission includes an offset adjusting circuit. The offset adjusting circuit calculates DC balance in an arbitrary section of data by averaging received serial data. Based on comparison between a DC level and the DC balance obtained by averaging the received data, offset is shifted toward the H side when the DC balance exists on the H side from the DC level, and shifted toward the L side when the DC balance exists on the L side. | 03-13-2014 |
20140140442 | WIRELESS RECEIVER CIRCUIT AND METHOD - A circuit and a method are used estimate quality of the output of a wireless receiver. This quality measure is used to control the supply voltage and thereby provide power savings. | 05-22-2014 |
20140321579 | SYSTEM AND METHOD FOR TUNING A SERIAL LINK - A system and method are provided for tuning a serial link. The method includes receiving, by a receiver circuit, an offset correction pattern transmitted over a serial link and sampling the received offset correction pattern based on an offset correction parameter to generate a sampled signal. A distribution of the sampled signal is computed and the offset correction parameter is set based on the distribution. The system includes a receiver circuit that is coupled to the serial link and an offset correction unit that is coupled to the receiver circuit. The receiver circuit is configured to receive the offset correction pattern and sample the received offset correction pattern based on the offset correction parameter to generate the sampled signal. The offset correction unit is configured to compute the distribution of the sampled signal and set the offset correction parameter based on the distribution. | 10-30-2014 |
20140348270 | Handling of Signals Transmitted Through a Human Body - A signal handling device ( | 11-27-2014 |
20150036768 | METHOD AND APPARATUS FOR ADAPTIVELY SETTING THRESHOLD FOR SIGNAL DEMODULATION - Provided is a method and apparatus to adaptively set a threshold for signal demodulation. The apparatus and the method include adaptively setting a threshold to demodulate a currently received symbol based on the demodulation value of a previously received symbol based on a comparison value. The comparison value is obtained by comparing a number of previously received symbols having a demodulation value of “0” and a number of currently received symbols having a demodulation value of “1”. | 02-05-2015 |
20150349982 | PHASE DETECTOR - An alternative phase detector without the need for direct phase measurement is provided. The phase detector comprises three signal inputs (S | 12-03-2015 |
20160013955 | On-Chip AC Coupled Receiver with Real-Time Linear Baseline-Wander Compensation | 01-14-2016 |