Class / Patent application number | Description | Number of patent applications / Date published |
360065000 | Specifics of equalizing | 34 |
20080259484 | READ CHANNEL APPARATUS FOR ASYNCHRONOUS SAMPLING AND SYNCHRONOUS EQUALIZATION - A read channel and method using that read channel are disclosed. The read channel comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate and an interpolator interconnected with the analog to digital converter. The read channel further comprises a fractionally-spaced equalizer, where the interpolator provides an interpolated signal to the fractionally-spaced equalizer at an interpolation rate, where that interpolation rate is greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The read channel further comprises a gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector interconnected with the gain control module. | 10-23-2008 |
20080297937 | USING A MEASURED ERROR TO DETERMINE COEFFICIENTS TO PROVIDE TO AN EQUALIZER TO USE TO EQUALIZE AN INPUT SIGNAL - Provided are a read channel, storage drive and method using a measured error to determine coefficients to provide to an equalizer to use to equalize an input signal. A read channel is incorporated in a storage device to process signals read from a storage medium. An equalizer uses coefficients to equalize input read signals to produce equalizer output signals. A detector processes adjusted equalizer output signals to determine output values comprising data represented by the input read signals. An equalizer adaptor is enabled to provide a reference measured error and coefficients used to produce the adjusted equalizer signals that are associated with the reference measured error. The equalizer adaptor computes new equalizer coefficients to use to equalize input read signals that result in a new measured error from the detector and computes a new measured error for the new equalizer coefficients. The equalizer adaptor determines whether the new measured error is degraded with respect to the reference measured error and saves the new equalizer coefficients and the new measured error in response to determining that the new measured error is not degraded with respect to the reference measured error. The equalizer adaptor provides the equalizer coefficients associated with the reference measured error to the equalizer to use to equalize input read signals in response to determining that the new measured error is degraded with respect to the reference measured error. | 12-04-2008 |
20090103202 | METHOD FOR AN EQUALIZER COMPUTATION IN A MEDIA SYSTEM USING A DATA SET SEPARATOR SEQUENCE - Provided is a method for receiving a DSS sequence and a DSS readback sequence, which is a function of a channel processing of the DSS sequence by a read channel. A coefficient cyclic equalizer vector is generated as a function of the DSS sequence and the DSS readback sequence. An error signal is generated as a function of a comparison of the DSS sequence and an equalization of the DSS readback sequence based on the coefficient cyclic equalizer vector. An unacceptable error signal indicates a need to adjust the coefficient cyclic equalizer vector to yield an acceptable comparison of the DSS sequence and an equalization of the DSS readback sequence based on the coefficient cyclic equalizer vector. | 04-23-2009 |
20090161245 | Frequency Domain Approach for Efficient Computation of Fixed-point Equalization Targets - Various embodiments of the present invention provide systems and methods for equalizing an input signal. For example, various embodiments of the present invention provide a method for performing equalization in a storage device. Such methods include providing an equalizer circuit that is governed by a target value, and a filter circuit that is governed by a filter coefficient. An initial value is provided to the equalizer circuit as the target value, and an overall target based at least in part on the initial value and the filter coefficient is calculated. An updated value is calculated based on the overall target, and the updated value is provided to the equalizer circuit as the target value. | 06-25-2009 |
20090195906 | Method and System For Adaptive Timing Recovery - Timing recovery in partial-response-based magnetic recording systems customarily employs the “decision-directed” method wherein phase error is recovered from the differences between the noise-corrupted received signal samples and their estimated ideal (noise and phase error free) values. The filtered phase error drives a numerically-controlled oscillator which determines the instants at which the signal is resampled, attempting to place said instants at the ideal sampling times. The resampled signal contains errors due to mistiming as well as to the original corrupting noise, and these errors directly influence the success of subsequent detection. However, the noise can be reduced using adaptive linear prediction, having the effect of reducing the output error for a given noise input, or maintaining the same error for a larger noise input. | 08-06-2009 |
20090213484 | Techniques For Providing DC-free Detection of DC Equalization Target - A data storage device includes a first filter that generates a short DC equalization target in response to a read back signal generated from magnetic patterns that are recorded on a storage medium using perpendicular recording. The data storage device also includes a first detector that generates an output sequence in response to the short DC equalization target. The data storage device also includes a high pass filter that attenuates DC components of the short DC equalization target and that passes low frequency components of the short DC equalization target above a cutoff frequency to generate a filtered signal. The data storage device also includes a second detector that processes the output sequence in response to the filtered signal. | 08-27-2009 |
20090237827 | SIGNAL PROCESSING CIRCUIT AND MAGNETIC STORAGE APPARATUS - A signal processing circuit performs processing for an analog signal output from a head. The signal processing circuit includes: a conversion section that generates a digital signal based on the analog signal; a first filter that equalizes the output of the conversion section; a demodulation section that demodulates data from the output of the first filter; a modulation section that modulates a waveform based on the data demodulated by the demodulation section; a second filter that equalizes the output of the modulation section; and an adaptation section that adapts the response of the second filter such that the output of the second filter becomes equal to the output of the conversion section. | 09-24-2009 |
20100157460 | Systems and Methods for Generating Equalization Data - Various embodiments of the present invention provide systems and methods for using data equalization. For example, various embodiments of the present invention provide storage devices that include a semiconductor device having an equalization unit and a digital-to-analog converter, a read/write head assembly located in close proximity to the semiconductor device, and a control unit located less proximate to the read/write head assembly than the semiconductor device. | 06-24-2010 |
20100157461 | SIGNAL REPRODUCING CIRCUIT, MAGNETIC STORAGE DEVICE, AND SIGNAL REPRODUCING METHOD - According to one embodiment, a signal reproducing circuit reproduces a signal read from a recording medium on which the signal has been recorded by perpendicular magnetic recording. The signal reproducing circuit includes a waveform equalizer that equalizes the waveform of the signal based on a waveform equalization target, where D is a one-bit delay operator, previously stored in a storage module. The waveform equalization target is any one of a[1+3D+2D | 06-24-2010 |
20100177427 | SYSTEM AND METHOD FOR GENERATING AN AMPLITUDE ERROR SIGNAL IN A MAGNETIC TAPE RECORDING CHANNEL - A method according to one embodiment includes generating a first gain error, comprising: receiving an output of an equalizer; and comparing a magnitude of the output to a saturation threshold level; if the output is higher than the saturation threshold level, generating a first gain error. The method further including generating at least one of a second and a third gain error, wherein generating the second gain error comprises: using either a slicer or a trellis for generating the second gain error, wherein the slicer generates a gain error based on an output of an interpolator, wherein the trellis generates a gain error based on an output of a maximum likelihood detector; wherein generating the third gain error comprises: receiving an output of an equalizer; generating a threshold qualified peak from the equalizer output and a tracking threshold level; comparing the threshold qualified peak to a second threshold; and generating a third gain error based on the comparison. | 07-15-2010 |
20110096433 | DECOUPLING MAGNETO-RESISTIVE ASYMMETRY AND OFFSET LOOPS - Signal correction is performed by determining an offset error based at least in part on a first portion of a signal within a first amplitude range. The offset error is associated with error due to offset in the signal. An signal error, associated with error due to offset and magneto-resistive asymmetry (MRA) in the signal, is determined based at least in part on a second portion of the signal within a second amplitude range; the second amplitude range does not overlap with the first amplitude range. An MRA error is determined by removing the offset error from the signal error and the MRA error is removed from the signal. | 04-28-2011 |
20120019952 | MAGNETIC MEDIA TESTER AND A METHOD OF MAGNETIC MEDIA TESTING - A magnetic media tester comprising a Laser Doppler Vibrometer (LDV) head; and a magnetic read head; the LDV head and the magnetic read head being configured for obtaining correlatable data of a region on a magnetic disk. | 01-26-2012 |
20130063835 | Systems and Methods for Generating Predictable Degradation Bias - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detector circuit and a bias calculation circuit. The data detector circuit is operable to apply a data detection algorithm to a first data set to yield a first series of soft decision data, and to apply the data detection algorithm to a second data set to yield a second series of soft decision data. The bias calculation circuit operable to calculate a series of bias values based at least in part on the first series of soft decision data and the second series of soft decision data. The series of bias values correspond to a conversion between the first series of soft decision data and the second series of soft decision data. | 03-14-2013 |
20130070362 | ENERGY-BASED INTER-TRACK INTERFERENCE CANCELLATION - Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track. | 03-21-2013 |
20130148232 | Systems and Methods for Combined Binary and Non-Binary Data Processing - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes: a non-binary data decoder circuit and a binary data decoder circuit. | 06-13-2013 |
20130148233 | Systems and Methods for SNR Measurement Using Equalized Data - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an equalizer circuit, a signal to noise ratio calculation circuit, and a parameter adjustment circuit. The equalizer circuit is operable to equalize a data input to yield an equalized output. The signal to noise ratio calculation circuit is operable to calculate a signal to noise ratio of the equalized output based at least in part on a noise power derived from the equalized output. The parameter adjustment circuit is operable to adjust a parameter based at least in part on the signal to noise ratio. | 06-13-2013 |
20130208377 | Systems and Methods for Adaptive Decoder Message Scaling - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for adaptively modifying a scaling factor in a data processing system. | 08-15-2013 |
20140022664 | Systems and Methods for Channel Target Based CBD Estimation - Various approaches, methods, systems, circuits and devices for channel bit density estimation. | 01-23-2014 |
20140063636 | Systems and Methods for Conditional Positive Feedback Data Decoding - The present inventions are related to systems and methods for information data processing included selective decoder message determination. | 03-06-2014 |
20140063637 | Systems and Methods for NPML Calibration - The present invention is related to systems and methods for adaptive parameter modification in a data processing system. | 03-06-2014 |
20140153129 | ELECTRICAL DEVICE HAVING A REDUCING HARDDISK VIBRATION FUNCTION AND REDUCING HARDDISK VIBRATION METHOD - The present application discloses a method to reduce hard-disk vibrations. The method to reduce hard-disk vibrations is for an electrical device having a hard-disk and a speaker, and the method to reduce hard-disk vibrations includes: determining a vibration value of the hard-disk when the speaker outputs an audio signal; | 06-05-2014 |
20140160592 | Systems and Methods for X-Sample Based Data Processor Marginalization - Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability. | 06-12-2014 |
20140198405 | Systems and Methods for Loop Processing With Variance Adaptation - Systems and methods for data processing, and more particularly systems and methods for loop processing with variance adaptation. | 07-17-2014 |
20140268401 | Systems and Methods for P-Distance Based Priority Data Processing - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing. | 09-18-2014 |
20140300986 | ADAPTIVE CORRECTION OF SYMMETRICAL AND ASYMMETRICAL SATURATION IN MAGNETIC RECORDING DEVICES - In one embodiment, a read channel comprises: a preprocessor for receiving a first signal and producing a second signal from the first signal using current values of a positive coefficient, a zero coefficient, and a negative coefficient; an interpolator for producing a third signal based on the second signal; and a slicer for producing a fourth signal from the third signal by estimating a level for the third signal. The fourth signal is at one of three levels consisting of a positive level, a zero level, and a negative level. For every n first signals received by the preprocessor, the current value of one of the positive coefficient, the zero coefficient, and the negative coefficient is adjusted depending on which of the three levels the fourth signal is at. | 10-09-2014 |
20140347763 | SYSTEM AND METHOD FOR SUPPRESSING JITTER IN DIGITAL DATA SIGNALS INCLUDING IMAGE, VIDEO AND AUDIO DATA SIGNALS - A system and method for suppressing jitter in a digital data signal in a signal processor system. The digital data signal has spaced apart byte allocation units wherein such spacing is increased such that unallocated bytes can be identified and removed from the digital data signal. The byte allocation units of the digital data signal are suppressed with a digital data signal being outputted from the signal processor system having suppressed byte allocation units to suppress the occurrence of jitter. | 11-27-2014 |
20150055242 | METHOD AND SYSTEM FOR ESTIMATING THE POSITION ERROR SIGNAL (PES) METRIC FOR A MAGNETIC STORAGE SYSTEM - A method and system for estimating the position error signal (PES) metric for a magnetic storage system. The method comprises the steps of reading multiple readback tracks from a storage medium of the magnetic storage system using respective readers of a multiple reader head positioned at or near a data track of interest; employing an adaptive SMR equalizer to equalize the signals from the multiple read head; and extracting information from the adaptive SMR equalizer sub-filters as an estimate of the PES metric. | 02-26-2015 |
20150116860 | SYSTEM AND METHODS FOR COMBINING MULTIPLE OFFSET READ-BACKS - Techniques for processing signals read-back from a disk of a hard disk drive are described. In one example, a hard disk drive device generates a signal associated with a first position within a width of the data track. The first position may correspond to the center of a data track. The hard disk drive device generates a signal associated with a second position within a width of the data track. The second position may be located at a distance of approximately 10% of the track width from the track center. The hard disk drive device combines the signals and applies as signal conditioning technique to the combined signal. | 04-30-2015 |
20150380047 | Adaptive Filter-Based Narrowband Interference Detection, Estimation And Cancellation - A data processing system includes an adaptive notch filter operable to estimate an interference frequency in data samples, a convergence detector operable to determine whether the interference frequency converges on a value, indicating that the data samples contain interference, and an interference removal circuit operable to remove interference detected by the adaptive notch filter from the data samples. | 12-31-2015 |
20160012847 | ASYNCHRONOUS ASYMMETRY COMPENSATION FOR DATA READ FROM A STORAGE MEDIUM | 01-14-2016 |
20160019929 | CONSTRAINING FIR FILTER TAPS IN AN ADAPTIVE ARCHITECTURE - According to one embodiment, a system for processing data includes a processor and logic integrated with and/or executable by the processor, the logic being configured to individually set, for each of one or more range-constrained finite impulse response (FIR) filter taps configured for use in a FIR filter, a predetermined range of values suitable for controlling an equalizer response, and pass data through the equalizer including the FIR filter to obtain equalized data, wherein each of the one or more range-constrained FIR filter taps are individually adaptive within its predetermined range of values. Other systems and methods for processing data by constraining FIR filter taps while reading data from a data storage medium are described in more embodiments. | 01-21-2016 |
20160019930 | DYNAMIC GAIN CONTROL FOR USE WITH ADAPTIVE EQUALIZERS - According to one embodiment, a system for processing data includes a controller configured to: receive data read from a magnetic storage medium, apply a finite impulse response (FIR) filter to the data to obtain equalized data, and direct the equalized data through either a first FIR gain module or a second FIR gain module to control FIR gain of the equalized data, wherein the first FIR gain module is utilized when reading data in an asynchronous mode, and wherein the second FIR gain module is utilized when reading data in a synchronous mode and a FIR gain value of the second FIR gain module is automatically controlled. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments. | 01-21-2016 |
20160093325 | DYNAMIC GAIN CONTROL FOR USE WITH ADAPTIVE EQUALIZERS - According to one embodiment, a method for processing data includes directing first data through a first FIR gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The method also includes directing second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments. | 03-31-2016 |
20160093326 | DYNAMIC GAIN CONTROL FOR USE WITH ADAPTIVE EQUALIZERS - According to one embodiment, a magnetic tape drive includes a controller configured to direct first data through a first finite impulse response (FIR) gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The controller is also configured to direct second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. A FIR gain value of the second FIR gain module is automatically controlled. Other systems for dynamic gain control with adaptive equalizers are described according to more embodiments. | 03-31-2016 |