Class / Patent application number | Description | Number of patent applications / Date published |
345535000 | Memory arbitration | 8 |
20080252649 | Self-Automating Bandwidth Priority Memory Controller - A memory controller that includes a write first in first out (FIFO) region of the memory for receiving pixel data and a read FIFO region of the memory for accessing the pixel data received through the write FIFO is provided. The memory controller is configured to rearrange the pixel data received by the write FIFO for storage in the memory by writing data representing a first pixel and a second pixel across a plurality of registers in the memory, wherein corresponding bit locations for the data representing the first pixel and the data representing the second pixel are stored within a same one of the plurality of registers. The memory controller is configured to grant access to one of multiple requests for access to the memory based on corresponding bit locations associated with the multiple requests. A graphics controller and a method for prioritizing access to a memory are provided. | 10-16-2008 |
20110187729 | MEMORY ACCESS METHOD AND ACCESS CONTROLLER FOR A MEMORY - An access method and an access controller for a memory are described. The method includes the following steps: monitoring an actual value of a relevant parameter of a display bandwidth of data to be output by the memory; comparing the actual value of the relevant parameter with a threshold to determine whether the actual display bandwidth meets requirements; and selecting an access arbitration mode for the memory according to whether the requirements are met. The access controller includes: a monitoring and comparing unit, adapted to monitor an actual value of a relevant parameter of a display bandwidth of data to be output by the memory and compare the actual value of the relevant parameter with a threshold to determine whether the actual display bandwidth meets requirements; and an arbitration adjusting unit, adapted to select an access arbitration mode for the memory according to whether the requirements are met. Thus, it is ensured that the display image misalignment does not exist in a display system, and memory access power consumption of the display system is reduced. | 08-04-2011 |
20130278618 | Method and Apparatus for Controlling Writing of Data to Graphic Memory - A method and apparatus for controlling writing of data to a graphic memory is provided. In the method and apparatus, a plurality of consecutively input data pieces are controlled to be not consecutively written to the same memory area in terms of time or space. | 10-24-2013 |
20140176587 | ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY - An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image. | 06-26-2014 |
20140192074 | MEMORY MANAGEMENT TECHNIQUES - Memory management techniques that permit an executing process to store content in memory and later retrieve that content from the memory, but that also permit a memory manager to discard that content to address memory pressure. A process executing on a computing device may notify a memory manager of the computing device that first memory space allocated to the process contains first content that is available for discard. If the memory manager detects the computing device is experiencing memory pressure, the memory manager may address the memory pressure by selecting memory space available for discard and discarding the content of the memory space. Before a process reuses content made available for discard, the process may notify the memory manager of the intent to reuse and, in response, receive empty memory and an indication that the content was discarded or receive an indication that the content is still available for use. | 07-10-2014 |
20150123981 | IMAGE DATA FORMING APPARATUS AND CONTROL METHOD THEREFOR - An image data forming apparatus includes a storage unit storing original image data, a buffer unit temporarily storing a part of the original image data, an output unit, a priority setting unit, a control unit, and an analysis unit. The output unit forms image data from the original image data, outputs the image data, and uses, if data needed to form the image data is stored in the buffer unit, the stored needed data. The priority setting unit divides the original image data into a blocks and set priorities for blocks. The control unit performs control so that image data of those blocks having a high priority is stored in the buffer unit by priority. The analysis unit analyzes, if the original image data is accompanied by data of annotations, position information about the annotations. The priority setting unit sets the priorities based on an analysis result. | 05-07-2015 |
20160111059 | EFFICIENT BINDING OF RESOURCE GROUPS IN A GRAPHICS APPLICATION PROGRAMMING INTERFACE - A method of binding graphics resources is provided that includes: (1) identifying graphics resources for binding, (2) generating a bind group for the graphics resources, (3) organizing the bind group into a bind group memory using a bind group layout and (4) providing bind group control for processing of the bind group. A method of organizing graphics resources and a resource organizing unit are also provided. | 04-21-2016 |
20160133220 | PROGRAMMABLE DISPLAY DEVICE - To include a display, a touch panel, a volatile memory, a nonvolatile memory that stores therein control screen data including plural pieces of screen data, an activation control unit that develops the control screen data on the volatile memory at the time of activation, and a display control unit that displays any one of the screens, screen data of which is included in the control screen data developed onto the volatile memory, on the display and that changes a screen to be displayed according to an input operation to the touch panel. The activation control unit develops the control screen data in an order based on priority levels which are set such that an initial display screen to be first displayed at the time of activation has a highest priority level, and the display control unit displays the initial display screen on the display when the screen data of the initial display screen is developed onto the volatile memory. | 05-12-2016 |