Class / Patent application number | Description | Number of patent applications / Date published |
341153000 | Using weighted impedances | 10 |
20090085788 | MULTI-INPUT OPERATIONAL AMPLIFIER CIRCUIT, DIGITAL/ANALOG CONVERTER USING SAME, AND DRIVER FOR DISPLAY DEVICE USING SAME - A multi-input operational amplifier circuit operable with a high degree of accuracy and in a small area, a D/A converter using the multi-input operational amplifier circuit, and a drive circuit or driver for a display device, using the D/A converter. In embodiments of the multi-input operational amplifier circuit, a constant current source of a third differential amplifier circuit that causes a doubled constant current i×2 to flow with respect to constant current sources of first and second differential amplifier circuits by application of two types of bias voltages thereto is configured using PMOS of the same number and size. Therefore, operations equivalent to those of a conventional circuit may be realized by the three constant current source PMOSs, and a smaller chip size may be required. | 04-02-2009 |
20090303095 | DISPLAY PANEL DRIVER - A display panel driver including a binary-weighted current-type D/A converter and a source follower with current mirror is provided. The binary-weighted current-type D/A converter receives n input signals and sends a D/A output voltage signal based on 2 | 12-10-2009 |
20100315277 | DIGITAL TO ANALOG CONVERTERS HAVING CIRCUIT ARCHITECTURES TO OVERCOME SWITCH LOSSES - A digital to analog converter (DAC) includes a pair of operational amplifiers each having a first input coupled to a respective high or low reference voltage. The DAC includes a plurality of switch-controlled cells, each of which includes a resistor and two force/sense switch pairs. Within each cell, all four switches are coupled to the resistor. A first force switch is coupled to an output of a first op amp and an associated sense switch is coupled to an inverting input of the first op amp. A second force switch is coupled to an output of a second op amp and an associated sense switch is coupled to an inverting input of the second op amp. Thus, the force switches provide selectively conductive paths to permit either op amp to drive a given cell. When an op amp drives particular cells, sense switches generate multiple a feedback paths to the driving op amp, which permits the op amp to drive the selected cell resistors at voltages that overcomes any voltage losses induces by associated force switches, and cancels the effect of any variation in the voltage losses induced by different force switches. The switch-controlled cells find application in a variety of DAC architectures, including binary weighted R2R architectures, equally-weighted segmented architectures or hybrid architectures that blend principles of R2R and segmented architectures. | 12-16-2010 |
20110148681 | DIGITAL-TO-ANALOG CONVERTER TO PRODUCE PAIRED CONTROL SIGNALS IN A POWER SUPPLY CONTROLLER - An example digital-to-analog converter (DAC) for a power supply controller includes a first node, a second node, a current source, and a switch. The first node is to be coupled to provide a first analog signal to a variable oscillator of the power supply controller. The second node is to be coupled to provide a second analog signal to the variable oscillator of the power supply controller. The switch is coupled to the current source and configured to couple the current source to the first node to provide current to the first analog signal in response to a binary digit received by the DAC, where the switch is further configured to couple the current source to the second node to provide current to the second analog signal in response to a complement of the binary digit. | 06-23-2011 |
20110175764 | METHOD AND APPARATUS FOR BANDPASS DIGITAL-TO-ANALOG CONVERSION - The disclosed embodiments provide method and apparatus for digital to analog conversion of a signal that may be limited to a bandpass frequency. In an exemplary embodiment, a bandpass DAC is disclosed which includes a plurality of gates. Each gate receives a carrier signal and one of a plurality of input bits of a digital data. A combiner network is provided which includes a plurality of lossless elements corresponding to each of the plurality of gates. The combiner network receives the gate outputs and provides a digitally weighted signal. A resonating element connected to the combiner network resonates the combiner network and provides a filtered output signal which is linearly combined. | 07-21-2011 |
20110241920 | RESISTANCE-TYPE DIGITAL-TO-ANALOG CONVERTER - Provided is a resistive digital-to-analog converter capable of reducing a digital-to-analog conversion error caused by a change of the on-resistance of a transistor. On-resistance correcting PMOS transistors Q | 10-06-2011 |
20120019405 | CURRENT DAC - A current digital-to-analog converter (DAC) is disclosed. The current DAC includes a current reference circuit coupled between a voltage source terminal and a voltage node, wherein the current reference circuit includes a feedback node. A switchable resistor network is communicably coupled to the feedback node of the current reference circuit via a first feedback network that is adapted to equalize a first voltage across the switchable resistor network voltage with a second voltage between the feedback node and the voltage node. A current mirror includes an output node communicably coupled to the switchable resistor network via a second feedback network that is adapted to equalize an output current that flows from the output node with an input current that flows into the switchable resistor network. | 01-26-2012 |
20120068869 | COMPACT DIGITAL-TO-ANALOG CONVERTER - An example digital-to-analog converter includes a reference scaling circuit receiving a first reference current and generating a second reference current. A first plurality of current sources is coupled to a summing node with a current of a first one of the first plurality of current sources proportional to the first reference current. A current of a second one of the first plurality of current sources is substantially equal to twice the current of the first one of the first plurality of current sources. A second plurality of current sources is coupled to the summing node. A current of a first one of the second plurality of current sources is proportional to the second reference current. A current of a second one of the second plurality of current sources is substantially equal to twice the current of the first one of the second plurality of current sources. | 03-22-2012 |
20130015995 | IMPEDANCE NETWORK FOR PRODUCING A WEIGHTED SUM OF INPUTSAANM Mallinson; MartinAACI KelownaAACO CAAAGP Mallinson; Martin Kelowna CA - A dynamically selectable resistor network is provided in a star configuration for producing a weighted sum of input values, without attenuation from near zero contributions. Each branch of the star connected network comprises sets of impedance components, preferably resistors, that are actively selectable to produce permutated combinations of effective weighting values. The resistors code digital control bits and the outputs of sets of resistors in respective branches that correspond to the least significant control bits provide their outputs to the summing output node independently of the sets of resistors corresponding to control bits of other significance. | 01-17-2013 |
20130169461 | DIGITAL-TO-ANALOG CONVERTER CIRCUITRY WITH WEIGHTED RESISTANCE ELEMENTS - Digital-to-analog converter circuitry is described. The digital-to-analog converter circuitry includes a plurality of weighted resistance elements. A first weighted resistance element includes a switch coupled to a reference voltage. The first weighted resistance element also includes a T-network coupled to the switch. The T-network approximately equalizes a first response speed of the first weighted resistance element with a response speed of a differently weighted resistance element. | 07-04-2013 |