Class / Patent application number | Description | Number of patent applications / Date published |
341150000 | Using charge coupled devices or switched capacitances | 46 |
20090009374 | DIGITAL TO ANALOGUE CONVERTER - A digital/analogue converter for converting an input n-bit digital code, where n is an integer greater than one, has an n-bit digital input and an output for connection to a load, and includes: an array of (n−1) switched capacitors; and a switching arrangement. In one example embodiment, the switching arrangement is adapted, in a zeroing phase of operation, to connect a first reference voltage to the first plate of at least one capacitor of the array and to connect a second plate of the at least one capacitor to a voltage that, for at least one value of the input digital code, is different from the first reference voltage and is further adapted, in a decoding phase of operation, to enable, dependent on the value of the input digital code, injection of charge into the at least one capacitor. In one example embodiment, the converter may be a bufferless converter having an output for direct connection to a capacitive load. | 01-08-2009 |
20090009375 | LOW POWER, LOW NOISE DIGITAL-TO-ANALOG CONVERTER REFERENCE CIRCUIT - The present patent application comprises a digital to analog converter reference circuit, comprising a capacitor connected to a current source, a positive terminal of the capacitor connected to a first switch, the first switch electrically connecting the positive terminal of the capacitor to a positive input terminal of a DAC circuit, a negative terminal of the capacitor connected to a second switch, the second switch electrically connecting the negative terminal of the capacitor to a negative input terminal of the DAC circuit. | 01-08-2009 |
20090033534 | ANALOG-TO-DIGITAL CONVERTER FOR CONVERTING INPUT ANALOG SIGNAL INTO DIGITAL SIGNAL THROUGH MULTIPLE CONVERSION PROCESSINGS - A sub-A-D converter circuit converts a sampled analog signal into a digital signal of a predetermined number of bits. a D-A converter circuit converts the digital signal converted by the sub-A-D converter circuit into an analog signal to generate a residual signal to be processed by a subsequent conversion processing where the analog signal is to be removed from an analog signal to be sampled by the sub-A-D converter circuit. The D-A converter circuit is of a capacitor array type, and an offset compensation voltage used to compensate for at least part of an offset voltage added to the analog signal sampled by the sub-A-D converter circuit is supplied to at least one capacitor in the capacitor array. | 02-05-2009 |
20090033535 | Variable gain amplifier and D/A converter - A variable gain amplifier for amplifying an input voltage at a gain defined by a binary code includes: a signal input terminal; a signal output terminal; a charge division means that accumulates a charge, divides an accumulated charge, and accumulates a divided charge; a charge cumulation means that accumulates a charge, adds or subtracts an accumulated charge with or from the divided charge in the charge division means, and accumulates a resultant charge; and a controller that initially executes to accumulate the charge corresponding to the input voltage in the charge division means, executes to accumulate the charge corresponding to the input voltage or a predetermined voltage in the charge cumulation means, executes a charge dividing operation according to each bit of the binary code sequentially from a most significant bit, and executes a charge adding or subtracting operation according to an data value in each bit. | 02-05-2009 |
20090066552 | DIGITAL TO ANALOG CONVERTER CIRCUITS AND METHODS OF OPERATION THEREOF - A multi-bit digital to analog converter is implemented by a switched-capacitor arrangement in which a reservoir capacitor (Cf) accumulates charge representing the desired analog output signal (Vout+/Vout−). An array of further capacitors (C | 03-12-2009 |
20090140903 | DIGITAL TO ANALOGUE CONVERTERS - In a digital to analogue converter, a plurality of digital inputs are used to select one of first and second binary voltage levels as binary inputs ( | 06-04-2009 |
20090153383 | Digital-to-analogue converter - A digital-to-analogue conversion arrangement is disclosed which includes first and second groups of the same number of bi-directional bufferless digital-to-analogue converters. The output of at least one converter in each group is connected to a respective capacitive load (C | 06-18-2009 |
20090167584 | SYSTEM HAVING A SIGNAL CONVERTER DEVICE AND METHOD OF OPERATING - A system having a signal converter device, and a method for operating a system having a signal converter device is disclosed. One embodiment provides loading a capacitive device to a preparation voltage in a first operating phase, and loading the capacitive device to a measuring voltage in a second operating phase after the first operating phase. | 07-02-2009 |
20090231176 | SWITCHED CAPACITOR DIGITAL-TO-ANALOG CONVERTER - A switched capacitor digital-to-analog converter (SC-DAC) is provided. The SC-DAC of the present invention can eliminate an influence of a reference voltage source caused by a signal dependent loading at each clock cycle, so as to completely solve a harmonic distortion of an analog output signal converted by a conventional SC-DAC. In addition, when the SC-DAC of the present invention has a plurality of converting channels, since the reference voltage source is not influenced by the effect of signal dependent loading of any converting channel, so that each converting channel can be regarded to have a separate state, and thus the purpose of channel separation can be achieved. | 09-17-2009 |
20100007539 | Digital-to-analog converter - A digital-to-analog converter is disclosed for converting a digital signal into its analog equivalent. The digital-to-analog converter includes a switch capable of coupling a first and a second circuit node to ground, a scaling capacitor having a capacitance value that equals a unit capacitance value coupled between the first and the second circuit node, a first array of capacitors coupled to the first circuit node, a first switching array configured to selectively couple the first array of capacitors to either ground or a reference voltage depending on the digital values of the least significant bits of the digital word being converted, a second array of capacitors coupled to the second circuit node, and a second switching array configured to selectively couple the second array of capacitors to either ground or the reference voltage depending on the digital values of the most significant bits of the digital word being converted. | 01-14-2010 |
20100039303 | DIGITAL ANALOG CONVERTER - A digital analog converter has an input terminal receiving a digital input signal, a lower-side capacitor group coupled to a lower-side common terminal in parallel, an upper-side capacitor group coupled, in parallel, to an upper-side common terminal at which an analog output signal is generated, a coupling capacitor provided between the lower-side common terminal and the upper-side common terminal, a switch group coupled to the upper-side capacitor group and the lower-side capacitor group and controlled as a conduction state and a non-conduction state in accordance with the digital input signal, and an adjusting capacitor coupled to the lower-side common terminal and having a variable capacitance value. | 02-18-2010 |
20100194614 | MULTIPLYING DIGITAL-TO-ANALOG CONVERTER FOR High SPEED AND LOW SUPPLY VOLTAGE - A multiplying digital-to-analog converter includes an operational amplifier (OP-amp) operated under a first power supply voltage and a second power supply voltage; an OP-amp input switch block coupled to a common mode voltage for selectively coupling the common mode voltage to input nodes of the OP-amp, wherein the common mode voltage is substantially equal to the first power supply voltage; a capacitor block coupled to the OP-amp input switch block; a sampling switch block coupled to the input signal for selectively coupling the input signal to the capacitor block; a reference voltage switch block coupled to the capacitor block for selectively coupling the reference signal to the capacitor block; and a feedback switch block coupled between the capacitor block and output nodes of the OP-amp. | 08-05-2010 |
20100201557 | THERMO-DECODER CIRCUIT - A digital-to-thermometer-code converter is disclosed for converting a digital signal into its thermometer-code equivalent. Embodiments of the digital-to-thermometer-code include a binary-to-control signal converter that generates a column control signal and a row control signal based on a binary input signal, and a control signal-to-thermometer-code decoder that includes an array of decoder circuit blocks coupled to receive the column control signal and the row control signal, wherein each of the decoder circuit blocks determine at least one bit of the thermometer-code output signal based on at least a first bit of the column control signal. | 08-12-2010 |
20100231429 | DIRECT CAPACITANCE-TO-DIGITAL CONVERTER - A direct capacitance-to-digital converter is provided, including a plurality of switches, an ADC, a reference voltage circuit and a trigger unit. By using trigger unit to control a plurality of switches, and combining the reference voltages outputted by the reference voltage circuit, the converter can directly sense the external to-be-measured capacitor and related stray capacitor, and directly convert the capacitance of the to-be-measured capacitor into accurate digital signal. The present invention can be integrated with other sensors into a single chip to form an integrated direct capacitance-to-digital converter. | 09-16-2010 |
20100253563 | CAPACITOR BASED DIGITAL TO ANALOG CONVERTER LAYOUT DESIGN FOR HIGH SPEED ANALOG TO DIGITAL CONVERTER - A method and system for capacitor based digital to analog converter design layout for high speed analog to digital converter are provided. The method includes arranging a plurality of metal plates to form the capacitor. Each of the plurality of metal plates includes a driven plate and a common plate. The method also includes generating a plurality of interconnects in the common plate and extending the driven plate over the plurality of interconnects. Further, the method includes shielding the common plate by the driven plate. The system includes an analog to digital converter. The analog to digital converter also includes capacitor based digital to analog converter and digital logic for controlling digital operations in the analog to digital converter. The capacitor based digital to analog converter includes a plurality of capacitors, and a comparator for comparing the analog output from the digital to analog converter with a ground potential. | 10-07-2010 |
20100265113 | CHARGE REDISTRIBUTION DIGITAL-TO-ANALOG CONVERTER, AND SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER HAVING THE SAME - A D/A converter includes plus-side and minus-side input terminals; plus-side and minus-side D/A converters each including plural plus-side or minus-side capacitors having capacitance values weighted by the powers of two, a plus-side or minus-side output terminals connected to first electrodes of the plus-side or minus-side capacitors, and plural plus-side or minus-side switches for connecting each second electrode of the plus-side or minus-side capacitors to either the plus-side or minus-side input terminal, a plus-side reference voltage terminal or a minus-side reference voltage terminal according to plus-side or minus-side control digital signals; and plural short-circuit switches provided between identically weighted plus-side and minus-side capacitors respectively. And, at the time of sampling, the plus-side and minus-side switches connect the second electrodes of the capacitors to the plus-side and minus-side input terminals, respectively, and, after the sampling, the plurality of short-circuit switches short-circuit between the second electrodes of the plus-side and minus-side capacitors. | 10-21-2010 |
20100283651 | CYCLIC DIGITAL TO ANALOG CONVERTER - Some embodiments include apparatus and methods having an amplifier, a capacitor network coupled to the amplifier, and switching circuitry coupled to the amplifier and the capacitor network. The switching circuit is configured to successively apply a selected reference voltage selected from among a first reference voltage, a second reference voltage, and a third reference voltage to the capacitor network in response to a digital input code to generate an output voltage. Additional embodiments are disclosed. | 11-11-2010 |
20100321223 | CURRENT MIRROR CIRCUIT AND DIGITAL-TO-ANALOG CONVERSION CIRCUIT - A first switched capacitor circuit is connected to the source of one MOS transistor of a current mirror pair configured by a pair of MOS transistors and a second switched capacitor circuit is connected to the source of the other MOS transistor. Each of the first and second switched capacitor circuits includes a capacitor and a switch connected in parallel with the capacitor and the switch is on/off-controlled based on a clock signal of a preset cycle. Each of the first and second switched capacitor circuits equivalently functions as a resistor with large resistance and a variation in the output current of the current mirror circuit based on a variation in the threshold voltages of the pair of MOS transistors can be reduced even if the power source voltage is reduced. | 12-23-2010 |
20110068964 | Discharge Digital-to-Analog Converter - A digital-to-analog conversion circuit operates by selectively discharging members of a plurality of capacitors. Charging of the capacitors occurs during a reset period while digital-to-analog conversion occurs as the capacitors are discharged. Those capacitors that are discharged are selected from the plurality of capacitors based on a digital input. The analog output includes the charge discharged from the capacitors. The capacitors are optionally divided into separate capacitor banks. | 03-24-2011 |
20110148680 | DIGITAL-ANALOG CONVERTING APPARATUS AND TEST APPARATUS - Provided is a DA conversion apparatus comprising a capacitor array DA converter that outputs to an output line an output voltage corresponding to a digital value input thereto; and a load changing section that changes a size of a load capacitance connected to the output line. The load changing section may set gain of the DA conversion apparatus with the size of the load capacitance connected to the output line being a constant capacitance unaffected by the digital value. The load changing section may include a load capacitor connected between the output line and a standard potential; a load-side switch connected in series with the load capacitor between the output line and the standard potential; and a load capacitance control section that controls the load-side switch. | 06-23-2011 |
20110169680 | DIGITAL-TO-ANALOG CONVERTER AND CODE MAPPING METHOD APPLIED TO THE DIGITAL-TO ANALOG CONVERTER - A digital-to-analog converter includes an operational amplifying circuit, a switched capacitor circuit, an R-string sub-circuit, and a direct-charge transfer circuit. The operational amplifying circuit has a pair of differential input ends and a pair of differential output ends. The switched capacitor circuit is coupled to the pair of differential input ends of the operational amplifying circuit. The R-string sub-circuit is coupled to the switched capacitor circuit and the pair of differential input ends of the operational amplifying circuit. The direct-charge transfer circuit is coupled to the pair of differential input ends and the pair of differential output ends of the operational amplifying circuit. | 07-14-2011 |
20110210881 | DOUBLE BALANCED DIGITAL TRANSMITTER - A digital-to-analog upconverter directly converts a baseband digital value comprising a plurality of bits to an RF analog signal to combine digital-to-analog operations with frequency upconversion operations. One exemplary digital-to-analog upconverter comprises a plurality of conversion units, one for each of the plurality of bits in the baseband digital value, and an output node coupled to each of the conversion units. Each conversion unit generates a weighted analog signal at a low frequency or at a radio frequency responsive to the corresponding input bit and an oscillator signal at RF. The weighting factor of each conversion unit corresponds to a relative weighting of the corresponding bit. The output node combines the weighted analog signals to generate a combined RF analog signal representative of the baseband digital value. | 09-01-2011 |
20110221620 | CURRENT STEERING DAC WITH SWITCHED CASCODE OUTPUT CURRENT SOURCE/SINK - A current-steering digital-to-analog converter may include a plurality of current cells. Each current cell may comprise a dual bias switched cascode output current source/sink, a bias source, complementary bias switching elements coupled between the bias source and the bias inputs of the switched cascode output current source/sink, and complementary switching signals coupled to the control inputs of the complementary bias switching element. | 09-15-2011 |
20110279298 | DIGITAL-TO-ANALOG CONVERTER CIRCUIT USING CHARGE SUBTRACTION METHOD AND CHARGE TRANSFER INTERPOLATION METHOD - A DAC circuit using a charge subtraction method and a change transfer interpolation method includes resistor cells configured to divide a voltage of data of total K bits (=upper M bits+lower N bits) by resistance dividers; a decoder group configured to receive digital data of the M bits and the N bits divided in the resistor cells, process the digital data by the unit of 2 bits, and output respective corresponding voltages; a capacitor group configured to receive the voltages outputted from the decoder group and realize charge charging by a charge subtraction method and charge transferring by a charge transfer interpolation method; and an operational amplifier having a first input terminal which receives a reference voltage and a second input terminal which receives an interpolation voltage corresponding to an amount of charges transferred from the capacitor group, and configured to generate an output voltage. | 11-17-2011 |
20110304492 | MULTI-CHANNEL SAR ADC - For high voltage applications, multi-channel successive approximation register (SAR) analog-to-digital converters (ADCs) are often plagued with numerous problems that are generally associated with parasitics (which are present in high voltage components). Here, a different architecture is provided where the sampling capacitors are separated from conversion capacitors so as to have low voltage components in the conversion path. Additionally, to improve the acquisition time and reduced total harmonic distortion (THD) multiple channels can use the same sampling capacitors. | 12-15-2011 |
20110304493 | TERNARY SEARCH SAR ADC - Traditionally, successive approximation register (SAR) analog-to-digital converters (ADCs) using binary search algorithms have consumed power by performing unnecessary switching of a capacitive digital-to-analog converter (CDAC) when a CDAC voltage is relatively close to a sampling analog input signal. Here, a SAR ADC is provided that reduces the number of switching events. To accomplish this, a multi-stage comparator is provided that generates multiple output signals for SAR logic. Based on these outputs, the SAR logic can more efficiently switch its CDAC using a ternary search algorithm to reduce power consumption and improve efficiency. | 12-15-2011 |
20120013496 | SWITCHED CAPACITOR TYPE D/A CONVERTER - A switched capacitor type D/A converter receives m-bit (m represents an integer) input data, and outputs an analog signal that corresponds to the input data value. Switch circuits are provided to respective bits of the input data, and are classified into two groups: a first group configured to turn on when the corresponding input data bit is 1, and to turn off when the corresponding input data bit is 0; and a second group configured to turn on when the corresponding input data bit is 0, and to turn off when the corresponding input data bit is 1. Each switch of the first and second switch groups is configured as a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The ground voltage 0 V is applied to the lower power supply terminal of each of the first and second inverters configured to supply a gate signal to each switch. | 01-19-2012 |
20120161997 | DIGITAL-TO-ANALOG CONVERSION DEVICE - A digital-to-analog conversion device is disclosed. The digital-to-analog conversion device comprises a variable delay buffer circuit and a plurality of synchronization circuits. The buffer circuit receives a digital signal with a plurality of bits and sequentially outputs a plurality of first complementary digital signal sets delayed according to the order of from MSB to LSB. Each synchronization circuit receives the first complementary digital signal set and a clock signal, uses the clock signal as the timing reference of the first complementary digital signal set, and outputs a second complementary digital signal set corresponding to the first complementary digital signal set to a digital-to-analog conversion unit, so as to convert the second complementary digital signal sets into an analog signal. The present invention uses the delays respectively corresponding to different input bits to control the timing of current switches, whereby the transient glitches are reduced. | 06-28-2012 |
20120242523 | CHARGE REDISTRIBUTION DIGITAL-TO-ANALOG CONVERTER - Embodiments of the present disclosure may provide a charge redistribution DAC with an on-chip reservoir capacitor to provide charges to the DAC in lieu of traditional external reference voltages. The DAC may include the on-chip reservoir capacitor having a first plate and a second plate, an array of DAC capacitors to generate a DAC output, and an array of switches controlled by a DAC input word to couple the DAC capacitors to the reservoir capacitor. The charge redistribution DAC may further comprise a first switch connecting the first plate to an external terminal for a first external reference voltage, and a second switch connecting the second plate to an external terminal for a second external reference voltage. One embodiment may provide an ADC that includes the charge redistribution DAC. | 09-27-2012 |
20120242524 | CURRENT SOURCE CELL AND DIGITAL-TO-ANALOG CONVERTER - A digital-to-analog converter includes a current source cell that converts an input digital signal into an analog signal and outputs the analog signal. The digital-to-analog converter includes a first output terminal at which a first analog signal is output. The digital-to-analog converter includes a second output terminal at which a second analog signal is output, the second analog signal being complementary to the first analog signal. The digital-to-analog converter includes a first load resistor connected between a second potential and the first output terminal, the second potential being different from a first potential. The digital-to-analog converter includes a second load resistor connected between the second potential and the second output terminal. | 09-27-2012 |
20120274497 | PIPELINED ANALOG-TO-DIGITAL CONVERTER - An analog-to-digital converter includes a plurality of sequentially cascaded stages, each stage including an amplifier and four copies of a circuit block including a flash and capacitors, in which the four copies of the circuit block operate interleavingly in a respective sample mode, pre-gain mode, gain mode, and reset mode of the circuit block, the copies of the circuit block in the sample mode, pre-gain mode, and reset mode are decoupled from the amplifier, and the copy of the circuit block in the gain mode is coupled to the amplifier to produce an output for a next following stage. | 11-01-2012 |
20120280845 | SWITCH SEQUENCING FOR CODE-RANGE-SPECIFIC LINEARITY IMPROVEMENT IN DIGITAL-TO-ANALOG CONVERTERS - A digital-to-analog converter (DAC) uses thermometer coding over a certain code range. A switch array for the certain code range is implemented into a smaller area of the integrated circuit die so as to take advantage of the lower gradient inherent in the smaller area. By implementing the certain input code range into the smaller switch array area, further improved linearity in that input code range is achieved at the expense of worse linearity in the other input code ranges, but without increasing power consumption and/or chip-area of the integrated circuit die. | 11-08-2012 |
20130033391 | MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS AND PIPELINE ANALOG-TO-DIGITAL CONVERTER USING THE SAME - A multiplying digital-to-analog converter (MDAC) is provided. The MDAC includes a sub DAC decoding circuit, a capacitor-switch circuit, and an operation amplifier circuit. The capacitor-switch circuit includes at least two sampling capacitor sets which are coupled in parallel. The number of sampling capacitors in one of the sampling capacitor sets is larger than or equal to two. Each sampling capacitor set is coupled to an analog-signal input quantity through a sampling switch and to a corresponding output terminal of the sub DAC decoding circuit through a decoding switch. The sub DAC decoding circuit decodes a digital quantity and outputs a corresponding analog signal at each output terminal, such that the corresponding analog signals are applied to the respective sampling capacitor sets through the decoding switches and summed by the respective sampling capacitor sets to obtain an analog-signal quantity corresponding to the digital quantity. | 02-07-2013 |
20130222168 | SWITCHED CURRENT-CELL WITH INTERMEDIATE STATE - Representative implementations of devices and techniques provide digital-to-analog conversion of signals while minimizing switching related errors. Digital to analog converter (DAC) cells may be arranged to include one or more operating states in addition to binary output states, and may employ a switching technique to “dump” the DAC cell between binary outputs. Further, an array of DAC cells may include a partial set of redundant DAC cells for implementation of the switching technique. | 08-29-2013 |
20130234874 | Digital-to-Analog Converter - A digital-to-analog converter (DAC) has a pulse-width encoder that generates a charging pulse having a pulse width proportional to the DAC's digital input value. The charging pulse controls a charging switch that selectively connects a current source to a capacitor for the duration of the charging pulse. At the end of the charging pulse, a voltage corresponding to the charge stored in the capacitor forms the DAC's analog output signal. Such DACs can be configured (1) with negative-gain amplifiers across the capacitor to form a negative feedback loop, (2) with multiple parallel current sources, and/or (3) in differential architectures. | 09-12-2013 |
20130249727 | REFERENCE CIRCUIT SUITABLE FOR USE WITH AN ANALOG TO DIGITAL CONVERTER AND AN ANALOG TO DIGITAL CONVERTER INCLUDING SUCH A REFERENCE CIRCUIT - A reference circuit for use with a charge redistribution analog to digital converter, having a capacitor array, the reference circuit comprising: an input for receiving a signal; an output for supplying a reference voltage to at least one capacitor of the charge redistribution capacitor array; a storage capacitor for storing the reference voltage; a voltage modification circuit for comparing the reference voltage stored on the storage capacitor with the reference signal, and based on the comparison to supply a correction so as to reduce a difference between the reference voltage and the reference signal, the correction being applied during a correction phase; and a first switch for selectively connecting the storage capacitor to the input during an acquisition phase. | 09-26-2013 |
20140062747 | SYSTEM AND METHOD FOR A HIGH RESOLUTION DIGITAL INPUT CLASS D AMPLIFIER WITH FEEDBACK - A system and method is disclosed for a digital to analog converter which includes an interpolation filter to up-sample a digital signal, a noise shaping modulator to suppress in-band quantization errors due to digital pulse width modulation and truncation errors, and a hybrid finite impulse response filter/digital to analog converter coupled to a Class D delta-sigma pulse width modulation control loop. | 03-06-2014 |
20140062748 | SYSTEM AND METHOD FOR PULSE WIDTH MODULATION DIGITAL-TO-ANALOG CONVERTER - A system and method is disclosed for a digital to analog converter which includes an interpolation filter to up-sample a digital signal, a noise shaping modulator to suppress in-band quantization errors due to digital pulse width modulation and truncation errors, and a hybrid finite impulse response filter/digital to analog converter coupled to a reconstruction filter which outputs the analog signal. The hybrid finite impulse response filter/digital to analog converter uses N-taps implemented digitally and N-tap weights implemented in analog using switched capacitors. | 03-06-2014 |
20140070973 | SIGNAL MIXING CIRCUIT AND ASSOCIATED CONVERTER - A signal mixing circuit which mixes input signal(s) and oscillation signal(s) by mixer block(s) to provide a mixed signal. Each mixer block includes a summing node and a circuit unit; the summing node is arranged to provide a sum signal by summing an input signal and an oscillation signal, and the circuit unit is arranged to alternate between a first state and a second state in response to alternating of the oscillation signal; wherein the circuit unit is arranged to provide driving contribution to the mixed signal in response to the sum signal during the first state, and to stop providing driving contribution during the second state. An associated converter, e.g., a digital-to-analog converter, is also disclosed. | 03-13-2014 |
20140097977 | DIGITAL-ANALOG CONVERTER AND CONTROL METHOD THEREOF - A digital-analog converter circuit includes sampling capacitive elements ( | 04-10-2014 |
20140347203 | CAPACITIVE DIGITAL TO ANALOG CONVERTER - Some examples relate to a digital to analog converter (DAC). The DAC includes a digital signal input configured to receive a multi-bit digital input signal, and an array of cells. Respective cells in the array comprise respective capacitors. The DAC also includes a control circuit configured to, based on the multi-bit digital input signal, selectively induce one or more corresponding capacitors to discharge current to an output terminal of the DAC. | 11-27-2014 |
20150054666 | CURRENT MEMORY CELL AND A CURRENT MODE DIGITAL-TO-ANALOG CONVERTER INCLUDING THE SAME - A current memory cell includes an amplifier, transistor, first and second capacitors, and first to third switching units. The amplifier includes first to third terminals. The transistor is coupled to first and second nodes, and ground. The first capacitor is coupled between the second node and ground. The second capacitor is coupled between a third node and ground. The first unit couples a current source to the first node during a first period and an output line to the first node during a second period. The second unit couples the first node to the second node during the first period. The third unit couples the first terminal to the second node and couples the second and third terminals to the third node during the first period, and couples the first terminal to the third node and couples the second and third terminals to the second node during the second period. | 02-26-2015 |
20150357986 | MULTI-DIMENSIONAL ARRAY OF IMPEDANCE ELEMENTS - Circuitry formed of a two-dimensional regular array of capacitive elements | 12-10-2015 |
20160056833 | REDUCING SIGNAL DEPENDENCE FOR CDAC REFERENCE VOLTAGE - Reducing signal dependence for a reference voltage of a CDAC includes: splitting a decoupling capacitor into a plurality of capacitors smaller in size than a size of the decoupling capacitor; isolating at least one of the plurality of capacitors from a sampling buffer coupled to the reference voltage during a conversion phase; and supplying an appropriate amount of charge needed to replenish charge drawn by capacitors in the CDAC at each conversion step using a charge pump to pump in a dummy charge to the CDAC so that resulting configurations of the CDAC draw substantially similar amount of charge for each code change of the each conversion step. | 02-25-2016 |
20160065233 | Digital-to-Analog Converter - A digital-to-analog converter (DAC) is described. The DAC comprises a resistor having a resistance R and a capacitor having a capacitance C. The DAC comprises a first switching element configured, in response to a first control signal, to couple the capacitor to a first rail via a path having a resistance less than R and a second switching element configured, in response to a second control signal, to couple the capacitor to the first rail through the resistor. The DAC also comprises a third switching element configured, in response to a third control signal, to couple the capacitor to a second rail ( | 03-03-2016 |
20160254822 | Capacitor with Switch and Circuit Containing Capacitor with Switch | 09-01-2016 |