Entries |
Document | Title | Date |
20080198052 | FILTER APPLIED IN SIGMA-DELTA MODULATOR AND FILTERING METHOD THEREOF - A filter applied in a sigma-delta modulator includes an integrator, a signal attenuator and a feedback circuit, in which these components are connected in series sequentially to form a local feedback circuit. The integrator integrates an input signal to output an integral signal. Accordingly, the signal attenuator attenuates the integral signal to output an attenuation signal to the local feedback circuit so as to share a part of attenuation amount to reduce the chip area of the sigma-delta modulator. | 08-21-2008 |
20080204290 | PROGRAMMABLE ANALOG-TO-DIGITAL CONVERTER FOR LOW-POWER DC-DC SMPS - A voltage-to-time based windowed analog-to-digital converter (ADC) can have programmable reference voltage, conversion time, and accuracy of voltage regulation. The ADC can be fully implemented on a small silicon area and is suitable for implementation in various integrated digital controllers for high-frequency low-power switch-mode power supplies (SMPS). The programmable characteristics can be achieved through the utilization of the inherent averaging effect of the delay line or of the other voltage-to-time conversion structures and through the adjustments of delay cells' propagation times or the effective voltage-to-time conversion ratio in alternative structures. | 08-28-2008 |
20080218392 | Signal Receiver and Mobile Communication Device - A signal receiver processing circuit is for isolating a desired signal from analog input signal that is susceptible to variations in signal power, e.g. from a radio front end ( | 09-11-2008 |
20080218393 | A-D CONVERTER AND A-D CONVERT METHOD - There is provided an A/D converter that outputs a digital output signal obtained by digitalizing an analog input signal. The A/D converter includes a bit selecting section that selects a conversion object bit from a high-order bit to a low-order bit of the digital output signal in order, a threshold-value controlling section that determines a threshold data expressing a boundary value between zero and one of the conversion object bit, a D/A converting section that digital-to-analog converts the threshold data and generates an analog threshold value, a comparing section that compares, at a plurality of different timings in a conversion time interval determining a value of the conversion object bit, the analog input signal and the analog threshold value and outputs a plurality of comparison results at the timings, and a bit determining section that determines the value of the conversion object bit. | 09-11-2008 |
20080238746 | System and method for common mode translation - System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels. | 10-02-2008 |
20080246640 | Hardware-efficient reconstruction for periodic non-uniformly sampled signals - Method and apparatus for signal reconstruction enabling the sharing of analog-to-digital converter resources among signals. Embodiments include a signal reconstruction method that allows reconstruction of multiple non-uniformly sampled signals while avoiding unwanted side effects such as aliasing. | 10-09-2008 |
20080252500 | SYSTEMS AND METHODS FOR HIGH PRECISION FEEDBACK CONTROL IN CLOSED LOOP SENSORS - Improved methods and systems for feedback signals in a sensor system. An example method demodulates a sense signal using an analog demodulator and also demodulates the sinse signal using a digital demodulator. The difference between the result of the analog demodulator and the digital demodulator is determined and then integrated. A sensor feedback control signal is generated based on the integrated difference. | 10-16-2008 |
20080252501 | INTEGRATED CIRCUIT ARRANGEMENT COMPRISING AT LEAST ONE DIGITAL-ANALOGUE CONVERTER - The invention relates to an integrated circuit arrangement ( | 10-16-2008 |
20080252502 | DELTA-SIGMA AD CONVERTER APPARATUS USING DELTA-SIGMA MODULATOR CIRCUIT PROVIDED WITH RESET CIRCUIT RESETTING INTEGRATOR - In a delta-sigma modulator circuit, an integrator integrates an input signal, and a quantization circuit quantizes the integrated signal with a predetermined quantization number, and outputs a quantization result signal. A DA converter circuit outputs an analog signal indicating a DA conversion result based on the quantization result signal. An oscillation detector circuit detects that the integrator is in an oscillation state based on the integrated signal, and outputting an oscillation detection signal. A reset circuit resets the integrator based on the oscillation detection signal. | 10-16-2008 |
20080258951 | Hybrid Delta-Sigma/SAR Analog to Digital Converter and Methods for Using Such - Various systems and methods for capturing data are disclosed. For example, some embodiments of the present invention provide methods for performing a first analog to digital conversion using a delta-sigma based analog to digital converter, and performing a second analog to digital conversion using a SAR based analog to digital converter. The delta-sigma converter provides a first portion of a conversion result, and the SAR based analog to digital converter provides a second portion of the conversion result. The methods further include combining the first portion of the conversion result with the second portion of the conversion result to produce a combined conversion result. | 10-23-2008 |
20080258952 | Delta Sigma Modulator and Delta Sigma Analog-Digital Converter - The present invention provides a ΔΣ modulator of a frequency modulation system that can lessen the requirement of linearity for an oscillator. | 10-23-2008 |
20080266155 | Column Parallel Readout with a Differential Sloped A/D Converter - A dual slope A/D converter uses two opposite sense ramps added to its differential input. The value in a digital counter is latched at the time when the two ramps intersect. This enables a more consistent switching point, allowing the amplifier to the linear over a larger part of its range. | 10-30-2008 |
20080272944 | Feed-forward circuitry and corresponding error cancellation circuit for cascaded delta-sigma modulator - A cascaded delta-sigma modulator includes a first stage delta-sigma modulator ( | 11-06-2008 |
20080272945 | CONTROL SYSTEM USING A NONLINEAR DELTA-SIGMA MODULATOR WITH NONLINEAR PROCESS MODELING - A control system includes a nonlinear delta-sigma modulator, and the nonlinear delta-sigma modulator includes a nonlinear process model that models a nonlinear process in a signal processing system, such as a nonlinear plant. The nonlinear delta-sigma modulator includes a feedback model that models the nonlinear process being controlled and facilitates spectral shaping to shift noise out of a baseband in a spectral domain of a response signal of the nonlinear process. In at least one embodiment, the nonlinear delta-sigma modulator is part of a control system that controls power factor correction and output voltage of a switching power converter. The control system controls the pulse width and period of a control signal to control power factor correction and the output voltage level. In at least one embodiment, the nonlinear delta-sigma modulator generates a signal to control the pulse width of the control signal. | 11-06-2008 |
20080272946 | SIGNAL PROCESSING SYSTEM USING DELTA-SIGMA MODULATION HAVING AN INTERNAL STABILIZER PATH WITH DIRECT OUTPUT-TO-INTEGRATOR CONNECTION - A signal processing system includes an analog-to-digital delta sigma modulator with a duty cycle modulator and a finite impulse response (FIR) filter in a main loop feedback path of the delta sigma modulator. The duty cycle modulator and FIR filter can provide high performance filtering in the main loop feedback path. To prevent instability in the main loop caused by the duty cycle modulator and FIR filter, the delta sigma modulator also includes a stabilizer loop. Transfer functions of the main loop and the stabilizer loop combine to achieve a target transfer function for the analog-to-digital delta sigma modulator that provides for stable operation of the analog-to-digital delta sigma modulator. In at least one embodiment, the stabilizer loop includes a stabilizer path that provides output data directly to an integrator of the main loop filter. | 11-06-2008 |
20080278360 | Performance of A/D converter and receiver - A delta-sigma A/D converter includes a D/A converter realized with a mixed-mode comb filter connected in a feedback loop from the output of the A/D converter to the input of the A/D converter. The D/A converter is configured to predistort a feedback signal. The converter further includes an analogue filter at the input of the A/D converter. The analogue filter is configured to cancel the predistortion of the feedback signal. | 11-13-2008 |
20080278361 | Asymmetric PWM signal generator, method thereof, and data processing apparatus including the same - A pulse width modulation (PWM) signal generator includes a quantizer for generating a quantized signal by quantizing an input signal, an asymmetric pulse width modulator, and an error correction unit. The asymmetric pulse width modulator generates an asymmetric PWM signal by comparing the quantized signal with a reference signal, with the asymmetric PWM signal being asymmetric with respect to a center of a period of the reference signal. The error correction unit is coupled between the quantizer and the asymmetric pulse width modulator to correct an error generated from the asymmetry of the asymmetric PWM signal. The quantizer is part of a delta sigma modulator having an operating frequency that is twice that of the reference signal. | 11-13-2008 |
20080284628 | Delta Sigma Modulator - A delta sigma modulator includes an oscillatory system having a natural frequency and an electronics and a control loop which acts upon the electronics from the oscillatory system and again upon the oscillatory system from the electronics. The control loop provides that a gain in the control loop demonstrates a peaking in a frequency range around the natural frequency of the oscillatory system. | 11-20-2008 |
20080291069 | DELTA SIGMA MODULATOR - In a delta sigma modulator including first and second integration circuits connected in cascade, each as a component thereof, first and second power source terminals for supplying first and second different power source voltages to the first and second integration circuits are provided. The first power source voltage is supplied to the former-stage first integration circuit having a SNR which is largely affected by the magnitude of the power source voltage. The second power source voltage lower than the first power source voltage is supplied to the latter-stage second integration circuit having a SNR which is not largely affected by the magnitude of the power source voltage. | 11-27-2008 |
20080297385 | Sigma-Delta Analog-Digital Converter For An Xdsl Multistandard Input Stage - The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter ( | 12-04-2008 |
20080297386 | SIGMA-DELTA MODULATOR WITH DAC RESOLUTION LESS THAN ADC RESOLUTION - A sigma-delta modulator is provided with a feedback digital-to-analog converter having less resolution than the quantizer, while providing a reduced length output word, requiring minimal additional internal processing, and shaping of the truncation error by an effective noise transfer function greater than the order of the host sigma-delta modulator. | 12-04-2008 |
20080297387 | Filter With Capacitive Forward Coupling - This disclosure relates to techniques and architecture for summing, sampling, and converting signals associated with a capacitive feedforward filter using a quantizer. | 12-04-2008 |
20080297388 | PROGRAMMABLE SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER - A system includes an analog-to-digital modulator to convert at least one analog input signal into at least one digital output signal. The system also includes a processing device to set an operational order and a quantization level of the analog-to-digital modulator. The analog-to-digital modulator converts the analog input signal into the digital output signal according to the operational order and the quantization level. | 12-04-2008 |
20080297389 | Blue-Noise-Modulated Sigma-Delta Analog-to-Digital Converter - A sigma-delta ADC ( | 12-04-2008 |
20080303703 | Cross-Coupled Switched Capacitor Circuit with a Plurality of Branches - A cross-coupled switched capacitor circuit that has two branches. During a first phase for the first branch, an input voltage is provided that causes charge to move through a resistor and to be placed onto a plate of the capacitor within the branch. An equivalent amount of charge is transferred to an output node. The output node may be a summing node of a sigma-delta modulator. The summing node is one of the inputs to an operational amplifier that is part of the integrator of the sigma-delta modulator. The resistor and the capacitor in the first branch define an RC circuit and corresponding RC time constant. During the first phase, the capacitor does not reach a fully settled voltage for a desired resolution. During the second phase, the capacitor in the first branch of the circuit is set to a defined voltage. The defined voltage may be the settling voltage had the capacitor been allowed to settle during the first phase. The second branch of the switched capacitor feedback circuit operates similar to the first branch, but on opposite phases. By not requiring the voltage to settle during the first phase, power can be conserved, since the integrator of the sigma-delta modulator does not need to operate as fast with respect to movement of charge. | 12-11-2008 |
20080309533 | Comparators for delta-sigma modulators - Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some embodiments, the delta-sigma modulator includes a preamplifier coupled to the data locations and a latch coupled to the preamplifier. | 12-18-2008 |
20080309534 | Quantizing circuits for semiconductor devices - An electronic device that includes an internal data storage location coupled to an electrical conductor and a quantizing circuit coupled to the internal data storage location via the electrical conductor. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and an output, where the input is coupled to the electrical conductor and a digital filter coupled to the output of the analog-to-digital converter. | 12-18-2008 |
20080309535 | Feedforword Sigma-Delta Ad Converter with an Optimized Built-In Filter Function - The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path ( | 12-18-2008 |
20080309536 | Analog-to-Digital Converter of the Sigma Delta Type - An analog-to-digital converter (ADC | 12-18-2008 |
20080316074 | Electronic Circuit and Semiconductor Device Having Dac and Scf - An electronic circuit has a voltage selection and output circuit, e.g. digital-to-analog converter (DAC), and a switched capacitor filter (SCF), in which operational conditions of the input side switches of the SCF are incorporated in the selection conditions for selecting respective multiple selection switches of the voltage selection and output circuit. This arrangement permits the selection switches to serve as the input side switches, thereby reducing in number serial switches such as MOS transistors in the circuit, and hence reducing the on-resistances of the serial switches, while preventing the clock feed-through thereof from increasing and suppressing output errors due to the linearity error of the buffer amplifier involved. | 12-25-2008 |
20080316075 | DELTA SIGMA MODULATOR AND DELTA SIGMA A/D CONVERTER - With a delta sigma modulator of this invention, a plurality of clocks required to control a switching circuit can be easily generated and correlation among phases of the plurality of clocks can be automatically maintained while a frequency of the clocks is modified. A ring oscillator is formed of three delay circuits provided with differential amplifiers in the delta sigma modulator. A clock producing circuit produces the plurality of clocks to control the switching circuit by delaying three-phase clocks outputted from the ring oscillator. All the tail currents Ic in the differential amplifiers in the delay circuits in the ring oscillator and the tail currents Ic in the differential amplifiers in the delay circuits in the clock producing circuit are proportional to each other. | 12-25-2008 |
20090002211 | Radio Frequency Sigma-Delta-Modulator - A radio-frequency ΣΔ-modulator comprises a first mixer in the forward path for down-converting the signals in this forward path with a local oscillator frequency and a second mixer in the feedback path for up-converting the feedback signal with the same local oscillator frequency. Delays between the two mixing operations cause a loss of gain in the loop of the ΣΔ-modulator. An adjustable amplifier in the feedback path compensates for this loss of gain. | 01-01-2009 |
20090009373 | A/D converter - To prevent the value of a successive approximation register, which should be holding the value of the comparison result, from changing due to noise or the like during the A/D conversion by a successive approximation A/D converter, a detection circuit is arranged on an arbitrary bit of a successive approximation register | 01-08-2009 |
20090021408 | ADAPTIVE DYNAMIC RANGE CONTROL - Apparatus and method for processing signals. A sigma-delta modulator is used. An adaptive dynamic range controller is configured to adaptively adjust the dynamic range of a signal output from the sigma-delta modulator. | 01-22-2009 |
20090021409 | DYNAMIC SLEW RATE CONTROL BASED ON A FEEDBACK SIGNAL - Techniques for enhancing the slew rate of an active circuit within a feedback circuit (such as a ΔΣ ADC) are described. In one design, a ΔΣ ADC includes an integrator, a slew rate enhancement circuit, and a control circuit. The integrator receives an input signal and provides an output signal. The slew rate enhancement circuit enhances the slew rate of the integrator based on a feedback signal in the ΔΣ ADC. The slew rate enhancement circuit may provide (i) a boost current for only certain values (e.g., the largest and smallest values) of the feedback signal or (ii) different amounts of boost current for different values of the feedback signal. In one design, the slew rate enhancement circuit includes at least one boost circuit coupled to the integrator. Each boost circuit provides a boost current to enhance the slew rate of the integrator when that boost circuit is enabled. | 01-22-2009 |
20090027247 | A/D CONVERTER AND SEMICONDUCTOR DEVICE - In an A/D converter including a switched capacitor integration circuit, to suppress an effect of a noise generated in the switched capacitor circuit while suppressing increase in a forming area of the circuit. A first-stage integrator of a differential input type A/D converter includes first and second switched capacitor circuits, and includes a noise cancel circuit for generating a noise cancel signal to cancel a kickback noise generated due to switching operation thereof. | 01-29-2009 |
20090027248 | D/A CONVERTER - A D/A converter ( | 01-29-2009 |
20090033533 | SIGMA DELTA MODULATOR AND RELATED METHOD THEREOF - A sigma-delta modulator includes a loop filter, a single bit quantizer, a single bit DAC, an adder. The loop filter is for filtering a summed signal to generate a filtered signal. The single bit quantizer is coupled to the loop filter, for performing a quantization process to the filtered signal to generate a quantized signal. The single bit DAC is coupled to the single bit quantizer, has an adjustable configuration, and is for generating a feedback signal according to the quantized signal and the configuration thereof. The adder is coupled to the loop filter and the single bit DAC, for summing an input signal and the feedback signal to generate the summed signal. | 02-05-2009 |
20090040085 | SYSTEM AND METHOD FOR CONVERTING ANALOG VALUES INTO DIGITAL FORM - A method for converting analog values into digital form comprises comparing a current analog sample value with an analog input value to produce an outcome, generating a count value based on the outcome, the count value increasing upon successive like outcomes and being reset to an initial count value upon successive unlike outcomes, adding or subtracting the count value to/from a current digital sample value to generate a next digital sample value, the adding or subtracting being based on the outcome, and converting the next digital sample value to the current analog sample value. | 02-12-2009 |
20090051577 | Multiplexing Aware Sigma-Delta Analag-to-Digital Converter - The present invention relates to an electronic device for analog-to-digital conversion including a sigma-delta modulator (SD), a digital filter (FIL) for digital post processing of the output signal of the sigma-delta modulator (SD), a multiplexer (MUX) for switching the input (INSD) of the sigma-delta modulator between a first input signal (IN | 02-26-2009 |
20090066549 | SIGMA DELTA MODULATOR - A method of controlling a sigma delta modulator with a loop which establishes a signal transfer function, STF, and a quantization noise transfer function, NTF, of the sigma delta modulator, wherein the sigma delta modulator receives an input signal, x(n), and provides a modulated output signal, y(n) in response to the input signal. The method is characterized in comprising the step of controlling the sigma delta modulator to change the quantization noise transfer function, NTF, in response to a signal feature, A(n), which is correlated with the input signal. | 03-12-2009 |
20090066550 | SIGMA-DELTA MODULATOR FOR OPERATING SENSORS - A sigma-delta modulator can be used for actuating a sensor element. The sigma delta modulator includes: a forward branch to which an input signal is fed at an input and which includes a loop filter, a quantizer and an output for providing an output signal. A feedback branch is configured to feed back the output signal of the forward branch at least temporarily to the input of the forward branch. A signal source is configured to generate a readout signal which corresponds to the voltage profile at the sensor element during a measuring process. A control unit is configured to generate a control signal dependent on which either the output signal of the forward branch or the readout signal of the signal source is fed back to the input of the forward branch. | 03-12-2009 |
20090079605 | MASH MODULATOR AND FREQUENCY SYNTHESIZER USING THE SAME - A MASH modulator. The MASH modulator receives a fractional input value, generates an integer output value, and comprises three cascaded first order sigma delta modulators (SDMS) each comprising an accumulator, a plurality of first multipliers, a second multiplier, a first adder, and a second adder. Each of the first multipliers is coupled to a corresponding accumulator. The first adder receives the fractional input value. The second multiplier is coupled between the first adder and the cascaded first order sigma delta modulators. The second adder is coupled to the cascaded first order sigma delta modulators to generate the integer output value. | 03-26-2009 |
20090079606 | IMPLANTABLE MEDICAL DEVICE WITH LOW POWER DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER - In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop. | 03-26-2009 |
20090079607 | CHOPPER-STABILIZED ANALOG-TO-DIGITAL CONVERTER - This disclosure describes a chopper-stabilized sigma-delta analog-to-digital converter (ADC). The ADC is configured to provide accurate output at low frequency with relatively low power. The chopper-stabilized ADC substantially reduces or eliminates noise and offset from an output signal produced by the mixer amplifier. Dynamic limitations, i.e., glitching that result from chopper stabilization at low power are substantially eliminated or reduced through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the ADC operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. In this manner, the chopper-stabilized ADC can be used in a low power system, such as an implantable medical device (IMD), to provide a stable, low-noise output signal. | 03-26-2009 |
20090079608 | OPERATIONAL AMPLIFIER AND OPERATING METHOD THEREOF - A loading stage for outputting an amplified differential output, including: a noise source inducing noises originally located in a first frequency band, and a first modulating device coupled to the noise source for modulating the noises into a second frequency band from the first frequency band. | 03-26-2009 |
20090085785 | DIGITAL-TO-ANALOG CONVERTER CALIBRATION FOR MULTI-BIT ANALOG-TO-DIGITAL CONVERTERS - According to some embodiments, a sigma-delta analog-to-digital converter includes a junction, to receive the analog signal along with a feedback signal, and a loop filter coupled to the junction. An n-bit analog-to-digital converter, coupled to the loop filter, may provide the digital output of the sigma-delta analog-to-digital converter. In addition, an n-bit feedback digital-to-analog converter, with a plurality of cells, may receive the digital output and generate the feedback signal, wherein the feedback converter is associated with at least one calibration digital-to-analog converter. | 04-02-2009 |
20090085786 | SIGNAL MODULATION METHOD, SIGNAL MODULATION APPARATUS, ELECTRONIC DEVICE, AND COMPUTER PROGRAM PRODUCT - A signal modulation method by an electronic device which includes a minimal reducing unit that minimally reduces an integrated signal returned to an adder from an integrator. | 04-02-2009 |
20090091484 | DELTA SIGMA MODULATOR AND METHOD FOR COMPENSATING DELTA SIGMA MODULATORS FOR LOOP DELAY - The invention provides a continuous-time delta sigma modulator. In one embodiment, the continuous-time delta sigma modulator comprises a series of integrators, a quantizer, and a loop delay compensation circuit. The integrators are coupled in series and generate an analog output signal according to an analog input signal. The quantizer quantizes the analog output signal according to a reference voltage to generate a digital output signal as the output of the continuous-time delta sigma modulator. The loop delay compensation circuit adjusts the reference voltage of the quantizer according to the digital output signal to compensate the continuous-time delta sigma modulator for a loop delay. | 04-09-2009 |
20090091485 | Asynchronous Sigma Delta Analog To Digital Converter Using A Time To Digital Converter - This disclosure relates to analog to digital conversion using irregular sampling. | 04-09-2009 |
20090091486 | Analog To Digital Conversion Using Irregular Sampling - This disclosure relates to analog to digital conversion using irregular sampling. | 04-09-2009 |
20090096648 | APPARATUS AND METHOD FOR IMPROVING PERFORMANCE OF SIGMA-DELTA MODULATORS HAVING NON-IDEAL COMPONENTS - In an apparatus and method for improving performance of a third order, double-sampled, sigma-delta modulator (SDM), a first one of three feedback elements included in a feedback loop of the SDM is selected to complete the feedback loop during a first half-cycle of the clock used for the double-sampling. The first one is restricted from being reselected during a subsequent half-cycle of the clock until the first one is reset. A second one of the three feedback elements is selected during a second half-cycle of the clock that is consecutive to the first half-cycle, the second one being different than the first one. A third one of the three feedback elements is selected during a third half-cycle of the clock that is consecutive to the second half-cycle, the third one being different than the second one. | 04-16-2009 |
20090096649 | SIGMA-DELTA MODULATOR FOR PWM APPLICATIONS WITH MINIMUM DYNAMICAL CONTROL AND DITHERING - The circuit includes, upstream from a PWM quantizer, that is between the output of the sigma-delta modulator and the input of the PWM or PWM-like quantizer, a second or ancillary sigma-delta stage of any order and architecture, with the function of controlling the minimum dynamic of the sigma-delta modulator. This second sigma-delta stage is input with the output signal of the sigma-delta modulator summed to a signal corresponding to the difference between the input signal and the output signal of the second sigma-delta stage, delayed by a delay block. | 04-16-2009 |
20090102690 | Methods and Systems for Reducing a Sign-Bit Pulse at a Voltage Output of a Sigma-Delta Digital-to-Analog Converter - For a sigma-delta digital-to-analog converter (SD DAC) that includes a voltage output and a low-pass filter having a given order, methods and systems for reducing a sign-bit pulse at the voltage output of the SD DAC without requiring use of a higher order low-pass filter are disclosed. A method includes receiving a first waveform and a second waveform, the first and second waveforms having a first phase relationship; setting the first phase relationship between the first and second waveforms to a second phase relationship by aligning at least one of the first and second waveforms such that a transition of the second waveform is approximately half way between a rising edge and adjacent falling edge of the first waveform; upon setting the second phase relationship, multiplying the first and second waveforms to produce a digital input; and providing the digital input to the SD DAC. | 04-23-2009 |
20090109075 | SAMPLING ERROR REDUCTION IN PWM-MASH CONVERTERS - Techniques for reducing sampling error in electronic components are described herein. | 04-30-2009 |
20090109076 | MASH SIGMA DELTA MODULATOR - A Multi-stage noise shaping Sigma Delta Modulator (MSDM) and method of processing data using the MSDM are disclosed. The MSDM is capable of operating at high radio frequencies and is characterized by low power consumption, reduced latency and noise and occupies less area in an integrated circuit. | 04-30-2009 |
20090121909 | DYNAMIC ELEMENT-MATCHING METHOD, MULTI-BIT DAC USING THE METHOD, AND DELTA-SIGMA MODULATOR AND DELTA-SIGMA DAC INCLUDING THE MULTI-BIT DAC - Provided are a dynamic element-matching method, a multi-bit Digital-to-Analog Converter (DAC), and a delta-sigma modulator with the multi-bit DAC and delta-sigma DAC with the multi-bit DAC. The dynamic element-matching method relates to preventing periodic signal components (in-band tones) from being generated from a delta-sigma modulator of a delta-sigma Analog-to-Digital Converter (ADC) and a multi-bit DAC used in a delta-sigma DAC. Unit elements are selected in a new sequence according to a simple algorithm every time that each of unit elements is selected once, and thus the unit elements are not periodically used. Consequently, it is possible to prevent in-band tones caused by a conventional Data Weighted Averaging (DWA) algorithm. | 05-14-2009 |
20090128384 | Multi-Standard Analog-To-Digital Data Conversion - Implementations related to multi-standard digital subscriber line analog-to-digital data conversion are described. | 05-21-2009 |
20090128385 | Resettable high order delta-sigma analog to digital converter - A high-order delta-sigma analog-to-digital converter. A plurality of stages are connected to accept an analog input signal and produce a digital output signal. Each stage has a resettable Δ-Σ converter of second order or higher. Resetting each stage before accepting a new input purges the integrators of any information related to the previous input, allowing step inputs to the system. The stability of the converter is ensured using local feedback loops at each stage. Each stage provides a digital representation of a portion of the analog input signal. A decimation filter receives the digital signals from the stages and arranges them into the digital output signal. | 05-21-2009 |
20090135035 | ADAPTING FILTER TO DETECTED INTERFERENCE LEVEL - A receiver uses a sigma delta ADC ( | 05-28-2009 |
20090135036 | Differential current-mode translator in a sigma-delta digital-to-analog converter - A differential current-mode sigma-delta digital-to-analog converter (SD DAC) and a method for generating positive and negative reference voltages in a sigma-delta digital analog converter are described. The SD DAC includes a low pass filter (LPF) having a first and second input. The SD DAC further includes a first resistance and a second resistance coupled together at a common node. The first resistance may be coupled to the first input of the LPF and the second resistance may be coupled to the second input of the LPF. Additionally, the SD DAC includes a current supply and a switching network for supplying current from the current supply to the first and second resistances. The current supply and the resistances operate to generate a first voltage and a second voltage at the first and second inputs of the LPF. | 05-28-2009 |
20090135037 | Correcting Offset Errors Associated With A Sub-ADC In Pipeline Analog To Digital Converters - An offset correction circuit examines a residue signal of a stage of a pipeline analog to digital converter (ADC) to determine whether a parameter which could cause offset error, needs to be adjusted. In an embodiment, the parameter is adjusted until a maximum range of the residue signal equals an expected range. In the described examples, the adjusted parameters include timing offset error (when components of an ADC sample the input signal at different time instances) and a voltage offset error (the threshold voltage at which a sub-ADC in a stage the generated sub-code changes to a next value). | 05-28-2009 |
20090135038 | Sigma Delta Modulator Summing Input, Reference Voltage, And Feedback - A multibit sigma delta modulator for conveting an analog input signal (Vin) into a multibit digital output signal is disclosed. In one embodiment, the multibit sigma modulator includes a first analog filter for filtering the analog input error signal, a quantizer including multiple single bit noise shaped modulators for quantizing the filtered analog input error signal outputted by the first analog filter for generating a multibit digital output signal, and a first feedback arrangement with at least one digital-to-analog converter (DAC) coupled to the quantizer for supplying to the first analog filter at least one quantizer feedback signal based on the multibit digital output signal. | 05-28-2009 |
20090135039 | Switched Capacitor Circuit, Switched Capacitor Filter, and Sigma-Delta A/D Converter - A switched capacitor circuit includes a capacitor that performs sampling, a first switch that is provided between the capacitor and an input terminal, and a second switch that is provided between the capacitor and an output terminal. The first switch and the second switch receive an input of a clock signal and turn on and off. The capacitor is a variable capacitance element in which the value of the capacitance changes in synchronization with the clock signal. | 05-28-2009 |
20090140898 | Jitter Insensitive Single Bit Digital to Analog Converter - Systems and methods for a jitter insensitive 1-bit digital to analog converter (DAC) are described. The jitter insensitive 1-bit DAC employed in the feedback loop of a delta sigma analog to digital converter (ADC) converts a 1-bit digital data into the corresponding analog output. | 06-04-2009 |
20090140899 | Double Sampling DAC and Integrator - This disclosure relates to systems and methods for analog to digital conversion using delta sigma modulation. To this end, the delta sigma modulator includes a double sampling DAC and integrator and a 1-bit comparator, with reference loading insensitivity. | 06-04-2009 |
20090140900 | SENSOR INTERFACE DEVICES AND AMPLIFIERS - Disclosed are a sensor interface device and an amplifier used in a sensor system. The sensor interface device in one implementation has a first chopper configured to shift input signals of the sensor system from a baseband frequency to a first frequency, an instrumentation amplifier configured to amplify the shifted signals, a bandpass Delta-Sigma modulator configured to digitize the amplified signals, and a second chopper configured to shift the digitized signals from the a first frequency back to the baseband frequency. The instrumentation amplifier removes the DC offset generated from the first chopper and therefore all sources of DC offset are eliminated in this interface device without bandwidth limitation. | 06-04-2009 |
20090146855 | Residue Signal Generator Architecture With Reduced Number Of Switches For Use In A Pipeline Adc Processing Differential Signals - A residue block in a stage of a pipeline ADC processing differential signals contains multiple pairs of capacitors. During a hold phase of operation, one capacitor of a pair is connected to a positive reference voltage, and the other capacitor is connected to a negative reference voltage if the input signal exceeds a corresponding threshold voltage. When the input signal does not exceed the corresponding threshold voltage, both capacitors of the pair are connected either to the positive or the negative reference voltage. As a result, the need for a common mode reference voltage may be eliminated, and the residue block can be implemented with a smaller area. | 06-11-2009 |
20090153381 | Superconductor Analog-to-Digital Converter - A superconducting Analog-to-Digital Converter (ADC) employing rapid-single-flux-quantum (RSFQ) logic is disclosed. The ADC has only superconductor active components, and is characterized as being an N | 06-18-2009 |
20090153382 | SIGNAL PROCESSING CIRCUIT COMPRISING A SIGMA DELTA ANALOG TO DIGITAL CONVERTER - A signal processing circuit comprising a sigma delta analog to digital converter with a feedback loop that comprises an analog filtering circuit ( | 06-18-2009 |
20090160688 | AD Converter - An AD converter comprising: a delta-sigma-modulation circuit to output an analog signal from a bridge circuit as a quantized signal; a switch circuit to switch between a first state, where a first level voltage is applied to one terminal of the bridge circuit and a second level voltage different in level from the first level voltage is applied to the other terminal thereof, and a second state, where voltages opposite in level to those in the first state are applied thereto, based on a logic level of a control signal; and an up-down counter to increase a count value based on a rate of the quantized signal being one logic level, during a predetermined period, in the first state, and decrease the count value based on the rate, during the predetermined period, in the second state, the count value representing a digital signal according to the physical quantity. | 06-25-2009 |
20090167580 | SIGMA DELTA ANALOG TO DIGITAL CONVERTER WITH INTERNAL SYNCHRONOUS DEMODULATION - A sigma-delta (ΣΔ) analog to digital converter with internal synchronous demodulation responsive to a sample clock, reference clock and conversion clock including a sample switching circuit responsive to an AC input to sample the AC input at the sample clock rate; the sample switching circuit including first and second input switches responsive to the reference clock for selectively, alternately sampling the positive and the negative AC input at the reference clock rate; and an inverter circuit responsive to the reference clock and the sample clock for reversing the polarity of signals from the sample clock in synchronism with the reference clock to reverse the sense of the input switches and synchronously demodulating the AC input within the converter. | 07-02-2009 |
20090167581 | High-Precision Multi-Band Pass Delta-Sigma Modulator - A high-precision ΔΣ modulator reduces nonlinear noise due to the use of a multibit DAC and has little hardware and power consumption. A digital signal is DA converted and fed back to a subtraction circuit supplied with an analog signal. The DAC used in this feedback circuit uses a DAC (DWADAC) that includes a weighted pointer so that input digital signals are supplied in order to a plurality of segment elements that construct the DAC. In this DWADAC, the construction and number of the pointer is set based on the type and order of the filter disposed before the ADC. | 07-02-2009 |
20090207060 | SIGNAL CONVERSION USING FINITE IMPULSE RESPONSE FEEDBACK - Techniques for converting signals using finite impulse response (FIR) feedback are described herein. | 08-20-2009 |
20090207061 | Sigma-delta conversion circuit suitable for photocurrent measurement applications - A sigma-delta converter suitable for measuring a photocurrent comprises an input node adapted to receive a current to be measured (I | 08-20-2009 |
20090237282 | Oversampling PID Controller for Integration with a Delta-Sigma Analog-to-Digital Converter - An embodiment of the invention relates to a controller that includes a delta-sigma modulator to produce a one-bit, oversampled signal representing a measured characteristic of a process, and a delta-sigma modulator to produce a one-bit, oversampled signal representing a set-point value for the characteristic. A multiplexer selects a partial sum based on a difference of the oversampled signals to produce a control signal for the process. The controller that produces the control signal for the process can be a PID controller. | 09-24-2009 |
20090237283 | METHOD AND APPARATUS FOR DIGITAL TO ANALOG CONVERSION - A Delta-Sigma DAC and a digital to analog conversion method are provided. A FIR filter receives a shaped digital signal to generate a first current on a first output node, and a second current on a second output node. A current inverter is coupled to the second output node, outputting a reversed current having opposite polarity and identical magnitude of the second current. A current to voltage converter is coupled to the first output node and the output of current inverter, generating an analog signal according to the first and reversed currents. A first current source compensates DC offset for the first current, and a second current source compensates DC offset for the second current. The first and second current sources are implemented by NMOS. | 09-24-2009 |
20090237284 | DIGITAL SIGMA -DELTA MODULATORS - A digital sigma-delta modulator ( | 09-24-2009 |
20090243903 | SYSTEM AND METHOD OF ALTERING A PWM CARRIER POWER SPECTRUM - In a particular embodiment, a circuit device includes an input to receive a pulse-width modulated (PWM) signal and an output to send a modulated PWM signal. The circuit device further includes a pulse edge control circuit coupled between the input and the output. The pulse edge control circuit receives the PWM signal via the input and includes a control input to receive a modulation control signal. The pulse edge control circuit is adapted to modify the PWM signal to provide the modulated PWM signal with suppressed carrier power and associated harmonics to the output based on the modulation control signal. The circuit device further includes a modulation sequence controller adapted to provide the modulation control signal via the control input. The modulation control signal selectively controls a sequence of the modification of the PWM signal to selectively alter an output power spectrum of the modulated PWM signal. | 10-01-2009 |
20090251346 | Segmented data shuffler apparatus for a digital to analog converter (DAC) - A method and apparatus is disclosed to convert a digital input signal to an analog output signal. A digital to analog converter (DAC) module converts the digital input signal to the analog output signal through segmentation. A primary sigma-delta modulator sigma-delta modulates the digital input signal to produce a primary digital segment and a primary quantization error. A primary sample delay delays the primary digital segment to produce a delayed primary digital segment. A primary decoder module decodes the delayed primary digital segment to produce a primary decoded digital signal. A primary scrambler scrambles the primary decoded digital signal to produce a primary scrambled digital signal. A primary DAC converts the primary scrambled digital signal from a digital representation to an analog representation to produce a primary analog segment. A secondary sigma-delta modulates the primary quantization error to produce a secondary digital segment. A secondary noise module shapes the secondary digital segment by a noise transfer function of the primary sigma-delta modulator to produce a noise shaped secondary digital segment. A secondary decoder module decodes the noise shaped secondary digital segment to produce a secondary decoded digital signal. A secondary scrambler scrambles the secondary decoded digital signal to produce a secondary scrambled digital signal. A secondary DAC converts the secondary scrambled digital signal from a digital representation to an analog representation to produce a secondary analog segment. A scaling module scales the magnitude of the secondary analog segment by a scaling factor to produce the secondary analog segment. An adder combines the primary analog segment and the secondary analog segment to produce the analog output signal. | 10-08-2009 |
20090278718 | PRESSURE SENSOR WITH IMPROVED RATE-OF-CHANGE COMPATIBLE DATA OUTPUT - An integrated sensor implementation employs a data acquisition method for producing digital output signals that enables computing low latency, low noise, rate of pressure (or altitude etc.) change measurements. An example sensor includes a self-digitizing pressure and temperature sensor circuit that outputs a serial digital signal that varies with at least one physical parameter to which the sensor circuit is exposed. The sensor incorporates an internal sigma-delta A/D converter and digital data acquisition device that effectively time-stamps all acquired data. This time stamped data is then transmitted to an external processing resource (microprocessor) that is used to convert the self-digitized, time stamped data into low latency, low-noise proportional and rate parameter outputs having the desired engineering units for at least one physical parameter sensed. This low-latency, low noise rate of change signal may be derived without the latency penalty of digital filtering. | 11-12-2009 |
20090278719 | ANALOG-TO-DIGITAL CONVERTER WITH INTEGRATOR CIRCUIT FOR OVERLOAD RECOVERY - Apparatus and methods are provided for overload recovery in high order sigma-delta feedback topologies. An apparatus is provided for an analog-to-digital converter. The analog-to-digital converter comprises a first integrator having a first input, wherein the first integrator is configured to produce a first integrated output. A first switched resistance element is coupled between the first input and the first integrated output, wherein the first integrated output is altered when the first switched resistance element is activated. A quantizer is coupled to the first integrated output, the quantizer having a digital output wherein the quantizer converts the first integrated output to a digital value. A digital-to-analog converter is coupled between the digital output and the first input, wherein the digital-to-analog converter converts the digital value to an analog value. | 11-12-2009 |
20090278720 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER CIRCUIT HAVING REDUCED SAMPLED REFERENCE NOISE - A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network. | 11-12-2009 |
20090278721 | HYBRID DELTA-SIGMA ADC - A hybrid delta sigma ADC architecture and method is disclosed to implement a high-resolution delta-sigma modulator with a single-bit output. The system contains a low-order multi-bit analog noise-shaping loop, followed by a high-order single-bit digital modulator. The combination simplifies the analog modulator, and allows the use of most of the full-scale input range. | 11-12-2009 |
20090278722 | COLUMN-PARALLEL SIGMA-DELTA ANALOG-TO-DIGITAL CONVERSION WITH GAIN AND OFFSET CONTROL - A sigma-delta modulation sensing circuit and an analog-to-digital converter for an imager that eliminate the erroneous conversion of non-zero analog voltages to zero digital voltages is provided. The sensing circuit includes an offset branch that allows input of an offset voltage that is at least as large as a negative channel-specific offset found in a pixel signal voltage. The sensing circuit also includes a regulation branch based on a reference voltage common across multiple columns of an imager. The regulation branch has an adjustable resistance that is modulated during the sensing operation, which creates an adjustment current that is applied during the sensing operation to a reset signal. The sensing circuit and analog-to-digital converter generate digital code based on the difference between the reset voltage and the summed offset and pixel signal voltage. | 11-12-2009 |
20090289823 | Sigma-delta analog-to-digital converter and solid-state image pickup device - A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value. | 11-26-2009 |
20090289824 | SIGMA-DELTA MODULATOR AND METHOD THEREOF - A sigma-delta modulator includes an adder, a filter, a quantizer, and a clock rate controller. The adder receives an input signal and an output signal to generate a summation signal. The filter is coupled to the adder and filters the summation signal to generate a filtered signal. The quantizer is coupled to the filter as well as the adder and quantizes the filtered signal to generate the output signal according to a first clock signal. The clock rate controller is coupled to the quantizer and generates the first clock signal, wherein a frequency of the first clock signal is variable. | 11-26-2009 |
20090309773 | SEMICONDUCTOR SENSOR CIRCUIT ARRANGEMENT - An error-corrected representation of an input signal, such as a bioluminescence signal, is generated. An analog representation of the input signal is oversampled and quantized to provide a first-stage digital output and a residual error. The residual error is provided as a second-stage digital output using successive approximation. The first-stage and second-stage digital outputs are used to generate an error-corrected representation of the bioluminescence signal. | 12-17-2009 |
20090309774 | DELTA-SIGMA MODULATOR - An object is to provide a stable delta-sigma modulator having good microlevel signal reproducibility and capable of outputting a 1-bit PDM signal with a low oversampling ratio of about 64 times at a high duty ratio of 90% or more. The delta-sigma modulator has a higher-order loop filter; a first 1-bit quantizer for making a decision as to the output of the higher-order loop filter; a first feedback component for feeding the first output signal back to the input stage of the higher-order loop filter; a second 1.5-bit quantizer for making a decision as to the output absolute value of an internal stage to be monitored; a second dynamic feedback component for feeding a second output signal back to the input stage of the higher-order loop filter; and an operational unit for producing a 1-bit PDM signal Y by performing operation on the first output signal and second output signal. | 12-17-2009 |
20090322576 | SIGMA-DELTA MODULATOR - The present invention relates to a sigma-delta modulator to convert an analog signal into a digital signal using an analog-to-digital converter slaved in a closed loop. The undecided bits at the output of the analog-to-digital converter are assigned the same values in the digital output signal from the modulator as in the digital signal returned to the input of the modulator. | 12-31-2009 |
20100007538 | Flicker Noise Reduction in Continuous Time (CT) Sigma Delta Modulators (SDMS) - Embodiments of a system for processing a signal may include a receiver configured to receive an input analog signal and an up converter coupled with the receiver and configured to up convert the analog signal to an up converted analog signal. Embodiments may further include an amplifier coupled with the up converter and configured to amplify the up converted analog signal to generate an amplified signal and also a bandpass filter coupled with the amplifier and configured to filter the amplified signal to generate a filtered analog signal. According to embodiments, the filtered analog signal may be fed to a quanitizer of the ADC. Intermediate signals made thus avoid the flicker noise region typically associated with an integrator of the ADC and may minimize the quantization noise associated with converting higher frequency analog signals. | 01-14-2010 |
20100013688 | SIGMA-DELTA TYPE ANALOG-TO-DIGITAL (AD) CONVERTER AND ANGULAR VELOCITY SENSOR USING SAME - An angular velocity sensor with a stable output characteristic using a sigma-delta type analog-to-digital converter comprising an integrator unit for integrating electric charges output from an input switching device and a digital-to-analog converter unit and holding at least two integrated values, a comparator unit for comparing at least the two integrated values output from the integrator unit with a predetermined value, and an arithmetic operation unit for operating an output signal of the comparator unit, the arithmetic operation unit provided with a differential operation unit for computing a difference between at least two comparison signals output from comparator unit. | 01-21-2010 |
20100019944 | ANALOGUE-TO-DIGITAL CONVERTER APPARATUS AND METHOD OF REUSING AN ANALOGUE-TO-DIGITAL CONVERTER CIRCUIT - An analogue-to-digital converter apparatus comprises a first integrator coupled to a second integrator. The first and second integrators are coupled so as to provide a complex pole. The first integrator is selectively electrically decoupleable from the second integrator, thereby removing the complex pole. | 01-28-2010 |
20100026538 | METHOD AND APPARATUS FOR MATCHED QUANTUM ACCURATE FEEDBACK DACS - A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator. | 02-04-2010 |
20100026539 | Signal Processing Device, Signal Processing Method, and Signal level Display Device - A signal processing device includes a bit-pattern output unit and a look-up table storage unit which are configured as follows: The bit-pattern output unit is provided for receiving input 1-bit digital signals generated by ΔΣ modification and aligning bits of the input 1-bit digital signals in a chronological order to output parallel bit pattern. The look-up table storage unit is provided for storing a look-up table that represents a relationship between the bit patterns output from the bit pattern output unit and resulting values of a filtering arithmetic operation on the basis of the bit patterns. In the signal processing device, the bit patterns output from the bit-pattern output unit are provided as indexes. The indexes are referenced to output the resulting values of the filtering arithmetic operation corresponding to the bit patterns listed in the look-up table stored in the look-up table storage unit. | 02-04-2010 |
20100045498 | FULLY DIFFERENTIAL DELTA SIGMA MODULATOR - A fully differential delta sigma modulator is provided. The fully differential delta sigma modulator has an integrator in which a comparator replaces an operational amplifier for decreasing power consumption. The integrator extends to a fully differential implementation with the addition of a common-mode feedback circuit for improving equivalent input and signal-to-noise ratio. | 02-25-2010 |
20100045499 | ASYNCHRONOUS SIGMA-DELTA DIGITAL-ANALOG CONVERTER - An asynchronous sigma delta digital to analog converter for converting a digital input signal into an analog output signal, the digital to analog converter having an asynchronous sigma delta modulator having a low pass filter and a comparator and being supplied with the digital input signal, and a clock sample unit adapted to sample a signal processed by the comparator based on a clock signal, thereby generating the analog output signal. | 02-25-2010 |
20100045500 | SIGNAL CONVERSION USING FINITE IMPULSE RESPONSE FEEDBACK - Disclosed are techniques for reducing noise and providing conversion signals in electronic components, including pulse width modulation (PWM) oversampling converters, by performing signal conversion having finite impulse response (FIR) feedback. Implementations may reduce the sensitivity of the conversion process to jitter in the sampling clock, thereby reducing noise and providing conversion signals. | 02-25-2010 |
20100052959 | CONTINUOUS-TIME SIGMA-DELTA MODULATOR USING DYNAMIC ELEMENT MATCHING HAVING LOW LATENCY AND DYNAMIC ELEMENT MATCHING METHOD THEREOF - In a continuous-time sigma-delta modulator, by using dynamic element matching (DEM) with respect to comparators of a quantizer, or by generating a plurality of candidate DEM results in advance for selecting an approximate DEM result, a time slot for DEM operations in each cycle of a sampling signal is significantly increased without being rushed. | 03-04-2010 |
20100052960 | DUAL DATA WEIGHTED AVERAGE DYNAMIC ELEMENT MATCHING IN ANALOG-TO-DIGITAL - Methods and systems to provide dynamic element matching (DEM) in multi-phase sample systems include multiple uncorrelated, dual data weighted averaging, dynamic element matching (DDWA DEM). DDWA DEM may be implemented in a multiple-phase sample system in which sample paths and feedback paths share capacitances. Compensation feedback is apportioned amongst corresponding banks of capacitive sample circuits to utilize the capacitive sample circuits within each bank substantially equally over multiple sample cycles. The apportioning is substantially un-correlated between banks, which may reduce in-band quantization noise folding. DDWA DEM may be implemented within a digital-to-analog converter (DAC), in a delta-sigma modulator. | 03-04-2010 |
20100052961 | DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER - A ΔΣ analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode. | 03-04-2010 |
20100052962 | POLYPHASE ELECTRIC ENERGY METER - A polyphase electric energy meter comprises a microcontroller with a front end that converts analog current input signals and analog voltage input signals to digital current and voltage samples for processing by the microcontroller. The front end includes separate input channels, each for one of the current input signals with a sigma-delta modulator followed by a decimation filter. The front end further includes a common input channel for all voltage input signals with a multiplexer, an analog-to-digital converter and a de-multiplexer. The separate input channels and the common input channel provide the digital current and voltage samples for processing by the microcontroller. | 03-04-2010 |
20100066577 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER - An exemplary continuous-time delta-sigma analog-to-digital converter includes a loop filter, a quantizer, a dynamic element matching circuit, a latch, and a digital-to-analog converter (DAC). The loop filter contains a plurality of integrators coupled in series, including a first integrator and a second integrator; a first positive feedback resistive element, placed in a first positive feedback path between a first output node of the second integrator and a first input node of the first integrator; and a first negative feedback resistive element, placed in a first negative feedback path between a second output node of the second integrator and the first second input node of the first integrator. The quantizer is implemented using a domino quantizer. The DAC contains a plurality of DAC units each having a capacitive device, a resistive device, and a switch device coupled between the capacitive device and the resistive device. | 03-18-2010 |
20100066578 | BANDPASS MULTI-BIT SIGMA-DELTA ANALOG TO DIGITAL CONVERSION - Examples of a system and method for sigma-delta analog-to-digital conversion of an electrical input signal are disclosed. A bandpass-filtered signal based on an electrical input signal and an analog feedback signal may be provided. A multi-bit digital representation of the bandpass-filtered signal may be provided. An analog representation of the multi-bit digital representation may be provided. A return-to-zero (RTZ) carving operation may be performed on the analog representation to obtain the analog feedback signal. | 03-18-2010 |
20100079324 | SIGMA-DELTA CONVERTER NOISE CANCELLATION - Embodiments provide apparatuses, systems, and methods to convert an analog signal input into a sigma-delta digital output at a high sampling rate and correct for noise components of the digital output. An analog filter coupled to a sigma-delta converter accepts a noise-shaped analog signal from the sigma-delta converter to attenuate signal components of the noise-shaped analog signal at a plurality of folding frequencies associated with a sampling rate of a low-speed Analog-To-Digital (ADC) to produce a filtered output. The low-speed ADC is coupled to an output of the analog filter and samples the filtered output of the analog filter at a sampling rate slower than the high sample rate to output an ADC digital output. Other embodiments may be described and claimed. | 04-01-2010 |
20100085228 | SEMICONDUCTOR DEVICE HAVING AE MODULATOR, AND SEMICONDUCTOR SYSTEM - A semiconductor device comprises an overflow detection circuit ( | 04-08-2010 |
20100097255 | Temperature Compensated Delta-Sigma Modulators with Logarithmic Dynamic Range - Disclosed herein is a delta sigma (ΔΣ or DS) modulator and method for operating the same, the modulator including at least a first proportional to absolute temperature (PTAT) element that conditions an input signal, and a second PTAT element that conditions a reference signal. | 04-22-2010 |
20100097256 | Apparatus for and Method of Performing an Analog to Digital Conversion - An analog to digital converter adapted to perform a first, more significant, part of a conversion as a successive approximation conversion, a pipeline conversion or a flash conversion and a second, least significant, part of a conversion as a sigma-delta conversion. | 04-22-2010 |
20100097257 | SIGMA-DELTA CONVERSION CIRCUIT SUITABLE FOR PHOTOCURRENT MEASUREMENT APPLICATIONS - A sigma-delta converter suitable for measuring a photocurrent comprises an input node adapted to receive a current to be measured (I | 04-22-2010 |
20100103012 | Multi-Stage Resettable Sigma-Delta Converters - A resettable multi-stage sigma-delta analog-to-digital (A/D) converter enables a sampled analog signal to be resolve with fewer cycles than a resettable single sigma-delta A/D converter. The resettable multi-stage converter includes a cascade of at least two resettable sigma-delta loops having a total number of integrators and an allocation of delays, a digital decimation filter, the digital decimation filter being coupled to the at least two resettable sigma-delta loops and the digital decimation filter includes a cascade of integrators, a number of the integrators in the cascade of integrators for the decimation filter being equal to the total number of integrators in the cascade of at least two resettable sigma-delta loops and an allocation of delays in the cascade of integrators being equal to the allocation of delays in the cascade of at least two resettable sigma-delta loops, a plurality of A/D converters having a resolution that is less than a resolution of the resettable multi-stage sigma-delta A/D converter, a plurality of digital-to-analog (D/A) converters, the plurality of A/D converters and the plurality of D/A converters coupling the cascade of at least two resettable sigma-delta loops to the digital decimation filter, and a reset line coupled to the integrators in the cascade of integrators for the at least two resettable sigma-delta loops and coupled to the integrators in the cascade of integrators for the digital decimation filter. | 04-29-2010 |
20100103013 | Method and Apparatus for Dithering in Multi-Bit Sigma-Delta Digital-to-Analog Converters - A multi-bit (M-bit, M>1) Sigma-Delta digital-to-analog converter (DAC) with a variable resolution multi-bit quantizer that has its digital value inputs that are truncated or rounded to a resolution that follows a random or pseudo-random sequence to provide automatic dynamic dithering for removing undesired idle tones in the analog output of the Sigma-Delta DAC. Random numbers N(n) between 1 and M are provided, and M−N(n) least significant bits in each M-bit digital value at the output of the quantizer are forced to zero with a digital truncator or rounder. The random numbers N(n) may be provided by a random or pseudo-random sequence generator, e.g., Galois linear feedback shift register in combination with digital comparators and an adder. | 04-29-2010 |
20100103014 | Multi-Level Feed-Back Digital-To-Analog Converter Using A Chopper Voltage Reference For A Switched Capacitor Sigma-Delta Analog-To-Digital Converter - A multi-bit digital-to-analog converter has a reference voltage generator generating a reference voltage with an offset voltage; a switched capacitor stage for generating a plurality of output voltages; and a switching sequencer controlling the switched capacitor stage operable to generate switching patterns for each output voltages, wherein each pattern has a charge phase and a transfer phase, and wherein for at least one output voltage the switching sequencer provides two switching patterns wherein each switching pattern contributes an offset of opposite polarity. | 04-29-2010 |
20100103015 | DIFFERENTIAL AMPLIFIER CIRCUIT AMPLIFYING DIFFERENTIAL SIGNALS WITH SELECTIVELY SWITCHING BETWEEN DIFFERENTIAL SIGNALS AND AD CONVERTER APPARATUS - A differential amplifier circuit is provided with an operational amplifier and a modulator. The operational amplifier includes a feedback capacitance, and amplifies an analog input signal and outputs an amplified analog output signal. The modulator is connected to a virtual ground point of an input terminal of the operational amplifier, and the modulator switches between a pair of inputted analog differential signals to alternately select one of the analog differential signals based on a predetermined modulation control signal, and outputs a selected analog differential signal. The differential amplifier circuit alternately folds and amplifies the analog input signal within a predetermined input level limit range to generate a signal having different polarities sequentially so as to start from a voltage potential of the virtual ground point at a timing of the modulation control signal. In addition, an converter apparatus is provided with the differential amplifier circuit. | 04-29-2010 |
20100109925 | SIGNAL PROCESSOR WITH ANALOG RESIDUE - In one or more embodiments, an apparatus and method for processing an analog signal into a digital signal includes a quantizer that converts the analog signal, which can have any value within a given range of values, into a fixed set of discrete values. An analog residue, i.e. the quantization error caused by the difference between the analog value of the integrated analog signal and the closest corresponding discrete quantized value, is outputted. The analog residue can be further processed to increase the accuracy of the A/D conversion. Multiple quantizer stages can be provided to perform A/D conversion of the analog signal over multiple integration periods, e.g. in multi-shot and time-delay integration applications. The analog signal may represent an image signal. | 05-06-2010 |
20100117881 | K-Delta-1-Sigma Modulator - A K-Delta-1-Sigma modulator filters or integrates (Sigma) the difference (Delta) between K-feedback paths and an input signal. By using K-feedback paths the topology enables sample rates that are K times the clock frequency of any one feedback path. The sigma block can be implemented in a number of ways including an active or passive integrator or a filter with specific characteristics. When implemented as an integrator, the sigma block is common to all the feedback paths, so that the modulation noise is pushed to a portion of the spectrum where it can be reduced by filtering. The delta block can be implemented in a number of ways including analog adders or switched capacitors. | 05-13-2010 |
20100149012 | SYSTEM AND METHOD FOR AREA-EFFICIENT THREE-LEVEL DYNAMIC ELEMENT MATCHING - A system for converting digital signals into analog signals using sigma-delta modulation and includes a signed thermometer encoder for converting a plurality of signed binary data received at the encoder into a plurality of signed thermometer data and a rotational dynamic element matching (DEM) arrangement for receiving the plurality of signed binary data and the plurality of signed thermometer data. The rotational DEM arrangement further includes a first barrel shifter for receiving a positive thermometer data at a cycle, the first barrel shifter having a first pointer indicating a starting position of next positive thermometer data, and a second barrel shifter for receiving a negative thermometer data at a cycle, the second shifter having a second pointer indicating a starting position of next negative thermometer data, wherein the first pointer is circularly shifted as a function of positive binary data and the second pointer is circularly shifted as a function of negative binary data. | 06-17-2010 |
20100149013 | System And Method For Common Mode Translation - System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels. | 06-17-2010 |
20100156686 | PULSE GENERATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR - Provided is a clock generator employed in a continuous-time sigma-delta modulator. The clock generator includes an oscillator configured to generate pulses in response to an enable signal, a counter configured to count the number of pulses generated by the oscillator and output the total pulse count, and an output circuit configured to output an inactivated output signal if the pulse count of the counter is equal to a pulse-width control bit. The oscillator includes an astable multi-vibrator. Since the astable multi-vibrator capable of generating a low-jitter pulse from a jittered clock is used as the oscillator, a signal-to-noise ratio is improved. A simple configuration using only digital circuits makes it easier to design a circuit and adjust pulse width. Moreover, according to the structure of the astable multi-vibrator, it is possible to design a circuit to optimally modulate pulse width in connection with process variations of resistors and capacitors used in the continuous-time sigma-delta modulator. | 06-24-2010 |
20100156687 | CONTROL APPARATUS FOR A LOAD SUPPLY DEVICE - A control apparatus for a supply device of a load, the supply device is of switching type and connected between a supply voltage and a reference voltage, the apparatus including a sigma-delta device having an input terminal at which is present a first digital signal and adapted to provide a pulse-density modulation signal at the output terminal; the sigma-delta device including a feedback circuit capable of sending to the input terminal of the sigma-delta device a second digital signal whose value depends on the value of the output signal, and the apparatus including a device capable of digitalizing the supply voltage and of providing a further digital signal. The feedback circuit includes a terminal capable of receiving the further digital signal, and the sigma-delta device having a gain such that the output digital signal is proportional to the inverse of the further digital signal. | 06-24-2010 |
20100164773 | ELECTRONIC DEVICE AND INTEGRATED CIRCUIT COMPRISING A DELTA-SIGMA CONVERTER AND METHOD THEREFOR - An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter in a forward path and a digital-to-analog converter in a feedback path such that the ADC is arranged to receive samples of an analog input signal. The ADC is operably coupled to auto-ranging logic arranged to shift a digital output signal from the ADC representative of the analog input signal to counteract an effect of an input variation of the analog input signal. In this manner, the application of auto-ranging logic with a self-recovery technique supports a reduction of the number of comparators required in a multi-bit delta-sigma ADC. | 07-01-2010 |
20100164774 | TIME-INTERLEAVED DELTA-SIGMA MODULATOR - Embodiments of the present disclosure provide methods, systems, and apparatuses related to a time-interleaved delta-sigma modulator are described. Other embodiments may be described and claimed. | 07-01-2010 |
20100164775 | DIGITAL-ANALOG CONVERSION DEVICE AND METHOD FOR THE DIGITAL-ANALOG CONVERSION - A digital-analog conversion circuit, a method for the digital-analog conversion and a source driver are disclosed. A digital-analog conversion circuit may include a latch for storing N bit digital data therein, and a digital-analog converter, for performing a first digital-analog conversion on predetermined bits out of the N bit data stored in the latch by using R-string conversion, and for performing a second digital-analog conversion based on a result of the first digital-analog conversion and all remaining bits of the N bit data, excluding the predetermined bits. | 07-01-2010 |
20100164776 | SOURCE DRIVER IN DISPLAY - A source driver in a display may include a latch capable of latching input data received from a timing controller in a display, a delta-sigma digital-to-analog converter configured to convert the input data stored in the latch to an analog signal by delta-sigma modulation, and an output buffer configured to output a column drive signal by buffering the analog signal received from the delta-sigma digital-to-analog converter. Accordingly, a source driver in a display modulates input data of 10-bit or higher by delta-sigma modulation with high accuracy, and then converts the data to an analog signal. Therefore, although an area occupied by the source driver of embodiments becomes smaller than that occupied by the related art source driver with a high resolution of 10-bits or higher, a display panel can provide an image of high resolution. | 07-01-2010 |
20100171644 | Analog digital converters and image sensors including the same - The analog-digital converter (ADC) includes a modulator and a digital integrator. The modulator is configured to modulate an input signal and output a modulated signal. The digital integrator includes a plurality of accumulators serially connected to one another. The digital integrator is configured to integrate the modulated signal to output an integration result. | 07-08-2010 |
20100194612 | SWITCHED-CAPACITOR CIRCUITS, INTEGRATION SYSTEMS, AND METHODS OF OPERATION THEREOF - Embodiments include integrator systems, switched-capacitor circuits, and methods of their operation. An integrator system comprises a differential amplifier and first and second sampling modules. The first sampling module includes a first capacitor and a first set of switches. The first set of switches changes a connection status between the first capacitor and first and second amplifier input terminals when a change in a polarity of a differential input signal does not occur between consecutive switching cycles, and refrains from changing the connection status when the change in the polarity does occur. The second sampling module includes a second capacitor and a second set of switches. The second set of switches changes a connection status between the second capacitor and the first and second amplifier input terminals when the change in the polarity does occur, and refrains from changing the connection status when the change in the polarity does not occur. | 08-05-2010 |
20100194613 | METHOD AND APPARATUS FOR ANALOG-TO-DIGITAL CONVERSION USING ASYNCHRONOUS SIGMA-DELTA MODULATION - The solution according to the invention consisting in the modulation of the analog signal using the asynchronous Sigma-Delta modulator, counting periods of the reference clock during each pulse of the previously obtained square wave and making the digital word available is characterized in that the square wave (z(t)) obtained in result of the modulation in the asynchronous Sigma-Delta modulator (ASDM) is subjected to conversion by counting the periods (T | 08-05-2010 |
20100201555 | METHOD OF CYCLICALLY CONVERTING AN ANALOG SIGNAL TO A MULLTI-BIT DIGITAL SIGNAL AND CONVERTER FOR PERFORMING THE METHOD - Method and arrangement for cyclically AD converting an analog signal with a sampler capacitance and an integrator capacitance, comprising the steps of generating a difference signal multiplied by the ratio of said capacitances from the analog signal and a reference signal, deriving a digital bit from said difference signal, doubling the difference signal multiplied by said ratio, shifting said doubled signal by the reference signal multiplied by said ratio and using the shifted signal as difference signal multiplied by said ratio for the next cycle. | 08-12-2010 |
20100207795 | DISCRETE-TIME CIRCUIT - To reduce a random noise power included in an analog input signal, a discrete-time circuit samples an inputted analog signal a plurality of number of times at different times respectively and performs averaging processing on sampling results, thus enabling to respond appropriately even if an input signal has a high frequency without increasing a size of the circuit. | 08-19-2010 |
20100214142 | DELTA SIGMA A/D MODULATOR - A multibit quantizer is provided, at its input terminals, with a variable gain circuit and an offset addition circuit to perform tracking control in which for each sampling time, the level of an offset signal of the offset addition circuit is adjusted based on output digital data of an output processing circuit and the preceding control signal of an offset control circuit so that the quantizer operates without causing a saturation operation. As a result, the output digital data, in which the number of bits is greater than the number of bits of the quantizer by the offset value controlled by the offset addition circuit, is outputted from the output processing circuit for each sampling time. | 08-26-2010 |
20100214143 | deltasigma MODULATION CIRCUIT AND SYSTEM - A ΔΣ modulation circuit that includes a first integrator and second integrator coupled in series, a quantizer coupled to an output of the second integrator, a delay device disposed in a feedback path from an output of the quantizer to an input of the first and second integrators, an adder which generates a difference between an output and an input of the quantizer, and a feedback circuit including a delay device which couples an output of the adder to an output of one of the first and second integrators. | 08-26-2010 |
20100219997 | CONTINUOUS-TIME SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH CAPACITOR AND/OR RESISTANCE DIGITAL SELF-CALIBRATION MEANS FOR RC SPREAD COMPENSATION - A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) comprising at least one combiner (C | 09-02-2010 |
20100219998 | SIGMA-DELTA MODULATOR WITH DIGITALLY FILTERED DELAY COMPENSATION - Apparatus are provided for continuous-time sigma-delta modulators. The sigma-delta modulator comprises an input node for an input signal and a quantizer configured to convert an analog signal to a digital value. A main feedback arrangement is coupled to the quantizer and configured to delay the digital value by a first delay period and generate a main feedback signal by digitally filtering the first delayed value. A compensation feedback arrangement is coupled to the quantizer and configured to delay the digital value by a second delay period, wherein the second delay period is not influenced by the first delay period, and generate a compensation feedback signal by digitally filtering the second delayed value. A forward signal arrangement produces the analog signal based on the input signal, the main feedback signal, and the compensation feedback signal. | 09-02-2010 |
20100219999 | CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH MULTIPLE FEEDBACK PATHS HAVING INDEPENDENT DELAYS - Apparatus are provided for continuous-time sigma-delta modulators. A sigma-delta modulator comprises a quantizer configured to convert an analog signal to a digital value. A main feedback arrangement is coupled to the quantizer, and the main feedback arrangement delays the digital value by a first delay period and generates a main feedback signal based on the delayed value. A compensation feedback arrangement is coupled to the quantizer, and compensation feedback arrangement delays the digital value by a second delay period and generates a compensation feedback signal based on the delayed value. A forward signal arrangement produces the analog signal at the quantizer based on an input signal, the main feedback signal, and the compensation feedback signal. The second delay period is independent of and is not influenced by the first delay period, and the second delay period is chosen such that the compensation feedback signal compensates for the first delay period. | 09-02-2010 |
20100225517 | Delta-Sigma Modulator - The present invention provides a continuous-time delta-sigma modulator which is configured with an SC (SCR) feedback DA ( | 09-09-2010 |
20100245144 | SIGMA-DELTA MODULATOR INCLUDING TRUNCATION AND APPLICATIONS THEREOF - A multi-stage sigma-delta modulator including bit truncation between stages. The bit truncation reduces the number of bits that must be processed in subsequent stages and thus allows for faster response times. In some embodiments the gain of a feedback loop is selected to compensate for the bit truncation such that the sigma-delta modulator operates in a stable state. | 09-30-2010 |
20100253560 | Electronic apparatus, AD converter, and AD conversion method - An electronic apparatus includes: an AD conversion section that has a comparing section, which receives a reference signal whose level changes gradually from a reference signal generating section that generates the reference signal and which compares the reference signal with an analog signal to be processed, and a counter section, which receives a count clock for AD conversion and performs a count operation on the basis of a comparison result of the comparing section, and that acquires digital data of the signal to be processed on the basis of output data of the counter section; a count operation period control section that controls an operation period of the counter section in each processing period on the basis of the comparison result of the comparing section; and a driving control section that controls the reference signal generating section and the AD conversion section. | 10-07-2010 |
20100259431 | SYSTEM AND METHOD FOR BANDPASS SIGMA-DELTA MODULATION - The present invention relates broadly to a system and method for bandpass sigma-delta modulation. The continuous time bandpass sigma-delta modulator comprises an electromechanical filter, a quantizer coupled to an output from the electromechanical filter; and a feedback circuit coupled between an output from the quantizer and an input of the electromechanical filter. | 10-14-2010 |
20100277355 | Dynamic element matching digital/analog conversion system and sigma-delta modulator using the same - A dynamic element matching sigma-delta modulator includes an adder to receive an analog input signal and a feedback signal to generate an error signal; a loop filter to generate a filtered signal according to the error signal; a quantizer to change the filtered signal into a quantized output signal; a digital/analog converter (DAC) having a plurality of digital/analog elements to generate the feedback signal corresponding to the quantized output signal; and a dynamic element matching device to receive the quantized output signal to accordingly set an element of the DAC to be a previous non-participant element and the other elements to be previous participant elements, and reselects participant elements according to the quantized output signal and the previous participant elements for further generating the feedback signal corresponding to the quantized output signal. | 11-04-2010 |
20100283648 | DeltaSigma Modulator - Disclosed herein is a ΔΣ modulator including: at least one integrator; a quantizer for quantizing a signal output by the integrator and outputting the quantized signal as a digital signal; and a compensation section configured to compensate the ΔΣ modulator for a non-ideal characteristic caused by an internal loop delay, wherein the compensation section is a feedback path formed to start at the output node of the quantizer and end at the input node of the integrator immediately preceding the quantizer, and the feedback path formed to start at the output node of the quantizer and end at the input node of the integrator realizes a frequency-independent part in combination with the integrator and an internal DA converter which adopts the NRZ technique to suppress the signal amplitude at the quantizer input. | 11-11-2010 |
20100283649 | Sigma-delta-based analog-to-digital converter - An analog to digital converting device is proposed for generating a digital output signal of an RF analog input signal. The device comprises a first analog to digital converter stage, a mixer, a second analog to digital converter stage and a digital filter. The first analog to digital converter stage generates a first and a second output signal. The first output signal is inputted in the filtering means. The second output signal is being down-converted to a signal with an intermediate frequency or DC. Thereafter, this down-converted signal is being fed to the second analog to digital converter stage. The digital output signal of this second stage is further processed together with the first digital output signal in the digital filter to a digital signal representative of the analog input signal. | 11-11-2010 |
20100283650 | MULTI-BIT SIGMA-DELTA MODULATOR WITH REDUCED NUMBER OF BITS IN FEEDBACK PATH - A sigma-delta modulator ( | 11-11-2010 |
20100289682 | SIGMA-DELTA CONVERTERS AND METHODS FOR ANALOG-TO-DIGITAL CONVERSION - A switched capacitor sigma-delta modulator or another analog-to-digital converter (ADC) uses chopper stabilization. Chopping clock transitions are performed during non-active periods of the sampling clock phases, reducing disturbance of the circuit caused by chopping and increasing the time available for settling of the circuit given a particular sampling frequency. An asynchronous state machine may govern sampling and chopping clock transitions. In embodiments, inactive transition of a first sampling clock causes inactive transition of a second chopping clock, which in turn causes active transition of a first chopping clock. The next inactive transition of the first sampling clock causes inactive transition of the first chopping clock, which causes an active transition of the second chopping clock. | 11-18-2010 |
20100295715 | Jitter Insensitive Sigma-Delta Modulator - A sigma-delta modulator for forming a digital output signal representative of a voltage level of an input signal, the sigma delta modulator having a node arranged to receive a current flow that is representative of the voltage level of the input signal and on whose voltage the digital output signal is dependent, the sigma-delta modulator comprising a plurality of capacitive elements for smoothing the current flow, each capacitive element being connected at one end to the node and at its other end to a respective switch unit and a plurality of switch units, each switch unit being arranged to connect the respective one of the capacitive elements to either a first voltage level or a second voltage level in dependence on the voltage at the node so as to provide feedback that affects the voltage at the node. | 11-25-2010 |
20100315274 | Current- mode sigma-delta digital-to-analog converter - In general, this disclosure is directed to a differential current-mode sigma-delta digital-to-analog converter (SD DAC) with improved accuracy and reduced offset and gain errors. In one example, the SD DAC may include a current source configured to provide a differential current. The SD DAC may further include a switching network configured to adjust a polarity of the differential current according to a bit within the bit-stream to produce a differential current signal. The SD DAC may further include a current-to-voltage converter configured to convert the differential current signal to a differential voltage signal. In additional examples, the differential current source may include one or more source degeneration resistances. In further examples, the current-to-voltage converter may include a fully-differential operational amplifier. A low pass filter may be included within the current-to-voltage converter and/or coupled to the output of the current-to-voltage converter. | 12-16-2010 |
20100315275 | DELTA SIGMA MODULATION DIGITAL-ANALOG CONVERTER, DIGITAL SIGNAL PROCESSING METHOD, AND AV DEVICE - A ΔΣ modulation digital-analogue converter of the present invention includes: a look-up table in which a correspondence relationship between each of a plurality of possible input values of an input signal externally supplied, and each of compensation values individually associated with the possible input values, are stored; and a nonlinear compensation circuit ( | 12-16-2010 |
20100321220 | 1-BIT CELL CIRCUIT USED IN A PIPELINED ANALOG TO DIGITAL CONVERTER - The present invention discloses a 1-bit cell circuit used in a pipelined analog to digital converter. The 1-bit cell circuit comprises a reference buffer for providing a reference voltage; a sample and charge transfer circuit for receiving an input signal to generate an output signal; and a dump circuit for dumping said reference voltage; wherein said reference buffer selectively connects to one of said sample and charge transfer circuit and said dump circuit according to said input signal. | 12-23-2010 |
20100321221 | SIGMA DELTA CONVERTER SYSTEM AND METHOD - A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer. | 12-23-2010 |
20100321222 | Sigma-Delta Modulator Including Truncation and Applications Thereof - A multi-stage sigma-delta modulator including bit truncation between stages. The bit truncation reduces the number of bits that must be processed in subsequent stages and thus allows for faster response times. In some embodiments, the gain of a feedback loop is selected to compensate for the bit truncation such that the sigma-delta modulator operates in a stable state. | 12-23-2010 |
20100328124 | CURRENT STEERING DIGITAL-TO-ANALOG CONVERTER - A digital to analog converter (DAC) module receives an input digital signal having a first data rate and is associated with a first frequency, the DAC module also receiving a synchronization signal having a second frequency that is higher than the first frequency. The DAC module includes an up-sampling circuit to generate a first digital signal having bit values of the input digital signal alternating with zero values, the first digital signal having a data rate that is higher than the first data rate; a delay circuit to delay the first digital signal by a time period to generate a second digital signal; a first DAC cell to generate a first analog signal based on the first digital signal, the first DAC cell being synchronized by the synchronization signal; a second DAC cell to generate a second analog signal based on the second digital signal, the second DAC cell being synchronized by the synchronization signal; and an adder to sum the first and second analog signals and generate a third analog signal. | 12-30-2010 |
20100328125 | Sampling/Quantization Converters - Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one representative embodiment, an apparatus includes multiple quantization-noise-shaping continuous-time filters, each in a separate processing branch and having an adder that includes multiple inputs and an output; an input signal is coupled to one of the inputs of the adder; the output of the adder is coupled to one of the inputs of the adder through a first filter; and the output of a sampling/quantization circuit in the same processing branch is coupled to one of the inputs of the adder through a second filter, with the second filter having a different transfer function than the first filter. | 12-30-2010 |
20110001646 | Emulation of Analog-to-Digital Converter Characteristics - Described herein is a system and method of emulating characteristics of an output signal of a first analog-to-digital converter by a second analog-to-digital converter employing signal processing. A signal processing module may receive a digital signal from the first analog-to-digital converter and alter the digital signal to define an altered digital signal such that the altered digital signal emulates a second digital signal that is characteristic of the second analog-to-digital converter, the second analog-to-digital converter differing from the first analog-to-digital converter. | 01-06-2011 |
20110006936 | ALL-DIGITAL SPREAD SPECTRUM CLOCK GENERATOR - An embodiment of the invention relates to an all-digital spread spectrum clock generator comprising a phase detector, a time-to-digital converting unit, a digital loop filter, a delta-sigma modulator and a digital controlled oscillator. The phase detector receives a reference signal and a clock feedback signal to output first and second difference signals. The time-to-digital converting unit comprises timing amplifier to receive and amply the first and second difference signals to generate digital data. The digital loop filter receives and accumulates digital data to output first and second digital data. The delta-sigma modulator receives the second digital data to generate a resolution tuning word. The digital controlled oscillator adjusts its frequency of output clock signal according to the first difference signal, the second difference signal and the first digital data, and adjusts a resolution of the digital controlled oscillator according to the resolution tuning word. | 01-13-2011 |
20110006937 | Delta-Sigma-Delta Modulator - An Analog-to-Digital Converter (ADC) is provided. An embodiment of the ADC includes a modified Delta modulator including a digital feedback loop, and a digital Sigma-Delta modulator configured within the feedback loop. Embodiments of the invention provide analog functionality with all the benefits of a digital design process as well as various other advantages provided by a Delta-Sigma-Delta modulator configuration. | 01-13-2011 |
20110006938 | SIGMA-DELTA MODULATOR APPARATUS AND METHOD OF GENERATING A MODULATED OUTPUT SIGNAL - A discrete time sigma-delta modulator apparatus for class-D operation comprises a feed-forward path having an input at one end thereof and an output at another end thereof. A first summation unit is coupled in the feed-forward path to a first integrator. A quantizer is coupled in the feed-forward path after the first integrator and a feedback path arrangement is coupled to an input of the first summation unit. A low pass filter is arranged in the feedback path arrangement so as only to drive the first integrator. | 01-13-2011 |
20110012765 | COMPARATOR FOR A PIPELINED ANALOG-TO-DIGITAL CONVERTER AND RELATED SIGNAL SAMPLING METHOD - A comparator for a pipelined ADC includes a sampling circuit coupled to a plurality of differential input voltages and a plurality of differential reference voltages, for sampling the plurality of differential input voltages according to a first clock signal and sampling the plurality of differential reference voltages according to a second clock signal, a preamplifier coupled to the sampling circuit comprising a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, for amplifying a voltage across the positive input terminal and the negative input terminal for generating a plurality of differential output voltages, and a latch circuit coupled to the preamplifier for latching the plurality of differential output voltages. | 01-20-2011 |
20110012766 | MULTI-BIT SIGMA-DELTA MODULATOR WITH REDUCED NUMBER OF BITS IN FEEDBACK PATH - A sigma-delta modulator for an ADC, passes an input signal to a loop filter, then to a multi-bit quantizer of the modulator. An output of the quantizer is passed to a digital filter, and a feedback signal is passed back to the loop filter, the feedback signal having fewer bits than are produced by the multi-bit quantizer. The digital filter has an order greater than one in the passband of the sigma-delta modulator. | 01-20-2011 |
20110012767 | 2-Phase Gain Calibration And Scaling Scheme For Switched Capacitor Sigma-Delta Modulator - A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal. | 01-20-2011 |
20110012768 | DELTA-SIGMA ANALOGUE-TO-DIGITAL CONVERTERS - A feed-forward structure for a delta-sigma analogue-to-digital converter, the structure comprising at least one modified integrator, wherein the or each modified integrator includes a resistive element connected in series with the capacitive element that is connected between the input and output of the modified integrator's amplifying means. | 01-20-2011 |
20110018752 | FLASH A/D CONVERTER, FLASH A/D CONVERSION MODULE, AND DELTA-SIGMA A/D CONVERTER - In a flash A/D converter, a predictor predicts next analog input data based on a digital output signal from an A/D converter, and outputs prediction data. Based on the prediction data from the predictor, a controller turns on comparators having reference voltages near the prediction data, and in order to ensure a certain degree of A/D conversion accuracy even when the prediction fails, also turns on even-numbered comparators | 01-27-2011 |
20110025537 | ACTIVE RESISTANCE-CAPACITOR INTEGRATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH GAIN CONTROL FUNCTION - Provided are an active resistance-capacitance (RC) integrator and a continuous-time sigma-delta modulator, which have a gain control function. The active RC integrator includes an amplifier, a first base resistor connected between a first input node and a positive input port of the amplifier, a second base resistor connected between a second input node and a negative input port of the amplifier, a first resistor unit connected between the second input node and the positive input port of the amplifier, and a second resistor unit connected between the first input node and the negative input port of the amplifier. A resistor network including resistors and switches is configured to vary an input resistance, so that an active RC integrator may have a gain control function. | 02-03-2011 |
20110032132 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERSION APPARATUS AND METHOD THEREOF - A delta-sigma analog-to-digital conversion apparatus for receiving an analog input signal to generate a digital output signal includes a subtracting unit, a quantizer, and a feedback unit. The subtracting unit is utilized for performing a subtraction function to generate a subtracted signal according to the analog input signal and a feedback signal. The quantizer is coupled to the subtracting unit and utilized for performing quantization to generate a quantized signal according to the subtracted signal. The feedback unit is coupled between the subtracting unit and the quantizer, and utilized for providing the feedback signal to the subtracting unit according to the quantized signal. The subtracting unit is arranged to reduce signal input swing of the quantizer. | 02-10-2011 |
20110043398 | CASCADED DAC ARCHITECTURE WITH PULSE WIDTH MODULATION - An embodiment of the invention provides one or more cascade circuits that are cascaded together to form a cascaded circuit. The cascaded circuit reduces noise at an analog output of the cascaded circuit. Each of the cascade circuits contains a noise-shaping circuit, a PCM (Pulse Code Modulation)-to-PWM (Pulse Width Modulation) converter and a 1-bit P-tap AFIR (Analog Finite Impulse Response) filter DAC. Noise at the output of the cascaded circuit may be further reduced by increasing the number of cascade circuits. | 02-24-2011 |
20110050471 | Use of Three Phase Clock in Sigma Delta Modulator to Mitigate the Quantization Noise Folding - A differential sigma delta modulator operates by modulating an input signal by intermittently coupling a reference signal to the input signal using one or more switches controlled by one or more feedback signals and a respective one or more non-overlapping clock signals. The modulated input signal is integrated using an integration capacitor to form an integrated value and the integrated value is compared to a threshold to form the one or more feedback signals. Parasitic capacitance of the one or more switches is initialized to an initial value prior to each intermittent coupling of the reference signal to the input signal using another non-overlapping clock signal. | 03-03-2011 |
20110050472 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER (ADC) HAVING A SERIALIZED QUANTIZER OUTPUT - A delta-sigma analog-to-digital converter (ADC) having a serialized quantizer output has a data rate greater than a quantization rate of the delta-sigma modulator, but less than a bit rate determined by the product of the number of bits required to represent the input to a feedback digital-to-analog converter and the quantization rate. Additional information can be encoded in the serial bit stream by selection among redundant codes based on the value of the additional information. The serial bit stream may encode differences between successive quantizer output samples and the additional information may include the absolute value of the quantizer output, synchronization information and/or framing information for distinguishing data corresponding to multiple ADC input channels. | 03-03-2011 |
20110050473 | Analog-to-digital converters, and image sensors and image processing devices having the same - An analog-digital converter (ADC) includes a correlated double sampling (CDS) circuit configured to perform CDS on each of a reset signal and an image signal output from a pixel to generate a correlated double sampled reset signal and a correlated double sampled image signal, respectively. A delta sigma (ΔΣ) ADC, also included in the ADC, is configured to output a difference between a first digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled reset signal and a second digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled image signal. | 03-03-2011 |
20110050474 | METHOD AND CIRCUIT FOR CALIBRATING PHASE, AND SIGNAL PROCESSING APPARATUS HAVING THE SAME - A method for calibrating a phase include comparing a phase of an in-phase output signal and a phase of a quadrature-phase output signal and generating a digital code corresponding to a comparison result, and controlling the phase of the in-phase output signal in response to quadrature-phase differential input signals and the digital code, and controlling the phase of the quadrature-phase output signal in response to in-phase differential input signals and the digital code, to make a phase difference between the in-phase output signal and the quadrature-phase output signal 90°. | 03-03-2011 |
20110057824 | Analog-to-digital converter having output data with reduced bit-width and related system and method - A circuit includes an analog-to-digital converter configured to receive an analog input signal and generate first digital values at a first sampling rate. The first digital values have a first bit-width. The circuit also includes an interpolator configured to receive the first digital values and generate second digital values at a second sampling rate higher than the first sampling rate. The second digital values have a second bit-width equal to or greater than the first bit-width. The circuit further includes a digital filter configured to receive the second digital values and perform bit-width reduction in a recoverable manner to generate third digital values. The third digital values have a third bit-width less than the first and second bit-widths. The circuit could optionally include a recovery circuit configured to process the third digital values to generate recovered digital values at the first sampling rate. The recovered digital values have the first bit-width. | 03-10-2011 |
20110063154 | TOUCH CONTROLLER WITH IMPROVED ANALOG FRONT END - A controller for a touch sensor includes a transimpedance amplifier, and a feedback resistor coupled to an input of the transimpedance amplifier and to an output of the transimpedance amplifier. At least one multiplexor may be coupled to the input of the transimpedance amplifier and configured to multiplex a plurality of analog inputs to one dedicated channel. The controller may further include a bandpass filter coupled to the output of the transimpedance amplifier. The output of the bandpass filter may be input to an anti-aliasing filter, which feeds into an analog to digital converter. Alternatively, the output of the bandpass filter may be input to a sigma-delta analog to digital converter. | 03-17-2011 |
20110063155 | Sigma-Delta Modulator with Shared Operational Amplifier and Associated Method - A Sigma-Delta modulator with a shared operational amplifier (op-amp) includes an integrated circuit, having two integrators sharing the op-amp, capable of integrating two input signals of the two integrators; a plurality of quantizers, coupled to the integrating circuit, for comparing outputting signals of the integrators with a predetermined signal and then generating digital outputting signals; a plurality of DACs, respectively coupled to the quantizers, for converting the digital outputting signals to analog feedback signals to the integrators; and a clock generator, for providing clock signals to the integrating circuit and the quantizers. Accordingly, layout area and power consumption of the modulator are reduced due to the shared op-amp. | 03-17-2011 |
20110074613 | MULTIPLE-BIT, DIGITAL-TO-ANALOG CONVERTERS AND CONVERSION METHODS - Embodiments include DACs and methods for digital-to-analog conversion. A DAC includes an encoder and a plurality of DAC elements. The encoder maps each of a plurality of bits of a digital input value to one of the DAC elements, and produces a sign indication indicating whether a magnitude of the digital input value is above or below a threshold. Each DAC element produces a DAC element analog output signal that indicates whether a received sign indication and a received bit corresponds to a first state, a second state or a third state (e.g., a zero, positive or negative state). In an embodiment, the DAC uses positive historic mapping information when the magnitude of the digital input value is above the threshold, and negative historic mapping information when the magnitude of the digital input value is below the threshold. DAC elements may be configurable into a Return-to-Zero or a Non-Return-to-Zero mode. | 03-31-2011 |
20110074614 | BOOST CIRCUIT - A boost circuit is provided, which is configured to receive a bitstream signal, to boost the amplitude of the bitstream signal thus received, and to output the bitstream signal thus boosted. A first clock booster receives a clock signal, and boosts the amplitude of the clock signal. A second clock booster receives an inverted clock signal, and boosts the amplitude of the inverted clock signal. A switch receives the output signals of these two clock boosters, and selects the one output signal that is high level. A first capacitor is coupled to the output terminal of the switch. A level shifter level-shifts the high level of the bitstream signal to the voltage level that occurs at the first capacitor. | 03-31-2011 |
20110095924 | FEEDBACK CIRCUITS WITH DC OFFSET CANCELLATION - Feedback circuits with DC offset cancellation are described. In an exemplary design, a feedback circuit includes a slow integrator and a summer. The slow integrator receives a first intermediate signal at a particular point in the feedback circuit and provides a second intermediate signal. The summer is located after the particular point and receives and sums the first and second intermediate signals to reduce DC offset in the first intermediate signal. In one design, the feedback circuit may be a delta-sigma (ΔΣ) modulator with at least one integrator coupled in cascade. The slow integrator is coupled to the output of the last integrator, receives the first intermediate signal from the last integrator, and provides the second intermediate signal. The summer is coupled to the last integrator and the slow integrator and sums the first and second intermediate signals to reduce DC offset in the first intermediate signal. | 04-28-2011 |
20110095925 | DELTA-SIGMA A/D CONVERTER - In a delta-sigma A/D converter provided with plural channels for converting an analog input signal into a digital signal, an adverse influence of an idle tone is reduced in each channel. The delta-sigma A/D converter comprises: a first quantizer which quantizes and outputs a received signal; a first D/A converter which converts an output signal of the first quantizer into an analog signal, and outputs the converted analog signal; a first operation unit which outputs a signal indicative of a difference of the first analog input signal and an output signal of the first D/A converter; a first integrator which integrates an output signal of the first operation unit and outputs the integrated signal; a first dither circuit which generates a first dither signal; and a second operation unit which adds the first dither signal to the output signal of the first integrator and outputs the added signal to the first quantizer. | 04-28-2011 |
20110102222 | CONTINUOUS TIME SIGMA-DELTA A/D CONVERTER AND ELECTRICAL SYSTEM COMPRISING THE A/D CONVERTER - A continuous time sigma-delta analog-to-digital converter comprising: a summator of an input analog signal and a feedback signal; a feed-forward integrator path connected to the summator and configured to provide a digital signal; a feedback digital-to-analog converter to convert the digital signal into a feedback analog signal; a feedback low pass filter structured to filter the feedback analog signal and provide the feedback signal to the summator. | 05-05-2011 |
20110102223 | AMPLIFIER WITH DIGITAL INPUT AND DIGITAL PWM CONTROL LOOP - A class D amplifier is configured to accept a digital input signal wherein the control loop of the class D amplifier employs a hybrid filter merged with the front-end of a sigma-delta ADC converter. The term hybrid refers to the filter using both digital and analog components in which the digital delay elements serve as shift registers while the filter coefficients are analog. The filter converts the digital PDM data into a step-wise sinusoidal signal. The sigma-delta ADC receiving a feedback signal subtracts the step-wise sinusoidal signal from the continuous sinusoidal signal and converts the result to a digital PDM signal, without decimation, which passes through a digital filter, a PWM generator, and a pre-driver, to provide power to the load. | 05-05-2011 |
20110102224 | INTEGRATED CIRCUIT AND CORRESPONDING METHOD OF PROCESSING A MULTITYPE RADIO FREQUENCY DIGITAL SIGNAL - Integrated circuit, incorporating an electronic device (PA) comprising input means (BE) for receiving a radiofrequency digital signal (SCH), output means (BS) capable of delivering a radiofrequency analogue signal (SARF), and a processing stage coupled between the input means and the output means and comprising several processing channels (VTi) in parallel, each processing channel (VTi) including a voltage switching block (BLCi) the input of which is coupled to the input means and a transmission line (LTi) substantially of the quarter-wave type at the frequency of the radiofrequency analogue signal coupled in series between the output of the voltage switching block and the said output means. | 05-05-2011 |
20110109489 | Data Converter Having a Passive Filter - Exemplary implementations of electrical circuits and systems are disclosed, and methods for signal processing including sampling and quantizing of amplitude and band limited signals implemented through a Passive Pulse Modulation Analog to Digital Converter (PMADC). | 05-12-2011 |
20110122009 | SIGMA DELTA MODULATOR AND QUANTIZER AND QUANTIZATION METHOD THEREOF - A quantizer of a sigma-delta modulator includes a pulse width modulator (PWM), a converter and a voltage level tracing device. The PWM receives an input signal, and generates a PWM signal according to one or more sawtooth waves and one or more reference voltages. The converter is connected to the output of the PWM and digitizes the PWM signal to generate an output digital value. The voltage level tracing device is connected to the output of the converter, and receives the output digital value to generate a reference voltage adjustment value. The reference voltage adjustment value is transmitted to the PWM for adjusting the reference voltage, so as to change the next corresponding voltage level of the sawtooth wave to track the input signal. | 05-26-2011 |
20110128173 | DELTA-SIGMA MODULATOR AND DITHERING METHOD INCLUDING A DITHERING CAPABILITY FOR ELIMINATING IDLE TONES - A delta-sigma modulator ( | 06-02-2011 |
20110133968 | MODULATOR WITH LOOP-DELAY COMPENSATION - A modulator is constructed with a loop-delay compensation. A delta-sigma modulator generates a quantization code, and a digital compensation filter receives the quantization code and outputs a digital code. The digital compensation filter then feeds the digital code back to the delta-sigma modulator. | 06-09-2011 |
20110133969 | BANDPASS DELTA-SIGMA MODULATOR - A bandpass delta-sigma modulator is formed to include a bandpass filtering circuit that bandpass filters an input signal. An analog-to-digital converter (ADC) receives output of the bandpass filtering circuit and generates an output quantization code. A digital filter receives the output quantization code. A digital-to-analog converter (DAC) receives output of the digital filter and scales the value of the output quantization code by DAC coefficients to the bandpass filtering circuit. | 06-09-2011 |
20110140940 | COEFFICIENT MULTIPLIER AND DIGITAL DELTA-SIGMA MODULATOR USING THE SAME - Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size. | 06-16-2011 |
20110148677 | D-CLASS DIGITAL AMPLIFIER CONFIGURED FOR SHAPING NON-IDEALITIES OF AN OUTPUT SIGNAL - The disclosure relates to an amplifier comprising a digital delta-sigma modulator, a quantifier receiving a signal supplied by a delta-sigma stage and supplying a quantified signal, and a power circuit supplying an output signal. The device comprises N state loops of a first type configured to send the output signal to adders of N delta-sigma stages of lower rank, each state loop of the first type comprising an analog low-pass filter for supplying a filtered output signal, and an analog to digital converter for supplying a digital filtered output signal. | 06-23-2011 |
20110148678 | CONVERTER - A method of providing a value for each element of a sequence of elements in a converter, the values being for a present conversion cycle in operation of the converter, wherein a pointer position identifies an element in the sequence of elements for a conversion cycle. The method comprising:
| 06-23-2011 |
20110148679 | RECONFIGURABLE BANDPASS DELTA-SIGMA MODULATOR - A delta-sigma modulator is disclosed which has a filter comprising a filter input, two LC resonators (LC | 06-23-2011 |
20110156940 | CONTINUOUS-TIME SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH NON-INVASIVE FILTER(S) FOR IMMUNITY PRESERVATION AGAINST INTERFERERS - A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) which includes at least one combiner (C | 06-30-2011 |
20110156941 | METHOD FOR CONVERTING ANALOG DATA INTO DIGITAL DATA FOR ANALOG INPUT MODULE - A method for converting analog data into digital data for analog input module is disclosed, wherein the analog input module adds at least one or more digital data determined at previous conversion periods (k−1 | 06-30-2011 |
20110163900 | Multimode Sampling/Quantization Converters - Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one implementation, an apparatus includes multiple processing branches, each including: a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit, and a digital bandpass filter. A combining circuit then combines signals at the processing branch outputs into a final output signal. The continuous-time quantization-noise-shaping circuits include adjustable circuit components for changing their quantization-noise frequency-response minimum, and the digital bandpass filters include adjustable parameters for changing their frequency passbands. | 07-07-2011 |
20110163901 | 2-PHASE GAIN CALIBRATION AND SCALING SCHEME FOR SWITCHED CAPACITOR SIGMA-DELTA MODULATOR USING A CHOPPER VOLTAGE REFERENCE - A sigma-delta modulator has a chopper voltage reference providing a reference signal having a clock dependent offset voltage, a single-bit or a multi-bit digital-to-analog converter (DAC); a plurality of capacitor pairs; a plurality of switches to couple any capacitor pair to an input or reference signal; and a control unit controlling sampling through said switches to perform a charge transfer in two phases wherein any capacitor pair can be selected to be assigned to the input or reference signal, wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically, and wherein a DAC output value and a reference offset state define switching sequences wherein each switching sequence independently rotates said capacitor pairs and wherein at least one switching sequence is selected depending on a current DAC output value and a current reference offset state. | 07-07-2011 |
20110169674 | A-D convert apparatus and control method - Provided is an AD conversion apparatus including: a differential amplifier that generates a differential input voltage according to an analog input signal; a differential DA converter of a charge redistribution type, which outputs a differential output voltage resulting from subtracting the differential input voltage from a differential comparison voltage that is in accordance with comparison data; a comparator that compares a positive output voltage and a negative output voltage in the differential output voltage; a control section that identifies the comparison data at which the differential output voltage becomes substantially 0 based on a comparison result of the comparator, and outputs the identified comparison data as output data; and a setting section that sets at least one of a common potential of the differential amplifier and a common potential of the differential DA converter, according to a targeted value of a common potential of the comparator | 07-14-2011 |
20110169675 | ANALOG-TO-DIGITAL CONVERTER AND DIGITAL-TO-ANALOG CONVERTER - An A/D converter includes an adjusting circuit to adjust a total of an amount of change of ΣΔ modulated data output from a ΣΔ modulator and an amount of change of dummy data to be constant, and a level converting part supplied with the ΣΔ modulated data. The level converting part includes a first level converter to output the ΣΔ modulated data by converting a level of the ΣΔ modulated data, and a second level converter to receive the dummy data from the adjusting circuit and interpolate dummy noise, in order to cancel a frequency dependence of noise with respect to the ΣΔ modulated data. | 07-14-2011 |
20110169676 | ANALOG-TO-DIGITAL CONVERTER - A ΔΣ analog-to-digital converter includes a previous stage amplifier circuit which amplifies an input signal, a conversion circuit which converts an analog signal into a digital signal, where the analog signal is output from the previous stage amplifier circuit, an input node provided in the previous stage amplifier circuit, a plurality of capacitors provided in the conversion circuit, a first amplifier and a second amplifier, and a path switching circuit which connects the first amplifier to the input node in a first mode and connects the first amplifier to the plurality of capacitors in a second mode, where the first mode is for sampling the analog signal and the second mode is for performing an integration operation. The first amplifier forms the previous stage amplifier circuit in the first mode, and forms an integrator which carries out the integration operation performed in the conversion circuit in the second mode. | 07-14-2011 |
20110169677 | RESONATOR AND OVERSAMPLING A/D CONVERTER - Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node. | 07-14-2011 |
20110175761 | DELTA SIGMA ANALOGUE TO DIGITAL CONVERTER - A delta sigma analogue to digital converter comprising: an integrator having first and second differential inputs for receiving an input analogue signal, the integrator having differential outputs; a quantiser having first and second differential inputs which receive signals output by the integrator, and an output which provides a digital output signal of the delta sigma analogue to digital converter, and a digital to analogue converter. The digital to analogue converter has an input which is connected to an output of the delta sigma analogue to digital converter, and first and second differential outputs. The first output of the digital to analogue converter is connected to the first input of the integrator such that if the second output of the digital to analogue converter is not connected to the second input of the integrator and the second input of the integrator is connected to a fixed reference voltage the delta sigma analogue to digital converter is able to operate in a single-ended mode. | 07-21-2011 |
20110175762 | SECOND ORDER NOISE COUPLING WITH ZERO OPTIMIZATION MODULATOR AND METHOD - A method and apparatus for a modified noise-coupled modulator using zero optimization technique is disclosed. By realizing the resonator coefficient as a part of branches other than those of the main transfer function, the problem of improving SQNR without degrading other specifications is solved. Second order noise coupling is used to implement zeros without using feedback branches going into the first integrator. Embodiments use a first-order modulator, second-order noise coupling and a resonator. It allows lower power consumption and smaller size by removing small capacitor values and gain factors and reducing the number of amplifiers. | 07-21-2011 |
20110187570 | SIGMA DELTA CONVERTER SYSTEM AND METHOD - A sigma delta converter system and method includes a multi bit quantizer circuit coupled to an output of the converter. A single bit analog-to-digital converter circuit is contained in a feedback path of the converter. The converter includes a feed forward path operable to multiply an input voltage by a feed forward coefficient having a value that is a function of a gain control input signal. The gain control input signal can have a value that is a function of the output of the multi bit quantizer. | 08-04-2011 |
20110187571 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERSION APPARATUS AND METHOD THEREOF - A delta-sigma analog-to-digital conversion apparatus for receiving an analog input signal to generate a digital output signal includes a subtracting unit, a quantizer, and a feedback unit. The subtracting unit is utilized for performing a subtraction function to generate a subtracted signal according to the analog input signal and a feedback signal. The quantizer is coupled to the subtracting unit and utilized for performing quantization to generate a quantized signal according to the subtracted signal. The feedback unit is coupled between the subtracting unit and the quantizer, and utilized for providing the feedback signal to the subtracting unit according to the quantized signal. The subtracting unit is arranged to reduce signal input swing of the quantizer. | 08-04-2011 |
20110199246 | HIGH RESOLUTION DELTA-SIGMA DIGITAL-TO-ANALOG CONVERTER - A circuit for a delta-sigma digital-to-analog converter (DAC) includes a first stage with a delta-sigma noise-shaping loop. The first stage is capable of receiving an input signal, includes a first quantizer that has a first quantization error, and provides a first stage output. A first DAC receives the first stage output and provides a first analog output. A second stage receives the first quantization error. The second stage provides a second stage output to the digital differentiator. A second DAC receives a digital differentiator output and provides a second analog output. An adder adds the first analog output and the second analog output to provide a third analog output, so that the first quantization error is cancelled out and the inband noise is suppressed in the third analog output. | 08-18-2011 |
20110199247 | SIGMA-DELTA MODULATOR - A sigma-delta modulator ( | 08-18-2011 |
20110221618 | CONTINUOUS-TIME DELTA-SIGMA ADC WITH COMPACT STRUCTURE - A continuous-time delta-sigma Analog to Digital Converter (ADC) with a compact structure comprises a loop filter, a summing circuit, a quantizer, and a current Digital to Analog Converter (DAC). The loop filter is utilized for receiving and noise-shaping an analog input signal, and accordingly outputting a positive and a negative loop voltages. The summing circuit comprises a positive and a negative summing resistors. The summing resistors are utilized for transforming a positive and negative feedback currents to be a positive and a negative feedback voltages, and summing the loop voltages and the feedback voltages so as to generate a positive and a negative summing voltages, respectively. The quantizer is utilized for outputting a digital output signal according to a difference between the positive and the negative summing voltages. The current DAC is utilized for generating the positive and the negative feedback currents according to the digital output signal. | 09-15-2011 |
20110227772 | Method and Apparatus for Analog to Digital Conversion of Small Signals in the Presence of a Large DC Offset - Embodiments of the present invention provide a hybrid analog to digital converter that may include a DAC coupled to a hybrid analog to digital converter input; an integrator having an input coupled to the hybrid analog to digital converter input and the DAC, and generating an integrator output; a comparator coupled to the integrator output and having a comparator output; a successive approximation register coupled to the comparator output; and a counter coupled to the comparator output to generate an hybrid analog to digital converter output. The hybrid analog to digital converter may be operable as a successive approximation register converter and a continuous time sigma delta converter. | 09-22-2011 |
20110234437 | SIGMA DELTA MODULATOR - The present application relates to a method for driving a sigma delta modulator. The present application relates also to a sigma delta modulator comprising at least one integrator device and one quantizer device and it relates to a readable medium having a computer program stored thereon for performing said method. The method comprises setting a sigma delta modulator to an irrational operation mode. The method comprises monitoring at least one output signal of the sigma delta modulator. The method comprises resetting the sigma delta modulator to the irrational operation mode depending on the monitored output signal. | 09-29-2011 |
20110241919 | System and method for generating shaped noise - In a particular embodiment, a circuit device is disclosed that includes a data generator adapted to output a random pulse sequence having a particular spectral shape. The data generator includes a feedback loop with a transfer function, the output of which may be altered by limiter circuitry to increase stability of the data generator. The circuit device may further include, for example, a pulse edge control circuit to selectively apply a carrier suppression operation to at least one pulse-width modulated (PWM) signal in response to the random pulse sequence to produce at least one modulated PWM output signal. In such an example, the spectral energy associated with a PWM carrier of the modulated PWM output signal at a carrier frequency and associated harmonics is changed such that the modulated PWM output signal has a spectral shape defined by the particular spectral shape. | 10-06-2011 |
20110248875 | SECOND-ORDER DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER - Techniques are disclosed relating to analog-to-digital converters in integrated circuits. In one embodiment, a second-order delta-sigma analog-to-digital converter (ADC) is disclosed. The ADC includes a second-order integrator adapted to second-order integrate a value at a first node, where the first node is coupled to an input of the ADC. The ADC also includes a comparator coupled to an output of the second-order integrator. The ADC further includes a digital-to-analog converter (DAC) coupled between an output of the comparator and the first node. The DAC is adapted to receive a digital output of the comparator and to generate a first charge or a second charge. The DAC includes a first charge pump adapted to produce the first charge and a second charge pump adapted to produce the second charge. The first and second charges are asymmetric. | 10-13-2011 |
20110254718 | INTEGRATOR AND DELTA-SIGMA MODULATOR INCLUDING THE SAME - An integrator is provided which can reduce a disturbance in the current waveform of a current DA converter in order to improve the SNR of a ΔΣ modulator, for example. The integrator includes an operational amplifier, and feedback paths provided in parallel between the output terminal and inverting input terminal of the operational amplifier. In one of the feedback paths, an integrating capacitor and at least one resistor are connected in series. In the other feedback path, a second integrating capacitor whose capacitance value is smaller than that of the integrating capacitor is provided. | 10-20-2011 |
20110285565 | PARALLEL MASH DELTA SIGMA MODULATOR - A parallel, multi-stage noise shaping (MASH) delta-sigma (ΔΣ) modulator reduces the required operating frequency by predicting the inputs to later stages of a serial MASH modulator to be multiples of the MASH input. An Nth order parallel MASH ΔΣ modulator generates N outputs (one from each stage) in a single modulator cycle. Accordingly, the Nth order parallel MASH ΔΣ modulator may be operated at 1/N the frequency of a corresponding prior art Nth order serial MASH ΔΣ modulator. | 11-24-2011 |
20110285566 | DIGITAL-TO-ANALOG CONVERTER AND DIGITAL-TO-ANALOG CONVERTING DEVICE - A D/A converter comprises a first switch unit for performing switching to provide connection and disconnection between one terminals of the plurality of sampling capacitive elements and the corresponding plurality of input terminals, and to provide connection and disconnection between the other terminals of the plurality of sampling capacitive elements and a reference voltage source for generating a reference voltage; a second switch unit for performing switching to provide connection and disconnection between the other terminals and an inverting input terminal of the operational amplifier, to provide connection and disconnection between one terminals of the sampling capacitive elements and to close and open an electric path through which a voltage according to a voltage of the sampling capacitive elements, is output to an output terminal of the operational amplifier, in accordance with the switching of the first switch unit; and a resistive element provided on the electric path. | 11-24-2011 |
20110304491 | DIGITAL FEEDFORWARD SIGMA-DELTA MODULATOR IN ANALOG-TO-DIGITAL CONVERTER AND MODULATION METHOD THEREOF - A digital feedforward sigma-delta modulator in an analog-to-digital converter and its modulation method are disclosed. The modulator changes a feedforward path from an analog domain to a digital domain and processes it. The modulator integrates an analog input by using a plurality of integrators, weights them, quantizes them by using a plurality of quantizers in a digital domain to output digital signals, and then adds up the thusly outputted digital signals by using a digital adder. In case of a continuous time digital feedforward sigma-delta modulator (SDM), a digital signal outputted from the digital adder is weighted and then immediately inputted to the digital adder in the digital domain so as to be subtracted, allowing for digital feedforwarding. Because the feedforward signal is processed in the digital domain, the area occupied by an analog circuit and power consumption can be reduced. Also, because signals are added up in the digital domain, a digital output signal can be immediately used when an excess loop delay needs to be corrected. Thus, because there is no need to convert the digital output signal into an analog signal by using a DAC, the DAC can be omitted. | 12-15-2011 |
20110316731 | Method and device for phase and/or pulse-width modulation - The present invention relates to a device ( | 12-29-2011 |
20120007760 | INPUT CONVERTER FOR A HEARING AID AND SIGNAL CONVERSION METHOD - In order to minimize noise and current consumption in a hearing aid, an input converter comprising a first voltage transformer and an analog-to-digital converter of the delta-sigma type for a hearing aid is devised. The analog-to-digital converter of the input converter has an input stage, an output stage, and a feedback loop, and the input stage comprises an amplifier (Q | 01-12-2012 |
20120038500 | LOW POWER HIGH DYNAMIC RANGE SIGMA-DELTA MODULATOR - A low power, high dynamic range sigma-delta modulator comprises a quantizer followed by a digital integrator for generating an integrated digital signal from a quantized signal. The output of the digital integrator is coupled to a digital-to-analog converter in the feedback loop of the sigma-delta modulator. | 02-16-2012 |
20120056767 | SIGNAL PROCESSING APPARATUS WITH SIGMA-DELTA MODULATING BLOCK COLLABORATING WITH NOTCH FILTERING BLOCK AND RELATED SIGNAL PROCESSING METHOD THEREOF - One signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is arranged to perform a notch filtering operation upon the signal output for generating a filtered signal output. Another signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is enabled for performing a notch filtering operation upon the signal output when the signal processing apparatus operates in a first operational mode, and the notch filtering block is disabled when the signal processing apparatus operates in a second operational mode. | 03-08-2012 |
20120062405 | Compensation of loop-delay quantizer in continuous-time and hybrid sigma-delta analog-to-digital modulators - A summing-tracking quantizer additively combines multiple feed-forward outputs of cascaded integrator stages of a sigma-delta analog-to-digital converter with a scaled sampled analog signal, and a delayed scaled analog input signal. The summing tracking quantizer compensates for loop delay within a sigma-delta analog-to-digital converter. A loop delay compensation digital-to-analog converter for a sigma-delta analog-to-digital converter is merged with the voltage reference generator within the summing-tracking quantizer. The summing tracking quantizer selects reference voltages from the voltage reference generator based on a previous digital output code. The summing-tracking quantizer has a matrix switch that receives the previous digital output code and selects the reference voltage for applying to comparators for determining a differential quantization code that is additively combined to the previous digital output code to determine the present digital output code. | 03-15-2012 |
20120068868 | CONTINUOUS-TIME SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER - A continuous-time delta-sigma analog-to-digital converter (ADC) is disclosed. The ADC includes a loop filter, a loop quantizer, and a clock-jitter tolerant digital-to-analog converter (DAC). The clock-jitter tolerant DAC includes a dual switched-current (SI) DAC, a switched-capacitor (SC) DAC, an adder, and a switched-capacitor-resistor (SCR) injection circuit. The dual SI DAC provides two identical analog signals from the feedback digital signal of a loop quantizer within the ADC. The SC DAC provides an error-free reference signal from the feedback digital signal. The adder subtracts one of the two analog signals from the error-free reference signal to obtain an inverted jitter-induced error signal. The SCR injection circuit then injects the inverted jitter-induced error signal, delayed by one clock-cycle, in the form of a half-delay return-to-zero exponentially decaying waveform into the loop filter. | 03-22-2012 |
20120075132 | METHOD AND APPARATUS FOR CALIBRATING SIGMA-DELTA MODULATOR - In a method of converting an analog signal to digital format, an analog input signal is received and processed using sigma-delta modulation to provide a first digital signal that represents the analog input signal in digital format and to provide a second digital signal that represents a first error introduced during the sigma-delta modulation. A second error that is error introduced during the sigma-delta modulation is estimated. A pre-correction signal is determined based on the first and second digital signals. A difference between the estimated second error and the pre-correction digital signal is determined to provide a digital output signal representing the analog input signal in digital format. An error correction element operable to adjust the digital output signal based on the analog input signal, the digital output signal, and the second digital signal is controlled. | 03-29-2012 |
20120075133 | LOW-POWER SIGMA-DELTA CONVERTER - A sigma-delta converter may include an input node, a switched capacitor input stage integrating a difference signal between an input signal from the input node and a feedback signal representing an output signal, and a switched capacitor adder coupled downstream from the switched capacitor input stage and generating a sum signal based upon the input signal with a signal generated by the switched capacitor input stage. The sigma-delta converter may include a switched capacitor output stage amplifying the sum signal and generating an analog amplified signal, a quantization stage coupled in cascade to the switched capacitor output stage and generating the output signal as a digital replica of the analog amplified signal, and a circuit generating the feedback signal as an analog replica of the output signal. | 03-29-2012 |
20120086591 | Area Efficient Selector Circuit - A signal converting system has a multi-segment digital to analog converter coupled to an error shaping loop. A control value is received at a vector processor that indicates a number N of elements that are to be selected from a vector having M elements. The elements of the vector are sorted into a bitonic sequence and separated into a larger value group and a smaller value group using a bitonic split. Only the larger value group is sorted into an ordered sequence with repeated bitonic splits when the control value is less than M/2, and N largest elements are selected from the ordered sequence. Only the smaller value group is sorted into an ordered sequence with repeated bitonic splits when the control value is greater than M/2, and N−M/2 largest elements are selected from the ordered sequence. | 04-12-2012 |
20120092200 | SIGMA-DELTA MODULATOR - A Sigma-Delta Modulator (SDM) has a summing junction that receives an input signal and a feedback signal, a multi-level analog-to-digital converter (ADC) that receives the SDM input signal and generates an ADC output, a first analog switch that receives the ADC output and generates a plurality of reference voltages, a second analog switch generating the feedback signal, where the feedback signal is selected from one of the reference voltages. | 04-19-2012 |
20120098688 | CLOCK TIMING ADJUSTMENT DEVICE AND CONTINUOUS TIME DELTA-SIGMA MODULATOR USING THE SAME - Provided is a clock timing adjustment device for adjusting a time difference of clocks and a delta-sigma modulator. The clock timing adjustment device includes a power detection unit and a timing adjustment unit. The power detection unit receives input signals which are generated using pairs of first and second clocks having a plurality of clock time differences and respectively correspond to the clock time differences, detects powers of the input signals, and outputs a control signal corresponding to a clock time difference where the power is minimized. The timing adjustment unit receives a reference clock and the control signal and outputs the first and second clocks having the clock time difference where the power is minimized from the reference clock according to the control signal. | 04-26-2012 |
20120112941 | Systems and Methods for Analog to Digital Converter Charge Storage Device Measurement - Systems and methods for analog to digital conversion charge storage device measurement are presented. In multi-cell charge storage device monitoring systems, accurate measurement of cell voltages is used for protection of the multi-cell device. The disclosed cell referenced solution converts the cell voltage to a digital representation referenced at the cell voltage. The digital representation referenced to the cell voltage is then level shifted to a ground referenced signal suitable for digital post processing. This processing may be used for fault detection of over-voltage, under-voltage, open cell, and similar fault conditions and cell capacity measurements. An example embodiment implements a sigma delta modulator to perform the signal transformation from analog to digital. The disclosed systems and methods may be differential and stackable for multiple cells. | 05-10-2012 |
20120112942 | REDUCED-SWITCHING DYNAMIC ELEMENT MATCHING APPARATUS AND METHODS - Apparatus and methods disclosed herein operate to reducing switching artifacts associated with dynamic element matching by sorting a set of unit elements to establish a priority order of selection of a subset of the set of unit elements to use in a next single-sample integration operation. Sorting is achieved by demoting unit elements during the sorting if a usage value associated with the unit element is greater than or equal to a maximum allowable usage spread parameter value. A unit element is promoted during the sorting if a usage value associated with the unit element is less than the maximum allowable usage spread parameter value and the unit element was used in an immediately previous single-sample integration operation. | 05-10-2012 |
20120112943 | SIGMA-DELTA MODULATOR WITH SAR ADC AND TRUNCATER HAVING ORDER LOWER THAN ORDER OF INTEGRATOR AND RELATED SIGMA-DELTA MODULATION METHOD - A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information, wherein an order of the truncater is lower than an order of the integration. | 05-10-2012 |
20120127008 | Adjustable Signal Generating Device and Related Method for Generating the Adjustable Signal - An adjustable signal generating device and related method for generating the adjustable signal are described herein. The adjustable signal generating device includes: a voltage generator configured to continuously adjust an output voltage and output the voltage; a ΣΔ modulator configured to output a digital signal of pre-determined-cycle based on the output voltage and a reference voltage; a counter configured to count the number of a target level in the digital signal of a pre-determined number of cycles; and a digital signal generator configured to generate a target signal based on the number of the target level. The described method and device improve the accuracy of the generated signal while remaining the same feel of continuous adjustment. | 05-24-2012 |
20120127009 | Sampling/Quantization Converters - Provided are, among other things, systems, apparatuses, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. One such apparatus includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. Each of the processing branches includes a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit coupled to an output of the continuous-time quantization-noise-shaping circuit, a digital bandpass filter coupled to an output of the sampling/quantization circuit, and a line coupling an output of the digital-to-analog converter circuit back into the continuous-time quantization-noise-shaping circuit. A center frequency of the digital bandpass filter in each the processing branch corresponds to a minimum in a quantization noise transfer function for the continuous-time quantization-noise-shaping circuit in the same processing branch. | 05-24-2012 |
20120133537 | PERFORMING ENHANCED SIGMA-DELTA MODULATION - In general, techniques are described for performing enhanced sigma-delta modulation. For example, an apparatus comprising a predictive filter unit, an amplifier, an oversampling unit and a sigma-delta modulation unit may implement the techniques. The predictive filter unit performs predictive filtering on an input signal to generate a filtered signal and computes an estimate of a predictive gain as a function of an energy of the input signal and an energy of the filtered signal. The amplifier receives the filtered signal and amplifies the filtered signal based on the predictive gain to generate an amplified signal. The oversampling unit receives the amplifies signal and performs oversampling in accordance with an oversampling rate to generate an oversampled signal. The sigma-delta modulation unit receives the oversampled signal and performs sigma-delta modulation to generate a modulated signal. | 05-31-2012 |
20120139768 | Device and method for the transmission and reception of high fidelity audio using a single wire - An audio device ( | 06-07-2012 |
20120146823 | SIGMA-DELTA DIFFERENCE-OF-SQUARES RMS TO DC CONVERTER WITH MULTIPLE FEEDBACK PATHS - Architectures of ΣΔ difference-of-squares RMS-to-digital converters employing multiple feedback paths. Additional feedback paths enable a stable ΣΔ closed-loop behavior in different topologies where the RMS level of the quantization error processed by the squaring non-linearity is minimized. Such feedback paths include lowpass filtered and constant gain feedback paths, lowpass and highpass filtered paths or multiple lowpass filtered paths. These can be combined with multiple integrators in the forward path, with frequency compensation provided by additional feedforward or feedback paths. Electronic configurability can further extend the total input referred dynamic range (DR) of such architectures. | 06-14-2012 |
20120146824 | SIGMA-DELTA DIFFERENCE-OF-SQUARES LOG-RMS TO DC CONVERTER WITH FORWARD AND FEEDBACK PATHS SIGNAL SQUARING - A sigma-delta (ΣΔ) difference-of-squares LOG-RMS to digital converter” by merging a traditional ΣΔ modulator with an analog LOG-RMS to DC converter based on a difference-of-squares concept. Two basic architectures include one based on two squaring cells in the feedforward and feedback paths and a second based on a single squaring cell in the forward path. High-order ΣΔ LOG-RMS can be implemented with a loop filter containing multiple integrators and feedforward and/or feedback paths for frequency compensation. The embodiments as described allow the implementations of ΣΔ difference-of-squares LOG-RMS to DC converters with a natural digital output and a logarithmically compressed dynamic range. | 06-14-2012 |
20120154191 | Method for Processing a Measured-Value Signal Representing a Value Determined in Analog Form for the Output Current of a Converter and Device for Carrying the Method - A method for processing a measured-value signal representing a value, determined in analog form, for the output current of a converter, and device for carrying out the method, the measured-value signals acquired by a sensor, especially including a shunt resistor, being supplied to a respective processing channel that has at least one delta-sigma modulator. | 06-21-2012 |
20120161994 | SWITCHED-CAPACITANCE GAIN AMPLIFIER WITH IMPROVED INPUT IMPEDANCE - A gain amplifier may have a differential amplifier with feedback capacitors; a switched input stage having first and second outputs coupled with the differential amplifier, and having: first and second capacitors, a first input receiving a first signal of a differential input signal; a second input receiving a second signal of the differential input signal; a first plurality of switches controlled by a first clock signal to connect the first terminals of the first capacitor with the first or second input, respectively and to connect the first terminals of the second capacitors with the second and first input, respectively; and a second plurality of switches controlled by a phase shifted clock signal to connect the second terminal of the first capacitor with a first or second input of the differential amplifier and connecting the second terminal of the second capacitor with the second or first input of the differential amplifier. | 06-28-2012 |
20120161995 | AD CONVERSION METHOD AND AD CONVERSION CIRCUIT - A disclosed AD conversion circuit includes a holding portion storing sequence information, signal selection information and time information; a sequencing counter to be initialized by receiving a timing signal output at a predetermined period and counting upon receipt of a matching signal to obtain a sequencing counter count value; a time period counter to be initialized by receiving the timing signal or the matching signal and counting a time period counter count value; a comparator generating the matching signal when the time information matches the time period counter count value after comparison by referring to the sequence information using the sequencing counter count value; a selecting portion selecting analog signals of one type corresponding to the signal selection information obtained by referring to the sequence information using the sequencing counter count value out of analog signals of various types; and an AD converter converting the selected analog signals. | 06-28-2012 |
20120194370 | SIGMA-DELTA CONVERTER SYSTEM AND METHOD - A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included. | 08-02-2012 |
20120194371 | ANALOG-TO-DIGITAL CONVERSION APPARATUS AND SIGNAL PROCESSING SYSTEM - An AD conversion apparatus includes: a first AD converter for converting an input analog signal into a first digital signal; a second AD converter for converting an analog signal obtained as a result of multiplying the input analog signal by a coefficient α into a second digital signal; a first computing unit for multiplying the first digital signal output by the first AD converter by α | 08-02-2012 |
20120194372 | ANALOG-TO-DIGITAL CONVERTER FOR BIOMEDICAL SIGNALS - Certain aspects of the present disclosure relate to a technique for producing a difference value by offsetting a current value of an analog signal with a stored previous value of the analog signal, and generating a digital representation of the difference value. Digital representations obtained by this technique may be sent over a channel to a receiver device for reconstruction of the original analog signal. An integrator of the receiver device may be configured to process (sum) the received samples to generate a reconstructed version of the original signal. | 08-02-2012 |
20120200440 | A/D CONVERTER AND SEMICONDUCTOR DEVICE - An A/D converter and a semiconductor device simple in configuration are provided which can keep a constant noise shaping characteristic without depending on manufacturing variations or a temperature change. A semiconductor device includes a delta-sigma modulator, an input changeover switch, and a control logic circuit. The delta-sigma modulator can change a time constant of an internal circuit according to a control signal. The input changeover switch selectively inputs any one of an input amplitude voltage and a reference voltage to the delta-sigma modulator. A control logic circuit is coupled to an output of the delta-sigma modulator, and generates the control signal. | 08-09-2012 |
20120212361 | SWITCHED-CAPACITOR CIRCUIT WITH LOW SIGNAL DEGRADATION - A switched-capacitor circuit is disclosed. The switched-capacitor circuit includes a comparator having a first and second input, a first and second sampling capacitor, and a first and second switching circuitry. The first switching circuitry charges the first and second sampling capacitor with an input signal. The second switching circuitry selectively couples the first sampling capacitor with a reference voltage and selectively couples the second sampling capacitor and the first and second input of the comparator to a common voltage. The comparator performs a compare of the input signals against the reference voltage, and outputs a signal. | 08-23-2012 |
20120218134 | Method for use in a Sigma-Delta Analog to Digital Converter, Sigma-Delta Analog to Digital Converters and Systems Comprising a Sigma-Delta Analog to Digital Converter - Some embodiments relate to a method for use in a sigma-delta analog to digital converter, sigma-delta analog to digital converters and systems comprising sigma-delta analog to digital converters. In accordance with an aspect of the invention, there is provided a method for use in a sigma-delta analog to digital converter (SD-ADC) comprising a modulator, a decimation filter, a decimation counter, and a decimator data output, wherein the method comprises receiving an external trigger signal and capturing a value of the decimation counter and a value of the decimator data output upon receiving the external trigger signal. | 08-30-2012 |
20120229316 | Delta-sigma modulator approach to increased amplifier gain resolution - A variable gain amplifier device ( | 09-13-2012 |
20120229317 | METHOD FOR USING A SENSOR SYSTEM HAVING A SINGLE-BIT QUANTIZER AND A MULTI-BIT FEEDBACK LOOP - A modulator is provided in operative engagement with a sensor element having a plurality of electrodes. The modulator has a single-bit quantizer electrically connected to a digital accumulator. The accumulator accumulates output information received from the single-bit quantizer. The accumulator converts the accumulated output information received from the single-bit quantizer to a multi-bit feedback signal and sends the multi-bit feedback signal in a primary feedback loop back to the sensor element. The quantizer sends a single-bit feedback signal in a secondary feedback loop back to a point before the quantizer. | 09-13-2012 |
20120242521 | METHOD AND CIRCUIT FOR CONTINUOUS-TIME DELTA-SIGMA DAC WITH REDUCED NOISE - A continuous-time delta-sigma digital-to-analog converter (DAC) includes a first delta-sigma modulator configured to quantize a most significant bit or bits of a digital input signal and produce a first quantization error signal, and a second multi-stage delta-sigma modulator configured to quantize less significant bits of the digital input signal. A first DAC is coupled to an output of the first delta-sigma modulator, and a second DAC is coupled to an output of the second noise-shaping filter. The second DAC has a greater resolution than the first DAC. A low pass output filter is coupled to a sum of an output of the first DAC and an output of the second DAC. | 09-27-2012 |
20120242522 | Data Converter Circuit and Method - In an embodiment, an oversampled data converter includes a lowpass filter having a filter stage comprising a dynamic limiter, where the dynamic limiter having a limit set by an signal level at an input to the oversampled data converter. The oversampled data converter also includes a quantizing block comprising an input coupled to an output of the lowpass filter and an output coupled to an input of the lowpass filter. | 09-27-2012 |
20120262320 | RESONATOR, DELTA-SIGMA MODULATOR, AND WIRELESS COMMUNICATION DEVICE - Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other. | 10-18-2012 |
20120274495 | MULTI-BIT SIGMA-DELTA MODULATOR WITH REDUCED NUMBER OF BITS IN FEEDBACK PATH - A sigma-delta modulator for an ADC, passes an input signal to a loop filter, then to a multi-bit quantizer of the modulator. An output of the quantizer is passed to a digital filter, and a feedback signal is passed back to the loop filter, the feedback signal having fewer bits than are produced by the multi-bit quantizer. The digital filter has an order greater than one in the passband of the sigma-delta modulator. | 11-01-2012 |
20120286982 | MODULATOR AND DELTASIGMA-TYPE D/A CONVERTER - The disclosed device easily and precisely satisfies a requested output range, and is provided with: a ΔΣ-modulator ( | 11-15-2012 |
20120319881 | SIGMA-DELTA MODULATOR - A sigma-delta modulator includes a front portion and a hybrid portion to form a loop filter. The front portion includes integrator(s) and feed-forward path(s), and is arranged to provide a front signal by combining signals of the integrator(s) and feed-forward path(s). The hybrid portion is coupled to the front portion, and arranged to provide a filtered signal by combining an integration of the front signal and a weighting of the front signal. The filtered signal is quantized, converted from digital to analog, and fed back to the loop filter. | 12-20-2012 |
20120326906 | PIPELINED CONTINUOUS-TIME SIGMA DELTA MODULATOR - Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a pipelined CT SDM is provided that has an architecture that is conducing to being calibrated. Namely, the system includes a digital filter and other features that can be adjusted to account for input imbalance errors and well as quantization leakage noise. | 12-27-2012 |
20130002463 | ANALOG-DIGITAL CONVERTER - A differential analog-digital converter is provided. The converter comprises a decision unit for evaluating a potential difference between two input signal lines, a number of charging units for each input signal line each configured to add a predetermined charge onto the respective input signal line, a number of discharging units for each input signal line each configured to remove a predetermined charge from the respective input signal line and a control unit for selectively switching each of the charging units and discharging units so that depending on one result of evaluating the potential difference between the two input signal lines one of the input signal lines is charged by adding the predetermined charge of the respective switched charging unit while the respective other of the input signal lines is discharged by removing the predetermined charge of the respective switched discharging unit. | 01-03-2013 |
20130015992 | DATA CONVERSION METHOD BASED ON SCALE-ADJUSTED B-MAPAANM Horio; YoshihikoAACI Warabi-shiAACO JPAAGP Horio; Yoshihiko Warabi-shi JPAANM Jinno; KenyaAACI Yokohama-shiAACO JPAAGP Jinno; Kenya Yokohama-shi JPAANM Kohda; TohruAACI FukuokaAACO JPAAGP Kohda; Tohru Fukuoka JPAANM Aihara; KazuyukiAACI Narashino-shiAACO JPAAGP Aihara; Kazuyuki Narashino-shi JP - There is provided a data conversion method based on β-map suited for an A/D converter or chaos generator, that is adapted to an integrated circuit and capable of providing stable operation of the circuit. The data conversion method based on scale-adjusted β-map includes a discrete time integrator | 01-17-2013 |
20130021182 | ACHIEVING HIGH DYNAMIC RANGE IN A SIGMA DELTA ANALOG TO DIGITAL CONVERTER - A continuous-time sigma-delta analog to digital converter (CTSD ADC) includes a comparator that samples the time integral of an analog signal at each rising edge and falling edge of a sampling clock. A feedback block, operating as a digital to analog converter, receives the outputs of the comparator and generates corresponding analog signals also at each rising and falling edge of the sampling clock. The feedback blocks are implemented as either switched-resistor or switched-current circuits. High signal-to-noise ratio (SNR) is achieved in the CTSD ADC without the need to use very high sampling clock frequencies. Compensation for excess loop delay is provided using a local feedback technique. In an embodiment, the sigma delta modulator in the CTSD ADC is implemented as a second order loop, and the comparator as a two-level comparator. | 01-24-2013 |
20130021183 | CONTINUOUS-TIME OVERSAMPLED CONVERTER HAVING PASSIVE FILTER - A continuous-time sigma-delta analog-to-digital converter includes a first integrator stage to integrate a difference between a first differential signal derived from a differential analog input signal and a second differential signal derived from a quantized output signal, a quantizer and a low pass filter. The first integrator stage has a differential operational amplifier, first, second, third, and fourth input resistors, and a first pair of integrating capacitors. The differential analog input signal is received at first and second input nodes of the converter. The first and third input resistors are coupled in series between the first input node and a first input of the operational amplifier. The second and fourth input resistors are coupled in series between the second input node and a second input of the operational amplifier. The first and second input resistors are coupled to the third and fourth input resistors, respectively. | 01-24-2013 |
20130021184 | DIRECT FEEDBACK FOR CONTINUOUS-TIME OVERSAMPLED CONVERTERS - A continuous-time sigma-delta analog-to-digital converter includes a plurality of integrator stages, in which one of the integrator stages includes a current buffer that drives an integrating capacitor. The analog-to-digital converter includes an outer feedback digital-to-analog converter and an inner digital-to-analog converter. The inner digital-to-analog converter is a current-mode digital-to-analog converter that converts the digital output signal to an analog current feedback signal, which is provided to an output of the integrator stage that includes the current buffer. Both the analog current feedback signal and an input signal provided to the current buffer are integrated by the integrating capacitor. | 01-24-2013 |
20130021185 | Low Noise Front End For Pulsed Input System - Embodiments of the invention provide a pulsed signal detection system with reduced noise bandwidth in the frontend. Analog to digital conversion speed is decoupled from the pulsed duty cycle timing. This in turn reduces the power consumption of the ADC and the front end while providing a high dynamic range. The ADC may be a continuous time sigma delta converter to reduce the drive requirements of the front end. | 01-24-2013 |
20130057421 | A/D CONVERTER - An arithmetic operation circuit provided in a delta-sigma modulator of a delta-sigma A/D converter includes two reference capacitors which are respectively provided at a positive side input node and a negative side input node of an operational amplifier. When a signal corresponding to an output of the modulator is added or subtracted to or from an input signal, the amount of charge added to the input node of the operational amplifier is made to be always the same regardless of the reference voltage by complementarily switching the connection of the reference capacitors at the positive side input node and the negative side input node, and thereby the potential of the input node of the operational amplifier is made to converge to the common mode potential of the circuit. | 03-07-2013 |
20130063293 | Parallel Multibit Digital-to-Digital Sigma-Delta Modulation - Digital input words are received in parallel by a parallel digital-to-digital sigma-delta modulator. Error words corresponding to quantization error are added in parallel to the input words to form encoded data words. The encoded data words are quantized into parallel output words and the error words resulting from such quantization are distributed across parallel modulator stages to effect a predetermined quantization error spectral distribution. The quantized output words are output in parallel. | 03-14-2013 |
20130076547 | Sigma-Delta Modulation with Reduction of Spurs Using a Dither Signal - A method includes operating on a sigma-delta modulated signal to reduce a dither signal component in one of a first signal and a second signal, the first signal being an integer portion corresponding to a digital frequency ratio and the second signal corresponding to a fractional portion of the digital frequency ratio. In at least one embodiment of the method, the operation is performed digitally in a frequency synthesizer. | 03-28-2013 |
20130076548 | Delta Sigma Modulator - A modulation system and method for a converter system, preferable a Delta Sigma converter, is described. The system is operable to adjust the modulation performed depending on the specified format of the input and output signals for the converter. The feedback and feed forward pulsed may be adjusted depending on the requirements of the converter. | 03-28-2013 |
20130088376 | SIGMA-DELTA MODULATOR WITH SAR ADC AND TRUNCATER AND RELATED SIGMA-DELTA MODULATION METHOD - A sigma-delta modulator includes a processing circuit, a quantizer, a truncater and a feedback circuit. The processing circuit receives an input signal and an analog information and generates an integrated signal by perform an integration upon a difference between the input signal and the analog information. The quantizer includes a successive approximation register (SAR) analog-to-digital converter (ADC) for receiving the integrated signal and generating a digital information according to the integrated signal. The truncater receives the digital information and generates a truncated information according to the digital information. The feedback circuit generates the analog information to the processing circuit according to the truncated information. | 04-11-2013 |
20130099949 | DELTA-SIGMA MODULATOR WITH FEEDBACK SIGNAL MODIFICATION - A delta-sigma modulator ( | 04-25-2013 |
20130106633 | NOISE-SHAPING TIME TO DIGITAL CONVERTER (TDC) USING DELTA-SIGMA MODULATION METHOD | 05-02-2013 |
20130113642 | Duty Cycle Translator Methods and Apparatus - Methods and apparatus for translating duty cycle information in duty-cycle-modulated signals to higher frequencies or higher data rates. An exemplary duty cycle translator includes a duty cycle evaluator, a high-speed digital counter, and a comparator. The duty cycle evaluator generates a first digital number representing a duty cycle of a low-frequency input duty-cycle-modulated (DCM) signal. The comparator compares the first digital number to a second digital number generated by the high-speed digital counter, and generates, based on the comparison, an output DCM signal having a higher frequency or data rate than the frequency or data rate of the low-frequency input DCM signal but a duty cycle that is substantially the same as the duty cycle of the low-frequency input DCM signal. | 05-09-2013 |
20130135131 | IDLE TONE SUPPRESSION CIRCUIT - A hysteretic digital filter includes a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit. The control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes. | 05-30-2013 |
20130141264 | REDUCED RESIDUAL OFFSET SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER (ADC) WITH CHOPPER TIMING AT END OF INTEGRATING PHASE BEFORE TRAILING EDGE - An analog-to-digital converter (ADC) has a chopper-stabilized sigma-delta modulator (SDM). The SDM uses switched-capacitor integrators to sample, hold, and integrate an analog input in response to non-overlapping multi-phase clocks. Chopper multipliers are inserted on the inputs and outputs of an op amp in a first stage integrator. The chopper multipliers swap or pass through differential inputs in response to non-overlapping chopper clocks. A master clock operating at a frequency of the multi-phase clocks is divided down to trigger generation of the chopper clocks. Delay lines ensure that the edges of the chopper clocks occur before the edges of the multi-phase clocks. The chopper multipliers have already switched and are thus stable when multi-phase clocks change so charge injection at switches controlled by the multi-phase clocks is not immediately modulated by chopper multipliers. This clock timing increases the time available to respond to charge injection at switches improving linearity. | 06-06-2013 |
20130154863 | AMPLIFIER, FULLY-DIFFERENTIAL AMPLIFIER AND DELTA-SIGMA MODULATOR - An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level. | 06-20-2013 |
20130169459 | ANALOG-TO-DIGITAL CONVERTER WITH DELTA-SIGMA MODULATION AND MODULATION UNIT THEREOF - An analog-to-digital converter with delta-sigma modulation and the modulation unit thereof are disclosed, wherein, for each modulation unit, a pair of input capacitors, a pair of integration capacitors and a differential feedback are operated in a swapping manner for the positive path and the negative path, such that circuit mismatch problems are effectively removed. | 07-04-2013 |
20130169460 | DELTA-SIGMA MODULATOR, INTEGRATOR, AND WIRELESS COMMUNICATION DEVICE - A delta-sigma modulator includes: an integrator having an operational amplifier; a quantizer quantizing an output of the integrator; a first D-A converter converting an output of the quantizer to a current signal to provide negative feedback to the operational amplifier; a feedforward path feeding forward an input of the integrator to the quantizer; and a second D-A converter converting the output of the quantizer to a current signal to provide negative feedback to the quantizer. The integrator includes a resistive element having a first end connected to the input of the integrator and a second end connected to an inverting input of the operational amplifier, n capacitive circuits connected in series between the inverting input and an output of the operational amplifier, and (n−1) resistive elements each having a first end connected to an interconnecting node of the capacitive circuits and a second end connected to a common node. | 07-04-2013 |
20130187803 | Continuous Time Delta Sigma Converter Having A VCO Based Quantizer - A continuous-time delta sigma converter includes a loop filter having a plurality of serially coupled integrators including a first integrator responsive to an input of the Delta Sigma converter and a last integrator responsive to a first feedback loop and providing an integrated output signal, and a voltage controlled oscillator (VCO) based quantizer responsive to the loop filter for integrating the integrated output signal and providing a digital output signal. The first feedback loop includes a first time delay circuit responsive to the output of the quantizer and at least one switched capacitor digital to analog converter (DAC) responsive to the first time delay circuit. The first feedback loop is configured to differentiate the digital output signal twice and provide the last integrator of the loop filter with a double differentiated analog signal to reduce excess loop delay. | 07-25-2013 |
20130187804 | Continuous Time DeltaSigma Analog-To-Digital Converter With A Mitigation Bit Shifting Multiplex Array - A continuous time ΔΣ analog-to-digital converter with mitigation bit shifting multiplex array including a loop filter, a VCO responsive to analog signal configured to adjust the output frequency based on the magnitude of the analog signal and produce a digital output, a multi-stage phase quantizer responsive to the digital output configured to determine the phase of the VCO by comparing the phase of the VCO for a particular sample to a reference phase at said particular sample and generate a quantized phase difference value, and a multiplexer array coupled to the multi-stage phase quantizer configured to shift selected misaligned bits of the quantized phase difference value by a predetermined amount of bits to mitigate bit shifting of the multi-stage phase quantizer. | 07-25-2013 |
20130194117 | DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER AND METHOD FOR OPERATING SAME - The present invention relates to analog-to-digital converters and more particularly to a delta-sigma analog-to-digital converter | 08-01-2013 |
20130201045 | Digital-to-Analog Converter Implementing Hybrid Conversion Architecture - A digital-to-analog converter (DAC) implements a hybrid conversion architecture where the input digital data is oversampled and a flash converter is used to convert the M most significant bits (MSBs) of the oversampled data while a sigma-delta (Σ-Δ) converter is used to convert the remaining least significant bits (LSBs) of the oversampled data. In one embodiment, a merged flash converter is used to convert the M MSBs and the digital bit stream generated by the sigma-delta converter. | 08-08-2013 |
20130201046 | SIGMA-DELTA ADC WITH TEST CIRCUITRY - The invention concerns a sigma-delta switched capacitor analog to digital converter (ADC) comprising: an input line ( | 08-08-2013 |
20130207821 | METHOD AND APPARATUS FOR SEPARATING THE REFERENCE CURRENT FROM THE INPUT SIGNAL IN SIGMA-DELTA CONVERTER - An integrator system may have a pair of sampling circuits each having a sampling capacitor to sample a respective component of a differential input signal, and an integrator having inputs coupled to outputs of the sampling circuits. The system may have a shorting switch coupled between input terminals of the sampling capacitors. The shorting switch may be engaged during an interstitial phase between sampling and output phases of the sampling circuits. By shorting input terminals of the sampling capacitors together, the design reduces current drawn by the system and, in some designs, severs relationships between current draw and information content sampled by the system. Configurations are disclosed for analog and digital input signals. | 08-15-2013 |
20130207822 | System and Method For High Speed Analog to Digital Data Acquistion - An analog to digital conversion system is disclosed which converts an analog signal to a digital representation thereof at a first sampling rate by distributing the analog signal to at least two signal paths, at least one signal path including a limiting mixer to mix the signal with a respective selected square wave and a smoothing (low pass) filter to filter the mixed signal before providing the mixed and filtered signal to a subconverter, the subconverter having a sampling rate less than the first sampling rate, and a digital matrix filter to combine the digital output of each subconverter to form a digital representation of the analog signal as sampled at the first rate. | 08-15-2013 |
20130214950 | CONTINUOUS TIME SIGMA DELTA ANALOG-TO-DIGITAL CONVERSION CIRCUITRY - Continuous time sigma delta (ΣΔ) analog-to-digital conversion (ADC) circuitry and method in which current mode ΣΔ ADC circuitry is driven directly by current mode mixing circuitry, thereby avoiding a need for a current-to-voltage driver between the input signal mixing circuitry and ΣΔ ADC circuitry. | 08-22-2013 |
20130214951 | SIGMA-DELTA MODULATORS WITH EXCESS LOOP DELAY COMPENSATION - A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator includes a multi-stage loop filter, a quantizer, and a digital-to-analog converter. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. Each stage of the multi-stage loop filter includes a feedback network. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. The digital-to-analog converter receives the digital output signal and converts the digital output signal to a compensation signal. The digital-to-analog converter provides the compensation signal to a plurality of internal nodes in the feedback network of the last stage of the multi-stage loop filter. | 08-22-2013 |
20130214952 | Two-stage phase digitizer - An analog-to-digital converter (ADC) is described. This ADC converts an analog signal into a digital value using a two-pass digitization process. In a first operation, coarse digitization is performed by an averaging converter based on a set of references. Then, in a second operation, fine digitization is performed by either another averaging converter or the same averaging converter based on a subset of the set of references that is progressively closer to an instantaneous value of the analog signal. For example, the coarse digitization may be performed by a low-resolution ADC stage and the fine digitization may be performed by a sigma-delta ADC, such as a single-bit sigma-delta ADC. Moreover, the other averaging converter may use dynamic element matching to shuffle reference elements used to generate the subset. In this way, the ADC may provide high resolution with reduced nonlinearity and quantization noise. | 08-22-2013 |
20130234872 | Delta-Sigma D/A Converter - A delta-sigma D/A converter, by which a digital valued, input signal is convertible into a binary, clock signal time discrete, output signal. By forming an average value of the output signal over a number of clock signal cycles, an analog value of the input signal can be displayed. The delta-sigma D/A converter is embodied in such a manner that, in use, it provides the output signal by serial arrangement of signal patterns of a set of signal patterns, wherein the signal patterns of the set are, in each case, binary, clock signal time discrete and extend over a signal pattern cycles total of a plurality of clock cycles. At least two signal patterns of the set have mutually different signal pattern average values, which are formed over the respective signal pattern cycles total, and all signal patterns of the set have, in each case, essentially the same number, especially exactly the same number, of edges. | 09-12-2013 |
20130249725 | CONFIGURABLE HARDWARE-SHARING MULTI-CHANNEL ADC - Representative implementations of devices and techniques provide configurable multi-channel analog-to-digital conversion. In a multi-channel analog-to-digital converter (ADC), one or more ADC stages may be operatively coupled to a different ADC in each of various operating modes. | 09-26-2013 |
20130249726 | INPUT CONVERTER FOR A HEARING AID AND SIGNAL CONVERSION METHOD - In order to minimize noise and current consumption in a hearing aid, an input converter including a first voltage transformer and an analog-to-digital converter of the delta-sigma type for a hearing aid is devised. The analog-to-digital converter of the input converter has an input stage, an output stage, and a feedback loop, and the input stage includes an amplifier (Q | 09-26-2013 |
20130265183 | NOISE REDUCTION METHOD WITH CHOPPING FOR A MERGED MEMS ACCELEROMETER SENSOR - An apparatus includes a capacitance-to-voltage converter circuit configured to be electrically coupled to a micro-electromechanical system (MEMS) sensor circuit. The capacitance-to-voltage converter circuit includes a differential chopping circuit path configured to receive a differential MEMS sensor output signal and invert a polarity of the differential chopping circuit path, and a differential sigma-delta analog to digital converter (ADC) circuit configured to sample the differential MEMS sensor output signal and provide a digital signal representative of a change in capacitance of the MEMS sensor. | 10-10-2013 |
20130271303 | Analog to Digital Conversion - A delta-sigma analog-to-digital converter comprises: a summing stage having a first input for an input signal and a second input for a feedback signal; an integrator coupled to an output of the summing stage; an analog-to-digital conversion stage coupled to an output of the integrator; and a switchable gain stage coupled in a feedback path between an output of the analog-to-digital conversion stage and the second input of the summing stage. The switchable gain stage is arranged to switch, responsive to a gain selection signal, between a first gain and a second gain via a transition period comprising time periods during which the switchable gain stage has the first gain interleaved with time periods during which the switchable gain stage has the second gain. The time periods at the first gain comprise periods that decrease in duration over the transition period and the time periods at the second gain comprise periods that increase in duration over the transition period. | 10-17-2013 |
20130271304 | Continuous Time Analogue/Digital Converter - Continuous time analogue/digital converter, comprising a sigma delta modulator (MSD | 10-17-2013 |
20130271305 | RESISTOR-BASED SIGMA-DELTA DAC - An inverter-driven resistor-ladder digital-to-analog (DAC) converter includes a resistor-ladder network that comprises a resistor for each bit signal of a multi-bit input signal. Each resistor of the resistor-ladder network comprises an input end and an output end. The input end of each resistor is coupled to a corresponding bit signal of the multi-bit input signal, and the output end of each resistor is coupled to an output node of the resistor-ladder network. An output voltage is generated at the output node that is based on the multi-bit input signal. In one exemplary embodiment, the multi-bit input signal is a sigma-delta (ΣΔ) modulated multi-bit input signal. In another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are related by a binary weighting. In still another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are substantially equal. | 10-17-2013 |
20130278454 | ELECTRONIC DEVICE AND METHOD FOR ANALOG TO DIGITAL CONVERSION ACCORDING TO DELTA-SIGMA MODULATION USING DOUBLE SAMPLING - The modulator comprises a first and second integration stages, and a comparator, the first integration stage is fully differential having: an amplifier, sets of input sampling capacitors and feedback capacitors, and the first integration stage is configured to sample the analog input voltage on a set of input capacitors during a first portion of a clock cycle and on a set of input capacitors during a second portion of the clock cycle and to sample the feedback reference voltage on a set of feedback capacitors during the first portion of the clock cycle and on a set of feedback capacitors during the second portion of the clock cycle, and the first set of feedback capacitors and the second set of feedback capacitors are randomly selected out of the plurality of sets of feedback capacitors from cycle to cycle. | 10-24-2013 |
20130293404 | SYSTEMS AND METHODS FOR PERFORMING DIGITAL MODULATION - Circuitry for performing digital modulation is described. The circuitry includes a digital modulator. The digital modulator receives a first signal with a first duty cycle. The digital modulator also receives a second signal with a second duty cycle. The digital modulator further produces a monotonic multiplied modulated signal based on the first signal and the second signal. | 11-07-2013 |
20130300592 | Device, System and Method For Digital Pulse-Density Modulation - A novel pulse density modulator is disclosed which includes at least one sigma delta modulator operating at a clock rate selected to provide a pre-selected timing resolution for sampling an input signal. The sigma delta modulator employs a hysteresis element to reduce the average transition rate of the output signal of the sigma delta modulator to reduce switching losses. The novel pulse density modulator can provide at least a two or three level output, as desired. | 11-14-2013 |
20130335247 | SYSTEM AND METHOD FOR CHOPPING OVERSAMPLED DATA CONVERTERS - In accordance with an embodiment, a circuit includes an analog chopping circuit having a first input coupled to a system input and a second input coupled to a first chopping signal, an oversampled data converter having an input coupled to an output of the analog chopping circuit, where the oversampled data converter is configured to produce an oversampled digital signal at an output of the oversampled data converter. The circuit further includes a digital filter having an input coupled to the output of the oversampled data converter, and a digital chopping circuit including a first input coupled to the output of the oversampled data converter, and a second input coupled to a second chopping signal. The digital filter is configured to filter quantization noise generated by the oversampled data converter. | 12-19-2013 |
20130342377 | PHASE-BASED ANALOG-TO-DIGITAL CONVERSION - One embodiment includes a phase-based analog-to-digital converter (ADC) system. The system includes a voltage-to-phase converter configured to convert an input voltage to a phase difference corresponding to a phase-delay with respect to an input clock signal that is based on a magnitude of the input voltage. The system also includes a phase-to-digital converter configured to convert the phase difference into a digital output signal having a digital value corresponding to a magnitude of the phase difference. | 12-26-2013 |
20140015700 | MASH SIGMA-DELTA MODULATOR AND DA CONVERTER CIRCUIT - A MASH sigma-delta modulator includes: parallel integration units in M stages configured to receive N pieces of data from a previous stage, to perform integral calculation in parallel; parallel differentiation units each configured to calculate a difference between neighboring overflows of the corresponding parallel integration unit of the integration part; and a parallel-to-serial conversion part configured to parallel-to-serial convert outputs from the differentiation part, wherein the parallel integration units receive pieces of input data in parallel, the parallel integration unit in each stage and the parallel differentiation unit in each stage perform integral calculation and differential calculation in each stage in one operation clock of a frequency 1/N times a master clock frequency, and the parallel-to-serial conversion part outputs the result of the parallel-to-serial conversion in synchronization with the master clock. | 01-16-2014 |
20140028483 | LOW-POWER SIGMA-DELTA CONVERTER - A sigma-delta converter may include an input node, a switched capacitor input stage integrating a difference signal between an input signal from the input node and a feedback signal representing an output signal, and a switched capacitor adder coupled downstream from the switched capacitor input stage and generating a sum signal based upon the input signal with a signal generated by the switched capacitor input stage. The sigma-delta converter may include a switched capacitor output stage amplifying the sum signal and generating an analog amplified signal, a quantization stage coupled in cascade to the switched capacitor output stage and generating the output signal as a digital replica of the analog amplified signal, and a circuit generating the feedback signal as an analog replica of the output signal. | 01-30-2014 |
20140035768 | ANALOG-TO-DIGTAL CONVERTER - An analog-to-digital converter (ADC) comprises a plurality of time-interleaved integrating ADCs having feedback from an integrated output signal. In variations, the time-interleaved integrating ADCs have feedback compensation from at least one measure of quantization error. The time-interleaved integrating ADCs may also share a single comparator and may also share a single current source. | 02-06-2014 |
20140035769 | LOW DISTORTION FEED-FORWARD DELTA-SIGMA MODULATOR - A low distortion feed forward delta sigma modulator includes a first adder configured to receive a feedback signal and an input signal. The modulator also includes a first integrator configured to receive an output from the first adder, and a second integrator configured to receive an output from the first integrator. The modulator further includes a second adder configured to receive a second integrated path from the second integrator, a first integrating path from the first integrator and a first summing path from the input signal. The modulator also has a last integrator configured to receive an output from the second adder. | 02-06-2014 |
20140035770 | ANALOGUE-TO-DIGITAL CONVERTER - An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input. | 02-06-2014 |
20140043176 | MODULATOR WITH VARIABLE QUANTIZER - Representative implementations of devices and techniques provide a variable quantizer for a modulator. A compare value of the quantizer changes with each clock cycle of the modulator. The variable compare value results in a spread spectrum output of the modulator. | 02-13-2014 |
20140043177 | Apparatuses and Methods for Linear to Discrete Quantization Conversion with Reduced Sampling Variation Errors - Provided is an apparatus for converting a continuous-time, continuously variable signal into a sampled and quantized signal, which includes an input line for accepting an input signal, multiple processing branches coupled to the input line, and an adder coupled to outputs of the plurality of processing branches. Each of the processing branches includes a sampling/quantization circuit and a digital bandpass interpolation filter having an input coupled to an output of the sampling/quantization circuit. The digital bandpass interpolation filters in different ones of the processing branches have frequency responses that are centered at different frequencies. The digital bandpass interpolation filter in at least one of the processing branches includes: (i) a quadrature downconverter, (ii) a first lowpass filter and a second lowpass filter, (iii) a first interpolator and a second interpolator, each having an input for inputting a variable interpolant value, and (iv) a quadrature upconverter. | 02-13-2014 |
20140055294 | RESONATOR AND OVERSAMPLING A/D CONVERTER - Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node. | 02-27-2014 |
20140070972 | Circuit For Digitizing A Sum Of Signals - A circuit for digitizing a sum of a first input signal and a plurality of second input signals has a passive adder that sums the second input signals and outputs a summation signal and a multi-bit quantizer circuit. The quanitzer circuit compares the summation signal at a first comparator input with a signal at a second comparator input, which is derived from the first input signal and has an appropriate polarity so that the difference between the summation signal and the signal at the second comparator input is indicative of the sum of the first input signal and the plurality of second input signals. The comparator also produces a comparator output signal based on the sum of the first input signal and the plurality of second input signals. The quantizer circuit also has a control logic block for determining a multi-bit representation of the sum from the comparator output signal. | 03-13-2014 |
20140077982 | Delta Modulator - The invention comprises sample-and-hold circuit and digital-to-analog converter into a differentially operational unit. In analog-to-digital conversion unit, on the premise of fixed or non-fixed quantization error, analog-to-digital converter dynamically adjusts number of bits solved or size of quantized step according to the magnitude of differential voltage between sampled input signal and previously quantized input signal, thus this invention can reduce the non-necessary power consumption from redundant code and overload of input signal. Differentially operational unit and analog-to-digital unit share the same capacitor array which has binary-weighted arrangement to reduce circuit complexity and area. | 03-20-2014 |
20140077983 | MODULATION - A modulator and a method are disclosed. The modulator is for generating a band pass signal and comprises: sigma delta modulation logic operable to receive an input signal and to perform at least a 3-level quantisation of the input signal to generate an at least 3-level quantised signal; and requantisation logic operable to requantise the at least 3-level quantised signal to a 2-level quantised signal to be provided as the band pass signal. This approach improves the coding efficiency achieved compared to that m possible using a 2-level sigma delta modulator, whilst also providing improved noise performance due to the inherent linearity of the 2-level quantised signal which is provided to drive the switch mode power amplifier. Accordingly, the performance of the modulator is improved by increasing its coding efficiency whilst maintaining its linearity which improves the noise performance in adjacent channels. | 03-20-2014 |
20140077984 | DELTA-SIGMA MODULATOR USING HYBRID EXCESS LOOP DELAY ADJUSTMENT SCHEME AND RELATED DELTA-SIGMA MODULATION METHOD - A delta-sigma modulator has a delta-sigma modulation loop and a plurality of excess loop delay (ELD) adjustment circuits. The delta-sigma modulation loop converts an analog input into a digital output. The ELD adjustment circuits perform different ELD adjustments according to the digital output for jointly adjusting an ELD of the delta-sigma modulation loop. Besides, a delta-sigma modulation method includes at least the following steps: converting an analog input into a digital output through a delta-sigma modulation loop; and employing different ELD adjustment schemes for jointly adjusting an ELD of the delta-sigma modulation loop according to the digital output. | 03-20-2014 |
20140077985 | ANALOG-TO-DIGITAL CONVERSION CIRCUIT AND METHOD OF DRIVING THE SAME - An analog-to-digital conversion circuit includes: a clock generating circuit which generates a clock signal including a first initial period and plural normal periods following the first initial period, the first initial period being one of a high period and a low period and being a first period immediately after a reset release, each of the normal periods being one of a high period and a low period and shorter than the first initial period; and an incremental analog-to-digital converter which operates using the clock signal. | 03-20-2014 |
20140085120 | CHOPPER-STABILIZATION METHOD AND APPARATUS FOR SIGMA DELTA MODULATORS - An embodiment of the invention includes an analog to digital converter including a sigma delta modulator that generates a feedback signal. The sigma delta modulator includes a quantizer responsive to an input signal and the feedback signal and generates a quantizer output. The sigma delta modulator further includes a chopper-stabilized amplifier that provides a reference signal to the sigma delta modulator, and the chopper-stabilized amplifier is stabilized according to a combination of a chopping signal and the quantizer output. | 03-27-2014 |
20140125505 | BASE-BAND TO RADIO FREQUENCY UP-CONVERTER - A base band to frequency up-converter is described wherein the base band to frequency up-converter comprises a first input for receiving a first base band signal of first base band samples and a second input for receiving a second base band signal of second base band samples and an output for providing up-converted radio signal samples. The base-band to radio frequency up-converter further comprises a phase converter for converting the first base band signal of first base band samples and the second base band signal of second base band samples into a first intermediate signal of first intermediate samples, a second intermediate signal of second intermediate samples, and a third intermediate signal of third intermediate samples. The intermediate samples are then up-converted into radio signal samples. | 05-08-2014 |
20140132434 | LOW LATENCY FILTER - In an embodiment, a set of input samples are filtered to provide a set of filtered samples using an N-tap filter. A steady-state-response-output sample of the N-tap filter is determined from a N/2th sample of the set of filtered samples. | 05-15-2014 |
20140159929 | Delta-modulation signal processors: linear, nonlinear and mixed - Disclosed are nine functional circuits for the direct processing of a delta-modulated pulse stream. These circuits can be integrated separately, as standalone circuits, or integrated into a programmable, functional unit to form a system on chip (SoC). Disclosed functional units are low-power consuming, simple, reliable and inexpensive. Because of the non-positional nature of delta-sigma modulated (DSM) pulses and the averaging nature of the demodulator, disclosed circuits are tolerant to catastrophic errors, which is not the case with ordinary n-bit DSP hardware. | 06-12-2014 |
20140159930 | SIGMA-DELTA MODULATORS WITH HIGH SPEED FEED-FORWARD ARCHITECTURE - A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator is used to generate a digital output signal. The sigma-delta modulator includes a multi-stage loop filter and a quantizer. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. The quantizer is coupled to the multi-stage loop filter. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. Different feed-forward paths of the sigma-delta modulator are available for different frequency bands. | 06-12-2014 |
20140159931 | METHOD AND APPARATUS FOR ANALOG TO DIGITAL CONVERSION - An analog to digital converter receives an analog input signal. The analog input signal is converted into a digital output signal. The converting includes shaping quantization noise in response to: a signal-to-noise ratio of the analog input signal; and a power of the converter. | 06-12-2014 |
20140167991 | LOW POWER ANALOG TO DIGITAL CONVERTER - Described is an analog to digital converter (ADC) which comprises: a sigma-delta modulator to receive an analog signal, the sigma-delta modulator operable to perform chopping to cancel common-mode noise; and one or more counters coupled to the sigma-delta modulator to generate a digital code representative of the analog signal. | 06-19-2014 |
20140167992 | CAPACITIVE ELEMENT, CAPACITOR ARRAY, AND A/D CONVERTER - A capacitive element includes first electrodes and second electrodes that are alternately arranged in a concentric form. Each of the first electrodes and the second electrodes is formed with closed loop form, in at least one wiring layer provided on or above a substrate. | 06-19-2014 |
20140167993 | HYBRID DIGITAL-TO-ANALOG CONVERTER AND METHOD THEREOF - Hybrid digital-to-analog converter and method thereof are provided. The hybrid digital-to-analog converter (DAC) includes a data processor, at least one first type DAC, at least one second type DAC, and an output circuit. The data processor processes an input digital signal to output at least one of first and second digital signals which are related to a higher bit portion and a lower bit portion of the input digital signal, respectively. If the data processor outputs the first digital signal to the first type DAC, the first type DAC converts the first digital signal. The at least one second type DAC receives and converts the second digital signal outputted from the data processor. The output circuit receives at least one output signal of the first and the second type DACs to output an output analog signal. | 06-19-2014 |
20140167994 | Digital-to-Analog Converter - An apparatus and method for digital-to-analog conversion. A digital-to-analog converter includes a sampler for resampling a digital signal and a DAC array. The DAC array includes a sequencer, a unit element activator, and an array of one-bit DACs (unit elements). The unit elements are activated in a cyclical sequence, based on the resampled digital signal. Unit elements in the sequence may be skipped, based on a disruption probability. The disruption probability may be determined randomly, or pseudo-randomly. Output signals of the unit elements are summed or averaged to form an analog signal. The converter may include a filter to filter the analog signal. | 06-19-2014 |
20140167995 | ANALOG-TO-DIGITAL CONVERTER - According to embodiments of the present invention, an analog-to-digital converter is provided. The analog-to-digital converter includes an input configured to receive an input signal, a feed-forward path connected to the input configured to feed forward the input signal, a processing path including a loop filter, wherein the loop filter includes at least one local feedback path configured to feed back an output signal of the loop filter to an input of the loop filter, a first combiner configured to combine the input signal fed forward by the feed-forward path with an output of the processing path, a quantizer configured to generate an output signal of the converter, a feed-back path configured to feed back the output signal, and a second combiner wherein the processing path is connected to the second combiner and the second combiner is configured to combine the input signal with the fed back output signal of the converter and supply the result of the combination to the processing path. | 06-19-2014 |
20140191891 | ANALOGUE-TO-DIGITAL CONVERTER - An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from the integrator, and circuitry arranged so that reference inputs to the amplifier and to the comparator can be maintained at a common voltage derived from the converter reference input. | 07-10-2014 |
20140203955 | SIGMA-DELTA MODULATOR WITH TRIMMED REFERENCE VOLTAGE FOR QUANTIZER - A sigma delta modulator includes a first circuit that receives an analog signal and provides an intermediate signal and a first quantizer signal and further includes a first quantizer that receives the first quantizer signal and provides a first quantizer output. Also included are a second input circuit that receives the intermediate signal and provides a second quantizer signal and a second quantizer that receives the second quantizer signal and provides a second quantizer output. The first quantizer includes a programmable circuit having a first reference and a negative of the first reference, a first comparator having a first input coupled to the first quantizer signal, a second input coupled to the first reference and a second comparator having a second input coupled to the first quantizer signal a second input coupled to the negative. The first and second comparators have outputs that form the output of the first quantizer. | 07-24-2014 |
20140210655 | SIGMA-DELTA CONVERTER SYSTEM AND METHOD - A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included. | 07-31-2014 |
20140218223 | MULTIPLEXED SIGMA DELTA MODULATOR - A multiplexed sigma delta modulator constituted of: a control circuitry; a multiplexer responsive to the control circuitry and arranged to receive a plurality of input signals; a comparing circuit, a first input of the comparing circuit coupled to the output of the multiplexer; an integrator, the input of the integrator coupled to the output of the comparing circuit; a latched comparing circuit, one input of the latched comparing circuit coupled to the output of the integrator; a plurality of storage elements, each associated with one of the plurality of inputs; and a feedback circuit arranged to feedback the output of the latched comparing circuit to the second input of the comparing circuit, wherein the control circuitry is further arranged to store the charge of an element of the integrator on the associated storage element when the associated signal is not passed by the multiplexer to the output of the multiplexer. | 08-07-2014 |
20140232579 | LOW POWER QUANTIZER FOR ANALOG TO DIGITAL CONVERTER - A quantizer includes a voltage reference network and a set of comparators coupled with the voltage reference network. The voltage reference network generates a plurality of reference voltages. Each of the comparators receives an input signal and produces a sequence of digital samples. The set of comparators includes first, second, and third subsets of comparators. Each comparator of the first subset includes a switched capacitor stage, each comparator of the second subset includes a preamplifier stage, and each comparator of the third subset includes a switched capacitor stage. The first and third subsets of comparators compares the input signal with reference voltages corresponding to the upper and lower voltage ranges of the input signal, and the second subset of comparators compares the input signal with reference voltages corresponding to the middle voltage range of the input signal. | 08-21-2014 |
20140240153 | ADVANCED OVERLOAD PROTECTION IN SIGMA DELTA MODULATORS - A Sigma Delta Modulator (SDM) signal overload conditions are overcome without sacrificing performance or driving up implementation costs. These advanced overload protection method can be applied to any higher order SDM where overloading is a serious system concern. | 08-28-2014 |
20140240154 | MULTI-RATE SIGMA DELTA DIGITAL-TO-ANALOG CONVERTER - A multi-rate sigma delta digital-to-analog converter may include a signal input and a signal output, and multiple modulators. A first of the modulator may convert a digital input signal on the signal input to an analog output signal on the signal output. Subsequent of the multiple modulators may shape and cancel quantization noise received from a proceeding modulator. One of the modulators may operate at a higher frequency than does another of the multiple modulation loops. | 08-28-2014 |
20140240155 | 2-Phase Switched Capacitor Flash ADC - An input stage for a switched capacitor analog-to-digital converter has a differential voltage input receiving an input voltage, a differential reference voltage input receiving a chopped reference voltage, a common voltage connection, and a differential output. A pair of input capacitors is coupled between the differential voltage input and the differential output and a pair of reference capacitors is coupled between the differential reference voltage input. A switching unit is controlled by a first and second phase operable during the first phase to connect a first terminal of the input capacitors with the common voltage connection and couple the first terminal of the reference capacitors with the inverted differential voltage reference; and during a second phase to connect the first terminal of the input capacitors with the differential input voltage and couple the first terminal of the reference capacitors with the non-inverted differential voltage reference | 08-28-2014 |
20140240156 | ELECTRONIC COMPENSATION OF CAPACITIVE MICRO-MACHINED SENSORS PARASITIC MODES IN FORCE-FEEDBACK INTERFACE SYSTEMS - Operating capacitive sensors in force feedback mode has many benefits, such as improved bandwidth, and lower sensitivity to process and temperature variation. To overcome, the non-linearity of the voltage-to-force relation in capacitive feedback, a two-level feedback signal is often used. Therefore, a single-bit Σ-Δ modulator represents a practical way to implement capacitive sensors interface circuits. However, high-Q parasitic modes that exist in high-Q sensors (operating in vacuum) cause a stability problem for the Σ-Δ loop, and hence, limit the applicability of Σ-Δ technique to such sensors. A solution is provided that allows stabilizing the Σ-Δ loop, in the presence of high-Q parasitic modes. The solution is applicable to low or high order Σ-Δ based interfaces for capacitive sensors. | 08-28-2014 |
20140253354 | Multi-Level Capacitive DAC - A digital-to analog converter (DAC) of the charge transfer type can be used in a sigma delta modulator for generating N output levels, wherein an output level is defined by a respective amount of charge transferred by the DAC. The DAC has a first capacitor switch unit receiving a reference voltage and a first digital input value to transfer first output charges, at least one second capacitor switch unit receiving the reference voltage and a second digital input value, wherein an output of the second capacitor switch unit is coupled in parallel with an output of the first capacitor switch unit to generate a sum of first and second transferred output charges; and a sequencer controlling switches of the first and second capacitor switch units wherein switching sequences according to individual first and second digital input values are provided for every DAC input value to generate the N output levels. | 09-11-2014 |
20140253355 | 4N+1 Level Capacitive DAC Using N Capacitors - A digital-to analog converter (DAC) of the charge transfer type for use in a sigma delta modulator, includes a capacitor switch unit operable to generate a 4n+1 output levels, comprising: a plurality of second switching units for coupling first terminals of a plurality of reference capacitor pairs with either a positive or a negative reference signal; wherein the second terminals of the plurality of reference capacitor pairs are coupled in parallel, respectively; wherein for even transfers a single switching combination is provided to achieve linearity and wherein for odd transfers an average of different switching combinations is provided to achieve linearity; wherein an even transfer is when an input of the DAC is even and an odd transfer is when an input to the DAC is odd. | 09-11-2014 |
20140266827 | ADC WITH NOISE-SHAPING SAR - Representative implementations of devices and techniques provide analog to digital conversion of analog inputs. A multistage comparator using a feed-forward technique can provide noise shaping of conversion errors. For example, the comparator may feed a conversion error forward from a first stage to a next stage of the multistage comparator. | 09-18-2014 |
20140266828 | RESONANT FILTER, DELTA-SIGMA A/D CONVERTER, AND SEMICONDUCTOR DEVICE - A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal. | 09-18-2014 |
20140266829 | Multi-Level Sigma-Delta ADC With Reduced Quantization Levels - A multi-level sigma-delta Analog to Digital converter provides multi-level outputs using a quantizer with reduced quantization levels. The converter comprises a direct path comprising a computation block, an analog integrator, a digital integrator and the quantizer with reduced quantization levels. Further, the converter comprises a feedback path arranged to provide to the computation block a feedback analog signal. The feedback analog signal is injected via the feedback path and the computation block directly at the input terminal of the quantizer. The converter allows reduction of the complexity of the quantizer. | 09-18-2014 |
20140285368 | Analog-to-Digital Converter - A continuous-time ΔΣ-ADC ( | 09-25-2014 |
20140320325 | CONTINUOUS-TIME DELTA SIGMA MODULATOR - A continuous-time delta sigma modulator, having an integrator and a comparator clocked with a clock frequency that are connected in a feedback loop, having a voltage source that is connected to the comparator for applying a threshold voltage to the comparator, in which an integration time constant of the integrator has a first resistor and a first capacitor, in which the voltage source has a second resistor and a second capacitor for setting the threshold voltage, in which the first resistor and the second resistor are part of a resistor pairing structure, and in which the first capacitor and the second capacitor are part of a capacitor pairing structure. | 10-30-2014 |
20140320326 | Method and Delta-Sigma Converter for a Sensor Signal, More Particularly a Signal of a Rotation Rate Sensor - A delta-sigma converter for a sensor signal is configured to emit a digital output signal using the sensor signal. The delta-sigma converter includes a control unit configured to generate a control signal on the basis of a frequency of signal level changes of the digital output signal. The delta-sigma converter further includes a digital compensation unit configured to emit a compensation signal using the digital output signal and the control signal. The delta-sigma converter is further configured to determine the digital output signal also using the compensation signal. | 10-30-2014 |
20140333462 | Sigma-Delta Modulator - A sigma-delta modulator ( | 11-13-2014 |
20140340248 | RESOLUTION-BOOSTED SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER - A method and an ADC circuit use multiple SD modulations on an analog value and apply digital post-processing of the pulse density modulation (PDM) streams from the SD modulations obtaining a higher resolution in the digital output value for a given oversampling ratio. SD ADC does not face the constraint of conversion time doubling for each additional bit of resolution. In one implementation, an SD ADC includes conversions in SD phase and a resolution-boosting phase. During SD phase, MSBs of the digital output value are generated from the sampled analog value using a first SD conversion. At the end of SD phase, the sampled analog value is reduced to “residual quantization error,” which remains in a capacitor of an integrator of SD ADC. In resolution-boosting phase, the LSBs of the digital output value are generated from residual quantization error using a second SD conversion that provides at least the LSBs. | 11-20-2014 |
20140340249 | TIME-INTERLEAVED SINGLE INPUT DUAL OUTPUT SIGMA-DELTA MODULATOR - Systems and methods can detect a relationship between portions of an analog input signal using a single sensing point, and can provide information about the detected relationship in a digital signal. A system can include an input transconductance stage, a gate circuit driven by a first control signal, a phase-select multiplexer circuit driven by a second control signal, and multiple analog-to-digital converter (ADC) channels. The ADC channels can include respective integrator circuits that receive information from the phase-select multiplexer circuit, and the ADC channels can include comparator circuits coupled to respective outputs of the integrator circuits. The outputs of the comparator circuits can be used as control signals for respective feedback multiplexers, or respective feedback current DACs, that selectively couple reference currents to the respective integrator circuit inputs. The feedback current DACs can be configured to continuously provide information to the respective integrator circuits. | 11-20-2014 |
20140340250 | TIME INTEGRATOR AND DELTA-SIGMA TIME-TO-DIGITAL CONVERTER - A time integrator integrates time axis information represented by a phase difference between two signals. The time integrator includes a pulse generation circuit configured to convert a time difference between edges of two input signals to a difference between pulse widths of two pulse signals, and to output the two pulse signals, a load circuit having load characteristics changed by the two pulse signals, and an oscillation circuit coupled to the load circuit, and having an oscillation frequency changing in accordance with the load characteristics of the load circuit. An output of the oscillation circuit is output as a result of time integration. | 11-20-2014 |
20140347200 | QUANTIZER WITH SIGMA-DELTA MODULATOR, ANALOG-TO-DIGITAL CONVERTER INCLUDING THE SAME AND QUANTIZATION METHOD USING THE SAME - The present invention provides a quantizer with a sigma-delta modulator, an analog-to-digital converter including the same and a quantization method using the same capable of obtaining a high signal-to-noise ratio with a relatively small number of comparators. The quantizer, the analog-to-digital converter and the quantization method of the present invention reduces quantization errors and increases noise shaping order. | 11-27-2014 |
20140347201 | METHOD AND SYSTEM FOR COMPENSATING A DELAY MISMATCH BETWEEN A FIRST MEASUREMENT CHANNEL AND A SECOND MEASUREMENT CHANNEL - A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel. | 11-27-2014 |
20140354459 | ELECTRIC SIGNAL CONVERSION - In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction. | 12-04-2014 |
20140361913 | COMMUNICATION SYSTEM AND SAMPLE RATE CONVERTER THEREOF - A communication system including a configurable sample rate converter and a controller is provided. The configurable sample rate converter, configured to convert a digital signal with a first sample rate to a converted signal with a second sample rate, being operable in one of a first configuration and a second configuration. The controller, configured to dynamically control the sample rate converter to operate in one of the first configuration and the second configuration according to at least one condition. | 12-11-2014 |
20140368365 | Quantization Noise Coupling Delta Sigma ADC with a Delay in the Main DAC Feedback - A delta-sigma modulator has a first summing point subtracting a first feedback signal from an input signal and forwarding a result to a transfer function, a second summing point adding an output signal from said transfer function to the input signal and subtracting a second feedback signal, a first integrator receiving an output signal from the second summing point, a quantizer receiving an output signal from the integrator and generating an output bitstream, and a digital-to-analog converter receiving the bitstream, wherein the first and second feedback signal are the output signal from said digital-to-analog converter delayed by a one sample delay. | 12-18-2014 |
20140368366 | MOSTLY-DIGITAL OPEN-LOOP RING OSCILLATOR DELTA-SIGMA ADC AND METHODS FOR CONVERSION - A continuous-time delta-sigma modulator for analog-to-digital conversion includes a pair of pseudo-differential signal paths including a pair of pseudo-differential signal paths including current-controlled ring oscillators as the load of open-loop common-source amplifiers that are driven by an analog input signal. The signal path produces digital values by sampling the open-loop current-controlled ring oscillators. A calibration circuit measures nonlinear distortion coefficients in a replica of the signal path. A nonlinearity corrector corrects digital values based upon the nonlinear distortion coefficients | 12-18-2014 |
20140368367 | CONTINUOUS-TIME SIGMA-DELTA MODULATOR AND CONTINUOUS-TIME SIGMA-DELTA MODULATING METHOD - Disclosed herein are a continuous-time sigma-delta modulator and a continuous-time sigma-delta modulating method. According to an exemplary embodiment of the present invention, the continuous-time sigma-delta modulator includes: an integrator receiving and integrating a signal; a quantizer quantizing an output of the integrator to be digitally output; a timer receiving the digital output of the quantizer to charge and discharge a charging and discharging capacitor according a predetermined timing so as to generate a trapezoidal waveform; and a digital-to-analog converter (DAC) outputting a digital-to-analog converted trapezoidal waveform depending on the digital output of the quantizer by using the timer to feedback the digital-to-analog converted trapezoidal waveform to be summed with a signal input to the integrator Further, the continuous-time sigma-delta modulating method is proposed. | 12-18-2014 |
20140368368 | Continuous-Time Mash Sigma-Delta Analogue to Digital Conversion - Continuous-time MASH sigma-delta ADC with a first modulator with 1.5 bit and a second modulator with 1 bit each receiving also the feedback from the other modulator. Sampling is at higher rate at the second modulator and decimation is performed before summing its output to the output of the first modulator. | 12-18-2014 |
20140368369 | DELTA-SIGMA MODULATOR WITH HIGH INPUT IMPEDANCE - Measurement circuits having a delta-sigma modulator are disclosed. One example measurement circuit includes a low pass filter coupled to receive an input voltage, a switched-capacitor integrator circuit, and a switched comparator circuit. The measurement circuit may generate a digital output made up of a sequence of logic high and logic low levels that are representative of a scaled value of the input voltage output by the low pass filter circuit. Also, by virtue of its switched-capacitor configuration, the electric charge received by the switched difference amplifier circuit may be returned to the input in a manner such that the input to the delta-sigma modulator takes little to no average current from the voltage it measures. In other words, the delta-sigma modulator may have a high input impedance by virtue of its switched-capacitor circuit configuration. | 12-18-2014 |
20140375488 | TRI-LEVEL DIGITAL-TO-ANALOG CONVERTER - Methods, systems, and apparatuses for converting a digital input signal to an analog output signal are disclosed. A first delta-sigma modulator receives a common mode reference signal and generates a common mode control signal. A data delta-sigma modulator receives a digital input signal and generates a modulated digital input signal. A shuffler receives the modulated digital input signal and the common mode control signal and generates a shuffled digital input signal. A digital to analog converter (DAC) has a plurality of tri-level unit DAC elements each receiving a corresponding portion of the shuffled digital input signal as a first input signal, and receiving second and third input signals. The tri-level unit DAC elements have first outputs coupled together generating a first output signal and second outputs coupled together generating a second output signal. An operational amplifier receives the first and second output signals and generates the analog output signal. | 12-25-2014 |
20140375489 | ANALOG-TO-DIGITAL CONVERSION APPARATUS AND METHOD CAPABLE OF ACHIEVING FAST SETTLING - A method utilized in an analog-to-digital conversion apparatus, for converting an analog input signal into a digital output signal including a first portion and a second portion, includes: using a comparator circuit to compare the analog input signal with at least one first reference level to generate a preliminary comparison result, the at least one first reference level being used for determining the first portion; estimating the first portion according to the preliminary comparison result; based on the preliminary comparison result, performing the successive approximation procedure to obtain a posterior comparison result according to a plurality of second reference levels, the second reference levels being used for determining the second portion; and, estimating the second portion according to the posterior comparison result. The preliminary and posterior comparison results are generated by the comparator circuit. | 12-25-2014 |
20150009054 | DELTA/SIGMA MODULATOR - According to one embodiment, a delta/sigma modulator includes a first multiplier based on a reference capacitor having capacitance C | 01-08-2015 |
20150009055 | DELTA CONVERSION ANALOG TO DIGITAL CONVERTER PROVIDING DIRECT AND QUADRATURE OUTPUT - Embodiments of the present invention are directed to an analog to digital converter, comprising a comparator for comparing an analog input signal and an analog feedback signal output from a digital to analog converter to generate a digital direct output signal, a summer, coupled to the comparator, for summing the digital output signal with a digital feedback signal to generate a summed signal, a first integrator, coupled to the summer, for integrating the summed signal to generate a direct output signal and a second integrator, coupled to the first integrator and to the summer, for integrating the direct output signal to generate the digital feedback signal as a quadrature output signal. | 01-08-2015 |
20150009056 | BUFFER OFFSET MODULATION - One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired. | 01-08-2015 |
20150022387 | FEEDFORWARD DELTA-SIGMA MODULATOR - A feedforward delta-sigma modulator includes a successive approximation analog-to-digital converter, a digital-to-analog converter, N integrators, a first adder, a second adder, and an optimization zero generation unit, where N is a positive integer. An output terminal of each integrator of the N integrators is coupled to the successive approximation analog-to-digital converter. The digital-to-analog converter is coupled between the first adder and the successive approximation analog-to-digital converter. The first adder is coupled to an input terminal of a first integrator of the N integrator. The second adder is coupled to an input terminal of a K | 01-22-2015 |
20150061907 | TECHNIQUE FOR EXCESS LOOP DELAY COMPENSATION IN DELTA-SIGMA MODULATORS - A technique for excess loop delay compensation in delta sigma modulator. The delta sigma modulator includes a loop filter. The loop filter receives an analog input signal and an output of a digital to analog converter. A comparator receives an output of the loop filter and generates a digital output signal. A reference select logic unit receives the digital output signal as a feedback and generates one or more switching signals. One or more switches are coupled to the comparator and each switch receives a pre-computed reference voltage. The one or more switches are activated by the one or more switching signals in response to the digital output signal. | 03-05-2015 |
20150084797 | LOW POWER EXCESS LOOP DELAY COMPENSATION TECHNIQUE FOR DELTA-SIGMA MODULATORS - A delta sigma modulator with an input stage and an output stage. The input stage receives an analog input signal and an output of a first digital to analog converter (DAC). The input stage generates a processed error signal. An additional summation device receives the processed error signal. The output stage receives an output of the additional summation device and generates a delayed digital output signal. A differentiator and the first digital to analog converter (DAC) receive the delayed digital output signal as a feedback signal. A second DAC receives an output of the differentiator and provides an output to an additional negative feedback coefficient multiplier. The additional summation device receives an output of the additional negative feedback coefficient multiplier. | 03-26-2015 |
20150084798 | A/D CONVERSION SYSTEM - An input signal is quantized by a quantizer after being passed through plural loop filters. A last-stage loop filter is formed of an operational amplifier for generating an output signal, a sampling capacitor for sampling the input signal, an integrating capacitor for integrating the signal sampled by the capacitor and plural switches for switching over signal paths. A control circuit controls on/off states of the switches to discharge the sampling capacitor and the integrating capacitor and causes the loop filter to repeat a sampling operation and an integrating operation plural times. The control circuit lastly connects the sampling capacitor and the integrating capacitor to a state, which is opposite to the state of the integrating operation time and turns on a converting switch so that the A/D converter A/D-converts the output signal of the loop filter. | 03-26-2015 |
20150091745 | Sampling/Quantization Converters - Provided are, among other things, systems, apparatuses, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. One such apparatus includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. Each of the processing branches includes a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit coupled to an output of the continuous-time quantization-noise-shaping circuit, a digital bandpass filter coupled to an output of the sampling/quantization circuit, and a line coupling an output of the digital-to-analog converter circuit back into the continuous-time quantization-noise-shaping circuit. A center frequency of the digital bandpass filter in each the processing branch corresponds to a minimum in a quantization noise transfer function for the continuous-time quantization-noise-shaping circuit in the same processing branch. | 04-02-2015 |
20150097711 | ANALOGUE TO DIGITAL CONVERTER - An analogue to digital converter comprises an input terminal configured to receive an analogue input signal and an output terminal configured to provide an output digital signal. The analogue to digital converter also comprises a main summer having a summing input, a subtracting input and a summing output, wherein the summing input is connected to the input terminal; an analogue filter having a filter input and a filter output, wherein the filter input is connected to the summing output; a quantizer having a quantizer input and a quantizer output, wherein the quantizer input is connected to the filter output; a digital integrator having a digital integrator input and a digital integrator output, wherein the digital integrator output is configured to provide a multi-bit output signal, the digital integrator input is connected to the quantizer output, and the digital integrator output is connected to the output terminal; and a main feedback digital to analogue converter having a main feedback converter input and a main feedback converter output, wherein the main feedback converter input is connected to the digital integrator output, and the main feedback converter output is connected to the subtracting input of the main summer. | 04-09-2015 |
20150102951 | DELTA-SIGMA MODULATOR AND DELTA-SIGMA A/D CONVERTER - The present invention relates to a delta-sigma-modulator and a delta-sigma-A/D converter. By speeding up the settling time constant of an integrator at the last stage with a simple configuration, the sampling frequency is sped up in the delta-sigma-modulator as a whole. Specifically, in the delta-sigma-modulator including multiple integrators connected in cascade, the integrator positioned at the last stage is a passive integrator not using an amplifier circuit, and one or more integrators positioned at stages preceding the last stage by one or more stages are active SC integrators using amplifier circuits and switched capacitor circuits, respectively. Also, each of the integrators performs integral calculation by alternately repeating a first operation phase to charge a sampling capacitor by sampling an input signal, and a second operation phase to perform a summing integration by transferring an electric charge charged in the sampling capacitor to an integration capacitor. | 04-16-2015 |
20150109157 | DELTA-SIGMA MODULATOR HAVING SENSOR FRONT-END - A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal. | 04-23-2015 |
20150109158 | MULTI-STAGE NOISE SHAPING ANALOG-TO-DIGITAL CONVERTER - The present disclosure describes an improved multi-stage noise shaping (MASH) analog-to-digital converter (ADC) for converting an analog input signal to a digital output signal. In particular, a full delta-sigma (ΔΣ) modulator is provided at the front-end of the MASH ADC, and another full ΔΣ modulator is provided at the back-end of the MASH ADC. The front-end ΔΣ modulator digitizes an analog input signal, and the back-end ΔΣ modulator digitizes an error between the output of the front-end ΔΣ modulator and the (original) analog input signal. In this configuration where the back-end modulator digitizes the error of the (full) front-end modulator, some design constraints of the front-end are relaxed. These design constraints include thermal noise, digital noise cancellation filter complexity (the quantization noise of the front-end is already shaped by the noise transfer function of the front-end), and/or non-linearity. | 04-23-2015 |
20150109159 | ANALOG TO DIGITAL CONVERTER - An analog to digital converter is disclosed herein. The analog to digital converter includes a bit conversion module and a control module. The bit conversion module is configured to generate a quantization output in accordance with an input signal. The control module is configured to control the bit conversion module, so as to make the bit conversion module operate in one of a sigma delta mode and a successive approximation mode. | 04-23-2015 |
20150123828 | INTEGRATOR OUTPUT SWING REDUCTION - In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter. | 05-07-2015 |
20150123829 | APPARATUSES AND METHOD OF SWITCHED-CAPACITOR INTEGRATOR - Provided is a switched-capacitor integrator, a method of operating the switched-capacitor integrator, and apparatuses including the switched-capacitor integrator. The switched-capacitor integrator including an amplifier including a first input terminal, a second input terminal, and an output terminal, a first capacitor disposed between the first input terminal and the output terminal, and a switched capacitor circuit configured to sample an input signal in response to control signals, and to integrate a difference between a feedback signal and the input signal while sampling the input signal. | 05-07-2015 |
20150333765 | IDLE TONE DISPERSION DEVICE AND FREQUENCY MEASUREMENT DEVICE - An idle tone dispersion device includes n FDSM ( | 11-19-2015 |
20150358029 | MODULATION CIRCUIT AND MODULATION METHOD WITH DIGITAL ELD COMPENSATION - A modulation circuit includes a digital quantizer and a compensation circuit. The digital quantizer is utilized to receive and truncate a digital quantizing input signal for generating a digital quantizing output signal. The compensation circuit compensates for a time delay of the modulation circuit and generates a compensation output signal. The digital quantizing input signal is generated by subtracting the compensation output signal from a digital integration output signal to compensate for the time delay before truncating the digital quantizing input signal. | 12-10-2015 |
20150365101 | Method and Device for Producing a Digital Signal - A method is provided for generating a digital signal from an analog signal generated using a frequency converter on the basis of pulse width modulation with a variable period duration, values of the digital signal corresponding to an average value of the analog signal over an associated period duration of the pulse width modulation. The method includes the acts of: generating a bit stream on the basis of the analog signal using a sigma-delta modulator, the bit stream being generated with a constant modulator clock; generating temporally successive digital samples during an associated period duration by filtering the bit stream using a number of digital filters, intervals of time between the temporally successive digital samples being multiples of the modulator clock, the digital filters being started with a time delay with respect to one another in the intervals of time of the multiples of the modulator clock, and a respective digital filter outputting an associated digital sample, and forming an average value of the digital samples generated during the associated period duration, the average value forming the value of the digital signal (DS) for the associated period duration. | 12-17-2015 |
20150365102 | FEED FORWARD DOUBLE-SAMPLING MODULATOR - Representative implementations of devices and techniques provide analog to digital conversion of an analog input. A multistage modulator using a feed-forward technique can alternately convert integrated samples of the analog input to digital representations. For example, the modulator is arranged to alternately output the digital representations to form a digital representation of the analog input. | 12-17-2015 |
20150381198 | APPARATUS AND METHOD FOR MONITORING ELECTRICAL CURRENT - An apparatus for sensing current of a vehicle battery employs an extended counting analogue-to-digital conversion process to a chopped and amplified voltage appearing across a low ohmic shunt resistor placed between the negative pole of the vehicle's battery and the chassis ground of the vehicle. Gain adjustment control of a programmable gain amplifier by matching the gain to the dynamic range of the ADC permits a high dynamic signal sensing. | 12-31-2015 |
20150381200 | AD CONVERTER - An AD converter includes a delta-sigma AD converter configured to receive an analog signal through an input terminal and obtain a higher-order bit conversion result, a first cyclic AD converter configured to receive a residual signal resulting from removal of a higher-order bit or bits, and performs a conversion process having a amplification factor of one to obtain a 1.5-bit conversion result, a second cyclic AD converter configured to perform a conversion process having an amplification factor of two to obtain a lower-order bit conversion result, and a shift register and a digital accumulator circuit that are configured to receive a higher-order bit, a 1.5-bit, and a lower-order bit conversion result and output an AD conversion value. | 12-31-2015 |
20160013763 | AMPLIFIER CIRCUIT, CMOS INVERTER AMPLIFIER CIRCUIT, COMPARATOR CIRCUIT, DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER, AND SEMICONDUCTOR DEVICE | 01-14-2016 |
20160013805 | DELTA-SIGMA MODULATOR AND COMMUNICATION DEVICE | 01-14-2016 |
20160028413 | 2-PHASE SWITCHED CAPACITOR FLASH ADC - An input stage for a switched capacitor analog-to-digital converter has a differential voltage input receiving an input voltage, a differential reference voltage input receiving a chopped reference voltage, a common voltage connection, and a differential output. A pair of input capacitors is coupled between the differential voltage input and the differential output and a pair of reference capacitors is coupled between the differential reference voltage input. A switching unit is controlled by a first and second phase operable during the first phase to connect a first terminal of the input capacitors with the common voltage connection and couple the first terminal of the reference capacitors with the inverted differential voltage reference; and during a second phase to connect the first terminal of the input capacitors with the differential input voltage and couple the first terminal of the reference capacitors with the non-inverted differential voltage reference | 01-28-2016 |
20160028414 | ELECTROCHEMICAL SENSING MODULE - A sensing circuit for an electrochemical sensor includes a digital-to-analog converter (DAC), an operational amplifier, an instrumentation amplifier, and an analog-to-digital converter (ADC). The DAC generates a biased ground voltage signal which is received by the operational amplifier. The operational amplifier creates a high current biased voltage on one of a pair of terminals connected to the electrochemical sensor. The instrumentation amplifier receives a signal from the pair of terminals, and generates an output representative of a voltage across the pair of terminals with reference to the high current biased ground voltage signal. The ADC converter receives the output and derives an actual voltage reading taken by the electrochemical sensor. | 01-28-2016 |
20160043733 | A/D CONVERTER - An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversion. The A/D converter further includes a quantization part for outputting a quantized value of quantized output of the delta-sigma processing circuit and a quantized output of the cyclic processing circuit, and a control circuit for generating an A/D conversion result and switching over a reference voltage based on the quantized value. The delta-sigma processing circuit and the cyclic processing circuit include a sampling capacitor, an integration capacitor and a capacitive D/A converter, which includes a DAC capacitor and add and subtract a charge corresponding to a reference voltage to and from a residue of quantization. The sampling capacitor, the DAC capacitor and the integration capacitor are provided as electrically separate capacitors. | 02-11-2016 |
20160048707 | LOW NOISE AND LOW POWER PASSIVE SAMPLING NETWORK FOR A SWITCHED-CAPACITOR ADC WITH A SLOW REFERENCE GENERATOR - Certain aspects of the present disclosure provide various sampling networks for switched-capacitor integrators, which may be used in switched-capacitor analog-to-digital converters (ADCs). Rather than having both an input sampling capacitor and a reference sampling capacitor, certain aspects of the present disclosure use a shared sampling capacitor for the reference voltage and the input voltage, thereby reducing ADC input-referred noise, decreasing op amp area and power, and avoiding anti-aliasing filter insertion loss. Furthermore, by sampling the reference voltage during the sampling phase and sampling the input voltage during the integration phase using the shared sampling capacitor, a high-bandwidth reference buffer need not be used for the reference voltage. | 02-18-2016 |
20160056835 | SIGNAL MODULATING DEVICE CAPABLE OF REDUCING PEAKING IN SIGNAL TRANSFER FUNCTION - A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal. | 02-25-2016 |
20160056836 | DIGITAL-ANALOG CONVERTER AND DIGITAL-ANALOG CONVERSION DEVICE - The DA converter according to the present invention includes: first and second analog segment units a plurality of capacitors of sampling capacitor groups charged according to signal levels of digital signals input in a sampling phase; and a calculation unit that outputs an analog signal according to a charged voltage of each capacitor of the sampling capacitor group of the first or second analog segment unit in an integral phase, wherein, when one analog segment unit of the first and second analog segment units is in the sampling phase, the other analog segment unit is in the integral phase. | 02-25-2016 |
20160056837 | SYSTEM, CIRCUIT AND METHOD FOR CONVERTING A DIFFERENTIAL VOLTAGE SIGNAL INCLUDING A HIGH COMMON MODE VOLTAGE COMPONENT TO A GROUND REFERENCED SIGNAL - A system, circuit and method for converting a differential voltage signal including a high common mode voltage component to a ground referenced signal are disclosed. For example, a circuit for converting a differential voltage signal including a high common mode voltage component to a ground referenced signal is disclosed, which includes a comparator configured to receive a differential voltage signal including a high common mode voltage component and output a digital signal associated with the differential voltage signal, a level shifter configured to receive the digital signal and shift the level of the digital signal to a low level, an integrator configured to receive the digital low level signal and output a ramping voltage associated with the low level signal, and an analog-to-digital converter configured to receive the ramping voltage and output a digital bit-stream associated with the ramping voltage. | 02-25-2016 |
20160056838 | Digital Technique For Excess Loop Delay Compensation In A Continuous-Time Delta Sigma Modulator - A continuous time delta sigma modulator includes a quantizer, a buffer module, and a reference module. The quantizer includes a comparator that updates a digital output each cycle of a clock signal based on a comparison of a reference potential with an input generated based on a sample of an analog signal. The buffer module receives the digital output, stores the digital output for a predetermined delay period, and outputs the digital output after the predetermined delay period as a delayed digital output. The predetermined delay period is less than one cycle of the clock signal. The reference module selectively varies the reference potential based on the delayed digital output. | 02-25-2016 |
20160065235 | CONTINUOUS ANALOG SIGNAL MONITORING - An integrated circuit includes a first circuit configured to convert a digital signal of a first format, which includes a sampled version of an analog signal, to a digital signal of a second format. A second circuit is configured to output the digital signal of the second format through a digital interface. An electronic system including a circuit configured to output a digital signal of the analog signal as a bitstream is provided. A clock generator generates a clock for clocking the bitstream. In another aspect, a method for operating an integrated circuit includes converting a digital signal of a first format, which includes a sampled version of an analog signal, to a digital signal of a second format. The digital signal of the second format is outputted through a digital interface. A monitoring or observing device receives directly the digital signal of the second format through the digital interface. | 03-03-2016 |
20160065236 | DELTA-SIGMA MODULATOR - A system and method to achieve low power and/or low supply operation of a delta-sigma modulator by taking advantage of the inherent virtual ground of the delta-sigma loop to make the input to a low power integrator small and largely independent of the input signal. This results in improved linearity of the integrator and relaxed constraints on the supply for the first stage integrator. The architecture also enables direct access to the quantization error of the feedback loop and thus can be used to either/or: 1. Calibrate the modulator, 2. Achieve reduced quantization noise, 3. Stabilize the loop by compensating for excess loop delay. Low voltage common-mode-feedback is also achieved using the techniques described. | 03-03-2016 |
20160065237 | Dynamic Range Reduction for Analog-to-Digital Converters - In accordance with the exemplary embodiments of the invention there is at least an apparatus to perform a method including receiving by an analog-to-digital converter a signal; determining whether an in-band blocker is present in the signal; and adjusting a transfer function of the analog-to-digital converter based on whether an in-band blocker is present by configuring a loop filter of the analog-to-digital converter. | 03-03-2016 |
20160072520 | Sampling/Quantization Converters - Provided are, among other things, systems, apparatuses, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. One such apparatus includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple processing branches coupled to the input line, and an adder coupled to outputs of the processing branches. Each of the processing branches includes a continuous-time quantization-noise-shaping circuit, a sampling/quantization circuit coupled to an output of the continuous-time quantization-noise-shaping circuit, a digital bandpass filter coupled to an output of the sampling/quantization circuit, and a line coupling an output of the digital-to-analog converter circuit back into the continuous-time quantization-noise-shaping circuit. A center frequency of the digital bandpass filter in each the processing branch corresponds to a minimum in a quantization noise transfer function for the continuous-time quantization-noise-shaping circuit in the same processing branch. | 03-10-2016 |
20160072521 | DELTA-SIGMA MODULATOR WITH REDUCED INTEGRATOR REQUIREMENTS - Requirements placed on the first integrator of a filter in a continuous-time delta-feedback modulator may be reduced by using circuitry to reduce the speed of a signal provided to the first integrator of the modulator. The reduction in speed applied to the signal received at the first integrator may then be compensated with circuitry elsewhere in the modulator, such that the net effect of the slow down and speed up of signals does not affect the output of the modulator. The sigma-delta modulator may be implemented in converters, such as an analog-to-digital converter (ADC). | 03-10-2016 |
20160079924 | BIAS CIRCUIT, OPERATIONAL AMPLIFIER, AND DELTA SIGMA TYPE AD CONVERTER - According to one embodiment, there are provided a bias voltage generation circuit that generates a bias voltage in an operational amplifier according to a bias current generated inside, and an adaptive timing control circuit that temporarily increases the bias current at a timing at which a first control signal configured to control an input signal of the operational amplifier changes in level. | 03-17-2016 |
20160087645 | Apparatus and Method for Digital to Analog Conversion with Current Mirror Amplification - A DAC using current mirrors suitable for use in a modulator. Embodiments include a current-generating circuit to provide an information signal; a bias current source; a current mirror having a mirror input transistor connected to the current generating circuit and the bias current source, and being driven by the bias current and the varying current signal and having a corresponding varying voltage signal at a control terminal; a signal shaping filter interposed between the mirror input transistor and an output mirror transistor configured to limit a bandwidth of the varying voltage signal; the output mirror transistor configured to generate a band-limited varying current signal and a mirrored bias current; and, a mirrored bias current reduction circuit connected to the output mirror transistor configured to reduce the mirrored bias current. | 03-24-2016 |
20160126973 | CURRENT TYPE D/A CONVERTER, DELTA SIGMA MODULATOR, AND COMMUNICATIONS DEVICE - This D/A converter includes a plurality of D/A converter elements, each comprising current sources configured to supply output currents to output nodes, and first switches configured to control the output currents. The output nodes are connected to a capacitor section having second switches and a capacitive load. The D/A converter further includes a switch control circuit configured to control the first switches responsive to digital signals, and also control the second switches in accordance with the control of the ON/OFF state of the first switches. | 05-05-2016 |
20160142072 | METHOD AND ARRANGEMENT FOR SETTING AN EFFECTIVE RESOLUTION OF AN OUTPUT SIGNAL IN INCREMENTAL DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTERS - A method and arrangement for setting an effective resolution of an output signal in an incremental delta-sigma analog-to-digital conversion by an incremental delta-sigma analog-to-digital converter, includes feeding a difference between an input signal and a reference voltage signal formed in a feedback branch to a first integrator. Safeguarding the stability of multi-stage incremental delta-sigma analog-to-digital converters for large input signal ranges and not requiring direct damping of the input signal, such that a direct SNR impairment with regard to the ADC-inherent noise sources can be avoided, is achieved by a virtual reference voltage in the feedback branch of the incremental delta-sigma analog-to-digital converter. The reference voltage signal is adapted to a changing input signal range by a settable reference capacitance and a clock cycle number dependent thereon is set. | 05-19-2016 |
20160149585 | DELTA SIGMA MODULATOR - A ΔΣ modulator converts an input analog quantity into a digital value quantized with a predetermined number of bits and outputs the digital value. The ΔΣ modulator includes an integrator that includes a capacitor and integrates a difference between the input analog quantity and an analog quantity acquired from D/A conversion of the output digital value by a D/A converter; a quantizer that quantizes an analog quantity acquired from integration by the integrator; and a digital integrator that carries out an integration operation on data acquired from quantization by the quantizer. | 05-26-2016 |
20160149586 | DELTA-SIGMA MODULATOR HAVING DIFFERENTIAL OUTPUT - Provided is a delta-sigma modulator having a differential output, the modulator including a switched-capacitor integrator configured to generate a non-inverted integral signal and an inverted integral signal and also including a switched-capacitor circuit configured to sample an input signal based on a control signal and to integrate the feedback signal and the input signal based on the control signal and also a feedback circuit configured to generate the feedback signal. | 05-26-2016 |
20160182081 | CAPACITANCE-TO-DIGITAL CONVERTER UTILIZING DIGITAL FEEDBACK AND AUXILIARY DAC | 06-23-2016 |
20160182082 | DELTA-SIGMA MODULATOR AND PROGRAM OF DELTA-SIGMA MODULATOR | 06-23-2016 |
20160197619 | INCREMENTAL DELTA-SIGMA A/D MODULATOR AND A/D CONVERTER | 07-07-2016 |
20160254823 | ELECTRICAL CIRCUIT | 09-01-2016 |