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RING OSCILLATORS

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331 - Oscillators

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DocumentTitleDate
20130027140COUPLING RESISTANCE AND CAPACITANCE ANALYSIS SYSTEMS AND METHODS - The described systems and methods can facilitate examination of device parameters including analysis of relatively dominant characteristic impacts on delays. In one embodiment, at least some coupling components (e.g., metal layer wires, traces, lines, etc.) have a relatively dominate impact on delays and the delay is in part a function of both capacitance and resistance of the coupling component. In one embodiment, a system comprises a plurality of dominate characteristic oscillating rings, wherein each respective one of the plurality of dominate characteristic oscillating rings includes a respective dominate characteristic. Additional analysis can be performed correlating the dominate characteristic delay impact results with device fabrication and operation.01-31-2013
20130027139RING OSCILLATOR BASED VOLTAGE CONTROL OSCILLATOR HAVING LOW-JITTER AND WIDE BANDWIDTH - The embodiments described herein provide a voltage controlled oscillator (VCO). The VCO may include, but is not limited to a voltage-to-current converter configured to receive a control voltage and to convert the control voltage to a current, a current bias circuit coupled to the voltage-to-current converter and configured to receive frequency band select digital inputs and to bias the current generated by the voltage-to-current converter based upon the band select inputs, and a ring oscillator coupled to receive the biased current and to output an oscillating signal based upon the biased current.01-31-2013
20100156544RING OSCILLATOR HAVING WIDE FREQUENCY RANGE - Provided is a ring oscillator having an extended range of oscillation frequency by varactors coupled to delay cells even in a simple structure. The wide frequency range results from simply varying an oscillation frequency by control signals applied to the varactors. Since additional switches connected to the delay cells contribute to increase or decrease of the oscillation frequency range, the ring oscillator can conveniently be employed in various types of oscillation systems.06-24-2010
20090015340Phase Controlled Oscillator Circuit with Input Signal Coupler - An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in a pulse generator to have an input pulse duration less than or equal to that of the oscillating signal. The oscillator circuit may be used as a filter to filter pulse width variations or to filter jitter from a reference clock. The oscillator circuit may also serve as a buffer by amplifying the input signal. Phase interpolation can be obtained by coupling at least one input signal with at least one oscillating signal.01-15-2009
20090121797High Frequency Digital Oscillator-on-Demand with Synchronization - A High Frequency Digital Oscillator contains a ring oscillator having an output fn, and having coarse and fine frequency adjustments, wherein the input signal f05-14-2009
20100073097Oscillator, oscillator implementations and method of generating an oscillating signal - One embodiment of the oscillator includes a first starved inverter and a second starved inverter. An inner inverter of the second starved inverter is cross-coupled to an inner inverter of the first starved inverter. The oscillator further includes a first inverter connected to output of the inner inverter of the first starved inverter, and a second inverter connected to output of the inner inverter of the second starved inverter.03-25-2010
20080258824Multi-speed ring oscillator - A ring oscillator comprises a control circuit for receiving a frequency-selection signal operative to select from at least two ring oscillator frequencies, said control circuit using said control signal to generate a first control signal and a second control signal; a primary chain of an odd number of serially connected NOT gates, said primary chain including a primary switching NOT gate responsive to the first control signal and operative to perform a logical NOT or an IGNORE function on a first oscillating input signal to generate a first output signal; and a secondary chain of serially connected NOT gates, said secondary chain logically parallel to at least said primary switching NOT gate, said secondary chain including a secondary switching NOT gate responsive to the second control signal and operative to perform a logical NOT or an IGNORE function on a second oscillating input signal to generate a second output signal.10-23-2008
20100045390CIRCUIT AND METHOD FOR MEASURING THE PERFORMANCE PARAMETERS OF TRANSISTORS - An integrated circuit may include an inverter which may include a first transistor of a first conductivity type and a second transistor of a second conductivity type connected in parallel with the first transistor. An input of the inverter may be capable of receiving an oscillating input signal, and which may include an output of the inverter, which is connected to a capacitive device capable of being charged and discharged depending on the state of the first and second transistors being on or off. The inverter may be capable of delivering an oscillating output signal at its output. The integrated circuit may include a selector for transmitting the oscillating output signal and for masking the charging and/or discharging of the capacitive device.02-25-2010
20100045389RING OSCILLATOR - A ring oscillator is disclosed for generating one or more clock signals. In some embodiments, the ring oscillator includes a first set of n series coupled inverters, a second set of n series coupled inverters, a first reset switch configured to couple a last inverter of the first set of inverters to a first inverter of the second set of inverters and to generate a first signal edge, a second reset switch configured to couple a last inverter of the second set of inverters to a first inverter of the first set of inverters, and a cross-coupling circuit coupled between an output of an inverter of the first set of inverters to a corresponding output of an inverter of the second set of inverters. In some embodiments, 2n clock signals separated in phase by 360°/2n may be generated.02-25-2010
20090134945CLOCK GENERATOR - A clock generator has a ring oscillator which has odd-numbered inverters connected in series, wherein an output of the inverter at a final stage is inputted into the inverter at a first stage to generate and output a clock signal, a frequency divider which receives the clock signal outputted from the ring oscillator, and divides frequency thereof for output, and a heater which is on-off controlled based on the output of the frequency divider and heats the ring oscillator when turned on.05-28-2009
20090051444FREQUENCY-CORRECTED CLOCK SIGNAL GENERATION INTEGRATED CIRCUIT DEVICE - An integrated circuit device including: an oscillation circuit that generates a first clock signal; a frequency comparison section that compares a frequency of the first clock signal with a frequency of a second clock signal; and a clock signal generation section that generates a third clock signal based on the first clock signal. The clock signal generation section corrects a frequency of the third clock signal to be a value within a predetermined range based on the comparison result. For example, the frequency comparison section counts a predetermined period based on the first clock signal, the predetermined period being defined based on the second clock signal, and the clock signal generation section generates the third clock signal by dividing the frequency of the first clock signal based on the count result.02-26-2009
20090045883SELF REFRESH OSCILLATOR AND OSCILLATION SIGNAL GENERATION METHOD OF THE SAME - A self refresh period signal generator includes: a voltage detection unit for detecting a voltage level of a power supply voltage in order to generate a plurality of period control signals according to the detected voltage level; and an oscillation unit for generating a ring oscillation signal having a constant period determined by a resistance of a period control resistor when a self refresh signal is activated, wherein the resistance of the period control resistor is controlled according to logic levels of the plurality of period control signals.02-19-2009
20090045882SYSTEM FOR GENERATING A MULTIPLE PHASE CLOCK - A system for generating a multiple phase clock. The system includes a ring oscillator structure for generating multiple phases. The structure includes two or more unit oscillators, each unit oscillator implemented by a ring oscillator having M stages. The structure also includes a horizontal loop coupling the two or more unit oscillators to generate multiple phases. The number of phases generated is equal to the product of the number of unit oscillators and M.02-19-2009
20130057352OSCILLATORS AND CLOCK GENERATION - Oscillator circuitry having a switching inverting amplifier arranged in a ring oscillator configuration of at least two stages. A bias generator for supplying the amplifiers of neighboring stages, is responsive to an enable signal to supply the amplifiers only when the enable signal is asserted. A first pair of transistors, coupled to an input of one of the amplifiers and the other coupled to an output of the amplifier, the transistors being driven in common by the enable signal such that when the enable signal is deasserted the transistors of the pair are turned on to impose conflicting levels at the input and the output such that the amplifier is forced to switch.03-07-2013
20090091399LOW VOLTAGE SYNCHRONOUS OSCILLATOR FOR DC-DC CONVERTER - Systems and methods which provide an oscillator circuit outputting non-overlapping trigger signals throughout a range of operating voltages using a reset-set (RS) flip-flop type circuit configuration are shown. Embodiments utilize output driver buffers internal to the RS flip-flop circuit configuration to provide oscillator feedback delay. Feedback control circuitry may be implemented to ensure that the delay associated with any one driver buffer does not solely provide the feedback delay. Embodiments further implement input delay circuitry adapted to maintain a relatively constant reset and set input feedback delay ratio throughout a large range of operating conditions.04-09-2009
20090072914CURRENT SOURCE DEVICE, OSCILLATOR DEVICE AND PULSE GENERATOR - The present invention provides a current source device capable of cutting off an output current upon its stop and obtaining a desired output current upon its start-up. The current source device comprises a first series circuit comprising a first FET and resistors connected in series with the first FET and having both ends between which a source voltage is applied, a second series circuit which comprises a second FET and a third FET connected in series with the second FET and which includes a connecting point of the second and third FETs and a gate of the third FET both being short-circuited to each other and includes both ends between which the source voltage is applied, a drive circuit which supplies a common drive voltage to both gates of the first and second FETs, and first and second current source circuits operated in response to first and second drive voltages with gate voltages of the second and third FETs as the first and second drive voltages. The first and second current source circuits respectively include first and second current source FETs respectively operated with the first and second drive voltages as gate voltages, and a start-up circuit which changes the first and second drive voltages forcedly when the first and second current source FETs are brought into conduction. Output currents are supplied from the sources or drains of the first and second current source FETs.03-19-2009
20090267698DUAL SUPPLY INVERTER FOR VOLTAGE CONTROLLED RING OSCILLATOR - A voltage controlled ring oscillator reduces sensitivity of an oscillation frequency to a control voltage by using a dual supply inverter logic circuit. The dual supply inverter logic circuit includes two inverter circuits coupled in parallel between an input terminal and an output terminal. The first inverter circuit is powered by a variable supply voltage while the second inverter circuit is powered by a substantially fixed supply voltage. The variable supply voltage serves as the control voltage for the voltage controlled ring oscillator and sets the oscillation frequency. The sensitivity of the oscillation frequency to changes in the variable supply voltage is reduced due to the parallel connection of the second inverter circuit powered by a different supply voltage.10-29-2009
20090066429Voltage detection circuit and oscillator using the same - Provided is a voltage detection circuit that outputs a detection result when a voltage to be measured exceeds a predetermined voltage or falls below the predetermined voltage at a speed higher than that of a conventional case. The voltage detection circuit according to the present invention includes an input buffer that outputs a detection voltage to be input as an input voltage, and a voltage detection section that accelerates a rising of the input voltage in a transient state where the input voltage exceeds a predetermined threshold value, and accelerates a dropping of the input voltage in a transient state where the input voltage falls below the predetermined threshold value. The voltage detection circuit accelerates a change in the input voltage to output the detection result from an output buffer at high speed.03-12-2009
20130162357OSCILLATOR WITH HIGHLY-ADJUSTABLE BANG-BANG CONTROL - A device may include an oscillator to generate a clock signal based on first and second control signals. The oscillator may include a first buffer stage a second buffer stage. The first buffer stage may output a first signal that is based on an output of the second buffer stage and the first control signal. The second buffer stage may output the clock signal. The clock signal may be based on the first signal and the second control signal.06-27-2013
20130099871Multi-Phase Voltage Controlled Oscillator Using Capacitance Degenerated Single Ended Transconductance Stage and Inductance/Capacitance Load - An electrical circuit includes a first transistor having a first source, a first drain, and a first gate, whereby the first transistor receives an input voltage through the first gate. An output voltage terminal outputs voltage from the first transistor and is connected to the first drain. A second transistor includes a second source, a second drain, and a second gate, whereby the second transistor receives a bias voltage through the second gate, and wherein the first source is connected to the second drain. A first capacitor is connected to the first source, the second source, and the second drain. An inductor is connected to the first drain. A second capacitor is connected in parallel with the inductor and further connected to the first drain.04-25-2013
20080309417RING OSCILLATOR - A ring oscillator comprises a first logic block having a first input connected to a specific point along a delay path, a first output and a second output and a second logic block having a first input connected to the first output of the first logic block, a second input connected to the second output of the first logic block, a third input connected to the end of the delay path and a first output connected to the beginning of the delay path. The first logic block is arranged to, in use, alternately switch its first output and second output from logical HIGH to logical LOW, and vice versa, every time a rising edge is input into its first input. The second logic block is arranged to, in use, alternately select its first input and its second input every time a rising edge is input into its third input. The pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for one of a rising edge or a falling edge to propagate from the beginning of the delay path to the specific point along the delay path and the inverse pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for the one of the rising edge or the falling edge respectively to propagate from specific point along the delay path to the end of the delay path.12-18-2008
20080309416Wide Range Interpolative Voltage Controlled Oscillator - Systems and methods for increasing the frequency range of an output signal generated by a VCO, where one or more variable delay units are incorporated into an interpolative VCO to decrease the minimum frequency at which the VCO oscillates. In one embodiment, the VCO includes a ring of serially connected inverters, a set of bypass circuits and a set of variable delay units. The bypass circuits are coupled to the ring of serially connected inverters to bypass one or more of the serially connected inverters when enabled. Each variable delay unit delays signal transitions at the input of a corresponding one of the serially connected inverters by a variable amount. The variable delay units may be positioned in series with the ring of inverters, in parallel with the bypass paths, or in parallel with corresponding inverters in the ring of inverters.12-18-2008
20080303600Dynamic Ring Oscillators - A dynamic oscillating ring circuit is described, which has multiple non-inverting domino circuits, each having a signal input, a trigger input, inputs for charge state clock and clocked cutoff and an output inverter. A number of the domino circuits are coupled in series, the output of one feeding the input of the next, to form a chain, which form stages of the ring. A number of the stages are coupled in series, the output of one feeding the input of the next, to form the ring. The first domino circuit of said chain receives a logic signal input and a single trigger input for the chain. Within the ring, the output of each stage feeds the input signal to the next stage and is fed back to clock an earlier stage to allow the ring to oscillate.12-11-2008
20110012685Wide-band Low-voltage IQ-generating Ring-oscillator-based CMOS VCO - A voltage controlled oscillator circuit includes first and second power rails, a control voltage rail, an input terminal, and an output terminal. A plurality of domino stages are series connected in a ring, with each of the domino stages being connected across the first and second power rails and being responsive to the control voltage rail. A plurality of feedback paths is provided with each path connected to enable one of the plurality of domino stages to input a feedback output signal to a preceding serially connected domino stage. A reset signal is asserted to place the domino stages in a post charge state and deasserted to allow the domino stages to begin producing an oscillating signal.01-20-2011
20100171558OSCILLATOR FOR PROVIDING A CONSTANT OSCILLATION SIGNAL, AND A SIGNAL PROCESSING DEVICE INCLUDING THE OSCILLATOR - An oscillator including a current bias circuit and a ring oscillator. The current bias circuit tracks a temperature change of the oscillator by using a control voltage and generates a plurality of bias voltages to supply a bias current according to the temperature change. The ring oscillator compares differential output signals generated according to the bias voltages and generates an oscillation signal as a result of the comparison.07-08-2010
20090027131RING OSCILLATORS FOR CMOS TRANSISTOR BETA RATIO MONITORING - This invention discloses a CMOS ring oscillator which comprises an odd number of inverting modules serially connected with each other with an output of a last stage inverting module coupled to an input of a first stage inverting module, each of the plurality of inverting modules always outputting a logic low voltage whenever being inputted a logic high voltage, all the forward signal paths of each of the plurality of inverting modules being formed by metal-oxide-silicon (MOS) transistors wherein all the gates of the MOS transistors being directly connected to the input of the respective inverting module, and at least one of the plurality of inverting modules having a negative feedback circuit.01-29-2009
20090167445RING OSCILLATORS FOR NMOS AND PMOS SOURCE TO DRAIN LEAKAGE AND GATE LEAKAGE - A ring oscillator circuit using only NMOS or only PMOS transistors is described. The ring oscillator circuit uses the equivalent of three transistors to form an oscillator stage, which may be a main component to the ring oscillator: A load transistor, an enable transistor, and a switch transistor. A source of the load transistor may be coupled to a drain of the enable transistor and a source of the enable transistor coupled to a drain of the switch transistor. The load transistor can have three different configurations: 1) a reference circuit with a gate and a drain of the load transistor coupled together; 2) a source to drain leakage monitor circuit with a gate and a source of the load transistor coupled together; and 3) a gate leakage monitor circuit with a drain and the source of the load transistor coupled together. An odd plurality of oscillator stages can be coupled together with an input circuit and an output circuit to form a ring oscillator. Other embodiments are described.07-02-2009
20110298549Method and apparatus for tuning frequency of LC-oscillators based on phase-tuning technique - A tunable multiphase ring oscillator includes a plurality of stages connected in series in a ring structure, where each stage generating a stage output from a stage input. Each stage of the tunable multiphase ring oscillator includes a plurality of trans-conductance cells, each generating an output from at least one portion of the stage input. Each stage further includes at least one phase shifting module for imparting at least one phase shift to the at least one portion of the stage input, an oscillator unit for generating the stage output from a combination of the plurality of outputs, and means for varying at least one of the plurality outputs so as to adjust a phase of the stage output.12-08-2011
20110169581RING-SHAPED VOLTAGE CONTROL OSCILLATOR - In one embodiment, a circuit topology for use in an n-phase voltage controlled oscillator (VCO) or injection-locked frequency divider includes a transmission line ring having n transmission line delay segments connected at n junctions, where n is an integer greater than or equal to 3. Each transmission line segment provides a 1/n wavelength signal delay between adjacent junctions. The transmission line ring is coupled to a first power supply node. Each of the junctions has a respective transistor coupled thereto, each transistor having a first source/drain terminal coupled to its respective junction, a second source/drain terminal coupled to a second power supply node, and a gate terminal, wherein the gate terminal is coupled to a signal that is ½ wavelength out-of-phase with respect to a signal at the first source/drain terminal of the transistor.07-14-2011
20090189703CIRCUITS AND DESIGN STRUCTURES FOR MONITORING NBTI (NEGATIVE BIAS TEMPERATURE INSTABILITY) EFFECT AND/OR PBTI (POSITIVE BIAS TEMPERATURE INSTABILITY) EFFECT - A ring oscillator has an odd number of NOR-gates greater than or equal to three, each with first and second input terminals, a voltage supply terminal, and an output terminal. The first input terminals of all the NOR-gates are interconnected, and each of the NOR-gates has its output terminal connected to the second input terminal of an immediately adjacent one of the NOR-gates. During a stress mode, a voltage supply and control block applies a stress enable signal to the interconnected first input terminals, and an increased supply voltage to the voltage supply terminals. During a measurement mode, this block grounds the interconnected first input terminals, and applies a normal supply voltage to the voltage supply terminals. Also included are an analogous NAND-gate based circuit, a circuit combining the NAND- and NOR-aspects, a circuit with a ring oscillator where the inverters may be coupled directly or through inverting paths, and circuits for measuring the bias temperature instability effect in pass gates.07-30-2009
20090167446VOLTAGE CONTROLLED RING OSCILLATOR - There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers (07-02-2009
20090309667RING OSCILLATOR USING ANALOG PARALLELISM - An apparatus including a ring oscillator and related methods are disclosed. The ring oscillator includes at least two ring loops. A first ring loop includes a plurality of series coupled delay cells. At least one additional ring loop includes a plurality of series coupled delay cells. The at least one additional ring loop is coupled to the first ring loop by one or more common delay cells shared between the first ring loop and the at least one additional ring loops.12-17-2009
20100079212SEMICONDUCTOR CIRCUIT APPARATUS AND DELAY DIFFERENCE CALCULATION METHOD - A semiconductor circuit apparatus having a clock oscillating circuit includes a first inverter circuit having a power supply terminal connected to a power supply potential via a first power supply potential connection transistor and a ground terminal connected to a ground potential via a first ground potential connection transistor, an inverter circuit block having a second inverter circuit connected to the power supply potential via a second power supply potential connection transistor and to the ground potential via a second ground potential connection transistor and connected to the first inverter circuit in parallel and a selection circuit block that outputs a power supply potential connection signal to any one of gate terminals of the first and second power supply potential connection transistors and a ground potential connection signal to any one of gate terminals of the first and second ground potential connection transistors.04-01-2010
20090206937INVERTING CELL - An inverting cell including a first inverter having first and second inputs; a second inverter having first and second inputs, wherein the second input of the second inverter is connected to the first input of the first inverter and the output of the first and second inverters is connected to the second input of the first inverter; and a third inverter connected between the output of the first and second inverters and the first input of the second inverter.08-20-2009
20090058542Variable frequency oscillating circuit - Provided is a variable frequency oscillating circuit which has a small circuit size and is unlikely to cause a semiconductor device to malfunction. One oscillating circuit (03-05-2009
20130021107VIA RESISTANCE ANALYSIS SYSTEMS AND METHODS - Component characteristics analysis systems and methods are described. In one embodiment, a ring oscillator comprises: at least one inversion stage operable to cause a signal transition; a target component that has an increased comparative impact or influence on a signal transition propagation in the ring oscillator; and an output component for outputting an indication of the impact the target component has on the signal transition. The target component can include a plurality of vias from one metal layer to another metal layer. The plurality of vias from one metal layer to another metal layer can be configured in a cell. The vias can correspond to a via layer. In one exemplary implementation, the output is coupled to an analysis component. The analysis component can include correlation of the via resistance into a wafer variations and generate a wafer map. The analysis component can include correlation of the via resistance into a wafer.01-24-2013
20100102891OSCILLATOR DEVICE AND METHODS THEREOF - An oscillator device includes a plurality of stages. Each stage is a monostable stage having a delay path, whereby a signal transition of a designated type (rising or falling) at the input of the delay path results in a signal transition at the output of the stage of the same transition type. Each stage of the oscillator device also includes a reset module that causes the output signal to be reset to a nominal state a predetermined period of time after the signal transition of the output signal. Each stage thus provides an output signal pulse in response to the signal transition of the designated type at the input. The output of the final stage of the oscillator device is connected to the input, so that the oscillator output provides an oscillating signal having a period based upon the delay path of each the oscillator device stages.04-29-2010
20080238556Simple Technique For Reduction Of Gain In A Voltage Controlled Oscillator - A ring oscillator circuit having an odd plurality of inverter stages (i.e., 2N+1 stages). In accordance with one embodiment of the present invention, only one of the inverter stages is operated in response to a variable input voltage, while the remaining inverter stages are operated in response to a highly filtered constant input voltage. The inverter stages that operate in response to the constant input voltage oscillate at a base frequency. The inverter stage that operates in response to the variable input voltage causes the frequency of the output signal to deviate from the base frequency by an amount determined by the variable input voltage. In this manner, the variable voltage inverter stage implements frequency control for the ring oscillator. The gain of the ring oscillator circuit is reduced by a factor of (2N+1) with respect to the gain of a conventional ring oscillator.10-02-2008
20080284529METHOD AND APPARATUS OF A RING OSCILLATOR FOR PHASE LOCKED LOOP (PLL) - The present invention relates to a ring oscillator including a delay stage, the delay stage includes a differential pair of input transistor, a variable resistive load coupled to the transistor, a differential output between the variable resistive load and the corresponding input transistor, a variable current source coupled to the differential pair of transistors for variably setting a bias current through the differential pair of transistors, and an input coupled to the variable resistive load and the variable current source for receiving an configuration signal, wherein the variable resistive load and the variable current source are changed in response to the configuration signal, wherein the bias current of the variable current source increases and the variable resistive load decreases, and vice versa.11-20-2008
20080290955LOW COST AND LOW VARIATION OSCILLATOR - An oscillator circuit for use in integrated circuits. The oscillator circuit includes a delay generation circuit having a current mirror with at least a first current mirror branch and a second current mirror branch, a current source coupled to the first current mirror branch, a capacitive element coupled to the first current mirror branch; and a resistive element coupled to the second current mirror branch. The oscillator circuit further includes a plurality of inverting elements coupled in series with one another and a transconducting element coupled to an output of the plurality of inverting elements. The transconducting element is configured to discharge the capacitive element. A latching element is coupled to latch to an output signal of the plurality of inverting elements.11-27-2008
20110006851Unit inverter having linearly varying delay response characteristic and digitally controlled oscillator including the unit inverter - A Digitally Controlled Oscillator (DCO) including a unit inverter cell whose output frequency linearly varies according to a digital control signal, the unit inverter cell linearly varying a delay response characteristic of an output signal with respect to an input signal supplied from an input terminal, in response to a reference signal and a zero01-13-2011
20120068775Frequency Locking Oscillator - A delay line of individually selectable delay elements can operate as an oscillator in an open loop mode to track process variation or drive a clock signal that varies with temperatures and voltages in the system. The delay line oscillator can also operate in a closed loop mode to match a frequency given by a tuner ratio and a reference clock. The delay line can also be used for measuring clock jitter or duty cycle.03-22-2012
20090051443Oscillator Stabilized for Temperature and Power Supply Variations - A circuit may comprise an amplifier powered by a first supply voltage, with a first input of the amplifier coupled to a stable reference voltage, and the output voltage of the amplifier provided as a designated supply voltage to an oscillator configured to produce a periodic signal having a specified frequency. The circuit may further include a control circuit coupled to a second input of the amplifier, to the output of the amplifier, and to ground, and configured to control the rate of change of the output voltage of the amplifier with respect to temperature. This rate of change may be specified according to a characterization of the oscillator over supply voltage and temperature, and may result in stabilizing the specified frequency across temperature. The periodic signal may therefore be unaffected by variations in the first supply voltage, and the amplitude of the periodic signal may be proportional to the stable reference voltage.02-26-2009
20110227656SEMICONDUCTOR INTEGRATED CIRCUIT AND RADIO COMMUNICATION APPARATUS - A semiconductor integrated circuit includes a ring oscillator and a noise canceller. The ring oscillator includes first and second signal generators. The first signal generator is configured to generate a first output signal having a first phase based on an input signal. The second signal generator is configured to generate a second output signal having a second phase different from the first phase based on the input signal. The noise canceller includes first and second amplifiers and an arithmetic module. The first amplifier is configured to amplify the first output signal generated by the first signal generator using a first amplification factor. The second amplifier is configured to amplify the second output signal generated by the second signal generator using a second amplification factor. The arithmetic module is configured to combine the first output signal amplified by the first amplifier with the second output signal amplified by the second amplifier.09-22-2011
20090231048BIAS CIRCUIT TO STABILIZE OSCILLATION IN RING OSCILLATOR, OSCILLATOR, AND METHOD TO STABILIZE OSCILLATION IN RING OSCILLATOR - Bias circuits to stabilize oscillation in ring oscillators, oscillators, and methods to stabilize oscillation in ring oscillators are provided. The ring oscillator includes a plurality of differential delay cells, each including a pair of input transistors, a pair of voltage-controlled resistors, and a common current source. The bias circuit includes a replica arm that includes a replica of one of the voltage-controlled resistors, and a resistor arm that includes a fixed resistor. The bias circuit supplies bias voltages to the differential delay cells such that ratio of voltage swing to bias current of the delay cell is kept constant by referring the ratio to the fixed resistor.09-17-2009
20090002082MULTIPHASE SIGNAL GENERATOR - A signal generator for generating multiple phases includes a ring oscillator with at least one first adjustable delay stage and at least one second delay stage being serially arranged, wherein an output of the first delay stage is provided for delivering at least one first output phase and an output of the second delay stage is provided for delivering at least one second output phase, and an adjustment circuit for adjusting the delay of the first adjustable delay stage, wherein the adjustment circuit is provided for adjusting the phase relationship between the first output phase and the second output phase by means of setting a first propagation delay for the first delay stage.01-01-2009
20090243734METHOD AND DEVICE FOR DETERMINING A DUTY CYCLE OFFSET - Embodiments of the present invention relate to a method and device operable to determine a duty cycle offset of a periodic signal and correct the periodic signal to a desired duty cycle. Embodiment of the present invention may include a ring oscillator circuit. The ring oscillator includes an odd number of ordered inverting elements. One or more of the inverting elements may be an inverting memory element. Each inverting element's output port (except the last inverting element) may be operably connected to the subsequent inverting element's input port. The last inverting element's output port may be operably connected to the first inverting element's input port, thereby forming a chain or ring. A counter may be incremented by oscillations of an output port of an inverting element during a high portion of a periodic signal and may be decremented by oscillations of the output port of the inverting element during a low portion of the periodic signal. The end result in the counter may be proportional to the duty cycle offset of the periodic signal. The end value may then be used to correct the duty cycle of the periodic signal to a desired duty cycle offset.10-01-2009
20090261911MULTI-PHASE OSCILLATOR - A multi-phase oscillator includes a plurality of ring oscillators (10-22-2009
20100225404ELECTRONIC PULSE GENERATOR AND OSCILLATOR - Improvements in and relating to electronic pulse generation or oscillation circuitry based on a signal path exhibiting endless electromagnetic continuity and affording signal phase inversion in setting pulse duration or half-cycles of oscillation within time of signal traverse of said signal path, and having active switching means associated with said signal path to set rise and fall times of each said pulse or said half-cycle of oscillation, including for frequency adjustment by selective inductance and power saving without stopping pulse generation or oscillation.09-09-2010
20110057736Linear, Voltage-Controlled Ring Oscillator With Current-Mode, Digital Frequency And Gain Control - In a voltage-controlled ring oscillator, one or more controllable current sources generate a bias current in response to a tuning voltage. Any of several features can be included to promote frequency tuning linearity. In accordance with one feature, the ring oscillator circuit transistors can be sized relative to one another to skew the rise and fall times of the ring oscillator output signal with respect to one another. In accordance with another feature, a peak limiter can limit the oscillation amplitude in response to the bias current. In accordance with still another feature, a controllable bias current source can include a voltage-to-current converter and one or more groups of digitally controlled current source transistors.03-10-2011
20110057735Semiconductor integrated circuit and abnormal oscillation detection method for semiconductor integrated circuit - The semiconductor integrated circuit includes a first oscillator, a second oscillator (PLL), a third oscillator (ring oscillator), a selector that switches, in turn, based on a clock of the third oscillator, and outputs a clock of the first oscillator or a clock of the second oscillator, and a determination circuit that counts up or counts down the clock output from the selector, based on the clock of the third oscillator, determines the correspondence of the clock output from the selector and the clock of the third oscillator, based on a result of the counting up or the counting down, and determines whether either of the clock output from the selector or the clock of the third oscillator occur an abnormal oscillation.03-10-2011
20100253440Ring-Based Multi-Push Voltage-Controlled Oscillator - A ring-based multi-push voltage-controlled oscillator (VCO) with the control voltage to generate the multi-push output signal is disclosed. The ring-based multi-push VCO includes a plurality of delay cells, a plurality of buffer amplifiers, and a bias unit. The delay cells connect each other in sequence to form a ring structure, and each delay cell connects with the respective buffer amplifier. The bias unit connects with the buffer amplifiers to output the multi-push output signal. The control voltage supplied to the delay cells is utilized to control the frequency of the multi-push output signal, and the ring structure formed by delay cells is to multiply the frequency tuning range.10-07-2010
20090322435DIGITALLY CONTROLLED OSCILLATORS - Oscillator circuitry is provided that is based on a ring of inverters. The ring of inverters may be single-ended or differential inverters. Digitally controlled adjustable load capacitors may be provided at inverter outputs to tune the oscillator circuitry. Each digitally controlled adjustable load capacitor may be formed from multiple varactors connected in parallel. Each varactor may have a control input that receives a digital control signal. The digitally controlled adjustable load capacitors in a given oscillator may be adjusted in unison to produce the same capacitance value for each capacitor or may be adjusted individually so that they produce different capacitance values. The inverters may include common-mode-gain reduction features such as series-connected current sources, series-connected resistors, and cross-coupled negative feedback transistors.12-31-2009
20110032041DEVICE AND METHOD FOR GENERATING A RANDOM BIT SEQUENCE02-10-2011
20090160562OSCILLATING DEVICE - The present invention provides an oscillating device. The oscillating device includes: a voltage regulating module, a current generating module, and an oscillating module. The voltage regulating module is utilized for generating a control voltage at an output terminal, and the voltage regulating module includes: a first operational amplifier, a first switch element, and a first voltage dividing circuit. The oscillating module includes: a plurality of switch modules connected in series, a current mirror module, and a plurality of capacitor modules. In the oscillating device of the present invention, a frequency of an oscillating signal outputted by the oscillating module will not be affected by voltage offset of an operating voltage, environment temperature variations, or semiconductor process variations.06-25-2009
20110001569OSCILLATION CIRCUIT AND SEMICONDUCTOR DEVICE HAVING THE SAME - An oscillation circuit and a semiconductor device incorporating same are provided. The oscillation circuit includes an oscillation unit including a plurality of inverters and configured to perform signal transmission between first and second nodes of the inverters such that each of the inverters performs an oscillation operation to generate clock signals having different phases, when a control signal is activated, and latch a clock signal of the second node and cut off the signal transmission between the first and second nodes to stop the oscillation operations of the inverters, when the control signal is deactivated, and a control unit configured to activate the control signal when an oscillation enable signal is activated, and deactivate the control signal using one of a clock signal output from an inverter connected to the second node among the plurality of inverters and clock signals of which the phases lead that of a clock signal of the first node, when the oscillation enable signal is deactivated.01-06-2011
20110210798Ring Oscillator for Providing Constant Oscillation Frequency - Some embodiments disclosed herein relate to techniques for providing a relatively constant oscillation frequency. In some instances, these techniques can make use of a ring oscillator that is powered by an adaptive voltage supply. The adaptive voltage supply provides a temperature-dependent supply voltage to respective delay elements in the ring oscillator, such that the oscillation frequency of the ring oscillator is approximately constant over a predetermined temperature range. For example, if temperature increases, the supply voltage can be increased proportionally, thereby tending to limit variation in the oscillation frequency delivered by the ring oscillator.09-01-2011
20110043292SEMICONDUCTOR INTEGRATED CIRCUIT - The present invention is directed to reduce the chip area of a semiconductor integrated circuit. A semiconductor integrated circuit of the invention includes a first transistor, a second transistor disposed adjacent to the first transistor along a Y axis, and a third transistor disposed adjacent to the second transistor along an X axis. The semiconductor integrated circuit further includes a fourth transistor disposed adjacent to the third transistor along the Y axis and disposed adjacent to the first transistor along the X axis. The first to fourth transistors share a well, and an output signal of the first transistor and an output signal of the second transistor have phases opposite to each other. An output signal of the second transistor and an output signal of the third transistor have phases opposite to each other. An output of the third transistor and an output signal of the fourth transistor have phases opposite to each other. The outputs of the transistors act so as to cancel out fluctuations in well potential.02-24-2011
20090033431Oscillation Circuit - The present invention provides a highly accurate oscillation circuit. For example, the oscillation circuit includes plural ring oscillator units RO02-05-2009
20110128081RANDOM NUMBER GENERATION SYSTEM WITH RING OSCILLATORS - A random number generation system comprising one or more ring oscillators configured to generate entropy due to accumulated phase drift.06-02-2011
20100052800METHOD AND APPARATUS FOR DERIVING AN INTEGRATED CIRCUIT (IC) CLOCK WITH A FREQUENCY OFFSET FROM AN IC SYSTEM CLOCK - Generally, methods and apparatus are provided for deriving an integrated circuit (IC) clock signal with a frequency that is offset from the IC system clock. An offset clock having a frequency that is offset from a system clock is generated by configuring a ring oscillator in a first mode to generate the system clock having a desired frequency; and adjusting the configuration of the ring oscillator in a second mode to generate the offset clock having the frequency that is offset from the system clock. The configuration of the ring oscillator is adjusted in the second mode by adjusting (i) a power supply value applied to the ring oscillator in the second mode relative to a power supply value applied in the first mode; or (ii) a number of delay line elements that are active in the ring oscillator loop.03-04-2010
20090033430Injection-locked frequency divider - An injection-locked frequency divider includes a ring oscillator, a signal injection circuit, a first adjustable load circuit and a second adjustable load circuit. The ring oscillator generates an oscillation signal according to a differential signal outputted by the signal injection circuit. According to an adjustable voltage, the first and second adjustable load circuits can respectively change equivalent impedances of the first adjustable load circuit and the second adjustable load circuit so that a free-running frequency of the oscillation signal of the ring oscillator is adjusted and an injection-locked frequency range of the injection-locked frequency divider is expanded.02-05-2009
20110068875FLUCTUATION OSCILLATOR, FLUCTUATION OSCILLATING SYSTEM, OBSERVATION DEVICE AND CONTROL SYSTEM - Four stochastic resonators 03-24-2011
20110102091Operating parameter monitor for an integrated circuit - An integrated circuit 05-05-2011
20120119836HIGH-SPEED CMOS RING VOLTAGE CONTROLLED OSCILLATOR WITH LOW SUPPLY SENSITIVITY - High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.05-17-2012
20110175684TEMPERATURE-COMPENSATED RING OSCILLATOR - A temperature-compensated ring oscillator includes a control signal generator and a voltage controlled oscillator. The control signal generator is configured to generate at least one control signal, and includes at least one first resistor and second resistor. A first temperature coefficient of the first resistor is negative, and a second temperature coefficient of the second resistor is positive. The voltage controlled oscillator receives the control signal, outputs an oscillation signal, and has (207-21-2011
20100301951CURRENT CONTROLLED RING OSCILLATOR AND METHOD FOR CONTROLLING THE SAME - A current controlled ring oscillator and a method for controlling the same are provided. The current controlled ring oscillator includes a charge pump (CP), a loop filter (LF), a voltage-current (V-I) converter, and an oscillation unit. The CP is used to provide a charging/discharging current. The LF is coupled to the CP, and is used to provide a control voltage. The V-I converter is coupled to the CP, and is used to convert the control voltage to a control current. The oscillation unit includes a plurality of current controlled delay cells serially connected to one another as a ring, and the oscillation unit is coupled to the V-I converter, and controlled by the control current to generate an oscillation signal.12-02-2010
20080252386Quadrature-phase voltage controlled oscillator - A voltage controlled oscillator (VCO) is provided. The VCO may include a first ring oscillation circuit that may have a plurality of delay cells and may output first differential oscillation signals, and a second ring oscillation circuit that may have a plurality of delay cells and may output second differential oscillation signals. The delay cells of the first ring oscillation circuit may be respectively cross-coupled to the corresponding delay cells of the second ring oscillation circuit. Each of the delay cells may include a differential amplification circuit that may output a first differential signal based on a first control signal, and a negative resistance circuit that may be connected in parallel to a pair of output terminals of the differential amplification circuit, may receive a second differential signal, may adjust the phase of the first differential signal based on a second control signal, and may then output the first differential signal.10-16-2008
20110163818APPARATUS AND METHOD FOR GENERATING A RANDOM BIT SEQUENCE - An apparatus for generating a random bit sequence has a ring oscillator which includes inverting digital devices and on which an oscillator signal can be tapped. An intermediate storage element monitors and stores fluctuating levels of the oscillator signal. At least two controllable switch devices for simultaneously exciting at least two harmonic wave edges of the ring oscillator are provided in a signal path of the ring oscillator. The phasing of the two harmonic wave edges and a potential convergence thereof are subject to statistical fluctuations, which are used as a basis for the random bit generation. A corresponding random number generator can be used in particular as an FPGA for security applications, such as cryptographic methods. The apparatus has substantially digital components, which are easy to produce in a standardized manner. A dedicated regulating circuit is not necessary. The apparatus is also robust toward exterior influences.07-07-2011
20100214033LOW VOLTAGE OSCILLATOR FOR MEDICAL DEVICES - Low voltage oscillators that provide a stable output frequency with varying supply voltage are provided. The subject oscillators find use in a variety of different types of devices, e.g., medical devices, including both implantable and ex-vivo devices.08-26-2010
20100176889COMPLEMENTARY RING OSCILLATOR WITH CAPACITIVE COUPLING - An oscillator. The oscillator includes a first ring oscillator having a first plurality of inverters, a first plurality of capacitors each having a first terminal coupled to an output terminal of a corresponding one of the first plurality of inverters, a second ring oscillator having a second plurality of inverters, and a second plurality of capacitors each having a first terminal coupled to an output terminal of a corresponding one of the second plurality of inverters. A second terminal of the first plurality of capacitors is coupled to an output terminal of a corresponding one of the second plurality of inverters. A second terminal of the second plurality of capacitors is coupled to an output terminal of a corresponding one of the first plurality of inverters. The oscillator is configured to provide as an output a differential clock signal.07-15-2010
20100176890System and Method for Characterizing Process Variations - A system and method for characterizing process variations are provided. A circuit comprises a plurality of inverters arranged in a sequential loop, and a plurality of transmission gates, with each transmission gate coupled between a pair of serially arranged inverters. Each transmission gate comprises a first field effect transistor (FET) having a first channel, and a second FET having a second channel. The first channel and the second channel are coupled in parallel and a gate terminal of the first FET and a gate terminal of the second FET are coupled to a first control signal and a second control signal, respectively.07-15-2010
20110148532DIFFERENTIAL RESONANT RING OSCILLATOR UTILIZING MAGNETICALLY TUNED YIG RESONATORS TO ACHIEVE ULTRA LOW PHASE NOISE AND MULTI-OCTAVE ELECTRONIC TUNING IN MICROWAVE FREQUENCIES - A differential resonant ring oscillator (“DRRO*) circuit using a ring oscillator topology to electronically tune the oscillator over multi-octave bandwidths. The oscillator tuning is substantially linear, because the oscillator frequency is related to the magnetic tuning of a YIG sphere, which has a resonant frequency equal to a fundamental constant multiplied by the DC magnetic field. The simple circuit topology uses half turn or multiple half turn loops magnetic coupling methods connecting a differential pair of amplifiers into a feedback loop configuration having a four port YIG tuned filter, thus creating a closed loop ring oscillator. The oscillator may use SiGe bipolar junction transistor technology and amplifiers employing heterojunction bipolar transistor technology SiGe is the preferred transitor material as it keeps the transistor's 1/f noise to an absolute minimum in order to achieve minimum RF phase noise.06-23-2011
20090174487VOLTAGE-CONTROL OSCILLATOR CIRCUITS WITH COMBINED MOS AND BIPOLAR DEVICE - A voltage controlled oscillator includes: a first merged device having a first bipolar transistor and a first MOS transistor, the first bipolar transistor having a collector sharing a common active area with a source/drain of the first MOS transistor, and an emitter sharing the common active area with another source/drain of the first MOS transistor, a second merged device having a second bipolar transistor and a second MOS transistor, the second bipolar transistor having a collector sharing a common active area with a source/drain of the second MOS transistor, and an emitter sharing the common active area with another source/drain of the second MOS transistor, and a first inductor connected to both the collector of the first bipolar transistor and a base of the second bipolar transistor.07-09-2009
20100214032SYMMETRIC LOAD DELAY CELL OSCILLATOR - An oscillator includes a control circuit and a ring of symmetric load delay cells. Each delay cell includes two novel symmetric loads. Each load involves a level shift circuit and a diode-connected transistor coupled in parallel with a current source-connected transistor. The control circuit converts an oscillator input signal into bias control signals that in turn control the effective resistance of the symmetric loads such that delays through the delay cells are a function of the input signal. The control circuit uses a symmetric load replica in a control loop to control the level shift circuits of the delay cells such that the oscillating delay cell output signals have a constant amplitude. In a first advantageous aspect, due to the constant amplitude, the oscillator is operable over a wide frequency range. In a second advantageous aspect, the oscillator input signal to output signal oscillation frequency has a substantially linear relationship.08-26-2010
20120098604RING OSCILLATOR AND CONTROL METHOD OF RING OSCILLATOR - A ring oscillator including a core circuit and a first adjusting circuit. The core circuit is for outputting a clock signal, and includes a plurality of ring stages. The first adjusting circuit is for receiving a plurality of first control information, and referring to the plurality of first control information to adjust the clock signal. The first adjusting circuit includes a plurality of bias circuits and a plurality of switch elements. The bias circuits are for providing a plurality of currents, and the switches are connected to the bias circuits in series and receive the plurality of first control information, respectively, wherein each switch element is selectively conducting according to a corresponding first control information for determining whether a current provided by a corresponding bias circuit is utilized to bias the core circuit.04-26-2012
20120098605FEED-FORWARD RING OSCILLATOR - Disclosed herein is a feed-forward ring oscillator. The feed-forward ring oscillator includes a plurality of delay cells for receiving a first differential input signal pair and a second differential input signal pair, and outputting a differential output signal pair. The delay cells are connected in a ring shape. Each of the delay cells receives a differential output signal pair of a delay cell of a previous stage as a first differential input signal pair and receives a differential output signal pair of a delay cell of a stage before the previous stage as a second differential input signal pair. Each of the delay cells comprises multiple independent gate field-effect transistors.04-26-2012
20120044024LATCHED RING OSCILLATOR DEVICE FOR ON-CHIP MEASUREMENT OF CLOCK TO OUTPUT DELAY IN A LATCH - A novel and useful apparatus and related method for on-chip measurement of the clock to output delay of a latch within an integrated circuit. The delay measurement mechanism enables measuring the time delay from the transition of the clock input to the data output of a latch. The output delay of the on-chip latch is measured by making the latch delay part of a ring oscillator and measuring its frequency of oscillation. A latch based delay stage is used to construct the ring oscillator in which a delayed short pulse derived from the input edge is used as the trigger for the latch. The latched ring oscillator mechanism of the invention can be used to measure the clock to output (C2Q) delay of on-chip latch devices.02-23-2012
20110156822CURRENT SOURCE CIRCUIT AND DELAY CIRCUIT AND OSCILLATING CIRCUIT USING THE SAME - A disclosed current source circuit includes a current mirror circuit having two enhancement-type MOS transistors, a depletion-type MOS transistor configured to be connected to a drain of one of the two enhancement-type MOS transistors and to function as a constant current source, and a resistor configured to have a negative temperature property and be connected to a source of the one of the two enhancement-type MOS transistors.06-30-2011
20100289588OSCILLATOR CIRCUIT - An oscillator circuit includes an oscillator that generates an oscillation signal and a limiter that limits amplitude of the oscillation signal output from the oscillator.11-18-2010
20120161886VOLTAGE CONTROLLED OSCILLATOR - A voltage controlled oscillator including a control signal adjuster and ring-connected delay cells is disclosed. The control signal adjuster receives a first control signal to generate a second control signal boosted from the first control signal when the first control signal is lower than a transistor threshold voltage. The ring-connected delay cells are controlled by the first and second control signals both to generate an oscillation signal. Each of the delay cells has a first set of current generation transistors and a second set of current generation transistors. Each transistor of the first set of current generation transistors has a control terminal receiving the first control signal while each transistor of the second set of current generation transistors has a control terminal receiving the second control signal. The first and second sets of current generation transistors collectively output an oscillation signal with unchanged frequency of associated input signal.06-28-2012
20090058541High-frequency ring coupled Quad - The present invention discloses a high-frequency ring coupled Quad comprising at least two transistors, which are cascaded to form a ring and bonded to resonators to form an oscillation source. The open loop feedback gain of the ring coupler of the present invention is higher than that of a conventional cross-coupled pair oscillator because the present invention adopts at least two cascaded transistors. The present invention can solve the problems of low transistor gain and high substrate loss occurring at a high frequency. The present invention has a fully symmetric circuit topology and is free of additional interconnections lines, which can obviously reduce the stray effect of interconnection lines.03-05-2009
20090058540Microelectronic Die Having CMOS Ring Oscillator Thereon And Method of Using Same - A microelectronic die including a CMOS ring oscillator thereon, and a method of using the same. The microelectronic die includes: a die substrate; and a plurality of CMOS ring oscillators on the die substrate, the ring oscillators being disposed at regions of the die substrate that are adapted to exhibit differing strain responses to package-induced stress with respect to one another.03-05-2009
20120212297WAVE REVERSING SYSTEM AND METHOD FOR A ROTARY TRAVELING WAVE OSCILLATOR - Apparatus and methods for wave reversing in a travelling wave oscillator are disclosed. The travelling wave oscillator includes a differential transmission line and regeneration elements connected along the differential transmission line. The differential transmission line can be used to propagate a wave traveling in either a counterclockwise or a clockwise direction. Each of the regeneration elements includes a first gain portion operable to degenerate a wave travelling in the counterclockwise direction and to regenerate a wave travelling the clockwise direction, and a second gain portion operable to degenerate a wave travelling in a clockwise direction and to regenerate a wave travelling in a counterclockwise direction.08-23-2012
20120075024OSCILLATOR, OSCILLATOR IMPLEMENTATIONS AND METHOD OF GENERATING AN OSCIALLATING SIGNAL - One embodiment of the oscillator includes a first starved inverter and a second starved inverter. An inner inverter of the second starved inverter is cross-coupled to an inner inverter of the first starved inverter. The oscillator further includes a first inverter connected to output of the inner inverter of the first starved inverter, and a second inverter connected to output of the inner inverter of the second starved inverter.03-29-2012
20100271142COUPLED RING OSCILLATOR AND METHOD FOR LAYING OUT THE SAME - A coupled ring oscillator includes n ring oscillators (10-28-2010
20120182079MONITORING NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI) AND/OR POSITIVE BIAS TEMPERATURE INSTABILITY (PBTI) - A ring oscillator circuit for measurement of negative bias temperature instability effect and/or positive bias temperature instability effect includes a ring oscillator having first and second rails, and an odd number (at least 3) of repeating circuit structures. Each of the repeating circuit structures in turn includes an input terminal and an output terminal; a first p-type transistor having a gate, a first drain-source terminal coupled to the first rail, and a second drain source terminal selectively coupled to the output terminal; a first n-type transistor having a gate, a first drain-source terminal coupled to the second rail, and a second drain source terminal selectively coupled to the output terminal; and repeating-circuit-structure control circuitry. The ring oscillator circuit also includes a voltage supply and control block.07-19-2012
20120223780VOLTAGE CONTROLLED OSCILLATOR CIRCUIT - According to one embodiment, a voltage control oscillating circuit is provided with a ring oscillator, a control current generating unit and a constant current generating unit. The ring oscillator has an odd number of inverters connected in a ring shape. The control current generating unit converts an input control voltage into a control current and to supply the control current to the ring oscillator as a first supply current. The constant current generating unit generates a constant current and to supply the generated constant current to the ring oscillator as a second supply current which is added to the control current.09-06-2012
20090021313VOLTAGE CONTROLLED OSCILLATOR CAPABLE OF OPERATING IN A WIDE FREQUENCY RANGE - A voltage controlled oscillator includes a first NMOS transistor having a base terminal configured to receive an input signal INP and a drain terminal connected to an output node OUTN, a second NMOS transistor having a base terminal configured to receive an input signal INN and a drain terminal connected to an output node OUTP, a third NMOS transistor having a source terminal connected to a low voltage supply VSS and a drain terminal connected to source terminals of the first NMOS transistor and the second NMOS transistor. A first PMOS transistor includes a base terminal connected to the output node OUTP and a drain terminal connected to the output node OUTN. A second PMOS transistor includes a base terminal connected to the output node OUTN and a drain terminal connected to the output node OUTP.01-22-2009
20120262240OSCILLATOR, TIME-DIGITAL CONVERTER CIRCUIT AND RELATING METHOD OF TIME-DIGITAL MEASURE - A ring oscillator has a plurality of elementary units connected in cascade and linked in order to make a chain with the respective output terminals connected to the input terminals of the successive elementary units of the chain, the elementary units being crossed by a cyclic signal during a time period of activation, each of said elementary units comprising an auxiliary recovery terminal for temporarily resetting each elementary unit during each loop of said cyclic signal, said auxiliary recovery terminal being connected to an output terminal of a successive elementary unit of the chain.10-18-2012
20110121906INVERTING DIFFERENCE OSCILLATOR - The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO) enabling circuit coupled to the pulse generator circuit; and a disable signal coupled to the IDO enabling circuit. When the disable signal is asserted, the IDO enabling circuit is disabled and the pulse generator circuit is configured as a pulse generator. In contrast, when the disable signal is deasserted, the IDO enabling circuit is enabled and the pulse generator circuit is configured as part of an IDO.05-26-2011
20110121905Wide Range Interpolative Voltage Controlled Oscillator - Systems and methods for increasing the frequency range of an output signal generated by a VCO, where one or more variable delay units are incorporated into an interpolative VCO to decrease the minimum frequency at which the VCO oscillates. In one embodiment, the VCO includes a ring of serially connected inverters, a set of bypass circuits and a set of variable delay units. The bypass circuits are coupled to the ring of serially connected inverters to bypass one or more of the serially connected inverters when enabled. Each variable delay unit delays signal transitions at the input of a corresponding one of the serially connected inverters by a variable amount. The variable delay units may be positioned in series with the ring of inverters, in parallel with the bypass paths, or in parallel with corresponding inverters in the ring of inverters.05-26-2011
20100327983RING OSCILLATOR - Multiple multi-stage delay circuits each have n (n is an integer) output terminals. The multi-stage delay circuits each apply delay times to a corresponding input signal, and output, via n output terminals, n delayed signals to which different delay times have been applied. Multiple inverters invert the respective input signals. The multiple multi-stage delay circuits and multiple inverters are alternately connected in the form of a ring.12-30-2010
20120319784IR-UWB TRANSMITTER - A generator of very short pulses where a cascade of inverters of arbitrary length characterized in that said inverters are adapted to produce pulses on their power supply line instead of their usual output.12-20-2012
20120081186SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE HAVING THE SAME - A semiconductor device includes an antenna circuit for receiving a wireless signal, a power supply circuit generating power by the wireless signal received by the antenna circuit, and a clock generation circuit to which power is supplied. The clock generation circuit includes a ring oscillator which self-oscillates and a frequency divider which adjusts frequency of an output signal of the ring oscillator in an appropriate range. A digital circuit portion is driven by a clock having high frequency accuracy, so that a malfunction such as an incorrect operation or no response is prevented.04-05-2012
20080211590METHOD AND SYSTEM FOR A VARACTOR-TUNED VOLTAGE-CONTROLLED RING OSCILLATOR WITH FREQUENCY AND AMPLITUDE CALIBRATION - Aspects of a method and system for a varactor-tuned voltage-controlled ring oscillator with frequency and amplitude calibration may include generating in a voltage controlled ring oscillator, an oscillating signal using delay cells, wherein each delay cell may comprise varactors and variable resistors. The frequency of the generated oscillating signal may be variable and may be calibrated by calibrating a delay associated with the delay cells. The amplitude of the generated oscillating signal may be calibrated by adjusting variable resistors and current sources within the delay cells. The frequency of the generated oscillating signal may be varied by varying the delay of at least one delay cell through changing the capacitance of its varactors. Changing a control voltage may change the varactor capacitance. The gain of the ring oscillator may be reduced by adjusting the varactors, and the generated oscillating signal may be a square wave signal.09-04-2008
20080252387OSCILLATOR - There is provided an oscillator having first and second oscillating units (10-16-2008
20100090771DIGITALLY CONTROLLED OSCILLATOR - A digitally controlled oscillator includes a ring oscillator, a parallel resistor bank connected to a first terminal of the ring oscillator and having a resistance that varies according to a digital code, and a serial resistor bank connected to a second terminal of the ring oscillator and having a resistance that varies according to the digital code. A frequency of the ring oscillator linearly varies with a variation in the resistance of the parallel resistor bank and the resistance of the serial resistor bank according to the digital code.04-15-2010
20080231379Injection locker frequency divider - An injection locked frequency divider includes a ring oscillator, a first injection unit and a second injection unit. The ring oscillator includes a first delay cell and a second delay cell each including differential input terminals and differential output terminals. The differential input terminals and the differential output terminals of the first delay cell are respectively coupled to the differential output terminals and the differential input terminals of the second delay cell. The first injection unit connected between the differential output terminals of the first delay cell receives and injects a first injection signal to the differential output terminals of the first delay cell. The second injection unit connected between the differential output terminals of the second delay cell receives and injects a second injection signal to the differential output terminals of the second delay cell.09-25-2008
20080231378RING OSCILLATOR WITH ULTRA-WIDE FREQUENCY TUNING RANGE - Methods and systems for tuning an oscillator are disclosed and may comprise dividing a desired frequency range of a delay-cell based ring oscillator into segments, and tuning the delay-cell based ring oscillator over an ultra-wide frequency range by utilizing these divided segments. The enabled segment may determine the frequency range and the oscillator may be tuned within these segments. The delay may be adjusted utilizing a negative skew technique, and may be controlled by one or more digital codes. The oscillating frequency within each segment may be adjusted utilizing a control voltage or control current. The voltage or current may be buffered and utilized as a common supply of the delay cells.09-25-2008
20110273237Oscillator With Frequency Determined By Relative Magnitudes of Current Sources - An oscillator circuit includes a circuit loop and multiple current sources. The circuit loop includes an output having the oscillating signal. The multiple current sources are turned on independently of a phase of the oscillating signal. The current sources control magnitudes of both charging current and discharging current at nodes of the circuit loop, including the output. Relative magnitudes of different current sources determine a frequency of the oscillating signal.11-10-2011
20130093526"REPLICA BASED" VCO GAIN AND LOOP FILTER'S JITTER REDUCTION TECHNIQUE FOR RING OSCILLATOR PLLS - Reducing a gain of a VCO, which may be used in a serdes system, includes using an oscillator replicating the VCO. The oscillator frequency varies according to PVT conditions of circuit elements of the oscillator, which affect a speed of the circuit elements. A first circuit receives an output of the oscillator to produce a current that varies inversely proportionally to the oscillator frequency. A second circuit injects the current into a power supply line of the VCO. Thus, high VCO frequencies can be attained. By reducing the gain of the VCO, thermal noise contribution of the loop resistor and the loop capacitor required for desired loop bandwidth are reduced. During fast corner conditions, minimal current is injected into the VCO. During slow corner conditions, high current is injected into the VCO. These help keep VCTRL of the PLL loop close to a mid-rail operating region.04-18-2013
20080197932VOLTAGE CONTROLLED OSCILLATOR - A voltage controlled oscillator that is a differential ring oscillator type voltage controlled oscillator that, by connecting in cascade differential delay elements to which differential clock signals of a mutually reverse phase are input and controlling the current that flows to the differential delay elements by a bias voltage, controls a delay amount of this differential clock signal, having a phase detection portion that outputs a detection signal by comparing an output voltage of the differential output of any differential delay element and a reference voltage that is set to a voltage that detects an abnormal operation, and a cross-coupled circuit that is provided at each of the differential delay elements and, when the detection signal is input, amplifies the potential difference between the pair of differential output terminals.08-21-2008
20080197931OSCILLATOR - The present invention provides an oscillation circuit including: a plurality of multi-stage inverter rings each having an odd number of inverters connected to each other in cascade to form a ring through the same odd number of nodes on the ring; an inverter group for connecting each one of the nodes on any specific one of the multi-stage inverter rings to a counterpart one of the nodes on another one of the multi-stage inverter rings so as to join the specific and other multi-stage inverter rings to each other in order to shift the phases of generated oscillation signals from each other by a fixed difference: and a current source connected to the inverters of the multi-stage inverter rings and the inverters of the inverter group.08-21-2008
20130147564OSCILLATOR WITH FREQUENCY DETERMINED BY RELATIVE MAGNITUDES OF CURRENT SOURCES - An oscillator circuit includes a circuit loop and multiple current sources. The circuit loop includes an output having the oscillating signal. The multiple current sources are turned on independently of a phase of the oscillating signal. The current sources control magnitudes of both charging current and discharging current at nodes of the circuit loop, including the output. Relative magnitudes of different current sources determine a frequency of the oscillating signal.06-13-2013
20130127550FREQUENCY SCALING OF VARIABLE SPEED SYSTEMS FOR FAST RESPONSE AND POWER REDUCTION - A system including a plurality of amplifiers configured to generate a clock signal having a frequency. The clock signal is input to a processor. The amplifiers are connected in series. An output of a last one of the amplifiers is fed back to an input of a first one of the amplifiers. Each of the amplifiers has a transconductance. A frequency adjustment module is configured to adjust, based on an activity level of the processor, the frequency of the clock signal by adjusting the transconductance of the amplifiers.05-23-2013
20120274408SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - Disclosed is a semiconductor integrated circuit device that includes a ring oscillator circuit, performs a proper oscillation operation, and expands the range of oscillation frequency variation. The ring oscillator circuit includes, for instance, plural differential amplifier circuits. MOS transistors are respectively added to input nodes of a differential pair of the differential amplifier circuits. Further, gate control circuits are incorporated to control the gates of the MOS transistors, respectively. The gate control circuits cause the MOS transistors to function as an amplitude limiter circuit in mode 11-01-2012
20120274407LDO WITH DISTRIBUTED OUTPUT DEVICE - A method and apparatus for supplying independently switched, regulated power to a plurality of loads is disclosed.11-01-2012
20130154749OSCILLATOR FOR GENERATING OUTPUT SIGNAL WITH ADJUSTABLE FREQUENCY - An oscillator is provided and includes a resistance unit, a capacitance unit, a first inverter and a second inverter. The resistance unit is serially connected between a first reference point and a second reference point. The capacitance unit is coupled between the first reference point and an output point, and includes capacitors. One terminal of each of the capacitors is coupled to the output point, and the other terminal of each of the capacitors is coupled to the first reference point or a reference ground according to a control signal. The input terminal of the first inverter is coupled to the first reference point, and the output terminal of the first inverter is coupled to the second reference point. The input terminal of the second inverter is coupled to the output terminal of the first inverter, and the output terminal of the second inverter is coupled to the output point.06-20-2013
20130181781DIFFERENTIAL RING OSCILLATOR AND METHOD FOR CALIBRATING THE DIFFERENTIAL RING OSCILLATOR - A differential ring oscillator includes a plurality of delay stages connected in a ring. At least one of the delay stages includes: a current source, arranged to generate a bias current according to a coarse tuning signal; a latching circuit arranged to generate a differential output signal to a next delay stage according to a differential input signal from a previous delay stage; a capacitive array arranged to provide a first capacitance according to a fine tuning signal; and a varactor device arranged to provide a second capacitance according to a controllable signal for locking an oscillating frequency of the differential ring oscillator to a target frequency. The coarse tuning signal and fine tuning signal are arranged for adjusting the oscillating frequency of the differential ring oscillator to, respectively, reach a predetermined frequency range including the target frequency and to approach the target frequency in the predetermined frequency range.07-18-2013
20110309886DIGITALLY CONTROLLED OSCILLATORS - Oscillator circuitry is provided that is based on a ring of inverters. The ring of inverters may be single-ended or differential inverters. Digitally controlled adjustable load capacitors may be provided at inverter outputs to tune the oscillator circuitry. Each digitally controlled adjustable load capacitor may be formed from multiple varactors connected in parallel. Each varactor may have a control input that receives a digital control signal. The digitally controlled adjustable load capacitors in a given oscillator may be adjusted in unison to produce the same capacitance value for each capacitor or may be adjusted individually so that they produce different capacitance values. The inverters may include common-mode-gain reduction features such as series-connected current sources, series-connected resistors, and cross-coupled negative feedback transistors.12-22-2011
20110309885DELAY CIRCUIT FOR LOW POWER RING OSCILLATOR - Disclosed herein is a delay circuit for a low power ring oscillator. The delay circuit includes: a pair of N type transistors that receive first differential input signals Vin12-22-2011
20090140820Ring Oscillator with Constant Gain - This disclosure relates to delay cells in a ring oscillator that include sub-cells having a gain that is a function of a variable control signal and sub-cells with a gain that is set by a fixed control signal.06-04-2009
20120075025OSCILLATING CIRCUIT - An oscillating circuit includes N nodes outputting oscillating signals, a main loop circuit including N inverting circuits, and a plurality of auxiliary loop circuits. Each inverting circuit in the auxiliary loop circuits is connected in parallel with even numbers of inverting circuits cascaded in the main loop circuit. The circuits for feeding back signals from outputs to inputs of the respective inverters of the main loop circuit have circuit configurations equivalent to each other. Each inverting circuit in the main loop circuit and the auxiliary loop circuits drives an output line such that a phase of an output signal is inverted with respect to a phase of an input signal and has driving power that becomes lower when the phases of the output signal and the input signal are inverted with respect to each other than when the output signal and the input signal are in phase with each other.03-29-2012
20130207734ELECTRONIC CIRCUITRY - Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.08-15-2013

Patent applications in class RING OSCILLATORS