| Entries |
| Document | Title | Date |
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| 20100156542 | LOW VOLTAGE FREQUENCY SYNTHESIZER USING BOOSTING METHOD FOR POWER SUPPLY VOLTAGE OF CHARGE PUMP - Provided is a low voltage frequency synthesizer using a boosting method for a power supply voltage of a charge pump. The low voltage frequency synthesizer includes a phase/frequency detector (PFD) that receives and compares a reference frequency and a feedback frequency to output a comparison signal, a charge pump that receives the comparison signal to output a current corresponding to the comparison signal, a low-pass filter (LPF) that generates a voltage corresponding to the output current of the charge pump, a voltage controlled oscillator (VCO) that receives the voltage of the LPF, amplifies the voltage to generate a boosting voltage, and outputs a frequency corresponding to the received voltage, and a DC converter that receives the boosting voltage of the VCO, converts the boosting voltage into a DC voltage, and applies the DC voltage as a power supply voltage of the charge pump. Since the supply voltage of the charge pump is provided from the LC-circuit-based VCO, the frequency synthesizer has superior characteristics such as a wide locking range, low phase noise, and the prevention of performance degradation caused by an external environment or process variations. | 06-24-2010 |
| 20120161881 | Pure-silicon digital oscillator - A pure-silicon digital oscillator includes a baseband generator for generating a standard baseband, and a clock pulse monitoring and modulating circuit for performing a frequency calibration to the standard baseband to produce a calibrated baseband, while storing an error value produced during the calibration into a data storage device, such that a frequency generator can generate an output frequency according to a numerical value of the calibrated baseband. After the output frequency is processed by a digital signal processing to form a digital output frequency to be inputted into a square wave generator, the square wave generator outputs a higher digital frequency according to the numerical value of the digital output frequency, and the higher digital frequency is provided for a digital power supply control device to drive currents and modulate voltages. | 06-28-2012 |
| 20100073095 | Frequency Synthesizer and Radio Transmitting Apparatus - A frequency synthesizer ( | 03-25-2010 |
| 20130076450 | LOW NOISE BIAS CIRCUIT FOR A PLL OSCILLATOR - A system, method, and apparatus for generating a low noise bias current to improve jitter performance in a wide frequency range LC-based phase-locked loop (PLL) circuit for multi-speed clocking applications. A plurality of noise-reducing stages are coupled in series and disposed between a power supply and a voltage controlled oscillator (VCO) including: a first stage VCO regulator; and a second stage bias circuit having a plurality of PMOS transistors cascode-coupled to each other and optionally grouped into one or more parallel branches of cascode-coupled transistor pairs. Each branch can be automatically enabled by a calibration code based on the desired reference clock signal in order to provide a wide range of currents to the voltage controlled oscillator. The cascode coupled pair includes a bias transistor coupled in series with a self-biased current buffer to provide high output impedance with minimal current change for any input voltage change from noise. | 03-28-2013 |
| 20100271141 | PLL CIRCUIT - A PLL circuit includes first and second charge pump circuits controlling an output voltage according to an output signal of a phase comparator, a first filter filtering out predetermined frequency component included in a signal generated according to current output from the first charge pump circuit, and outputting the signal as a first voltage signal, a second filter inputting a current output from the second charge pump circuit and outputting a predetermined constant voltage as a second voltage signal, a voltage control unit outputting a third voltage signal according to a comparison result between the first voltage signal output from the first filter and a reference voltage signal, and a voltage controlled oscillator that has a first low gain property, a second low gain property, and a high gain property, and is controlled by the first to third voltage signals to generate an oscillating frequency. | 10-28-2010 |
| 20130113573 | Frequency Synthesis Using a Ring Oscillator - The present disclosure is directed to a method and apparatus for providing an output oscillating signal at a desired frequency. In at least one example, the apparatus includes a weak inversion structure configured to set a small reference current. A current mirror configured to provide a replica current based on the small reference current and a tuning word. A ring oscillator is configured to be powered by a supply at a voltage determined based on the replica current. The tuning word is adjustable to change the voltage such that the ring oscillator provides the output oscillating signal at the desired frequency. | 05-09-2013 |
| 20130093522 | HIGH ACCURACY RC OSCILLATOR - A device includes an RC oscillator circuit and incorporates various features that individually and in combination can help improve the stability or accuracy of the oscillator output frequency. The oscillator circuit is operable to provide a tunable output frequency and includes a bias circuit switchable between first and second modes of operation. One of the modes has less drift in oscillator bias current relative to the other mode. The device also includes drift compensation circuitry that is operable to compensate for drift in the oscillator output frequency in a closed-loop mode of operation based on a comparison of the oscillator output frequency with a reference frequency. The device further includes a processor operable to compensate for temperature-based drift in the oscillator frequency in an open-loop mode of operation based on a measured temperature value in the vicinity of the oscillator circuit. | 04-18-2013 |
| 20130093523 | DIGITALLY CONTROLLED OSCILLATOR DEVICE AND HIGH FREQUENCY SIGNAL PROCESSING DEVICE - The present invention provides a digitally controlled oscillator device capable of realizing a reduction in DNL. The digitally controlled oscillator device includes, for example, an amplifier circuit block, coil elements and a plurality of unitary capacitor units coupled in parallel between oscillation output nodes. Each of the unitary capacitor units is provided with capacitive elements, and a switch which selects whether the capacitive elements should be allowed to contribute as set parameters for an oscillation frequency. The switch is driven by an on/off control line extending from a decoder circuit. The on/off control line is shielded between the oscillation output nodes by a shield section. | 04-18-2013 |
| 20130093524 | DIGITALLY CONTROLLED OSCILLATOR DEVICE AND HIGH FREQUENCY SIGNAL PROCESSING DEVICE - The present invention provides a digitally controlled oscillator device capable of reducing noise away from an oscillation frequency, and a high frequency signal processing device. Fractional capacitances are realized using a plurality of unitary capacitor units, for example. In one unitary capacitor unit, one ends of two types of capacitive elements are respectively coupled to oscillation output nodes. On the other hand, in the unitary capacitor units other than the one unitary capacitor unit, one ends of two types of capacitive elements are respectively coupled to a fixed voltage. The other ends of one capacitive elements in all the unitary capacitor units are coupled in common, and the other ends of other capacitive elements are also coupled in common. Turning on and off of respective switches in all the unitary capacitor units are controlled in common. | 04-18-2013 |
| 20080204152 | ULTRA-HIGH FREQUENCY SELF-SUSTAINING OSCILLATORS, COUPLED OSCILLATORS, VOLTAGE-CONTROLLED OSCILLATORS, AND OSCILLATOR ARRAYS BASED ON VIBRATING NANOELECTROMECHANICAL RESONATORS - A self-sustaining ultra-high frequency oscillator and method enable the ability to oscillate and output a signal. A balanced bridge circuit is utilized to null an embedding background response. A first vibrating nanoelectromechanical (NEMS) beam resonator is part of one of the branches of the balanced bridge circuit and determines the frequency of the oscillator's output signal. A feedback loop establishes and sets oscillation conditions of the oscillator's signal. Further, the feedback loop connects an output of the first resonator to an input of the balanced bridge circuit. | 08-28-2008 |
| 20120223778 | DIGITALLY CONTROLLED OSCILLATOR, AND PHASE LOCKED LOOP (PLL) CIRCUIT INCLUDING THE SAME - Disclosed is a digitally controlled oscillator which includes a ring oscillator; and a variable resistance bank connected between one power node of the ring oscillator and a power supply terminal and having the resistance value varied according to the number of active bits of a control code. The frequency of an clock signal output by the ring oscillator is changed non-linearly according to the resistance value of the variable resistance bank. The frequency of the output clock signal is changed stepwise linearly according to the number of active bits of the control code. | 09-06-2012 |
| 20130113572 | CLOCK FREQUENCY OVERSHOOT DETECTION CIRCUIT - An electronic circuit operating on a first clock signal includes a clock frequency overshoot detection circuit for detecting frequency overshoots in the first clock signal. The clock frequency overshoot detection circuit includes a shift register having an even number plurality of flip-flops. The flip-flops toggle to generate output bit patterns indicative of a frequency overshoot condition. A comparator connected to the shift register generates a comparison signal on detecting the frequency overshoot condition. A latch circuit connected to the comparator generates a frequency overshoot indication signal and the electronic circuit is shifted to a second (or safe) clock signal until the frequency of the first clock signal is rectified. | 05-09-2013 |
| 20130099869 | SYSTEM AND METHODS FOR CORRECTING CLOCK SYNCHRONIZATION ERRORS - Clock synchronization error is corrected or minimized by fitting a parabolic f(T) function to the crystal's data, and compensating for sampling period drift in an Analog to Digital Converter (ADC) at various temperatures. | 04-25-2013 |
| 20090009256 | VARIABLE-FREQUENCY OSCILLATOR - There is provided a frequency-variable oscillator that varies, even when a frequency of an input signal is varied, a frequency of an oscillation signal according to the varied frequency of the input signal. A frequency-variable oscillator according to an aspect of the invention includes: a voltage-to-current converter circuit converting a voltage level of an input signal into a current level within a predetermined range; and an oscillator circuit varying a frequency according to the current level from the voltage-to-current converter circuit and oscillating the varied frequency. | 01-08-2009 |
| 20080309414 | VOLTAGE CONTROLLED OSCILLATOR AND PHASE LOCKED LOOP CIRCUIT INCORPORATING THE SAME - A voltage controlled oscillator includes a ring oscillator configured by connecting invertors, each of the invertors including a first and a second transistors, an operational amplifier to obtain an amplified signal, third transistors inserted between the first transistors and a first power supply, and is gate-controlled by the amplified signal, fourth transistors inserted between the second transistors and a second power supply, and is gate-controlled by the control signal, a inverter including a fifth and a sixth transistor, gate terminals and drain terminals of the fifth and sixth transistor being connected in common to a first input terminal of the operational amplifier, a seventh transistor inserted between the fifth transistor and the first power supply, and gate-controlled by the amplified signal, and an eighth transistor inserted between the sixth transistor and the second power supply, and gate-controlled by the control signal. | 12-18-2008 |
| 20120188022 | OSCILLATOR, A FREQUENCY SYNTHESIZER AND A NETWORK NODE FOR USE IN A TELECOMMUNICATION NETWORK - The disclosure relates to an oscillator for use in generating frequencies in a frequency synthesizer, comprising: a first inductor element forming a metal trace loop with at least one turn, and a first capacitive circuit arranged to form a first resonance circuit with the first inductor element and being connected to the first inductor element through at least one first connection terminal, wherein the first capacitive circuit comprises at least one capacitive element and an electrical components arrangement arranged to establish and maintain an oscillation. The oscillator is characterized in that a second capacitive circuit comprising at least one capacitive element and an arrangement of electrical components, is arranged to form a second resonance circuit with the first inductor element and being connected to the first inductor element through at least one second connection terminal located on the opposite side of the first inductor element in respect to the first connection terminal of the first capacitive circuit, wherein the first and second resonance circuits are tuned to substantially the same frequency. The invention also relates to a frequency synthesizer and to a network node for use in a telecommunications network. | 07-26-2012 |
| 20110298547 | Method, system and apparatus for accurate and stable LC-based reference oscillators - A substantially temperature-independent LC-based oscillator is achieved using an LC tank that generates a tank oscillation at a phase substantially equal to a temperature null phase. The temperature null phase is a phase of the LC tank at which variations in frequency of an output oscillation of the LC-based oscillator with temperature changes are minimized. The LC-based oscillator further includes frequency stabilizer circuitry coupled to the LC tank to cause the LC tank to oscillate at the phase substantially equal to the temperature null phase. | 12-08-2011 |
| 20120098603 | Device and Method for Frequency Calibration and Phase-locked Loop Using the Same - The frequency calibration device includes a logic unit for gating the clock signal according to a gating window signal to generate a gated clock signal, and a divider for dividing the gated clock signal by a divisor in frequency to generate a frequency indication signal, and output digits of the divider are set to the divisor in a calibration cycle, and the frequency indication signal is a most significant bit of the output digits. | 04-26-2012 |
| 20090167444 | Inductor and Capacitor-Based Clock Generator and Timing/Frequency Reference - In various embodiments, the invention provides a clock generator and/or a timing and frequency reference comprising an LC oscillator with a frequency controller to control and provide a stable resonant frequency. Such stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the oscillator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages. | 07-02-2009 |
| 20110215874 | NON-LINEAR OSCILLATOR - A non-linear oscillator for generating a first sinusoidal signal and a second sinusoidal signal includes a comparing device, a computing device, an integrator device, and a feedback device. The comparing device is operable to compare a reference signal with a feedback signal and output a comparison signal based on result of comparison made thereby. The computing device is operable to output first and second combined signals according to a predetermined frequency value, the comparison signal, the feedback signal and the first and second sinusoidal signals. The integrator device is operable to perform integration upon the first and second combined signals to output the first and second sinusoidal signals. The feedback device is operable to output the feedback signal to the comparing device and the computing device according to a first predetermined amplitude value and the first and second sinusoidal signals from the integrator device. | 09-08-2011 |
| 20090278615 | VOLTAGE CONTROLLED OSCILLATOR INCLUDING INTER-TERMINAL CONNECTION AND TRAP CIRCUIT - A voltage controlled oscillator includes: a voltage controlled oscillation circuit, an oscillation frequency thereof being controlled by a control voltage signal; a PLL circuit that generates a control voltage signal to be input to the voltage controlled oscillation circuit; a multiplier circuit that multiplies an oscillation signal output from the voltage controlled oscillation circuit; and a band-pass filter and trap circuit that sets a pass band for passing a signal with a predetermined multiplication number of multiplication signals output from the multiplier circuit and a trap frequency equal to the frequency of the oscillation signal input to the multiplier circuit, and varies the pass band and the trap frequency in synchronization with the control voltage signal. | 11-12-2009 |
| 20090261910 | METHOD AND SYSTEM FOR CONFIGURATION OF A PHASE-LOCKED LOOP CIRCUIT - A phase-locked loop (PLL) circuit configuration is implemented using a variety of methods and devices. According to one example embodiment, a low power configuration is determined for the PLL circuit which meets a set of desired phase-locked loop circuit characteristics. The PLL circuit ( | 10-22-2009 |
| 20100271140 | Supply-Regulated Phase-Locked Loop (PLL) and Method of Using - A supply-regulated Phase-locked loop (PLL) is provided. The PLL comprises a supply-regulating loop, a voltage-controlled oscillator (VCO), and a programmable decoupling capacitor array for the VCO. The capacitance of the VCO decoupling capacitor array is adjustable to be equal to N times C | 10-28-2010 |
| 20100283549 | PHASE LOCKED LOOP - Phase locked loop circuits capable of increasing an equivalent capacitance thereof to improve stability are provided, in which an integral part comprises a first phase frequency detector providing a phase error signal, a first charge pump circuit generating a control signal according to the phase error signal, a controllable oscillator providing an output clock according to the control signal, and a sampling adjustment unit decreasing the number of times the control signal is updated according to the phase error signal. A proportional part is coupled between the controllable oscillator and a reference clock and operated in a fraction mode. | 11-11-2010 |
| 20090179708 | PHASE LOCK OSCILLATOR AND WIRELESS COMMUNICATIONS DEVICE INCLUDING PHASE LOCK OSCILLATOR - A phase locked oscillator includes a voltage control oscillator and a phase comparator for detecting a phase difference between a phase of an output signal of the voltage control oscillator and a phase of a reference signal and controlling a voltage to be applied to the voltage control oscillator based on the detected phase difference. The phase locked oscillator also includes a delay control part configured to apply a variable delay time to the output signal of the voltage control oscillator and a delay time controlling part configured to control the delay time according to the detected phase difference. | 07-16-2009 |
| 20090212875 | Oscillator based on thermal diffusion - An oscillator device for generating an oscillator signal, includes a heater arrangement, a first switching element, a temperature sensor, signal process means, and voltage controlled oscillator; an output of the temperature sensor being connected to an input of the signal processing means, and an output of the signal processing means being connected to an input of the voltage controlled oscillator. The first switching element is arranged for receiving the oscillator signal from the voltage controlled oscillator and for providing a heater drive signal to either a first heater element or a second heater element of the heater arrangement based on the oscillator signal. The signal processing means comprise a synchronous demodulator. | 08-27-2009 |
| 20120194279 | RELAXATION OSCILLATOR HAVING A SUPPLY VOLTAGE INDEPENDENT OUTPUT FREQUENCY - Techniques and architectures corresponding to relaxation oscillators having output frequencies that are supply voltage independent are described. In a particular embodiment, an apparatus includes a relaxation oscillator having one or more capacitors and a compensation current circuit coupled to the relaxation oscillator. The compensation current circuit is configured to regulate current provided to the one or more capacitors of the relaxation oscillator in response to changes in a supply voltage provided to the compensation current circuit and to the relaxation oscillator. | 08-02-2012 |
| 20120105160 | VOLTAGE CONTROLLED OSCILLATOR WITH DITHER - A voltage control signal at a voltage control signal input terminal is used to adjust an output frequency of an oscillator circuit. The voltage level of the voltage control signal is converted in a one-bit analog-to-digital converter (ADC) to a digital output indicative of the voltage level. Successive digital representations of the voltage level of the voltage control signal are upsampled to generate upsampled blocks of data. A dither circuit inserts a digital dither in the upsampled blocks of data to generate dithered upsampled data, which is used to generate a control signal for a feedback divider of a phase-locked loop circuit and thereby adjust the output frequency. | 05-03-2012 |
| 20100214030 | Integrated circuit frequency generator - An integrated circuit frequency generator is disclosed. In some embodiments, the frequency generator comprises an electronic oscillator configured to generate an oscillator frequency, calibration circuitry configured to periodically calibrate the electronic oscillator with respect to a reference frequency at a first calibration frequency when at a steady state temperature and at a second calibration frequency when at a transient temperature, and circuitry configured to generate an output frequency from the oscillator frequency. | 08-26-2010 |
| 20100253438 | Phase Locked Loop Circuit - A PLL circuit comprises a phase detector, a charge pump, a loop filter, a voltage-controlled oscillator (VCO), and two variable voltage sources. The phase detector and the charge pump each comprises low-voltage transistors, and operates with a fixed supply voltage VCC1 (e.g., 5 V) which is a potential difference applied from the variable voltage source of a power-supply voltage VL and the variable voltage source of a power-supply voltage VDC (=VL+VCC1). A tuning control signal VC generated by integrating an output current signal of the charge pump using the loop filter is input to the VCO having an input voltage range of the tuning control signal from 0 V to VCC2 (e.g., 16 V). At this time, the output voltage range of the tuning control signal is from VL to VDC, but the output voltage range is expanded to cover the full input voltage range from 0 V to VCC2 by controlling the output voltages VL, VDC of the variable voltage sources, thereby allowing the VCO to output an output signal with a desired oscillation frequency. | 10-07-2010 |
| 20090066425 | FREQUENCY SYNTHESIZER HAVING MULTI-BAND VOLTAGE CONTROLLED OSCILLATOR - There is provided a frequency synthesizer including a multi-band voltage controlled oscillator having a plurality of voltage controlled oscillating cores outputting oscillation frequencies having different bands according to an input control voltage. Each of the voltage controlled oscillating cores outputs a frequency band divided into a plurality of bands, and the voltage controlled oscillating core operates by each of the divided bands, and one of the voltage controlled oscillating cores operates in one of the bands according to the control voltage. The frequency synthesizer further includes a comparator unit and an oscillation band-determining unit. The comparator unit compares the control voltage with a pre-set reference voltage range. The oscillation band-determining unit changes the band where the voltage controlled oscillating core operates into another one of the bands when the control voltage is out of the pre-set reference voltage range. | 03-12-2009 |
| 20110175683 | ELECTRONIC DEVICE FOR CONTROLLING A FREQUENCY MODULATION INDEX AND A METHOD OF FREQUENCY-MODULATING - An electronic device controlling a frequency modulation index has a frequency modulation index control loop having an input adapted to be connected to a frequency output of a frequency controllable oscillator. The oscillator has a center frequency F | 07-21-2011 |
| 20090243733 | DESIGN STRUCTURE FOR TRANSFORMING AN INPUT VOLTAGE TO OBTAIN LINEARITY BETWEEN INPUT AND OUTPUT FUNCTIONS AND SYSTEM AND METHOD THEREOF - A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a first structure for determining a non-linear characteristic of the input voltage to the output frequency response, the first design structure providing a tunneling-based current relationship with the input voltage. Also disclosed is a system and a method of implementing such structure. | 10-01-2009 |
| 20090322433 | Method of Controlling Voltage-Controlled Oscillator - The present invention relates to a method for controlling a voltage-controlled oscillator (VCO), which uses a control unit to produce a switching signal according to a counting signal for switching a plurality of current sources. The VCO receives the currents of the plurality of current sources and a reference current and produces an output frequency signal. Thereby, according to the present invention, the counting signal is used for controlling the currents of the plurality of current sources, and thus the frequency range of the output frequency signal can be controlled. The output frequency band of the VCO is broadened accordingly. | 12-31-2009 |
| 20100308922 | Structures and Methods for Automated Tuning in Wide Range Multi-Band VCO with Internal Reset Concept - Circuits and methods for automated real-time tuning of wide range frequency/delay voltage controlled oscillators (VCO) using a reset mechanism, to account for run-time variations such as power supply, temperature, reference clock frequency and input slew drift etc is described. It finds extensive applications in wide range, multi frequency band phase and delay locked loops. In one embodiment, an automated Jump-Down band switching structure and method for use in VCOs with a plurality of frequency bands is described. This involves monitoring the VCO's analog control voltage signal until it reaches a predetermined lower limit, at which time band switching to an overlapping lower frequency band is triggered by an internally generated reset signal, while simultaneously charging the analog control voltage to a limit in a pre-determined range of the lower band, to avoid phase detector malfunctions in the PLL/DLL system at lower control voltages during band switch. | 12-09-2010 |
| 20100134192 | FREQUENCY CALIBRATION LOOP CIRCUIT - A frequency calibration loop circuit having a pre-set frequency channel word (FCW) command value, a bit inputted to obtain a target frequency in an oscillator and a pre-set minimum division ratio n (n is a constant) of a programmable divider, includes: an oscillator adjusting a oscillation frequency according to control value; a programmable divider dividing the oscillation frequency according to a division ratio; a counter counting the number of clocks of the divided frequency by using a reference frequency; and a frequency detector outputting a value obtained by subtracting the number of the counted clocks from a reference comparison value, a value obtained by dividing a Frequency Channel Word (FCW) command value by a minimum division ratio of the programmable divider, as the control value of the oscillator. | 06-03-2010 |
| 20090066424 | Programmable Interpolative Voltage Controlled Oscillator with Adjustable Range - A programmable interpolative voltage controlled oscillator (VCO) with adjustable frequency range output is provided. With the VCO, programmable delay cells whose size is modifiable based on control inputs to the programmable delay cells are utilized. A different set of control inputs may be provided to programmable delay cells of an inner sub-ring from the set of control inputs provided to programmable delay cells of a main ring of the VCO. The minimum frequency output of the VCO is governed by the main ring programmable delay cell strength with the maximum frequency output of the VCO being governed by a ratio of strengths of the main ring programmable delay cells to the inner sub-ring programmable delay cell. By modifying the control inputs to the inner sub-ring and main ring programmable delay cells, the minimum and maximum frequency outputs, and thus the range between these two frequency outputs, are made programmable. | 03-12-2009 |
| 20110018641 | FREQUENCY-PHASE ADJUSTING DEVICE AND METHOD THEREOF - A frequency-phase adjusting device includes a first controller, a second controller, and an oscillating circuit. The first controller generates a first control signal according to a target frequency and a current frequency. The second controller generates a second control signal according to the first control signal, wherein the second control signal is related to a first frequency difference, a second frequency difference, and a designated duration. The oscillating circuit adjusts the current frequency according to the first frequency difference, the second frequency difference, and the designated duration. The current frequency is set as a first frequency during a first duration, set as a second frequency during the designated duration, and set as a third frequency during a second duration. The first frequency difference equals a difference between the first frequency and the second frequency, and the second frequency difference equals a difference between the second frequency and the third frequency. | 01-27-2011 |
| 20110001568 | INTEGRATED CIRCUIT WITH LOW TEMPERATURE COEFFICIENT AND ASSOCIATED CALIBRATION METHOD - An integrated circuit (IC) with a low temperature coefficient and an associated calibration method are provided to lower the effect of the environmental temperature on the IC and at the same time to maintain the small area and low power consumption of the IC. The IC includes a first circuit, a second circuit and a calibration control circuit. The first circuit has a low temperature coefficient and generates a first output. The second circuit has a high temperature coefficient and generates a second output. The calibration control circuit detects the first and second outputs, and compares the first and second outputs according to a predefined relationship therebetween so as to generate an adjusting signal. The adjusting signal is for adjusting the second circuit such that the second circuit can have the characteristic of the low temperature coefficient. | 01-06-2011 |
| 20110115568 | FREQUENCY CALIBRATION DEVICE AND METHOD FOR PROGRAMMABLE OSCILLATOR - A frequency calibration method for a programmable oscillator includes the steps of: counting an oversampling number of an oversampling signal and estimating an accumulated bit number of a USB data stream according to the oversampling signal; calculating a difference between the oversampling number and M times of the accumulated bit number when the accumulated bit number is larger than or equal to a predetermined value; and determining a frequency calibration step of the oversampling signal according to the difference. The present invention further provides a frequency calibration device for a programmable oscillator. | 05-19-2011 |
| 20110128080 | VOLTAGE CONTROLLED OSCILLATOR (VCO) CIRCUIT WITH INTEGRATED COMPENSATION OF THERMALLY CAUSED FREQUENCY DRIFT - A voltage controlled oscillator circuit comprises a VCO resonator circuit having a first plurality of varactors for varying a frequency of the VCO resonator circuit the VCO resonator circuit being symmetrical with respect to VCO circuit ground and providing a signal having a frequency, the frequency depending on a tuning voltage applied to the first plurality of varactors, and a second plurality of varactors for compensating a drift of the frequency depending on a compensation voltage, a temperature sensor circuit sensing an ambient temperature of the VCO resonator circuit and providing a temperature dependent signal, and a temperature compensation circuit providing the compensation voltage depending on the temperature dependent signal. Furthermore, a phase locked loop (PLL) circuit, an automotive radar device and a method for compensating a frequency drift of a VCO resonator circuit are presented. | 06-02-2011 |
| 20110241786 | System and Method for Improved Start-Up of Self-Oscillating Electro-Mechanical Surgical Devices - An oscillating circuit for determining a resonant frequency of an electro-mechanical oscillating device and for driving the electro-mechanical oscillating device at the determined resonant frequency includes a driving circuit and a start-up, impetus injection circuit. The driving circuit is configured to receive one or more reference signals and further configured to provide a driving signal related to the reference signals to the electro-mechanical oscillating device. The start-up, impetus injection circuit is operably coupled to the electro-mechanical oscillating device and configured to selectively provide a start-up excitation signal to the electro-mechanical oscillation device. The start-up, impetus injection circuit is activated upon start-up of the oscillating circuit to drive the electro-mechanical oscillation device and the driving circuit determines a resonant frequency by measuring a parameter related to the resonant frequency of the electro-mechanical oscillating device. | 10-06-2011 |
| 20110084769 | Estimation and Compensation of Oscillator Nonlinearities - A device comprises an oscillator circuit, a control circuit, a frequency detector circuit, and a processor circuit. The oscillator circuit comprises a frequency control input and is configured to output an oscillator signal. The frequency of the oscillator signal depends on an input signal applied to the frequency control input. The control circuit is configured to apply a first input signal value, a second input signal value, and a third input signal value to the frequency control input. The frequency detector circuit is configured to detect the first frequency value of the oscillator signal when the first input signal value is applied to the frequency control input, a second frequency value of the oscillator signal when the second input signal value is applied to the frequency control input, and a third frequency value of the oscillator signal when the third input signal value is applied to the frequency control input. The processor circuit is configured to calculate, on the basis of the first input signal value, the second input signal value, the third input signal value, the first frequency value, the second frequency value, and the third frequency value, a second order coefficient of a polynomial oscillator characteristic relating values of the frequency of the oscillator signal to values of the input signal. | 04-14-2011 |
| 20100066455 | SIGMA DELTA DIGITAL TO ANALOG CONVERTER WITH WIDE OUTPUT RANGE AND IMPROVED LINEARITY - A sigma delta DAC using a single DAC to generate a first analog quantity portion and a second analog quantity portion, having a strength respectively proportionate to the most significant bits (MSBs) and least significant bits (LSBs) of a received digital value. The two portions are added to generate an analog output representing the strength of the digital value. In an embodiment, the single DAC contains a set of current sources, with some of the current sources (determined by the value of the MSBs) being connected to provide the corresponding output currents on a first path. Some of the other current sources, determined by a value of the LSBs, are controlled to be connected to provide the corresponding output currents on a second path. The time durations the currents are connected to the second path, are determined by the output of a sigma delta modulator. | 03-18-2010 |
| 20110248785 | Clock Generators, Clock Generating Methods, and Mobile Communication Device Using the Clock Generator - A clock generator and generating method, and a mobile communication device using the clock generator. A clock generator comprises a first accumulator, an oscillating signal generating circuit and a frequency adjustment circuit. The oscillating signal generating circuit generates a first oscillating signal and adjusts a frequency of the first oscillating signal according to a first overflow output signal of the first accumulator. The frequency adjustment circuit generates a frequency control value according to the first oscillating signal and a reference oscillating signal. The first accumulator accumulates the frequency control value according to the first oscillating signal to generate the first overflow output signal. | 10-13-2011 |
| 20110068874 | METHOD AND APPARATUS FOR CALIBRATING OSCILLATORS - A method of calibrating oscillators is disclosed that includes searching, in an array storing an operational characteristic of the oscillator, for an index value that is associated with an output of the oscillator; determining that the output is within a predetermined accuracy as compared to a desired output; and generating the output based the index value. An apparatus for performing the method is also disclosed herein. | 03-24-2011 |
| 20110043290 | Crystal oscillator - Provided is a small-size and highly stable oscillator which can easily correct a frequency shift caused by a temperature fluctuation. The oscillator includes: an overtone crystal unit of three or higher dimension; an oscillation circuit which is connected to the crystal unit and outputs an oscillation frequency; a divider which divides the oscillation frequency and outputs the divided frequencies to a system device processing unit; a temperature sensor which detects a temperature around the crystal unit; and a memory which stores information for correcting a frequency shift of an oscillation frequency according to the temperature characteristic of the crystal unit (a coefficient of an equation for calculating a correction amount of a frequency shift or the frequency shift corresponding to the temperature) and provides information to be used for correcting the frequency shift to the system device processing unit. | 02-24-2011 |
| 20110248786 | OSCILLATOR CIRCUIT - An oscillator circuit in accordance with an aspect of the present invention includes a filter capacitor that generates an oscillating frequency control voltage according to a charge amount accumulated based on an oscillating frequency setting current, an oscillator that changes a frequency of an oscillation signal to be output according to the oscillating frequency control voltage, a control circuit that generates a timing control signal, a frequency detection circuit that generates a frequency detection voltage based on the timing control signal, a voltage level of the frequency detection voltage being changed according to a length of the period of the oscillation signal, and a differential amplifier that continuously changes the oscillating frequency setting current according to a voltage difference between the frequency detection voltage and a reference voltage, and outputs the resultant oscillating frequency setting current to the filter capacitor. | 10-13-2011 |
| 20080231376 | Oscillation circuit controlling phase difference of output signals - A ring oscillation circuit composed of multiple op amps connected in series in a loop configuration is included to output a first output signal by adding multiple output signals of multiple op amps and to output a second output signal by adding all remaining output signals of multiple op amps. | 09-25-2008 |
| 20110210796 | OSCILLATION CIRCUIT AND FREQUENCY-CORRECTING OSCILLATION CIRCUIT - An oscillation circuit includes: an oscillator that includes a vibrator and outputs an oscillation signal; an F/V converter that converts the oscillation signal into a voltage corresponding to a frequency of the oscillation signal; and a memory circuit that stores frequency correcting information for correcting the frequency of the oscillation signal. | 09-01-2011 |
| 20110187462 | PRODUCING A DESIRED FREQUENCY USING A CONTROLLED OSCILLATOR WITH KNOWN TEMPERATURE SENSITIVITY - A controlled oscillator is tuned to produce a desired, temperature independent frequency. A first frequency ratio is determined between a first frequency of the output signal generated by the controlled oscillator and a frequency of an output signal from another oscillator. The first frequency is determined based on a sensed temperature. A desired frequency of the output signal of the controlled oscillator is used to determine a desired frequency ratio between the desired frequency and the frequency of the output signal from the other oscillator. The controlled oscillator is tuned and the frequency ratio measured until the tuning has caused the desired frequency ratio to be achieved, thereby causing the controlled oscillator to provide the desired frequency. | 08-04-2011 |
| 20110095830 | Direct digital synthesizer for reference frequency generation - A direct digital frequency synthesizer having a multi-modulus divider, a numerically controlled oscillator and a programmable delay generator. The multi-modulus divider receives an input clock having an input pulse frequency f | 04-28-2011 |
| 20100214031 | SPECTRUM SPREAD CLOCK GENERATION DEVICE - A spread spectrum controller ( | 08-26-2010 |
| 20110215873 | NOVEL SWITCHED PHASE AND FREQUENCY DETECTOR BASED DPLL CIRCUIT WITH EXCELLENT WANDER AND JITTER PERFORMANCE AND FAST FREQUENCY ACQUISITION - Some embodiments of the present invention may include a DPLL circuit comprising a firmware. The firmware may comprise a re-sampled NCO phase detector capable of receiving a reference clock timing signal and a VCXO clock timing signal. The re-sampled NCO phase detector may comprise a resampler capable of receiving phase output and the VCXO clock timing signal and resampling the phase output; and a subtractor capable of receiving the resampled phase output and subtracting the resampled phase output from a calculated mean value of the phase output. The firmware may further comprise a frequency detector capable of receiving the reference clock timing signal and the VCXO clock timing signal; and a multiplexer capable of switching between the re-sampled NCO phase detector and the frequency detector dependent upon a frequency lock status. | 09-08-2011 |
| 20100026397 | PLL CIRCUIT - A PLL circuit includes a VCO circuit that generates an output clock having a frequency corresponding to potential of a first control voltage signal input from an LPF at a pre-stage, using a ring oscillator in which M delay circuits having delay times changing according to a control voltage input to a control terminal are connected in a ring shape. The VCO circuit includes a low-pass filter that extracts a second control voltage signal in a low frequency band from the first control voltage signal, and, in the ring oscillator. The first control voltage signal is input to control terminals of m (m| 02-04-2010 | |
| 20110115567 | CLOCK TURN-ON STRATEGY FOR POWER MANAGEMENT - A system includes a voltage sensing module and a frequency adjustment module. The voltage sensing module is configured to sense a supply voltage of a circuit block, generate a first control signal when the supply voltage is less than or equal to a first voltage, and generate a second control signal when the supply voltage is within a predetermined range of a second voltage. The frequency adjustment module is configured to set a frequency of a clock signal supplied to the circuit block to less than a normal operating frequency of the circuit block when the supply voltage is initially supplied to the circuit block after a power on reset operation and the first control signal or the second control signal is received. | 05-19-2011 |
| 20090021311 | VCO Pre-Compensation - A VCO device is described that has pre-compensation. Digitally switchable compensation capacitors are selectively activated to adjust operation of the VCO to mitigate undesirable operational effects. In some example embodiments, the digitally switchable compensation capacitors of the VCO are adjusted to compensate for the effects of activating (from a quiescent state) an output buffer driven by the VCO. | 01-22-2009 |
| 20110156821 | CIRCUIT AND METHOD FOR GENERATING A CLOCK SIGNAL - A circuit comprises a frequency divider configured to receive an oscillating signal generated by an oscillator and to divide the oscillating signal into a clock signal, wherein the division ratio of the frequency divider is set to a value equal to one of: the integer part of the resonant frequency of the oscillator and the integer part of the resonant frequency of the oscillator plus 1. | 06-30-2011 |
| 20120007682 | CHARGE PUMP CONTROL SCHEME - An integrated circuit includes a charge pump having a voltage output. A voltage level detector is arranged to receive the voltage output, wherein the voltage level detector provides a first enable signal for the charge pump. A ring oscillator has multiple inverters. The ring oscillator is coupled to the charge pump. A counter control circuit is configured to provide a control signal for adjusting a frequency of the ring oscillator based on the first enable signal of the voltage level detector. | 01-12-2012 |
| 20120007683 | OSCILLATOR TUNING SYSTEM AND OSCILLATOR TUNING METHOD - An oscillator tuning system and an oscillator tuning method are provided. The system includes a determination unit which determines whether a power which is used in an RFID tag having an RFID oscillator is greater than a reference value; and a frequency tuner which tunes a driving frequency of the RFID oscillator according to a result of the determination. The method includes determining whether a power which is used in an RFID tag having an RFID oscillator is greater than a reference value; and tuning a driving frequency of the RFID oscillator according to a result of the determination. | 01-12-2012 |
| 20090058537 | PLL lock time reduction - In general, in one aspect, the disclosure describes a method including determining a change in a lock state of a phase lock loop (PLL). Current provided to a charge pump (CP) is adjusted based on the change in the lock state of the PLL. The adjusting of the current is synchronized to occur during an idle state of the CP. | 03-05-2009 |
| 20120112843 | SEMICONDUCTOR INTEGRATED CIRCUIT - A phase locked loop (PLL) which has a desired frequency characteristic even though a manufacturing process of a semiconductor integrated circuit has fluctuations. The semiconductor integrated circuit includes the PLL and a control unit. The PLL has a phase frequency detector, a loop filter, a voltage controlled oscillator (VCO) and a divider. The VCO comprises a voltage-current converter (VIC) and a ring oscillator. In response to a control voltage, the VIC generates a control current for setting each operating current of the ring oscillator. The control unit switches the PLL to a calibration operating period of its open loop and a normal operating period of its closed loop. | 05-10-2012 |
| 20120013406 | DIGITAL PHASE-LOCKED LOOP CLOCK SYSTEM - A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock, a second input for a feedback signal, the DPFD generating an output representing a difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word. The first frequency divider may have an input for a clock signal and a control input coupled to the adder, the DCO generating an output clock signal having an average frequency representing a frequency of the input clock signal divided by (N+F/M), wherein N is determined by the integer control word and F/M is determined by an output of the SDM. The system clock also may include a second frequency divider coupled to the DCO output clock signal outputting the feedback signal to the DPFD. | 01-19-2012 |
| 20120013408 | NETWORK OF TIGHTLY COUPLED PERFORMANCE MONITORS FOR DETERMINING THE MAXIMUM FREQUENCY OF OPERATION OF A SEMICONDUCTOR IC - A circuit interconnection structure for synchronizing a network of oscillators placed on a semiconductor substrate. One such structure comprises a first synchronizing circuit electrically coupled to a second synchronizing circuit through tunable delay circuits. Also disclosed are methods to tune oscillators placed in different regions of a circuit having multiple clock domains by estimating the relative slack of a first group of signals within the circuit with regard to the period of a first clock domain, and estimating the relative slack of the second group of signals within the circuit with regard to the period of second clock domain, wherein the estimating is performed at process and operational corners that cover the variability of the circuit at different speed conditions, then calculating tuning values for the oscillator delays for each region such that the oscillator delay slack matches the worst relative slack of the signals of the same region. | 01-19-2012 |
| 20120013407 | METHOD AND SYSTEM FOR COMPENSATION OF FREQUENCY PULLING IN AN ALL DIGITAL PHASE LOCK LOOP - The present invention is a method and system for compensation of frequency pulling in an all digital phase lock loop. The all digital phase lock loop can utilize a multi-phase oscillator including latches with substantially all of the latches paired with a corresponding dummy cell. The dummy cells can have impedance characteristics, such as variable capacitance values which correspond to the variable capacitance value of the latches such that the sum of the two variable capacitance values remains substantially constant, even when the polarity of the reference clock signal changes. The dummy cells can be, for example, variable capacitors or dummy latches. The phase lock loop can also include a multiplying unit. The multiplying unit can receive a reference clock signal and generate a frequency multiplied reference clock signal. | 01-19-2012 |
| 20120013409 | DIGITAL FREQUENCY/PHASE LOCKED LOOP - A digital FLL/PLL is provided which is capable of converging an oscillation frequency from a VCO to a desired frequency at a high speed even without setting a damping factor corresponding to each VCO gain. A digital FLL/PLL of the present invention includes: a comparator for comparing a channel signal to a loopback signal having an oscillation frequency to generate a signal error; a digital loop filter for generating a control voltage that determines the oscillation frequency, on the basis of the signal error; a VCO for controlling an oscillation frequency on the basis of the control voltage; a loopback path through which the oscillation frequency generated by the VCO is outputted as the loopback signal to the comparator; and a control section for monitoring the signal error, and controlling the digital loop filter such that the oscillation frequency of the VCO becomes a stationary state, when detecting that the signal error meets a predetermined condition after the channel signal is switched. | 01-19-2012 |
| 20120019328 | HIGH FREQUENCY SIGNAL PROCESSING DEVICE - A high frequency signal processing device is capable of carrying out high-accuracy modulation by a PLL circuit. A digital loop is configured in addition to an analog loop having, for example, a phase frequency detector, a charge pump circuit, and a loop filter. A digital calibration circuit is provided which searches for the optimal code set to a capacitor bank upon frequency modulation. Upon the search for the optimal code, a calibration controller first sets a division ratio based on a center frequency to a divider and determines the value of a voltage control signal using the analog loop. Then, the loop filter holds the value of the voltage control signal therein, and a division ratio corresponding to a “center frequency+modulated portion” is set to the divider, thereby operating the digital loop. The optimal code is obtained by a convergent value of the digital loop. | 01-26-2012 |
| 20120019327 | METHOD AND APPARATUS FOR DRIFT COMPENSATION IN PLL - Aspects of the disclosure provide a phase-locked loop (PLL). The PLL includes a voltage-controlled oscillator (VCO), a detector module, and a ramp module. The VCO has a first capacitor unit and a second capacitor unit. The VCO is configured to generate an oscillating signal having a frequency based on a first capacitance of the first capacitor unit and a second capacitance of the second capacitor unit. The detector module is configured to generate a voltage signal as a function of the oscillating signal and a reference signal. The voltage signal is used to control the first capacitor unit to stabilize the frequency of the oscillating signal. The ramp module is configured to generate a ramp signal based on the voltage signal. The ramp signal is used to control the second capacitor unit to ramp the second capacitance from a first value to a second value. | 01-26-2012 |
| 20120025919 | Synchronization of multiple high frequency switching power converters in an integrated circuit - A phase locked loop is used to synchronize the switching frequency of a high frequency switching power converter to a clock signal. A switching power converter integrated circuit is a tile-based power management unit and includes an oscillator and multiple tiles of switching power converters. The oscillator generates a clock signal having a clock frequency. A first switching power converter includes a switch and a phase locked loop and switches at a first frequency. The switch has a gate that receives a gate signal. The phase locked loop synchronizes the first frequency to a first integer multiple of the clock frequency. A second switching power converter switches at a second frequency that is a second integer multiple of the clock frequency. The first frequency is synchronized to a multiple of the clock frequency when a second edge of the gate signal coincides with a first edge of the clock signal. | 02-02-2012 |
| 20120154058 | Single-Event Upset Hardened Ring Oscillator - A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations. | 06-21-2012 |
| 20120154059 | MULTI PHASE CLOCK AND DATA RECOVERY SYSTEM - A multi-phase clock and data recovery circuit system including a voltage controlled oscillator including plural identical structural cells coupled in a ring, the voltage controlled oscillator providing plural phased shifted signals having the same frequency. The circuit further includes a feedback loop including plural data samplers adapted to receive the plural phase shifted signals provided by the voltage controlled oscillator and a phase detector coupled to coupled to a phase alignment circuit receiving output signals generated by the plural data samplers and generating control signals to the voltage controlled oscillator at a bit rate of the input signal. | 06-21-2012 |
| 20120313715 | Reference-Less Frequency Detector - Embodiments provide a reference-less frequency detector that overcomes the “dead zone” problem of conventional circuits. In particular, the frequency detector is able to accurately resolve the polarity of the frequency difference between the VCO clock signal and the data signal, irrespective of the magnitude of the frequency difference and the presence of VCO clock jitter and/or ISI on the data signal. | 12-13-2012 |
| 20110181367 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND OSCILLATION FREQUENCY CALIBRATION METHOD - A semiconductor integrated circuit device includes a DCO and a storing unit that stores a temperature coefficient of an oscillation frequency and an absolute value of the oscillation frequency, which should be set in the DCO, corresponding to potential obtained from a voltage source that changes with a monotonic characteristic with respect to temperature. | 07-28-2011 |
| 20120133444 | PHASE-LOCKED LOOP DEVICE AND CLOCK CALIBRATION METHOD THEREOF - The present invention discloses a phase-locked loop device and a clock calibration method thereof, wherein the phase-locked loop device comprises a first oscillating module, a second oscillating module, a comparison module and a control module. The first oscillating module generates a first clock signal. The second oscillating module generates a second clock signal. After comparing the first clock signal with the second clock signal, the comparison module generates a difference signal. According to the difference signal, the control module, electrically connected with the first oscillating module, the second oscillating module and the comparison module, interactively tunes the first clock signal and the second clock signal to be as close as possible. | 05-31-2012 |
| 20120313714 | Reference-Less Voltage Controlled Oscillator (VCO) Calibration - Embodiments for reference-less voltage controlled oscillator (VCO) calibration are provided. Embodiments include a VCO calibration module which uses one or more signals from a frequency detector to automatically select a proper VCO band and bring the VCO clock frequency close enough to the data rate. The VCO calibration module uses a calibration code to calibrate the VCO. In embodiments, the calibration code is determined using a frequency search scheme, which includes a discovery phase to determine the proper VCO band, and a binary search phase and a monitoring phase to select the calibration code that brings the VCO clock frequency closest to the data rate. | 12-13-2012 |
| 20100052798 | Phase-locked loop circuit - A first exemplary aspect of an embodiment of the present invention is a phase-locked loop circuit including: a voltage-current converter that converts a control voltage into a control current, the control voltage generated according to a phase difference between an input pulse signal and a feedback pulse signal fed back from an output side of a current controlled oscillator; the current controlled oscillator that generates an output pulse signal having a frequency according to the control current; a current detection unit that detects the control current; and a frequency range switch that switches a frequency range of the output pulse signal according to the detected control current. | 03-04-2010 |
| 20100052799 | VOLTAGE CONTROLLED OSCILLATOR, MMIC, AND HIGH FREQUENCY WIRELESS DEVICE - A voltage controlled oscillator having low phase noise and including: a variable resonator including a varactor and a control voltage terminal; and an open-end stub connected in parallel to the variable resonator, the open-end stub having a length shorter than or equal to an odd multiple of one quarter of a wavelength of a harmonic signal plus one sixteenth of the wavelength of the harmonic signal, and longer than or equal to an odd multiple of one quarter of the wavelength of the harmonic signal minus one sixteenth of the wavelength of the harmonic signal. In this structure, a high Q value is realized for a fundamental wave frequency. Fluctuation in a control voltage due to a harmonic signal is controlled. | 03-04-2010 |
| 20100277246 | Precision, temperature stable clock using a frequency-control circuit and a single oscillator - A frequency-control circuit, which is configured to receive a first signal having a first untuned frequency from a first oscillator, and to alter one or more pulses of the first signal to tune an output frequency of an output clock signal to have an average frequency at the desired target frequency. In some embodiments, the frequency-control circuit receives a signal from a single oscillator to generate a calibrated, precise, and temperature-stable clock. | 11-04-2010 |
| 20100277245 | PHASE LOCK LOOP CIRCUITS - A phase lock loop circuit is provided. A phase frequency detector detects a phase difference between a feedback signal and a reference signal, and generates a phase error signal in response to the detected phase difference. A charge pump consists of at least one core device and outputs a current signal based on the phase error signal. An active loop filter receives and transfers the current signal into a control signal. Operating voltage of the active loop filter is higher than operating voltage of the charge pump. A controlled oscillator receives the control signal and generates an output signal in response to the control signal. A feedback divider receives the output signal to generate the feedback signal. | 11-04-2010 |
| 20120176202 | Frequency Synthesizer with Built-in Carrier and Crystal Oscillation Frequency Offset Cancellation - A frequency synthesizer of a transceiver for generating a crystal oscillation frequency and a carry frequency having been done a process of frequency offset cancellation with that of another transceiver. The frequency offset cancellation of the frequency synthesizer is done in accordance with a wireless signal which is transmitted from another transceiver received. The frequency synthesizer has a first sigma-delta modulator receiving a signal transmitted by a transceiver at far area responding thereafter a frequency divisor value in accordance with the channel information of the received signal and a frequency offset between two. | 07-12-2012 |
| 20100007425 | PLL FREQUENCY SYNTHESIZER - A frequency synthesizer includes a voltage-controlled oscillator, a frequency range tuning circuit which detects a frequency control code that sets a voltage-controlled frequency range of the voltage-controlled oscillator corresponding to the frequency division ratio which is variably-set, and a frequency control code memory which stores the frequency control code detected by the frequency range tuning circuit corresponding to the frequency division ratio. In an initialization interval, the frequency range tuning circuit detects the frequency control code corresponding to the frequency division ratio which is variably-set, and the frequency control code memory stores the frequency control code which is detected. In a normal operation interval, in response to the frequency selection signal, the frequency control code, which is stored in the frequency control code memory and corresponds to the frequency division ratio which is variably-set, is output to the voltage-controlled oscillator. | 01-14-2010 |
| 20120182077 | OSCILLATOR - A MEMS oscillator including: an oscillator unit being capable of outputting an output from an amplifier as an original oscillator signal that includes a feedback type oscillator circuit including a MEMS resonator and an amplifier, and an automatic gain controller receiving the output from the amplifier and controlling a gain of the amplifier based on a level of the output to maintain a level of the output from the amplifier constant; and a corrector unit that receives the original oscillator signal, that generates from the original oscillator signal a signal of a predetermined set frequency, and that outputs the generated signal of the predetermined set frequency as an output signal. The corrector unit receives, separately from the original oscillator signal, an information signal that includes a signal having a correspondence relationship between a gain at a resonance frequency of the MEMS resonator from the oscillator unit, corrects a frequency of the original oscillator signal based on the information signal to generate the signal of the predetermined set frequency, and outputs the generated signal of the predetermined set frequency as the output signal. | 07-19-2012 |
| 20090021312 | PLL circuit - It has been difficult that conventional PLL circuits have a suppression characteristic of suppressing the phase noise which is free of variation due to temperature and individual difference and stable in a wide frequency band. The present invention provides a PLL circuit which can absorb variation of phase noise characteristic due to temperature and individual difference and has a phase noise suppression characteristic stable in a wide frequency band. The PLL circuit comprises, at the succeeding stage, a first register for storing a first parameter for controlling the loop gain, a first multiplier for multiplying the output of the phase comparator by a first parameter, a second register for storing a second parameter for controlling the response characteristic, a second multiplier for multiplying the output of the first multiplier by a second parameter, and a CPU for setting optimum parameters in the first and second registers depending on the use frequency band, the ambient temperature, and the device individual difference. By controlling the loop gain and the response characteristic to optimum values, a good suppression characteristic in a wide frequency band is achieved. | 01-22-2009 |
| 20120256693 | SUPPLY-REGULATED VCO ARCHITECTURE - A supply-regulated VCO exhibits reduced or no supply sensitivity peaking. The VCO includes an oscillator whose supply current is regulated to control the oscillating frequency of the oscillator. A VCO input signal controls the supply current so that there is a relationship between the input signal and the oscillator output frequency. Power supply noise that might otherwise affect oscillator operation is shunted from a supply current input lead of the oscillator to ground by a bypass capacitor. In one example, an auxiliary circuit supplies an auxiliary supply current to the oscillator, thereby reducing the amount of supply current a supply regulation control loop circuit must supply. In another example, a supply regulation control loop circuit supplies a control current to a main oscillator, but the bypass capacitor is not coupled to this oscillator but rather is coupled to a slave oscillator that is injection locked to the main oscillator. | 10-11-2012 |
| 20110215875 | Phase-locked loop circuit, semiconductor integrated circuit, electronic device, and control method of phase-locked loop circuit - A phase-locked loop circuit includes: a phase and frequency comparing section configured to compare a phase of an external reference clock signal with a phase of a comparison clock signal, and generate an error signal corresponding to a result of comparison; an oscillating section configured to generate an internal clock signal of an oscillation frequency corresponding to the error signal; a frequency dividing section configured to generate the comparison clock signal by frequency-dividing the internal clock signal by a predetermined frequency dividing ratio; an oscillator control section configured to generate an oscillation control signal for controlling frequency of the internal clock signal output from the oscillating section on a basis of the error signal; and a frequency divider control section configured to generate a frequency division control signal for controlling a bias current of the frequency dividing section on a basis of the error signal. | 09-08-2011 |
| 20120286880 | REFERENCE FREQUENCY GENERATING DEVICE - To provide a reference frequency generating device that can output a highly accurate reference frequency signal even if a reference signal becomes unable to be acquired. The reference frequency generating device includes a synchronization circuit, a temperature sensor, and a controller. The synchronization circuit controls a reference frequency signal outputted from a voltage controlled oscillator, by a control signal obtained based on a reference signal. The temperature detector detects a temperature of the voltage controlled oscillator being used. When the reference signal is unable to be acquired, the controller corrects a voltage controlled signal in consideration of a distortion in the aging characteristic of the voltage controlled oscillator based on a rate of change with time in a slope of the oscillator temperature, and generates a holdover control signal based on corrected contents to control the voltage controlled oscillator. | 11-15-2012 |
| 20120286879 | Low Noise Oscillator - An oscillator for use in generating a signal having a desired frequency includes a first inductor element being electrically coupled from one end of a first capacitive element to a first voltage connection point, a second inductor element being electrically coupled from one end of a second capacitive element to a second voltage connection point, a third inductor element being electrically coupled from another end of the first capacitive element to the first voltage connection point, a fourth inductor element being electrically coupled from another end of the second capacitive element to the second voltage connection point. The first, second, third, and fourth inductor elements being configured such that a first conductive trace loop formed by the first and third inductor elements is interleaved with a second conductive trace loop formed by the second and fourth inductor elements such that said conductive trace loops are configured to operate in substantially a same magnetic field. A first drive circuit is electrically coupled to the first and second inductor elements forming a first resonance circuit with the first and second capacitive elements and a second drive circuit is electrically coupled to the third and fourth inductor elements forming a second resonance circuit with the first and second capacitive elements, such that the first and second drive circuits are mutually configured to establish and maintain a unified oscillation in the first and second resonance circuits at the desired frequency. | 11-15-2012 |
| 20130021105 | INTEGRATED CIRCUIT WITH AN INTERNAL RC-OSCILLATOR AND METHOD FOR CALIBRATING AN RC-OSCILLATOR - An integrated circuit ( | 01-24-2013 |
